Non-invasive optical power monitor

Abstract

The present disclosure relates to non-invasive optical power monitors. One aspect can provide a method for fabricating a photonic integrated circuit (PIC) having an embedded optical power monitor. The method can include generating a photomask based on a design of the PIC, the photomask including a pattern defining an optical waveguide for embedding the optical power monitor. Generating the photomask can include introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide. The method can further include fabricating the PIC, which can include using the photomask to generate the optical waveguide having the introduced roughness on a sidewall corresponding to the edge of the pattern, thereby allowing free carriers to be generated by light absorbed by the roughness for detection by the optical power monitor.

Description

Background Technology Technical Field

[0002] This disclosure generally relates to the fabrication of photonic devices. More specifically, this disclosure relates to the fabrication of photonic devices having a non-destructive optical power monitor. Attached Figure Description

[0003] Figure 1A illustrates an example of a waveguide-based optical power monitor according to the prior art.

[0004] Figure 1B shows an enlarged view of the waveguide region according to the prior art.

[0005] Figure 2 An example of an optical mask for defining a waveguide in a photonic integrated circuit (PIC) is illustrated according to one aspect of this application.

[0006] Figure 3 A flowchart illustrating an example of a process for manufacturing a PIC having a waveguide-based power monitor according to one aspect of this application is presented.

[0007] Figures 4A to 4D The illustration shows a top view of a waveguide during the manufacturing process according to one aspect of this application.

[0008] Figure 4E The figure shows a cross-sectional view of a ridge waveguide according to one aspect of this application.

[0009] Figure 5 An example of an optical mask for defining a waveguide in a PIC is illustrated according to one aspect of this application.

[0010] Figure 6 A flowchart illustrating an example of a process for designing and manufacturing a photomask according to one aspect of this application is presented.

[0011] Figure 7 A block diagram illustrating an example of an automated photomask design apparatus according to one aspect of this application is shown.

[0012] Figure 8 An example of a computer system according to one aspect of this application is illustrated, which facilitates the design of a photomask for a PIC having an embedded optical power monitor.

[0013] In these accompanying drawings, the same reference numerals refer to the same elements. Detailed Implementation

[0014] Large optical systems with multiple interconnected optics typically rely on optical power monitors to monitor the performance of individual optics to ensure proper operation of the entire optical system. Due to the compact design of photonic integrated circuits (PICs), optical power monitoring in PICs can be challenging. Furthermore, conventional optical power monitoring methods often rely on extracting (e.g., via a beam splitter) a small fraction of the light to be monitored and routing the extracted light to a photodetector. This technique can lead to undesirable optical power loss, especially for optical systems comprising multiple cascaded optics. In addition, uncertainties in the splitting ratios of various beam splitters can also result in inaccurate power monitoring.

[0015] Hitless optical power monitors have been introduced to reduce losses associated with optical power monitoring. Waveguide-based hitless optical power monitors can detect the power of light propagating in a waveguide without absorbing any light other than that inherently scattered due to the roughness of the waveguide's sidewalls. More specifically, the hitless optical power monitor can be embedded in the waveguide in which the light to be monitored propagates (e.g., by constructing a capacitive structure around the waveguide (e.g., a metal-oxide-semiconductor (MOS) capacitor)).

[0016] Figure 1A illustrates an example of a waveguide-based optical power monitor according to the prior art. In the example shown in Figure 1A, the waveguide-based optical power monitor 100 includes a MOS capacitor 102, a first electrode 104, a second electrode 106, a SiO2 layer 108, and a Si substrate 110. The MOS capacitor 102 may include a waveguide region 112, an oxide layer 114, and a buffer semiconductor layer 116. In one example, the waveguide region 112 may include a Si waveguide with a low doping level (e.g., it may have a doping level of less than 10). 16 / cm 3 The first electrode 104 may be an n-type electrode contacting a buffer semiconductor layer 116 comprising an n-type doped semiconductor (e.g., GaAs), and the second electrode 106 may be a p-type electrode contacting a p-type region 118 comprising p-type doped Si with a relatively high doping level to reduce series resistance. The oxide layer 114 may comprise Al2O3 and have a thickness of approximately 10 nm.

[0017] Figure 1B shows an enlarged view of waveguide region 112 according to the prior art. As can be seen in Figure 1B, the sidewalls of waveguide 112 may be inherently rough due to defects in the manufacturing process (e.g., photolithography and dry etching). It should be noted that the sidewall roughness is exaggerated in Figure 1B for illustrative purposes. This roughness can generate defect states for photons, resulting in the generation of free carriers when photons are absorbed by defects (i.e., roughness). The generated free carriers can affect the conductivity of waveguide region 112. The intensity of light propagating along waveguide region 112 can then be measured based on the current following the current through waveguide region 112.

[0018] Compared to optocoupler-based power monitors, waveguide-based optical power monitors offer a low-loss and compact solution for optical power monitoring. Furthermore, implementing waveguide-based non-destructive optical power monitors in PIC devices can be simple, as almost all PIC devices include optical waveguides, and the inherent sidewall roughness of waveguides ensures the generation of free carriers. However, improvements in semiconductor manufacturing technology can lead to reduced sensitivity in waveguide-based non-destructive optical power monitors. More specifically, as process nodes (i.e., the smallest feature size achievable by semiconductor manufacturing processes) shrink, the sidewalls of Si waveguides become smoother. Reduced sidewall roughness can lead to reduced photon absorption, and thus, reduced free carrier generation. When fewer free carriers are generated for the same amount of light, the optical power monitor becomes less sensitive.

[0019] To address this power monitoring sensitivity issue, according to some aspects of this application, the PIC manufacturing process can be modified to intentionally enhance sidewall roughness at the power monitoring point. More specifically, if the PIC is to be manufactured using a process node that may result in lower sensitivity for waveguide-based optical power monitors, the waveguide photomask can be modified to introduce rough edges at the power monitoring point. For example, if the PIC is to be manufactured using a 65nm process or another next-generation manufacturing process, the PIC designer can modify the waveguide mask to intentionally enhance the roughness on the waveguide sidewalls at the power monitoring point. The portions of the waveguide not used for optical power monitoring (i.e., without embedded capacitor structures) can remain unchanged (e.g., they can have smooth edges).

[0020] Figure 2 An example of an optical mask for defining a waveguide in a photonic integrated circuit (PIC) according to one aspect of this application is illustrated. Figure 2In this configuration, the photomask 200 may include multiple device patterns (e.g., device patterns 202, 204, and 206) defining multiple optical devices and multiple waveguide patterns defining waveguides coupled to these optical devices. To monitor the performance of the optical devices, the PIC may also include multiple waveguide-based optical power monitors embedded in portions of the waveguides (e.g., portions 208 and 210). These waveguide portions may also be referred to as power-monitoring sites.

[0021] Figure 2 An enlarged view of the power monitoring point 210 and its surrounding area is also shown. (For example, it can be seen that...) Figure 2 As seen in the figure, the power monitoring point 210 may include a waveguide region 212 and contact regions 214 and 216. The waveguide region 212 defines a segment of the optical waveguide for embedding an optical power monitor. Contact regions 214 and 216 may define the locations of electrodes for a MOS capacitor. The electrodes may be similar to electrodes 104 and 106 shown in Figure 1A.

[0022] Waveguide region 212 can be continuously connected to adjacent waveguide segments 218 and 220, which are not part of power monitoring point 210. Light can propagate continuously through the waveguide defined by waveguide segments 218 and 220 and waveguide region 212, and the light intensity can be measured based on the number of free carriers generated in the waveguide segment defined by waveguide region 212. As previously discussed, the generation of free carriers depends on the defect state caused by surface defects (i.e., sidewall roughness) in the waveguide. If the sidewalls of the waveguide are too smooth, fewer free carriers will be generated, resulting in lower sensitivity of the optical power monitor. To ensure a sufficient number of surface defects, according to some aspects, waveguide region 212 of photomask 200 may include randomly generated rough edges instead of smooth edges, such that the fabricated waveguide has random roughness on its sidewalls corresponding to the location of power monitoring point 210. On the other hand, the regular waveguide segments in the photomask 200 (e.g., segments 218 and 220) have smooth edges to ensure that the fabricated waveguide can have smooth sidewalls at the corresponding segments to minimize loss.

[0023] The length of the power monitoring point 210 (i.e., the length of the waveguide edge with random roughness) can be relatively short. Depending on some aspects, the length of the waveguide region 212 can be between 50 μm and 200 μm. According to one aspect, the waveguide region 212 can be approximately 100 μm long. This short distance ensures that the optical power loss due to this intentionally introduced sidewall roughness can be minimized. The depth of the roughness (i.e., with...) Figure 2The deviation of the original smooth edge (shown by the dashed line) can be determined based on the actual dimensions and material system of the waveguide. In one example, the waveguide could be a silicon-on-insulator (SOI) ridge waveguide with a height of 400 nm, a width of 500 nm, and an etch depth of 225 nm. If the average depth of this intentionally generated surface roughness is approximately 5 nm, and the associated length of this random surface roughness is approximately 200 nm, then the waveguide loss for light at a wavelength of 1310 nm could be approximately 1 dB / cm. Therefore, the optical power loss within waveguide region 212 could be approximately 0.01 dB, which is negligible. According to some aspects, the random roughness on the edge of waveguide region 212 should be designed such that the resulting optical power loss at power monitoring point 210 is less than 0.1 dB. Figure 2 In the example shown, the two edges of waveguide region 212 have random roughness along the entire waveguide region 212. In an alternative example, waveguide region 212 may include one smooth edge and one edge with random roughness. In other words, random roughness is generated only on one edge of waveguide region 212, while the other edge remains unchanged. In yet another example, random roughness may be generated only on one edge or a portion of both edges of waveguide region 212. Maintaining a smooth edge or reducing the length of the rough edge can further reduce waveguide loss at power monitoring point 210.

[0024] Figure 3 A flowchart illustrating an example of a process for fabricating a PIC having a waveguide-based power monitor according to one aspect of this application is presented. During the operation, the design of the PIC is obtained (operation 302). The PIC may include various types of optical devices (e.g., amplifiers, filters, resonators, etc.) and multiple optical waveguides coupled to these optical devices. The PIC may also include at least one waveguide-based optical power monitor. A designer or an automated photomask design tool can identify multiple power monitoring points in the PIC (operation 304). According to some aspects, each power monitoring point may include a corresponding waveguide portion.

[0025] A photomask can be generated based on the identified power monitoring points (operation 306). More specifically, the photomask may include multiple device patterns defining multiple optics within a PIC and multiple waveguide patterns defining multiple waveguides coupling the optics. At least one waveguide pattern may include portions with randomly generated rough or uneven edges, said portions corresponding to power monitoring points in the PIC. According to some aspects, one or both edges of the waveguide portion may have randomly generated roughness. The level of roughness may be determined based on the dimensions and material system of the waveguides defined by the photomask and the total number of power monitoring points in the PIC. According to some aspects, the level of roughness may be designed such that the total loss at all power monitoring points may be less than a predetermined value (e.g., 0.5 dB). For example, if there are five power monitoring points in the PIC, the power loss caused by the sidewall roughness of each power monitoring point should be less than 0.1 dB. On the other hand, if there are 50 power monitoring points in the PIC, the power loss caused by the sidewall roughness of each power monitoring point should be less than 0.01 dB. Limiting the roughness level ensures that the power loss generated by the waveguide-based optical power monitor is sufficiently small or negligible. The rest of the waveguide pattern can have smooth edges, just like conventional waveguide patterns.

[0026] In one example, the waveguide pattern in the photomask can define the width of the SOI waveguide. In another example, the waveguide pattern can define an SOI waveguide with a height of 400 nm, a width of 500 nm, and an etch depth of 225 nm. The length of the waveguide portion with randomly generated rough or non-uniform edges can be between 50 μm and 200 μm. The randomly generated edge roughness can have an average value between 3 nm and 10 nm. Furthermore, the associated length of the random roughness can be between 50 nm and 200 nm.

[0027] Various mechanisms can be used to generate edges with random roughness. For example, when designing a photomask, the system can first generate a waveguide pattern using conventional methods, where the resulting waveguide pattern has smooth edges. The system can then select power monitoring points (e.g., specific waveguide sections) and generate random roughness at the edges(s) of the power monitoring points. In one example, the system can select a predetermined number of points on the smooth edge and randomly move these selected points away from the original smooth edge. The points can be randomly moved towards or away from the center of the waveguide. Rough edges can then be generated by connecting these moved points using straight line segments. The mean roughness can be the average of the absolute values ​​of the deviations of the selected points from the original smooth edge. In an alternative example, rough edges can be generated by connecting these moved points using a fitted curve. The same process can be repeated for all power monitoring points.

[0028] A photolithography process can be performed using a photomask to generate an etch mask required for subsequent etching processes (operation 308). The photolithography process may include depositing a photoresist layer on a bare SOI wafer, exposing the photoresist layer to ultraviolet light under a photomask, and developing the photoresist layer to obtain the desired mask pattern for subsequent etching processes. It should be noted that, depending on the type of photoresist used in the photolithography process (e.g., positive or negative photoresist), the photomask can be a clear-field mask or a dark-field mask. Rough edges in the waveguide pattern can be similarly generated, regardless of the polarity of the photomask. Because the waveguide pattern in the photomask includes portions with rough edges, the remaining photoresist layer after development will also have portions with rough edges.

[0029] An etching process can then be performed to form the waveguide (operation 310). The etching process can typically include dry etching processes, such as reactive ion etching (RIE). Due to the rough edges of the waveguide pattern in the photoresist layer, the sidewalls of corresponding portions of the fabricated waveguide can have random roughness. This roughness exceeds the inherent sidewall roughness caused by defective fabrication processes and can improve the sensitivity of the embedded optical power monitor without causing significant waveguide loss. The fabrication process can further include a metallization process (operation 312), wherein metal electrodes are formed near the waveguide portions with additional roughness on the sidewalls of the waveguide portions to complete the fabrication of the waveguide-based power monitor. Standard metallization processes (e.g., lift-off or sputtering) can be used.

[0030] Figures 4A to 4D The illustration shows a top view of a waveguide during the manufacturing process according to one aspect of this application. For simplicity, only a portion of the waveguide in the PIC to be manufactured is shown in these figures, and other optical structures and components in the PIC are not shown. Figure 4A The illustration shows a top view of the bare SIO chip 402. Figure 4B The illustration shows a top view of an SIO wafer 402 with a photoresist layer 404 deposited on its surface. Figure 4C The illustration shows a top view of the SIO wafer 402 after the photoresist layer has been developed. More specifically, the developed photoresist layer may include a waveguide etching mask 406. (The image likely shows a view of the SIO wafer 402 after development of the photoresist layer.) Figure 4C As seen in the image, waveguide etch mask 406 may include a regular waveguide portion with straight and smooth edges and a power monitoring portion with randomly rough edges. The edge roughness in the etch mask is transferred from the waveguide pattern in the photomask. In this example, random roughness is generated on both edges of the power monitoring portion. It is also possible that only one edge has randomly generated roughness, while the other edge remains straight and smooth.

[0031] Figure 4DThe illustration shows a top view of the wafer after the dry etching process and photoresist removal. More specifically, a waveguide structure with ridge portion 408 and base portion 410 is produced. Due to the corresponding rough edges of the waveguide etching mask 406, the dry etching process can produce random roughness on the sidewalls of the ridge portion 408. Figure 4E The illustration shows a cross-sectional view of a ridge waveguide according to one aspect of this application. The ridge waveguide 420 may include a top Si layer, a middle SiO2 layer, and a bottom Si layer. In one example, the height of the waveguide 420 may be 400 nm, the etch depth may be 225 nm, and the width of the ridge waveguide 420 may be 500 nm, such as... Figure 4E As shown.

[0032] Because waveguide modes may overlap more with the sidewalls of the waveguide's curved sections, optical power monitors embedded in the curved sections of the waveguide may be more sensitive than those embedded in the straight sections. Depending on several aspects, a PIC can be designed such that one or more waveguide-based optical power monitors are embedded in the curved sections of the waveguide. If desired, an S-shaped bend can be added to the straight waveguide to create the desired curvature.

[0033] Figure 5 An example of an optical mask for defining a waveguide in a PIC, according to one aspect of this application, is illustrated. Figure 5 In this configuration, the photomask 500 may include multiple patterns (e.g., device patterns 502, 504, and 506) for defining various optical devices and multiple waveguide patterns for defining multiple optical waveguides for coupling the optical devices. To monitor the performance of the optical devices, the PIC may also include multiple waveguide-based optical power monitors embedded in portions of the waveguides. As previously discussed, the curved portions of the waveguides allow for greater overlap between the optical modes propagating along the waveguide and the sidewalls. Therefore, a capacitor structure including curved portions of the waveguide can generate more free carriers from the same light intensity compared to a capacitor structure including a straight waveguide (e.g., the MOS structure 102 shown in FIG. 1A), resulting in a more sensitive optical power monitor.

[0034] exist Figure 5In the example shown, the waveguide pattern in photomask 508 may include curved portions (e.g., portions 508, 510, and 512) that can serve as power monitoring points. More specifically, portion 508 may include an S-shaped bend specifically added along the waveguide pattern connecting device patterns 502 and 504, and portions 510 and 512 may include arcs that are inherent parts of the waveguide pattern connecting device patterns 504 and 506. When carefully designed, each curved portion (e.g., the S-shaped bend 508) introduces only minimal loss but ensures sufficient sensitivity for the power monitor embedded in the curved portion. For example, the radius of the S-shaped bend 508 or the arcs 510 and 512 may be selected based on the waveguide size and material system to achieve the desired loss characteristics.

[0035] Depending on several factors, including the processing techniques used to manufacture the PIC, the waveguide's dimensions / material system, and the bend radius, it may not be necessary to intentionally create roughness at the edges of the bend (e.g., an S-shaped bend 508). In this case, the sidewall roughness of the manufactured waveguide depends solely on the precision of the manufacturing process (e.g., photoresist exposure and development, and dry etching of Si). For less-than-ideal manufacturing processes, the number of free carriers generated at the bend in the waveguide portion defined by part 508 may be sufficient for power monitoring purposes.

[0036] However, in some cases, process-limited sidewall roughness may not be sufficient to achieve the desired power monitoring sensitivity, and the photomask should be designed to include random roughness on the edges of the curved power monitoring points. Figure 5 An enlarged view of the curved portion 510, selected as a power monitoring point, is also shown. (As can be seen...) Figure 5 As seen in the image, the curved portion 510 may include an arc-shaped waveguide 514 and contact regions 516 and 518. Similar to... Figure 2 The contact regions 214 and 216, and contact regions 516 and 518 shown can define the location of the electrodes of the power monitor (i.e., the MOS capacitor).

[0037] exist Figure 5 In the example shown, with Figure 2 Unlike waveguide region 212, the arcuate waveguide pattern 514 includes roughness on only one of its two edges. More specifically, only the outer edge of the arcuate waveguide pattern 514 includes randomly generated roughness, while its inner edge remains smooth. The arcuate waveguide pattern 514 may also have intentionally generated roughness on both edges.

[0038] The manufacturing process of the PIC defined by photomask 500 can be similar to Figure 3The process is shown in the diagram. Aside from a specially designed photomask (i.e., a photomask with a waveguide pattern having random, rough, or uneven edges), the fabrication process for a PIC with a waveguide-based optical power monitor can be similar to that of a standard PIC. No changes are required to the photoresist exposure and development processes or the Si dry etching process, making this solution easy to implement.

[0039] Figure 6 A flowchart illustrating an example of a process for designing and manufacturing a photomask according to one aspect of this application is presented. During operation, an initial photomask design for a PIC can be generated based on a set of design requirements (operation 602). According to some aspects, the initial photomask design may include a set of photomasks generated using conventional photomask design tools, and the patterns in the waveguide layer photomasks within the set of photomasks may all have smooth edges. The design requirements may include optical power monitoring requirements indicating the number and location of waveguide-based embedded optical power monitors. According to one aspect, when generating the initial photomask design, the mask designer may interact with the photomask design tool such that the optical power monitors can be placed at curved portions of the waveguide. According to another aspect, curved portions (e.g., S-shaped bends) may be added along a straight waveguide to provide the curvature required for embedding the optical power monitors.

[0040] The system can then determine whether the optical power monitor defined by the photomask can provide sufficient power monitoring sensitivity (operation 604). Depending on some aspects, the system can estimate the sidewall roughness level of the fabricated waveguide based on the level of precision of the manufacturing process or the feature dimensions. The system can then estimate the number of free carriers generated at each power monitoring point based on the roughness level and determine whether the power monitoring sensitivity meets the requirements. It should be noted that the required power monitoring sensitivity can be determined based on the expected intensity of light propagating along the waveguide.

[0041] If the optical power monitor fails to achieve the desired power monitoring sensitivity, the system can identify power monitoring points within the waveguide layer photomask (operation 608) and modify the edges of the pattern defining the waveguide segments corresponding to those power monitoring points (operation 610). It should be noted that other layers of the photomask do not need to be modified. Depending on some aspects, edge modification may include generating random roughness at one or both edges of the waveguide pattern. The roughness level (e.g., the average roughness) can be determined based on the waveguide dimensions and material system. For example, the roughness level can be determined to ensure that each optical power monitor can provide a measurement sensitivity above a predetermined sensitivity threshold while keeping power loss below a predetermined loss threshold.

[0042] The system can then output a modified photomask design and can manufacture a set of photomasks based on the design output (operation 612). On the other hand, if the optical power monitor can achieve the desired power monitoring sensitivity, the system can output an initial design and can manufacture a set of photomasks based on the initial design (operation 612).

[0043] Depending on several factors, automated tools can be used to design photomasks. Figure 7 The diagram illustrates an example block diagram of an automated photomask design apparatus according to one aspect of this application. The automated photomask design apparatus may include an initial design layout unit 702, a power monitor sensitivity determination unit 704, a power monitor point identification unit 706, a waveguide edge modification unit 708, and a design output unit 710.

[0044] The initial design layout unit 702 can generate an initial optical mask design for the PIC. More specifically, the initial design layout unit 702 can generate an initial waveguide layer optical mask based on a set of design requirements, which may include power monitoring requirements. The waveguide pattern in the initial waveguide layer optical mask may have smooth edges. The power monitor sensitivity determination unit 704 can determine whether the sensitivity of the optical power monitor, defined by the optical mask design (which may be obtained from the initial design layout unit 702 or external files), meets the desired sensitivity requirements. For example, the power monitoring sensitivity determination unit 704 can estimate the power monitoring sensitivity based on the expected sidewall roughness resulting from the manufacturing process and the size / material system of the optical waveguide.

[0045] The power monitoring point identification unit 706 can identify waveguide segments used as power monitoring points within the waveguide layer optical mask. In one example, this can be based on the contact area (e.g., Figure 2 The power monitoring points are identified by the location of the contact areas 214 and 216 shown. The waveguide edge modification unit 708 can modify the edges of the waveguide pattern corresponding to the identified power monitoring points. More specifically, at each power monitoring point, the waveguide edge modification unit 708 can generate a predetermined level of random coarsening on one or both edges of the corresponding waveguide pattern (e.g., by generating random displacements of points on the edges of the waveguide pattern). The random distribution of the coarsening (e.g., distribution function and parameters) can be defined by the user. The design output unit 710 can output the photomask design to a photomask manufacturing tool, enabling the fabrication of a set of photomasks based on the design.

[0046] Figure 8An example of a computer system according to one aspect of this application is illustrated, which facilitates the design of photomasks for a PIC with an embedded optical power monitor. The computer system 800 may include a processor 802, a memory 804, and a storage device 806. Furthermore, the computer system 800 may be coupled to a peripheral input / output (I / O) user device 810, such as a display device 812, a keyboard 814, and a pointing device 816. The storage device 806 may store an operating system 818, a photomask design system 820, and data 840.

[0047] The photomask design system 820 may include instructions that, when executed by the computer system 800, cause the computer system 800 or processor 802 to perform the methods and / or processes described in this disclosure. Specifically, by executing these instructions, the computer system 800 can implement various functions for the automated design of photomasks for a PIC with an embedded optical power monitor. The photomask design system 820 may include instructions for generating an initial photomask design (initial design layout instruction 822), instructions for determining the sensitivity of the optical power monitor defined by the photomask (power monitor sensitivity determination instruction 824), instructions for identifying power monitoring points in the waveguide layer (power monitoring point identification instruction 826), instructions for modifying the edges of the waveguide pattern corresponding to the power monitoring points (waveguide edge modification instruction 828), and instructions for outputting the photomask design (design output instruction 830).

[0048] In general, this disclosure describes a system and method for fabricating a PIC with an embedded optical power monitor. To improve the sensitivity of the waveguide-based embedded optical power monitor, the system can modify the waveguide pattern in a conventional photomask. More specifically, one or both edges of the waveguide pattern defining the waveguide segment for embedding the optical power monitor can be modified to include random roughness. The roughness level can be determined based on the desired power monitoring sensitivity, the precision of the waveguide fabrication process, and the size and material system of the waveguide to be fabricated. The photomask can be used in a subsequent photolithography process to generate a waveguide etching mask, and the random edge roughness can be transferred from the photomask to the etching mask. A dry etching process using the etching mask can then produce a waveguide segment with corresponding roughness on its sidewalls. This roughness can interact with propagating light to generate free carriers, which can affect the conductivity of the waveguide region. The number of free carriers generated in the waveguide region can affect the power monitoring sensitivity. Therefore, by carefully designing a photomask with an appropriate level of edge roughness, the desired sensitivity of the embedded optical power monitor can be achieved.

[0049] One aspect may provide a method for fabricating a photonic integrated circuit (PIC) with an embedded optical power monitor. The method may include generating an optical mask based on a design of the PIC, the optical mask including a pattern defining an optical waveguide for embedding the optical power monitor. Generating the optical mask may include introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide. The method may further include fabricating the PIC, which may include generating the optical waveguide using the optical mask, the optical waveguide having introduced roughness on sidewalls corresponding to the edges of the pattern, thereby allowing light absorbed by the roughness to generate free carriers for detection by the optical power monitor.

[0050] In a variation of this, the optical waveguide may include a silicon-on-insulator (SOI) ridge waveguide.

[0051] In a variation of this, the level of coarseness can be determined based on a predetermined level of power monitoring sensitivity, the size and material system of the optical waveguide, and the manufacturing precision of the PIC.

[0052] In this variation, the length of the introduced rough edge can be between 50 μm and 200 μm.

[0053] In this variation, the coarse correlation length is between 50 nm and 200 nm.

[0054] In a variation of this aspect, the optical mask may include a curved pattern defining a curved portion of an optical waveguide for embedding an additional power monitor at the curved portion. The curved pattern may include one or more smooth edges.

[0055] In a variation of this, roughness can be introduced at the two edges of the pattern defining the optical waveguide.

[0056] In a variation of this aspect, generating an optical mask may include: obtaining an initial optical mask, wherein waveguide-defined patterns in the initial optical mask all have smooth edges; identifying patterns defining optical waveguides for embedding an optical power monitor; and modifying at least one smooth edge of the identified pattern by introducing coarsening.

[0057] In variations of this approach, manufacturing a PIC may include: using a photomask as a photoresist exposure mask to perform a photolithography process to produce a waveguide etching mask; and using the waveguide etching mask to perform a dry etching process.

[0058] One aspect may provide a photomask for fabricating a photonic integrated circuit (PIC) having a waveguide-based embedded optical power monitor. The photomask may include a plurality of device patterns defining optics within the PIC and a plurality of waveguide patterns defining optical waveguides coupled to the optics within the PIC. At least one waveguide pattern defines an optical waveguide for embedding the waveguide-based optical power monitor, and at least one edge of the waveguide pattern includes a predetermined level of roughness.

[0059] One aspect may provide a photonic integrated circuit (PIC) with an embedded optical power monitor. The PIC is fabricated by generating an optical mask based on a PIC design, the optical mask comprising a pattern defining an optical waveguide for embedding the optical power monitor. Generating the optical mask may include introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide. The PIC may be further fabricated by generating an optical waveguide using the optical mask, the waveguide having introduced roughness on sidewalls corresponding to the edges of the pattern, thereby allowing light absorbed by the roughness to generate free carriers for detection by the optical power monitor.

[0060] The foregoing description is presented to enable any person skilled in the art to make and use the embodiments, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other implementations and applications without departing from the spirit and scope of this disclosure. Therefore, the scope of this disclosure is not limited to the examples shown, but is intended to be consistent with the maximum scope of the principles and features disclosed herein.

[0061] The methods and processes described in the Detailed Description section can be embodied in code and / or data, which can be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and / or data stored on the computer-readable storage medium, the computer system executes the methods and processes embodied in data structures and code and stored in the computer-readable storage medium.

[0062] Furthermore, the methods and processes described above may be included in a hardware device or apparatus. The hardware device or apparatus may include, but is not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), dedicated or shared processors that execute specific software units or code at specific times, and other programmable logic devices now known or developed hereafter. When the hardware device or apparatus is activated, it performs the methods and processes included therein.

[0063] The foregoing descriptions of the various examples have been presented solely for illustrative and descriptive purposes. The descriptions are not intended to be exhaustive or to limit the scope of this disclosure to the disclosed forms. Accordingly, many modifications and variations will be apparent to those skilled in the art.

Claims

1. A method for manufacturing a photonic integrated circuit (PIC) with an embedded optical power monitor, the method comprising: A photomask is generated based on the design of the PIC, wherein the photomask includes a pattern defining an optical waveguide for embedding the optical power monitor, and wherein generating the photomask includes introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide; and Fabricating the PIC includes using the photomask to generate the optical waveguide, which has introduced roughness on sidewalls corresponding to the edge of the pattern, thereby allowing light absorbed by the roughness to generate free carriers for detection by the optical power monitor.

2. The method as described in claim 1, wherein, The optical waveguide includes a silicon-on-insulator (SOI) ridge waveguide.

3. The method as described in claim 1, wherein, The level of roughness is determined based on a predetermined level of power monitoring sensitivity, the size and material system of the optical waveguide, and the manufacturing precision of the PIC.

4. The method of claim 1, wherein, The length of the introduced rough edge is between 50. With 200 between.

5. The method of claim 1, wherein, The coarse correlation length is between 50 nm and 200 nm.

6. The method of claim 1, wherein, The optical mask further includes a curved pattern defining a curved portion of an optical waveguide for embedding an additional power monitor at the curved portion, wherein the curved pattern includes one or more smooth edges.

7. The method of claim 1, wherein, The roughness is introduced at the two edges of the pattern defining the optical waveguide.

8. The method of claim 1, wherein, Generating the photomask includes: An initial optical mask is obtained, wherein the waveguide-defined patterns in the initial optical mask all have smooth edges; Identify the pattern defining the optical waveguide for embedding the optical power monitor; and The roughness is introduced to modify at least one smooth edge of the identified pattern.

9. The method of claim 1, wherein, Manufacturing the PIC includes: The photomask is used as a photoresist exposure mask to perform a photolithography process to generate a waveguide etching mask; and The waveguide etching mask is used to perform a dry etching process.

10. An optical mask for fabricating a photonic integrated circuit (PIC) with a waveguide-based embedded optical power monitor, the optical mask comprising: Multiple device patterns, the multiple device patterns defining optical devices within the PIC; as well as Multiple waveguide patterns define optical waveguides coupled to the optical devices within the PIC; In this embodiment, at least one waveguide pattern defines an optical waveguide for embedding the waveguide-based optical power monitor, and in this embodiment, at least one edge of the waveguide pattern includes a predetermined level of roughness, thereby allowing light absorbed by the roughness to generate free carriers for detection by the optical power monitor.

11. The photomask as claimed in claim 10, wherein, The level of roughness is determined based on a predetermined level of power monitoring sensitivity, the dimensions and material system of the optical waveguide, and the precision of the manufacturing process used to manufacture the PIC.

12. The photomask of claim 10, wherein, The length of the rough edge is between 50. With 200 between.

13. The photomask of claim 10, wherein, The coarse correlation length is between 50 nm and 200 nm.

14. The photomask as claimed in claim 10, wherein, The waveguide pattern includes a curved pattern defining a curved portion of an optical waveguide for embedding an additional power monitor at the curved portion, wherein the curved pattern includes one or more smooth edges.

15. The photomask as claimed in claim 10, wherein, Both edges of the waveguide pattern defining the optical waveguide include roughness.

16. The photomask as claimed in claim 10, wherein, The photomask is generated through the following operations: An initial optical mask is obtained, wherein the waveguide-defined patterns in the initial optical mask all have smooth edges; Identify the pattern of the optical waveguide used for embedding the waveguide-based optical power monitor; and The roughness is introduced to modify at least one smooth edge of the identified pattern.

17. A photonic integrated circuit (PIC) with an embedded optical power monitor, wherein, The PIC is manufactured through the following operations: A photomask is generated based on the design of the PIC, wherein the photomask includes a pattern defining an optical waveguide for embedding the optical power monitor, and wherein generating the photomask includes introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide; and The optical waveguide is generated using the photomask, and the waveguide has introduced roughness on the sidewalls corresponding to the edge of the pattern, thereby allowing light absorbed by the roughness to generate free carriers for detection by the optical power monitor.

18. The PIC as claimed in claim 17, in, The level of roughness is determined based on a predetermined level of power monitoring sensitivity, the dimensions and material system of the optical waveguide, and the precision of the manufacturing process used to manufacture the PIC.

19. The PIC as claimed in claim 17, in, The length of the introduced rough edge is between 50. With 200 Between; and The coarse correlation length is between 50 nm and 200 nm.

20. The PIC of claim 17, wherein, The PIC is manufactured through the following operations: The photomask is used as a photoresist exposure mask to perform a photolithography process to produce a waveguide etching mask; as well as The waveguide etching mask is used to perform a dry etching process.

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