Image display method, display module and display device

Abstract

The present disclosure provides a kind of, it is related to display technical field.Image display method is used to control display panel to display image, the image display method includes: obtaining image data;The image data includes multiple sub-pixel data, the multiple sub-pixel data includes to be compensated data, the pixel electrode of the to be compensated sub-pixel is to be compensated pixel electrode, one side of the to be compensated pixel electrode is equipped with data line one, the other side of the to be compensated pixel electrode is equipped with data line two, and the electrode polarity of data line one and data line two is same;The to be compensated data is used to drive data line one and / or data line two, compensation data is obtained according to the to be compensated data;According to the compensation data, the to be compensated sub-pixel is controlled.Improvement has been made to the dark line phenomenon of display image.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an image display method, display module, and display device. Background Technology

[0002] Some liquid crystal display panels in related technologies are prone to displaying gradual dark lines when displaying images. Summary of the Invention

[0003] The embodiments of this disclosure provide an image display method, a display module, and a display device.

[0004] On one hand, an image display method is provided for controlling a display panel to display an image, the image display method comprising:

[0005] Acquire image data; the image data includes multiple sub-pixel data, the multiple sub-pixel data includes data to be compensated, the pixel electrode of the sub-pixel to be compensated is the pixel electrode to be compensated, a data line one is provided on one side of the pixel electrode to be compensated, and a data line two is provided on the other side of the pixel electrode to be compensated, and the polarity of the data line one and the data line two is the same; the data to be compensated is used to drive the data line one and / or the data line two.

[0006] Compensation data is obtained based on the data to be compensated;

[0007] The sub-pixel to be compensated is controlled according to the compensation data.

[0008] The image display method provided in this disclosure involves a change in the polarity of data line one and data line two. The potential of the pixel electrode to be compensated changes under the coupling effect of parasitic capacitance, causing a decrease in the voltage between the pixel electrode to be compensated and the common electrode, thereby reducing the brightness of the sub-pixel to be compensated. For example, the absolute value of the potential of the pixel electrode to be compensated decreases under the coupling effect of parasitic capacitance, further reducing the voltage between the pixel electrode to be compensated and the common electrode. Therefore, to improve the dark line phenomenon in the displayed image, it is necessary to increase the absolute value of the potential of the pixel electrode to be compensated to counteract the coupling effect of parasitic capacitance. For example, the increased absolute value of the potential decreases under the coupling effect of parasitic capacitance, and the decreased absolute value of the potential is closer to the absolute value of the theoretical potential of the pixel electrode to be compensated, thus making the brightness of the sub-pixel to be compensated closer to the theoretical brightness and improving the dark line phenomenon in the displayed image. The potential written to the pixel electrode to be compensated is related to the data signal within the data line, which is generated by the data driver chip based on the data to be compensated. Therefore, it is necessary to compensate the data to be compensated, and the sub-pixel data obtained after compensation is the compensated data.

[0009] In some implementations, obtaining compensation data based on the data to be compensated includes:

[0010] The compensation value is calculated;

[0011] The compensation data is obtained by summing the data to be compensated and the compensation value.

[0012] In some embodiments, a parasitic capacitance is formed between the pixel electrode to be compensated and the first data line and the second data line. When the display panel switches from the current display frame to the next display frame, the potential change of the pixel electrode to be compensated caused by the coupling effect of the parasitic capacitance is the coupling voltage. The calculation of the compensation value includes:

[0013] The compensation value is obtained based on the coupling voltage.

[0014] In some embodiments, a first parasitic capacitance is formed between the pixel electrode to be compensated and the first data line, and a second parasitic capacitance is formed between the pixel electrode to be compensated and the second data line. The potential change of the pixel electrode to be compensated caused by the coupling effect of the first parasitic capacitance is a first coupling voltage, and the potential change of the pixel electrode to be compensated caused by the coupling effect of the second parasitic capacitance is a second coupling voltage. Before obtaining the compensation value based on the coupling voltage, the method further includes:

[0015] The coupling voltage is obtained based on the first coupling voltage and the second coupling voltage.

[0016] In some embodiments, before obtaining the coupling voltage based on the first coupling voltage and the second coupling voltage, the method further includes:

[0017] The first coupling voltage is obtained based on the capacitance value of the first parasitic capacitor, the potential of the pixel electrode to be compensated in the current display frame, and the average potential of the column containing the pixel electrode to be compensated in the next display frame.

[0018] The second coupling voltage is obtained based on the capacitance value of the second parasitic capacitor, the potential of the pixel electrode to be compensated in the current display frame, and the average potential of the column containing the pixel electrode to be compensated in the next display frame.

[0019] In some implementations, the compensation values ​​of multiple sub-pixels in the sub-pixel column to be compensated are different.

[0020] In some implementations, the same sub-pixel column includes a first sub-pixel to be compensated and a second sub-pixel to be compensated. Within the same display frame time, the first sub-pixel to be compensated emits light before the second sub-pixel to be compensated, and the compensation value of the first sub-pixel to be compensated is less than the compensation value of the second sub-pixel to be compensated.

[0021] In some implementations, the calculation of the compensation value includes:

[0022] The baseline compensation value is calculated.

[0023] The compensation coefficient is calculated; the compensation coefficients of multiple sub-pixels to be compensated in the sub-pixel column are different;

[0024] The compensation value is obtained by multiplying the benchmark compensation value and the compensation coefficient.

[0025] In some implementations, the calculation of the compensation coefficient includes:

[0026] The compensation coefficient is obtained based on the number of sub-pixels to be compensated in the sub-pixel column and the position of the sub-pixels to be compensated.

[0027] In some implementations, obtaining compensation data based on the data to be compensated includes:

[0028] Based on the preset correspondence between the data to be compensated and the compensation data, the compensation data corresponding to the data to be compensated is obtained.

[0029] In another aspect, a display module is provided, including a timing controller and a data driver chip. The timing controller is configured to: acquire image data; the image data includes multiple sub-pixel data, the multiple sub-pixel data includes data to be compensated, the pixel electrode of the sub-pixel to be compensated is the pixel electrode to be compensated, a data line one is provided on one side of the pixel electrode to be compensated, and a data line two is provided on the other side of the pixel electrode to be compensated, and the polarity of the data line one and the data line two is the same; the data to be compensated is used to drive the data line one and / or the data line two; compensation data is obtained according to the data to be compensated; the data driver chip is configured to: control the data line corresponding to the sub-pixel to be compensated according to the compensation data.

[0030] In another aspect, a display device is provided, which includes the aforementioned display module.

[0031] In another aspect, a readable storage medium is provided, the readable storage medium including a stored program, wherein the program is executed by an electronic device to perform the image display method.

[0032] In another aspect, a program product is provided, which includes a program / instruction that, when executed by a processor, implements the image display method.

[0033] In another aspect, an electronic device is provided, comprising a memory and a processor, wherein the memory stores a program and the processor is configured to execute the image display method via the program. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A front view structure of a display device provided in an embodiment of this disclosure;

[0036] Figure 2 This is a schematic diagram of the structure of a display module provided in an embodiment of the present disclosure;

[0037] Figure 3 This is a schematic diagram of the structure of an array substrate provided in an embodiment of the present disclosure;

[0038] Figure 4 This is a partial structural schematic diagram of an array substrate provided in an embodiment of the present disclosure;

[0039] Figure 5 This is a partial structural schematic diagram of a display module provided in an embodiment of the present disclosure;

[0040] Figure 6 This is a schematic diagram of the polarity of the data lines during the current display frame time;

[0041] Figure 7 This is a schematic diagram of the polarity of the data lines during the next display frame time;

[0042] Figure 8 A flowchart illustrating the steps of an image display method provided in this embodiment of the disclosure;

[0043] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of the present disclosure. Detailed Implementation

[0044] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0045] In the embodiments of this disclosure, the terms "first," "second," "third," and "fourth" are used to distinguish identical or similar items with essentially the same function and effect, solely for the purpose of clearly describing the technical solutions of the embodiments of this disclosure, and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated.

[0046] In embodiments of this disclosure, "a plurality of" means two or more, and "at least one" means one or more, unless otherwise expressly and specifically defined.

[0047] In the embodiments of this disclosure, the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this disclosure.

[0048] Figure 1 This is a front view structure of a display device provided in an embodiment of the present disclosure. For example... Figure 1 As shown, some embodiments of this disclosure provide a display device 1000, which can be any device with display functionality. For example, the display device 1000 can be a mobile phone, wireless device, personal data assistant (PDA), handheld or portable computer, GPS receiver / navigator, camera, MP4 video player, camcorder, game console, watch, clock, calculator, television monitor, flat panel display, computer monitor, automotive display (e.g., odometer display, etc.), navigator, cockpit controller and / or display, camera view display (e.g., display of a rearview camera in a vehicle), electronic photograph, electronic billboard or sign, projector, architectural structure, packaging and aesthetic structure (e.g., a display of an image of a piece of jewelry), etc. Figure 1 The following illustration uses a computer monitor as an example of a display device 1000. The display device 1000 includes a display module 100, through which images are displayed.

[0049] Figure 2 This is a schematic diagram of the structure of a display module provided in an embodiment of this disclosure. Figure 2As shown, the display module 100 may include a display panel 110, a control board 120, and a flexible circuit board 130 electrically connected between the display panel 110 and the control board 120.

[0050] Display panel 110 can be a liquid crystal display (LCD) panel. When display panel 110 is an LCD panel, it can be a horizontal electric field type LCD panel or a vertical electric field type LCD panel. When display panel 110 is a horizontal electric field type LCD panel, display panel 100 can be an in-plane switching (IPS) LCD panel or an advanced super-dimensional switching (ADS) LCD panel.

[0051] Continue to refer to Figure 2 The display panel 110 may have a display area AA and a non-display area NA connected to the display area AA. The non-display area NA may be located on one side, two sides, or three sides of the display area, or the non-display area NA may be arranged around the display area AA.

[0052] Continue to refer to Figure 2 The display area AA contains multiple pixels, and each pixel includes multiple sub-pixels P. For example, a pixel may include red sub-pixels, green sub-pixels, and blue sub-pixels. Sub-pixels P include pixel electrodes, common electrodes, and liquid crystal particles located between the pixel electrodes and the common electrodes. An electric field can be formed between the pixel electrodes and the common electrodes, and the liquid crystal particles can be deflected under the drive of the electric field. Therefore, the amount of backlight passing through this sub-pixel P can be controlled by controlling the deflection angle of the liquid crystal particles.

[0053] For example, multiple sub-pixels P can be arranged in an array. For instance, the array arrangement of multiple sub-pixels P forms multiple sub-pixel rows and multiple sub-pixel columns. Multiple sub-pixels P within a sub-pixel row are arranged along a first direction X, and multiple sub-pixels P within a sub-pixel column are arranged along a second direction Y. The first direction X and the second direction Y intersect each other, and the angle between the first direction X and the second direction Y can be selected and set according to actual needs, for example, the angle between the first direction X and the second direction Y can be 85°, 88°, 90°, 92°, or 95°, etc.

[0054] The display panel 110 includes an array substrate, a color filter substrate, and liquid crystal particles. The array substrate and the color filter substrate are arranged in pairs, and the liquid crystal particles are located between the array substrate and the color filter substrate. When the display panel 110 is a vertical electric field type liquid crystal display panel, the pixel electrode is located on the array substrate, and the common electrode is located on the color filter substrate; when the display panel 110 is a horizontal electric field type liquid crystal display panel, both the pixel electrode and the common electrode are located on the array substrate.

[0055] Figure 3 This is a schematic diagram of the structure of an array substrate provided in an embodiment of the present disclosure, wherein... Figure 3 This illustration shows the case where the display panel 110 is a vertical electric field type liquid crystal display panel. For example... Figure 3 As shown, the array substrate also includes multiple data lines DL, each of which can be electrically connected to the pixel electrodes in multiple sub-pixels P. For example, the data lines DL can extend along the second direction Y, and one data line DL can be electrically connected to multiple pixel electrodes in a sub-pixel column.

[0056] Figure 4 This is a partial structural schematic diagram of an array substrate provided in an embodiment of this disclosure. Exemplarily, as shown... Figure 4 As shown, the array substrate may further include a switching transistor and a gate line GL. The switching transistor is connected between the data line DL and the pixel electrode, and the gate line GL is electrically connected to the gate of the switching transistor. When the switching transistor is turned on under the control of a signal within the gate line, the signal within the data line DL is written into the pixel electrode, creating an electric field between the pixel electrode and the common electrode; when the switching transistor is turned off under the control of a signal within the gate line GL, the data line DL is disconnected from the pixel electrode, and the electric field between the pixel electrode and the common electrode remains in a maintained state.

[0057] Continue to refer to Figure 2 The control board 120 is used to receive image data. For example, the control board 120 receives image data from a graphics processing unit (GPU) or from a system-on-chip (SoC).

[0058] Display module 100 displays an image corresponding to the image data. For example, the image data includes color data for each pixel in the display panel. For instance, when a pixel includes red, green, and blue sub-pixels, the color data includes the grayscale values ​​of the red, green, and blue sub-pixels, respectively.

[0059] The control board 120 is also used to generate signals required by the gate drive circuit and the data drive chip based on the image data. The gate drive circuit can be a gate drive chip electrically connected to each gate line, or it can be an integrated circuit (Gate on Array, or GOA) formed on the array substrate.

[0060] Specifically, the control board 120 includes a timing controller, which receives image data and generates signals required by the gate drive circuit and the data drive chip based on the image data. Figure 5 This is a partial structural diagram of a display module provided in an embodiment of this disclosure. Exemplarily, as shown... Figure 5 As shown, the display module includes a timing controller, a data driver chip, a level converter, and a gate driver circuit. The timing controller receives image data in formats such as LVDS and EDP, and sends Mini-LVDS format signals to the data driver chip and STV, CPV, LC, and other signals to the level converter based on this image data. The gate driver circuit and the data driver chip control the display panel to display images according to the signals from the timing controller.

[0061] The flexible printed circuit board 130 (FPC) electrically connects the control board 120 to the display panel 110, for example, the FPC 130 is electrically connected to each data line DL within the display panel. Exemplarily, the FPC 130 is a chip-on-film (COP) film. For example, a data driver chip is disposed on the FPC 130. Signals generated by the control board 120 are sent to the data driver chip via the FPC 130. The data driver chip generates data signals based on the signals from the control board 120, and these data signals are sent to each data line DL within the display panel 110 via the FPC 130. Alternatively, the data driver chip can also be disposed within the display panel itself.

[0062] In some display panels of related technologies, the electric field direction between the pixel electrode and the common electrode remains unchanged. This causes the liquid crystal particles between the pixel electrode and the common electrode to polarize under the long-term action of the constant electric field, affecting the display effect.

[0063] To address the polarization phenomenon of liquid crystal particles, some display panels in related technologies employ a column-flipping data driving method. That is, the polarity of the same data line (DL) in the current display frame time is opposite to its polarity in the next adjacent display frame time, and within the same display frame time, the polarities of adjacent data lines (DL) are opposite. For example, multiple data lines (DL) may include adjacent first and second data lines. In the current frame time, the signal in the first data line is positive, and the signal in the second data line is negative; in the next frame time, the signal in the first data line is negative, and the signal in the second data line is positive.

[0064] However, the displayed image is prone to H-Crosstalk when using a column-flipped data driving method. Specifically, parasitic capacitance (Cdc) is generated between each data line DL in the display panel and the common electrode. When the displayed image includes a long straight line along the first direction X, the parasitic capacitance Cdc between each data line DL and the common electrode cannot cancel each other out, thus affecting the signal accuracy within the data lines DL and causing the H-Crosstalk phenomenon.

[0065] To address the H-Crosstalk phenomenon, the display panel employs data driving methods such as POLC, H2D, and H6D to minimize the cancellation of parasitic capacitance Cdc between the data lines (DL) and the common electrode. Specifically, POLC uses a flexible circuit board as a unit, where the polarities of the data lines (DL) electrically connected to the same flexible circuit board can be arranged in a positive-negative-positive-negative-positive... pattern. H2D uses two adjacent data lines (DL) as units, where the two data lines within the same unit have the same polarity, while the data lines within adjacent units have opposite polarities; for example, the polarities of the data lines (DL) are arranged periodically in a positive-positive-negative-negative-positive-negative... pattern. H6D uses six adjacent data lines (DL) as units, where the two data lines within the same unit have the same polarity, while the data lines within adjacent units have opposite polarities; for example, the polarities of the data lines (DL) are arranged periodically in a positive-positive-positive-positive-negative-negative-negative-negative-positive-positive... pattern.

[0066] However, when using data driving methods such as POLC, H2D, and H6D, the displayed image may show one or more gradually dark lines. Specifically, when using data driving methods such as POLC, H2D, and H6D, there are at least two adjacent data lines, Data Line 1 and Data Line 2, with the same polarity, in the array substrate. For example, when using the POLC data driving method, the last data line among the multiple data lines DL electrically connected to one of the flexible circuit boards is Data Line 1, and the first data line among the multiple data lines DL electrically connected to another adjacent flexible circuit board is Data Line 2. Data Line 1 and Data Line 2 are adjacent, and their polarities may be the same. As another example, when using data driving methods such as H2D or H6D, any data line DL is Data Line 1, and a data line DL located in the same unit as Data Line 1 and adjacent to Data Line 1 is Data Line 2. Therefore, Data Line 1 and Data Line 2 are adjacent, and their polarities may be the same.

[0067] A parasitic capacitance (Cpd) is formed between the data line DL and the pixel electrode. When the pixel electrode is fully charged, the switching transistor is turned off, the data line DL is disconnected from the pixel electrode, and the pixel electrode is in the voltage holding stage. At this time, the potential in the pixel electrode is easily pulled by the adjacent data line DL, which affects the voltage between the pixel electrode and the common electrode.

[0068] Figure 6 This is a schematic diagram of the polarity of the data lines during the current display frame. For example... Figure 6 As shown, the pixel electrode located between data line 3 and data line 4 is a conventional pixel electrode. During the current display frame time, the polarity of data line 3 is positive, and the polarity of data line 4 is negative. Figure 7 This is a schematic diagram of the polarity of the data lines for the next display frame. (Example:) Figure 7 As shown, during the next display frame, the polarity of data line three is negative, and the polarity of data line four is positive. Because there is a parasitic capacitance Cpd3 between data line three and the regular pixel electrode, and the voltage between the two plates of parasitic capacitance Cpd3 cannot change abruptly, when the polarity of data line three switches from positive to negative, the potential of the regular pixel electrode decreases under the pull of data line three. Similarly, because there is a parasitic capacitance Cpd4 between data line four and the regular pixel electrode, and the voltage between the two plates of parasitic capacitance Cpd4 cannot change abruptly, when the polarity of data line four switches from negative to positive, the potential of the regular pixel electrode increases under the pull of data line four. That is, data line three pulls the potential of the regular pixel electrode downwards, and data line four pulls the potential of the regular pixel electrode upwards, making the potential of the regular pixel electrode essentially unchanged or changing only slightly.

[0069] Continue to refer to Figure 6 and Figure 7The pixel electrode located between data line 1 and data line 2 is the pixel electrode to be compensated. During the current display frame time, the polarity of data line 1 is positive, and the polarity of data line 2 is also positive. During the next display frame time, the polarity of data line 1 becomes negative, and the polarity of data line 2 also becomes negative. Because there is a parasitic capacitance Cpd1 between data line 1 and the pixel electrode to be compensated, and the voltage between the two plates of parasitic capacitance Cpd1 cannot change abruptly, when the polarity of data line 1 switches from positive to negative, the potential of the pixel electrode to be compensated decreases under the pull of data line 1. Similarly, because there is a parasitic capacitance Cpd2 between data line 2 and the pixel electrode to be compensated, and the voltage between the two plates of parasitic capacitance Cpd2 cannot change abruptly, when the polarity of data line 2 switches from positive to negative, the potential of the pixel electrode to be compensated decreases under the pull of data line 2. That is, both data lines 1 and 2 pull the potential of the pixel electrode to be compensated downwards, making the potential of the pixel electrode to be compensated smaller, and the voltage between the pixel electrode to be compensated and the common electrode smaller. The sub-pixel where the pixel electrode to be compensated is located is the sub-pixel to be compensated. That is, the brightness of the sub-pixel to be compensated is reduced, which causes dark lines to appear in the displayed image.

[0070] Similarly, if both data line 1 and data line 2 are negative within the current display frame, and both become positive within the next display frame, dark lines will appear in the displayed image. Specifically, because there is a parasitic capacitance Cpd1 between data line 1 and the pixel electrode to be compensated, and the voltage between the two plates of parasitic capacitance Cpd1 cannot change abruptly, when the polarity of data line 1 switches from negative to positive, the potential of the pixel electrode to be compensated increases under the pull of data line 1. Similarly, because there is a parasitic capacitance Cpd2 between data line 2 and the pixel electrode to be compensated, and the voltage between the two plates of parasitic capacitance Cpd2 cannot change abruptly, when the polarity of data line 2 switches from negative to positive, the potential of the pixel electrode to be compensated increases under the pull of data line 2. That is, both data line one and data line two pull the potential of the pixel electrode to be compensated upward, making the potential of the pixel electrode to be compensated larger, that is, the potential of the pixel electrode to be compensated is closer to zero, the voltage between the pixel electrode to be compensated and the common electrode becomes smaller, that is, the brightness of the sub-pixel to be compensated decreases, thereby causing dark lines to appear in the displayed image.

[0071] To address the issue of dark lines in images, one proposed method is to change the row flip from Column to V2Line. With V2Line, the polarity of the same data line DL switches frequently within the same display frame, causing the time DL is in positive polarity to be equal to the time it is in negative polarity. This reduces the time the pixel electrode to be compensated is pulled downwards, improving the brightness of the dark lines, but it still cannot completely solve the problem. Furthermore, the frequent switching of the polarity of the same data line DL within the same display frame increases the power consumption of the display module. Another proposed method is to reduce the parasitic capacitance Cpd between the data line DL and the pixel electrode to be compensated, and / or increase the total parasitic capacitance value within the display panel, but this still cannot better solve the dark line problem.

[0072] In view of this, embodiments of the present disclosure provide an image display method for controlling the display panel to display an image in order to improve the dark line phenomenon.

[0073] Figure 8 This is a flowchart illustrating the steps of an image display method provided in an embodiment of this disclosure. Figure 8 As shown, the image display method includes the following steps.

[0074] S100, acquire image data.

[0075] S200, obtain compensation data based on the data to be compensated.

[0076] S300 controls the sub-pixels to be compensated based on the compensation data.

[0077] Image data includes multiple subpixel data, each corresponding one-to-one with a subpixel in the display panel. The subpixel data is used to control the brightness of the corresponding subpixel in the display panel. For example, if the display panel has a resolution of 1920*1080, and each pixel includes three subpixels, then the image data includes 190*1080*3 subpixel data.

[0078] The sub-pixel data can be sent to a data driver chip, which can convert the sub-pixel data into a data signal and write it to the data line. For example, the sub-pixel data is the grayscale value of the sub-pixel, and the data driver chip converts the grayscale value into a potential and writes it to the data line.

[0079] Two adjacent data lines with the same polarity are designated as Data Line 1 and Data Line 2. Data Line 1 and Data Line 2 exist as a pair. The display panel can include one pair of Data Line 1 and Data Line 2, or it can include multiple pairs of Data Line 1 and Data Line 2. The sub-pixel located between Data Line 1 and Data Line 2 is the sub-pixel to be compensated. The pixel electrode of the sub-pixel to be compensated can be electrically connected to Data Line 1 or Data Line 2. Among the multiple sub-pixel data, the sub-pixel data used to control the emission of the sub-pixel to be compensated is the data to be compensated.

[0080] In practical applications, image data can be acquired by a timing controller.

[0081] When the polarity of data line one and data line two changes, the potential of the pixel electrode to be compensated changes under the coupling effect of the parasitic capacitance Cpd, causing a decrease in the voltage between the pixel electrode to be compensated and the common electrode, thereby reducing the brightness of the sub-pixel to be compensated. For example, the absolute value of the potential of the pixel electrode to be compensated decreases under the coupling effect of the parasitic capacitance Cpd, causing a decrease in the voltage between the pixel electrode to be compensated and the common electrode.

[0082] Therefore, to improve the dark line phenomenon in the displayed image, it is necessary to increase the absolute value of the potential of the pixel electrode to be compensated to counteract the coupling effect of the parasitic capacitance Cpd. For example, the increased absolute value of the potential decreases under the coupling effect of the parasitic capacitance Cpd, and the decreased absolute value of the potential is closer to the absolute value of the theoretical potential of the pixel electrode to be compensated. This makes the brightness of the sub-pixel to be compensated closer to the theoretical brightness, thus improving the dark line phenomenon in the displayed image.

[0083] The potential written to the electrode of the pixel to be compensated is related to the data signal within the data line, which is generated by the data driver chip based on the data to be compensated. Therefore, the data to be compensated needs to be compensated, and the sub-pixel data obtained after compensation is the compensated data.

[0084] In practical applications, the timing controller can obtain the compensation data based on the data to be compensated.

[0085] For example, compensation data is sent to a data driver chip, which then controls the emission of the sub-pixel to be compensated based on the compensation data.

[0086] In some implementations, step S200, obtaining compensation data based on the data to be compensated, includes the following sub-steps.

[0087] S210, the compensation value is calculated.

[0088] S220, the compensation data is obtained by summing the data to be compensated and the compensation value.

[0089] When the sub-pixel data is a grayscale value, the compensation value is also a grayscale value. For example, if the data to be compensated is 100 and the compensation value is 20, then the compensated data is equal to 100 + 20 = 120.

[0090] The compensation data is larger than the data to be compensated, which increases the absolute value of the potential written to the pixel electrode to be compensated. The increased absolute value of the potential decreases under the coupling effect of the parasitic capacitance Cpd, and the decreased absolute value of the potential is closer to the absolute value of the theoretical potential of the pixel electrode to be compensated. This makes the brightness of the sub-pixel to be compensated closer to the theoretical brightness, thus improving the dark line phenomenon in the displayed image.

[0091] Figure 8 This is a structural block diagram of a timing controller provided in an embodiment of this disclosure. Figure 8 As shown, the timing controller may include an image quality improvement module, which is configured to: calculate a compensation value and sum the data to be compensated with the compensation value to obtain the compensation data.

[0092] For example, continue to refer to Figure 8 The timing controller may further include a first signal conversion module, a timing control module, and a second signal conversion module. The first signal conversion module receives image data and, based on the image data, sends multiple sub-pixel data to the image quality improvement module and sends column synchronization signals (Vsync), row synchronization signals (Hsync), and DE signals to the timing control module. The timing control module sends start signals (STV), CPV, LC, and other control signals to the level converter based on the column synchronization signals (Vsync), row synchronization signals (Hsync), and DE signals, and sends DE, TP, and POL control signals to the image quality improvement module. The image quality improvement module obtains compensation data based on the data to be compensated and sends the compensated multiple sub-pixel data to the second signal conversion module. The second signal conversion module sends image data to the data driver chip based on the compensated multiple sub-pixel data.

[0093] For example, the image quality improvement module is also used to implement functions such as OD, Demura, and Gamma.

[0094] In some implementations, step S210, calculating the compensation value, includes the following steps.

[0095] S213, the compensation value is obtained based on the coupling voltage.

[0096] When the display panel switches from the current display frame to the next display frame, the potential change of the pixel electrode to be compensated caused by the coupling effect of the parasitic capacitance Cpd is called the coupling voltage. In order to counteract the influence of the coupling voltage, the magnitude of the compensation value can be related to the magnitude of the coupling voltage; the larger the coupling voltage, the larger the compensation value, and the smaller the coupling voltage, the smaller the compensation value.

[0097] In practical applications, the image quality improvement module can obtain the coupling voltage through calculation or testing, and store the coupling voltage in the timing controller, so that the image quality improvement module can read the coupling voltage.

[0098] In some implementations, the following steps are included before step S213.

[0099] S212, the coupling voltage is obtained based on the first coupling voltage and the second coupling voltage.

[0100] In this system, a first parasitic capacitance is formed between the pixel electrode to be compensated and data line one, and the potential change of the pixel electrode to be compensated caused by the coupling effect of the first parasitic capacitance is the first coupling voltage; a second parasitic capacitance is formed between the pixel electrode to be compensated and data line two, and the potential change of the pixel electrode to be compensated caused by the coupling effect of the second parasitic capacitance is the second coupling voltage.

[0101] For example, the coupling voltage is obtained from the sum of the first coupling voltage and the second coupling voltage. Data line one and data line two have the same pulling effect on the pixel electrode to be compensated, simultaneously raising or lowering the potential of the pixel electrode to be compensated. Therefore, the coupling voltage can be obtained from the sum of the first coupling voltage and the second coupling voltage.

[0102] In some implementations, the following steps are included before step S212.

[0103] S211, the first coupling voltage is obtained based on the capacitance value of the first parasitic capacitor, the potential of the pixel electrode to be compensated in the current display frame, and the average potential of the column where the pixel electrode to be compensated is located in the next display frame.

[0104] The second coupling voltage is obtained based on the capacitance value of the second parasitic capacitor, the potential of the pixel electrode to be compensated in the current display frame, and the average potential of the column containing the pixel electrode to be compensated in the next display frame.

[0105] For example, the first coupling voltage and the second coupling voltage can be calculated according to the following formula.

[0106]

[0107] Where, ΔV pd This represents the potential change of the pixel electrode to be compensated when switching from the current display frame to the next display frame. ΔV is used to calculate the first coupling voltage. pd ΔV represents the first coupling voltage, and when used to calculate the second coupling voltage, it represents the second coupling voltage. pd Indicates the second coupling voltage; C pd C represents the parasitic capacitance between the pixel electrode to be compensated and the data line. When used to calculate the first coupling voltage, Cpd C represents the first parasitic capacitance, which is used when calculating the second coupling voltage. pd Indicates the second parasitic capacitance; V i,j V represents the potential of the pixel electrode of the sub-pixel in the i-th row and j-th column of the next display frame. i, ' j h represents the pixel electrode potential of the sub-pixel in the i-th row and j-th column of the current display frame. total v is the total number of rows. total This represents the total number of columns.

[0108] When dark lines appear in the displayed image, multiple or all sub-pixels in the sub-pixel column where the dark lines are located can be compensated. That is, multiple or all sub-pixels in the sub-pixel column where the dark lines are located are sub-pixels to be compensated.

[0109] In practical applications, multiple subpixels to be compensated located in the same subpixel column may dim at different times. For example, continue to refer to... Figure 6 When scanning in a row from top to bottom, along the positive direction of the second direction Y, the time for the brightness of the sub-pixel to be compensated to darken gradually decreases. That is, the sub-pixel to be compensated located at the top of the figure darkens for a shorter time, while the sub-pixel to be compensated located at the bottom of the figure darkens for a longer time.

[0110] Specifically, within the current display frame time, the pixel electrode to be compensated located at the top of the diagram is charged first, followed by the pixel electrode to be compensated located at the bottom of the diagram. Once the bottommost pixel electrode to be compensated has finished charging, the current display frame switches to the next display frame, and simultaneously, the polarity of data line one and data line two switches. During the polarity switching of data line one and data line two, the absolute value of the potential of each pixel electrode to be compensated in the sub-pixel column is pulled down under the coupling effect of the parasitic capacitance Cpd. After the absolute value of the potential is pulled down, the sub-pixel to be compensated darkens. Because the upper pixel electrode to be compensated needs to wait for the lower pixel electrode to finish charging before being pulled down, while the lower pixel electrode to be compensated is pulled down immediately after charging, and the sub-pixel to be compensated only darkens after the absolute value of the potential is pulled down, the upper pixel electrode to be compensated darkens for a shorter time and has a higher average brightness, while the lower pixel electrode to be compensated darkens for a longer time and has a lower average brightness.

[0111] It should be noted that the above describes the scanning process from top to bottom. When scanning from bottom to top, the lower sub-pixels to be compensated darken for a shorter time and have a higher average brightness, while the upper sub-pixels to be compensated darken for a longer time and have a lower average brightness.

[0112] As can be seen from the above, the brightness of the sub-pixel to be compensated varies depending on its position along the second direction, and therefore the required compensation value also varies. Lower brightness requires a larger compensation value, while higher brightness requires a smaller compensation value.

[0113] Therefore, in some implementations, the compensation values ​​of multiple sub-pixels in the same sub-pixel column are different. This makes the brightness of multiple sub-pixels in the same sub-pixel column more consistent after compensation.

[0114] In some implementations, the same sub-pixel column includes a first sub-pixel to be compensated and a second sub-pixel to be compensated. Within the same display frame time, the first sub-pixel to be compensated emits light before the second sub-pixel to be compensated, and the compensation value of the first sub-pixel to be compensated is less than the compensation value of the second sub-pixel to be compensated.

[0115] For example, along the positive direction of the second direction, the compensation values ​​of multiple sub-pixels to be compensated located in the same sub-pixel column gradually decrease.

[0116] In some implementations, step S210, calculating the compensation value, includes the following steps.

[0117] S214, calculate the benchmark compensation value;

[0118] S215, the compensation coefficient is calculated;

[0119] S216, the compensation value is obtained by multiplying the benchmark compensation value and the compensation coefficient.

[0120] Since the brightness of the sub-pixels to be compensated varies depending on their position along the second direction, the required compensation values ​​also differ. Lower brightness requires larger compensation values, and higher brightness requires smaller compensation values. For example, the sub-pixels to be compensated located at the top of the image require smaller compensation values, while those located at the bottom require larger compensation values. Therefore, a baseline compensation value and a compensation coefficient can be calculated. The compensation values ​​for the sub-pixels to be compensated at different positions within the same sub-pixel column can then be obtained by multiplying the baseline compensation value and the compensation coefficient.

[0121] Within the same sub-pixel column, the compensation coefficients for sub-pixels at different positions can be different. For example, the compensation coefficient gradually decreases along the positive direction of the second direction. Conversely, the compensation coefficients for sub-pixels at different positions within the same sub-pixel column can also be the same. For instance, two adjacent sub-pixels in the same sub-pixel column may have similar brightness, thus allowing them to be set with the same compensation coefficient.

[0122] For example, the baseline compensation value is the maximum compensation value. For instance, the baseline compensation value is the compensation value required for the bottommost sub-pixel to be compensated.

[0123] In some implementations, the compensation coefficient is calculated in step S215, including the following steps.

[0124] The compensation coefficient is obtained based on the number of sub-pixels to be compensated in the sub-pixel column and the position of the sub-pixel to be compensated.

[0125] The position of the sub-pixel to be compensated can be represented by a number. For example, if the sub-pixel to be compensated is the first sub-pixel from the top, then the position of the sub-pixel to be compensated is 1; if the sub-pixel to be compensated is the second sub-pixel from the top, then the position of the sub-pixel to be compensated is 2, and so on.

[0126] For example, the compensation coefficient is equal to the ratio of the position of the sub-pixel to be compensated to the number of sub-pixels to be compensated in the sub-pixel column. For instance, if the position of the sub-pixel to be compensated is 1, and the number of sub-pixels to be compensated in the sub-pixel column is 1080*3, then the compensation coefficient is 1 / (1080*3).

[0127] For example, the compensation coefficient τ can be calculated using the following formula:

[0128]

[0129] Among them, h total Let i be the total number of rows, and i indicates that the sub-pixel to be compensated is located in the i-th row.

[0130] For example, the coupling voltage in step S212 can be calculated according to the following formula:

[0131] ΔV pd =-τ·(ΔV) pd1 +ΔV pd2 )

[0132] Where, ΔV pd For the coupling voltage, ΔV pd1 The first coupling voltage is ΔV. pd2 This is the second coupling voltage.

[0133] In some implementations, step S200, obtaining compensation data based on the data to be compensated, includes the following steps.

[0134] S201, Based on the preset correspondence between the data to be compensated and the compensation data, obtain the compensation data corresponding to the data to be compensated.

[0135] For example, during the manufacturing of a display module, the correspondence between the data to be compensated and the compensation data is obtained through calculation and testing. This correspondence is then stored in the display module, allowing the timing controller to read the correspondence and select the compensation data corresponding to the data to be compensated. This reduces the computational load on the timing controller and lowers the computational power requirements.

[0136] For example, continue to refer to Figure 5 The timing controller also includes a memory, such as dynamic random access memory (DRAM). The correspondence between the data to be compensated and the compensation data is stored in the DRAM. The image quality improvement module can read the correspondence between the data to be compensated and the compensation data in the DRAM, and thus select the compensation data corresponding to the data to be compensated.

[0137] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of this disclosure. Figure 9 As shown, this disclosure also provides an electronic device M00, which may include one or more of the following components: a processor M01 and a memory M02.

[0138] Optionally, the processor M01 connects to various parts of the electronic device using various interfaces and lines. It performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory M02, and by calling data stored in the memory M02. Optionally, the processor M01 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor M01 can integrate one or more of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content displayed on the touchscreen; the NPU implements artificial intelligence (AI) functions; and the baseband chip handles wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor M01, but may be implemented using a separate chip.

[0139] The memory M02 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory M02 may include a non-transitory computer-readable storage medium. The memory M02 may be used to store instructions, programs, code, code sets, or instruction sets. The memory M02 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described below, etc.; the data storage area may store data created according to the use of the electronic device (such as audio data, phone book, etc.).

[0140] In addition, those skilled in the art will understand that the structure of the electronic device M00 shown in the above figures does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0141] This disclosure also provides a readable storage medium storing at least one instruction or program, which is loaded and executed by a processor to implement the image display method as described in the above embodiments.

[0142] This disclosure also provides a program product including instructions or programs stored in a readable storage medium. A processor retrieves the instructions or programs from the readable storage medium and executes the instructions or programs to implement the image display method as described in the above embodiments.

[0143] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An image display method for controlling a display panel to display an image, characterized in that, The image display method includes: Image data is acquired; the image data includes multiple sub-pixel data, the multiple sub-pixel data includes data to be compensated, the pixel electrode of the sub-pixel to be compensated is the sub-pixel electrode to be compensated, a data line one is provided on one side of the sub-pixel electrode to be compensated, and a data line two is provided on the other side of the sub-pixel electrode to be compensated, and the polarity of the data line one and the data line two is the same; the data to be compensated is used to drive the data line one and / or the data line two; a first parasitic capacitance is formed between the sub-pixel electrode to be compensated and the data line one, and a second parasitic capacitance is formed between the sub-pixel electrode to be compensated and the data line two. Compensation data is obtained based on the data to be compensated; The first coupling voltage is obtained based on the capacitance value of the first parasitic capacitor, the potential of the sub-pixel electrode to be compensated in the current display frame, and the average potential of the column containing the sub-pixel electrode to be compensated in the next display frame. The second coupling voltage is obtained based on the capacitance value of the second parasitic capacitor, the potential of the sub-pixel electrode to be compensated in the current display frame, and the average potential of the column containing the sub-pixel electrode to be compensated in the next display frame. The sub-pixel to be compensated is controlled according to the compensation data.

2. The image display method according to claim 1, characterized in that, The step of obtaining compensation data based on the data to be compensated includes: The compensation value is calculated; The compensation data is obtained by summing the data to be compensated and the compensation value.

3. The image display method according to claim 2, characterized in that, A parasitic capacitance is formed between the sub-pixel electrode to be compensated and the first and second data lines. When the display panel switches from the current display frame to the next display frame, the potential change of the sub-pixel electrode to be compensated caused by the coupling effect of the parasitic capacitance is the coupling voltage. The calculated compensation value includes: The compensation value is obtained based on the coupling voltage.

4. The image display method according to claim 3, characterized in that... The potential change of the sub-pixel electrode to be compensated caused by the coupling effect of the first parasitic capacitance is the first coupling voltage, and the potential change of the sub-pixel electrode to be compensated caused by the coupling effect of the second parasitic capacitance is the second coupling voltage. Before obtaining the compensation value based on the coupling voltage, the method further includes: The coupling voltage is obtained based on the first coupling voltage and the second coupling voltage.

5. The image display method according to any one of claims 2 to 4, characterized in that, The compensation values ​​of multiple sub-pixels in the sub-pixel column to be compensated are different.

6. The image display method according to claim 5, characterized in that, The same sub-pixel column includes a first sub-pixel to be compensated and a second sub-pixel to be compensated. Within the same display frame time, the first sub-pixel to be compensated emits light before the second sub-pixel to be compensated, and the compensation value of the first sub-pixel to be compensated is less than the compensation value of the second sub-pixel to be compensated.

7. The image display method according to claim 6, characterized in that, The calculated compensation value includes: The baseline compensation value is calculated. The compensation coefficient is calculated; the compensation coefficients of multiple sub-pixels to be compensated in the sub-pixel column are different; The compensation value is obtained by multiplying the benchmark compensation value and the compensation coefficient.

8. The image display method according to claim 6, characterized in that, The calculation of the compensation coefficient includes: The compensation coefficient is obtained based on the number of sub-pixels to be compensated in the sub-pixel column and the position of the sub-pixels to be compensated.

9. The image display method according to claim 1, characterized in that, The step of obtaining compensation data based on the data to be compensated includes: Based on the preset correspondence between the data to be compensated and the compensation data, the compensation data corresponding to the data to be compensated is obtained; The image display method according to claim 1 is characterized in that the compensation data is greater than the data to be compensated.

10. A display module, characterized in that, include: A timing controller, configured to acquire image data; The image data includes multiple sub-pixel data, which includes data to be compensated. The pixel electrode of the sub-pixel to be compensated is the sub-pixel electrode to be compensated. A data line one is provided on one side of the sub-pixel electrode to be compensated, and a data line two is provided on the other side of the sub-pixel electrode to be compensated. The polarities of the data line one and the data line two are the same. The data to be compensated is used to drive the data line one and / or the data line two. A first parasitic capacitance is formed between the sub-pixel electrode to be compensated and the data line one, and a second parasitic capacitance is formed between the sub-pixel electrode to be compensated and the data line two. Compensation data is obtained based on the data to be compensated. The first coupling voltage calculation module is configured to: obtain the first coupling voltage based on the capacitance value of the first parasitic capacitor, the potential of the sub-pixel electrode to be compensated in the current display frame, and the average potential of the column containing the sub-pixel electrode to be compensated in the next display frame; The second coupling voltage calculation module is configured to: obtain the second coupling voltage based on the capacitance value of the second parasitic capacitance, the potential of the sub-pixel electrode to be compensated in the current display frame, and the average potential of the column containing the sub-pixel electrode to be compensated in the next display frame; A data driver chip is configured to control the data line corresponding to the sub-pixel to be compensated according to the compensation data.

11. A display device, characterized in that, Includes the display module as described in claim 10.

12. A readable storage medium, characterized in that, The readable storage medium includes a stored program, wherein the program is executed by an electronic device to perform the image display method according to any one of claims 1 to 9.

13. A program product comprising a program / instructions, characterized in that, When the program / instructions are executed by the processor, they implement the image display method according to any one of claims 1 to 9.

14. An electronic device comprising a memory and a processor, characterized in that, The memory stores a program, and the processor is configured to execute the image display method according to any one of claims 1 to 9 through the program.

Images