Multi-core particle heat dissipation packaging structure and forming method thereof

Abstract

The application discloses a multi-core particle heat dissipation packaging structure and a forming method thereof. The packaging structure comprises a core particle layer provided with a plurality of core particles, a substrate arranged below the core particle layer, a manifold micro-channel adapter plate arranged above the core particle layer, a manifold micro-channel arranged between each core particle and the manifold micro-channel adapter plate, and a packaging cover plate arranged above the manifold micro-channel adapter plate. According to the size, thickness and position of different core particles, the application can design manifold micro-channels of different shapes to adapt to the heat dissipation requirements of different core particles, thereby avoiding the problem of uneven heat dissipation caused by the use of a uniform heat dissipation structure in the prior art. Through the manifold micro-channel adapter plate and the packaging cover plate, the inlet and outlet management and distribution of the cooling medium of the multi-core particle are realized, thereby avoiding the problems of complex structure, high cost and low reliability caused by the use of multiple cooling medium inlets and outlets in the prior art.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor chip packaging technology, and in particular relates to a multi-core heat dissipation packaging structure and its formation method. Background Technology

[0002] As semiconductor technology continues to advance, transistor size continues to shrink, but it is also gradually approaching its physical limits. Moore's Law's doubling rate of transistor count every two years is slowing down. This makes it increasingly difficult and costly to continuously increase the number of transistors on a single chip. Meanwhile, facing the ever-increasing demand for computing power from markets such as artificial intelligence, big data models, and high-performance computing, the increasing transistor density, size, and performance of monolithic chips are accompanied by rising power consumption, lower yields, and more complex thermal management and power consumption control. To address these challenges, chiplet technology has emerged. Chiplet technology combines multiple small chips into a large chip through high-density interconnection. Compared to monolithic chips, chiplet technology has the following advantages: First, smaller chips have higher production efficiency and less loss due to defective chips; second, multiple chips allow for more flexible design, combining chips with different functions as needed, packaging chips with different functions and suitable process nodes together like building blocks to form a large monolithic chip; third, this overcomes the limitations of monolithic chips in terms of area, yield, and process, while improving chip reusability and flexibility. However, due to the significant increase in the density of heterogeneous integration of multi-core particles, heat dissipation poses a severe challenge to the reliability of heterogeneous systems.

[0003] Currently, there are three main types of multi-chip packaging structures: Multi-Chip Module (MCM) packaging, 2.5D packaging, and 3D packaging. The main differences between these three packaging technologies lie in the interconnection methods between the chips and the packaging layers. MCM packaging connects multiple chips to a substrate via wire bonding or soldering, then packages them into a module. The advantages of MCM packaging are low cost, simple design, and good compatibility; the disadvantages are low interconnect density, high latency, high power consumption, severe heat accumulation, and poor heat dissipation. 2.5D packaging connects multiple chips to a silicon substrate via through-silicon vias (TSVs) or micro-sockets, then packages them into a module. The advantages of 2.5D packaging are high interconnect density, low latency, and low power consumption; the disadvantages are high cost, complex design, and poor compatibility. 3D packaging connects multiple chips through vertical stacking to form a three-dimensional module. The advantages of 3D packaging are even higher interconnect density, lower latency, and lower power consumption; the disadvantages are higher cost, more complex design, and poorer compatibility. 2.5D and 3D packaging stacking structures can cause heat generated between chips during operation to transfer and accumulate, reducing performance and stability.

[0004] Currently, common multi-chip heat dissipation technologies primarily rely on thermal interface materials (TIMs) between the chip and the heat dissipation device to transfer the heat generated during chip operation, which is then dissipated through heat dissipation devices such as air cooling or liquid cooling. However, this traditional heat dissipation technology is becoming insufficient to cope with the increasing heat loads because the thermal resistance of TIMs reduces heat conduction efficiency, and the thickness and uniformity of TIMs also affect the consistency of heat conduction. Furthermore, due to the complexity of multi-chip packaging structures, the heat distribution and heat flow between different chips can cause thermal imbalances, leading to the generation of hot spots and increased thermal stress.

[0005] In summary, multi-chip heat dissipation presents the following challenges: First, multi-chip designs typically involve combinations of chips with different functions and thermal properties, increasing the complexity of heat dissipation design; second, thermal cross-interference between different chips can lead to hot spots, affecting performance and reliability; and third, the different coefficients of thermal expansion of different materials can increase the mechanical stress of the package under temperature changes, causing chip damage. Therefore, a new multi-chip heat dissipation packaging structure and its formation method are needed to solve the above problems. Summary of the Invention

[0006] To address the aforementioned problems in the prior art, this invention provides a multi-core heat dissipation packaging structure and its formation method. Based on the differences in the packaging size and position of different core particles, multiple manifold microchannels are provided on the back side of each core particle, which can efficiently manage and distribute the heat generated by different core particles. The multi-core particles, the manifold channel adapter plate, and the packaging cover plate that controls the inflow and outflow of coolant are connected together, which can completely encapsulate the multi-core particles, improving reliability and lifespan.

[0007] In a first aspect, the present invention provides a multi-core heat dissipation packaging structure, comprising:

[0008] The core layer is configured with multiple core particles;

[0009] A substrate, disposed below the core layer, is configured to connect the core to external logic circuitry.

[0010] Manifold microchannel adapter plate, which is arranged above the core layer;

[0011] A manifold microchannel is disposed between each core and the manifold microchannel adapter plate; wherein the manifold microchannel is configured to provide heat dissipation for each core.

[0012] A sealing cover plate is disposed above the manifold microchannel adapter plate;

[0013] Furthermore, gaps exist between the core particles in the core layer;

[0014] Furthermore, the size and thickness of each core particle in the core layer may be the same or not completely the same;

[0015] Furthermore, the manifold microchannels on each core particle in the core particle layer include multiple sub-channels, a first inlet / outlet, and a second inlet / outlet. One end of each sub-channel is connected to the first inlet / outlet, and the other end is connected to the second inlet / outlet.

[0016] Furthermore, the manifold microchannel adapter plate is configured with a first cooling medium inlet and outlet communicating with the corresponding manifold microchannel of each core particle; the first cooling medium inlet and outlet includes a cooling medium inlet that can accommodate the inflow of coolant into all core particle manifold microchannels, and a plurality of cooling medium outlets that can accommodate the outflow of coolant from all core particle manifold microchannels; more preferably, the cooling medium inlet is connected to the first inlet and outlet of all core particle manifold microchannels, and the plurality of cooling medium outlets are respectively connected to the second inlet and outlet of each core particle manifold microchannel;

[0017] Furthermore, the encapsulation cover is provided with a second cooling medium inlet and outlet, configured so that the coolant flows in and out through the first cooling medium inlet and outlet of the manifold microchannel adapter plate;

[0018] More preferably, the second cooling medium inlet and outlet includes a main inlet for the flow of coolant into the manifold microchannel adapter plate and a plurality of main outlets for the flow of coolant out of the manifold microchannel adapter plate; the main inlet is connected to the cooling medium inlet, and the plurality of main outlets are respectively connected to a plurality of cooling medium outlets;

[0019] Furthermore, the multi-core heat dissipation packaging structure also includes a sealant, which is arranged between the edge of each core and the manifold microchannel adapter plate, and between the edge of the manifold microchannel adapter plate and the packaging cover plate, and is configured as a protective connection structure.

[0020] Furthermore, the substrate is a printed circuit board composed of materials such as glass fiber yarn, copper foil, copper clad laminate, epoxy resin, ink, and wood pulp.

[0021] Furthermore, the material of the manifold microchannel adapter plate is one of silicon-based materials, metal alloys, glass, etc.

[0022] Furthermore, the substrate of the encapsulation cover is made of one of the following: metal alloy, silicon-based material, glass, etc.

[0023] In a second aspect, the present invention provides a method for forming a multi-core heat dissipation packaging structure, comprising:

[0024] Based on the different wafers where the required multi-core combination is located, and according to the different layouts of the multi-core combination, the manifold microchannel structure is designed without affecting the performance and reliability of the core particles. Then, the manifold microchannel structure corresponding to each core particle is prepared by photolithography, etching and other processes.

[0025] Design reasonable chip layout positions based on the given different multi-chip combinations and the required external logic circuit layout and routing requirements.

[0026] Preparing a substrate;

[0027] Circuit connections are made between the substrate and the chip;

[0028] Based on the different layouts of the multi-core particles and the designed manifold microchannel structure, the size of the manifold microchannel adapter plate is defined, and a first cooling medium inlet and outlet connected to the manifold microchannel is designed on the manifold microchannel adapter plate; finally, the manifold microchannel adapter plate is prepared by photolithography, etching, mechanical cutting and other processes.

[0029] Based on the different layouts of the multi-core particles and the designed manifold microchannel structure, the size of the encapsulation cover plate is defined, and a second cooling medium inlet and outlet connected to the first cooling medium inlet and outlet is designed on the encapsulation cover plate; finally, the encapsulation cover plate is prepared by photolithography, etching, mechanical cutting and other processes.

[0030] Preferably, during the substrate fabrication process, the external logic circuit traces and the contacts between the cores are designed on the substrate according to the layout structure of the core combinations with different sizes and thicknesses.

[0031] Preferably, during the preparation of the core, since the wafer thickness of different cores may be inconsistent, in order to ensure a high degree of consistency during packaging, the core with the smallest thickness in different core combinations is used as the reference core. Without affecting the electrical properties or reliability of the core, the back side of the core with a thickness greater than the reference core is thinned to achieve a consistent thickness for all cores.

[0032] Preferably, the substrate and the chip are connected by a metal wire, solder paste or tin particles;

[0033] Preferably, depending on the different core particle combination layouts, strip-shaped protrusions are left between each sub-channel in the manifold microchannel. The shape of the strip-shaped protrusions can be crescent-shaped, strip-shaped, rectangular, etc., and each sub-channel follows the rule that each core particle is equipped with a cooling medium inlet and outlet to avoid uneven heat dissipation and hot spots.

[0034] Preferably, the processing method of the manifold microchannel adapter plate varies depending on the selected substrate, and it can be prepared using conventional industrial processing methods;

[0035] Preferably, the processing method of the encapsulation cover varies depending on the selected substrate, and it can be prepared using conventional industrial processing methods;

[0036] Preferably, the upper surface of the core particle can also be deposited with a dielectric protective layer by a physicochemical method; the material of the dielectric protective layer is one of silicon dioxide, silicon nitride, etc.

[0037] Preferably, a bonding metal layer is deposited on the outer periphery of the manifold microchannel, on the top and bottom of the manifold microchannel adapter plate, and on the bottom of the encapsulation cover plate;

[0038] Preferably, the bonding metal can be copper, gold-tin alloy, etc.;

[0039] Preferably, the bonding of the core, manifold microchannel adapter plate and encapsulation cover plate is completed by hot pressing under an inert gas atmosphere, at a certain temperature and pressure, for a certain period of time.

[0040] Preferably, a ring of sealant is filled around the core and manifold microchannel adapter plate, as well as the manifold microchannel adapter plate and the encapsulation cover plate, to enhance the sealing and stability of the encapsulation structure.

[0041] Compared with the prior art, the present invention has at least the following beneficial effects:

[0042] (1) High-efficiency heat dissipation: Based on the size and position of different core particles, manifold microchannels of different shapes are designed to efficiently manage and distribute the heat generated by different core particles, thereby improving heat dissipation efficiency;

[0043] (2) Improved reliability: The multi-core particle, manifold channel adapter plate and the encapsulation cover plate that controls the inlet and outlet of coolant are connected together to completely encapsulate the multi-core particle, forming a complete multi-core particle heat dissipation encapsulation structure, which improves the sealing and stability of the encapsulation, prevents leakage and contamination of the cooling medium, extends the life of the encapsulation, and improves reliability.

[0044] (3) Modular design: The multi-core heat dissipation packaging structure allows chips with different functions and thermal characteristics to be broken down into modules. This modular design makes the chips smaller and easier to manage and maintain;

[0045] (4) Thermal cross-interference management: By setting multiple manifold microchannels between each core and the manifold microchannel adapter board, the flow rate and direction of the cooling medium can be flexibly adjusted according to the size, position and power consumption of different cores, realizing precise heat dissipation control of different cores, effectively managing and distributing the heat generated by different cores, which helps to avoid problems such as thermal cross-interference, thermal imbalance and hot spots, thereby improving performance and reliability.

[0046] (5) Material adaptability: By utilizing the cooling medium inlet and outlet on the manifold microchannel adapter plate and the packaging cover plate, the chip can be effectively cooled, reducing the chip's power consumption and temperature, reducing the impact of thermal stress and thermal expansion, alleviating the mechanical stress of the package under temperature changes, protecting the integrity of the chip, and reducing the risk of chip damage.

[0047] This invention provides an innovative method for multi-core heat dissipation packaging. Based on the size, thickness, and position of different cores, manifold microchannels of different shapes are designed to adapt to the heat dissipation requirements of different cores, avoiding the uneven heat dissipation problem caused by using a uniform heat dissipation structure in existing technologies. Through the manifold microchannel adapter plate and packaging cover, the entry and exit management and distribution of cooling media for multiple cores are realized, avoiding the problems of complex structure, high cost, and low reliability caused by using multiple cooling media inlets and outlets in existing technologies. This invention is suitable for multi-core packaging applications in high-performance computing, artificial intelligence, big data models, and other fields. Attached Figure Description

[0048] To further illustrate the advantages and other features of the various embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, like or corresponding parts will be indicated by like or similar reference numerals for clarity.

[0049] Figure 1 A schematic diagram of the layered structure of a multi-core heat dissipation packaging structure according to Embodiment 1 is shown;

[0050] Figure 2 A top view of a single core with multiple manifold microchannels on the back side of Example 1 is shown;

[0051] Figure 3 A front view of the manifold microchannel adapter plate of Embodiment 1 is shown;

[0052] Figure 4 A bottom view of the connection between the multi-core particle and the manifold microchannel adapter plate in Embodiment 1 is shown;

[0053] Figure 5 A side view of the connection between the multi-core and the manifold microchannel adapter plate of Embodiment 1 is shown;

[0054] Figure 6 A front view of the encapsulation cover plate of Embodiment 1 is shown;

[0055] Figure 7 A top view of the encapsulation cover plate of Embodiment 1 is shown;

[0056] Figure 8 A top view of the connection between the multi-core and the substrate in Embodiment 1 is shown;

[0057] in Figure 1-8 The markings are as follows: 101, substrate; 102, contact point; 103, core particle; 1031, manifold microchannel; 10311, first inlet / outlet; 10312, second inlet / outlet; 104, sealant; 105, manifold microchannel adapter plate; 1051, cooling medium inlet; 1052, cooling medium outlet; 1053, cross-shaped channel; 106, encapsulation cover plate; 1061, second cooling medium inlet / outlet; 10611, main liquid inlet; 10612, main liquid outlet.

[0058] Figure 9 Another multi-core top view of Embodiment 2 with manifold microchannels on the back is shown;

[0059] Figure 10 A front view of the manifold microchannel adapter plate in Embodiment 2 is shown;

[0060] Figure 11 A front view of the encapsulation cover plate in Embodiment 2 is shown;

[0061] Figure 12 The diagram shows a heat dissipation packaging structure with different multi-core structures in Example 2;

[0062] in Figure 9-12The markings are as follows: 201, substrate; 202, contact point; 203, first core particle; 2031, manifold microchannel A; 20311, first inlet / outlet A; 20312, second inlet / outlet A; 20313, third inlet / outlet A; 204, second core particle; 2041, manifold microchannel B; 20411, first inlet / outlet B; 20412, second inlet / outlet B; 205, manifold microchannel adapter plate; 20511, first cooling medium inlet; 20512, second cooling medium. Import; 20513, Third Cooling Medium Import; 20514, Fourth Cooling Medium Import; 20515, Fifth Cooling Medium Import; 20516, Sixth Cooling Medium Import; 20517, Seventh Cooling Medium Import; 20518, Eighth Cooling Medium Import; 20519, Ninth Cooling Medium Import; 20521, First Cooling Medium Export; 20522, Second Cooling Medium Export; 20523, Third Cooling Medium Export; 20524, Fourth Cooling Medium Export; 20525, Fifth Cooling Medium Outlet; 20526, Sixth Cooling Medium Outlet; 20527, Seventh Cooling Medium Outlet; 20528, Eighth Cooling Medium Outlet; 20529, Ninth Cooling Medium Outlet; 205210, Tenth Cooling Medium Outlet; 20531, First Channel; 20532, Second Channel; 20533, Third Channel; 20534, Fourth Channel; 20533, Fifth Channel; 20536, Sixth Channel; 20537, Seventh Channel; 20538, Eighth Channel; 20539, Ninth Channel; 205310, Tenth Channel; 206, Encapsulation Cover; 2061, Second Cooling Medium Inlet / Outlet; 20611, Main Liquid Inlet; 20612, Main Liquid Outlet; 207, Sealing. Detailed Implementation

[0063] In the description of this invention, it should be understood that the terms "center," "longitudinal," "horizontal," "upper," "lower," "left," "right," and "inner," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. It should be noted that the components in the various drawings may be exaggerated for illustrative purposes and are not necessarily shown to the correct scale.

[0064] Based on this, embodiments of the present invention provide a multi-chip heat dissipation packaging structure and its fabrication process. Specifically, the present invention diverts individual channels through a main inlet and outlet, with each small chip equipped with an individual inlet and outlet from the main inlet and outlet. Furthermore, the specifications (number, arrangement, etc.) of the manifold are changed according to the different specifications and functions of the small chips to address heat dissipation of chip combinations with different functions, thermal characteristics, and sizes. Each small chip is also equipped with an individual inlet and outlet to solve cross-interference and hotspot problems. The present invention utilizes the cooling medium inlet and outlet on the manifold microchannel adapter plate and the packaging cover plate to achieve effective cooling of the chip, reducing chip power consumption and temperature, minimizing the impact of thermal stress and thermal expansion, alleviating mechanical stress on the package under temperature changes, protecting the integrity of the chip, and reducing the risk of chip damage.

[0065] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0066] Furthermore, the specific process steps are executed in a particular order in the embodiments of the present invention only to better distinguish the various parts, and the execution order of the process steps is not limited. For efficient production, the relevant steps can be adjusted according to the process.

[0067] The present invention will be further described below with reference to specific embodiments and accompanying drawings.

[0068] Example 1: This example provides a multi-core heat dissipation packaging structure, such as... Figure 1 , 4 5, 6, and 8 include:

[0069] The core layer is configured with four identical core particles 103 arranged in a 2*2 array, with equal spacing between adjacent core particles; the upper surface of each of the four core particles is provided with a manifold microchannel 1031 configured for heat dissipation of the core particles;

[0070] A substrate 101 is disposed below the core layer and configured to connect the core 103 to an external logic circuit.

[0071] The manifold microchannel adapter plate 105 is arranged above the core layer, and each core 103 has a first cooling medium inlet and outlet connected to the manifold microchannel on its back side.

[0072] The encapsulation cover 106 is arranged above the manifold microchannel adapter plate 105;

[0073] The above structure will be described in detail below.

[0074] As an example, the manifold microchannels 1031 on each core in the core layer are as follows: Figure 2It includes 8 sub-channels, a first inlet / outlet 10311, and a second inlet / outlet 10312. One end of each sub-channel is connected to the first inlet / outlet 10311, and the other end is connected to the second inlet / outlet 10312. There are strip-shaped protrusions between adjacent sub-channels. The shape of the strip-shaped protrusions can be crescent-shaped, strip-shaped, rectangular, etc., and each sub-channel follows the rule that each core particle is equipped with a cooling medium inlet / outlet to avoid uneven heat dissipation and hot spots. The manifold microchannel 1031 is axially symmetrical about the line connecting the first inlet / outlet 10311 and the second inlet / outlet 10312.

[0075] As an example, such as Figure 3 The first cooling medium inlet and outlet of the manifold microchannel adapter plate 105 includes four cooling medium inlets 1051 through which coolant flows into the manifold microchannel 1031, which is configured with four core particles 103, and four cooling medium outlets 1052 through which coolant flows out of the manifold microchannel 1031, which is configured with four core particles 103. The four cooling medium inlets 1051 are respectively located above and connected to the first inlet and outlet 10311 of the manifold microchannel 1031 with four core particles 103, and the four cooling medium outlets 1052 are respectively located above and connected to the second inlet and outlet 10312 of the manifold microchannel 1031 with four core particles 103. The four cooling medium inlets 1051 are connected through a cross-shaped channel 1053.

[0076] More specifically, the cross-sectional structure of the cooling medium inlet 1051 is an isosceles trapezoid, and the cross-sectional structure of the cooling medium outlet 1052 is a right-angled L-shaped structure with the ends cut off.

[0077] As an example, such as Figure 7 The encapsulation cover plate 106 is provided with a second cooling medium inlet and outlet 1061, configured for the coolant to flow in and out through the first cooling medium inlet and outlet of the manifold microchannel adapter plate; the second cooling medium inlet and outlet 1061 includes a main inlet 10611 for configuring the coolant to flow into the manifold microchannel adapter plate, and four main outlets 10612 for configuring the coolant to flow out of the manifold microchannel adapter plate; the main inlet 10611 is located above and connected to the center of the cross-shaped channel 1053, so as to realize the connection between the main inlet 10611 and the four cooling medium inlets 1051; the four main outlets 10612 are respectively located above and connected to the four cooling medium outlets 1052;

[0078] As an example, a sealant 104 is provided at the position between the edge of each core 103 and the manifold microchannel adapter plate 105 and at the position between the edge of the manifold microchannel adapter plate 105 and the encapsulation cover plate 106, which is configured to protect the connection structure.

[0079] As an example, contact points 102 are also provided between the edge of each core 103 and the substrate 101, serving as circuit connections between the core 103 and the substrate 101.

[0080] This embodiment also provides a method for forming the above-mentioned multi-core heat dissipation packaging structure, including:

[0081] Step S1: Prepare core pellet 103;

[0082] Based on the different wafers where the core particles 103 of different sizes are located, the core particles 103 are arranged in a 2*2 array. Without affecting the electrical properties and reliability of the core particles 103, the manifold microchannel 1031 structure of the core particles 103 is designed. Then, the manifold microchannel 1031 structure of the core particles 103 is prepared by photolithography, etching and other processes.

[0083] Core particles with manifold microchannel structures fabricated on different wafers were divided;

[0084] Based on the given combinations of different sized cores 103 and the required external logic circuit layout and routing requirements, design a reasonable layout position for the cores 103.

[0085] Step S2: Prepare substrate 101;

[0086] The substrate 101 is a printed circuit board made of materials such as glass fiber yarn, copper foil, copper clad laminate, epoxy resin, ink, and wood pulp.

[0087] Step S3: The substrate 101 and the core chip 103 are connected by a circuit through metal wires, solder paste or tin particles.

[0088] Step S4: Based on the layout of the 2*2 array core 103 and the designed manifold microchannel 1031 structure, the size of the manifold microchannel adapter plate 105 is defined, and a first cooling medium inlet and outlet communicating with the manifold microchannel 1031 is designed on the manifold microchannel adapter plate 105; finally, the manifold microchannel 105 adapter plate is prepared by photolithography, etching, mechanical cutting and other processes; the material of the manifold microchannel adapter plate 105 is one of silicon-based materials, metal alloys, glass, etc., and the processing method of the manifold microchannel adapter plate 105 varies depending on the selected substrate, and can be prepared by conventional industrial processing methods;

[0089] Step S5: Based on the layout of the 2*2 array of chips 103 and the designed manifold microchannel 1031 structure, the size of the encapsulation cover plate 106 is defined, and a second cooling medium inlet / outlet 1061 connected to the first cooling medium inlet / outlet is designed on the encapsulation cover plate 106; finally, the encapsulation cover plate 106 is prepared using photolithography, etching, mechanical cutting, and other processes. The substrate of the encapsulation cover plate 106 is one of metal alloy, silicon-based material, glass, etc. The processing method of the encapsulation cover plate 106 varies depending on the selected substrate and can be prepared using conventional industrial processing methods.

[0090] The components consisting of the aforementioned core 103, manifold microchannel adapter plate 105, and encapsulation cover plate 106 are connected to the substrate 101 to form a multi-core heat dissipation encapsulation structure as described in this invention.

[0091] The steps described above will be explained in detail below.

[0092] As an example, during the fabrication of the substrate 101, the contacts between the external logic circuit traces and the cores 103 are designed on the substrate 101 according to the layout structure of the combination of cores 103 with different sizes and thicknesses.

[0093] As an example, in the process of preparing the core 103, since the wafer thickness of different core 103 may be inconsistent, in order to ensure a high degree of consistency during packaging, the core with the smallest thickness in different combinations of core 103 is used as the reference core. Without affecting the electrical properties or reliability of the core 103, the back side of the core with a thickness greater than the reference core is thinned to achieve a consistent thickness for all core 103.

[0094] As an example, depending on the different combinations and layouts of the core particles 103, strip-shaped protrusions are left between the sub-channels in the manifold microchannel 1031. The shape of the strip-shaped protrusions can be crescent-shaped, strip-shaped, rectangular, etc., and each sub-channel follows the rule that each core particle 103 is equipped with a cooling medium inlet and outlet to avoid uneven heat dissipation and hot spots.

[0095] As an example, the upper surface of the core 103 may also be deposited with a dielectric protective layer (the entire upper surface of the core 103, including the inner surface of the manifold microchannel 1031 embedded in the core 103) by a physicochemical method; the material of the dielectric protective layer is one of silicon dioxide, silicon nitride, etc.

[0096] As an example, a bonding metal layer can be deposited on the top of the core 103 of the manifold microchannel 1031, on the top and bottom of the manifold microchannel 105 adapter plate, and on the bottom of the encapsulation cover 106; the bonding metal can be copper, gold-tin alloy, etc.; specifically, the bonding of the core 103, the manifold microchannel 105 adapter plate, and the encapsulation cover 106 is completed by hot pressing under a nitrogen atmosphere, applying a pressure of 80 MPa, and maintaining a temperature of 240°C for 1 hour.

[0097] As an example, a ring of sealant 104 can also be filled around the core 103 and the manifold microchannel 105 adapter plate, as well as around the manifold microchannel 105 adapter plate and the encapsulation cover plate 106, to enhance the sealing and stability of the encapsulation structure.

[0098] Example 2: This example provides another multi-core heat dissipation packaging structure, such as... Figure 9-12 include:

[0099] The core layer comprises a first core particle 203 and two core particle arrays on either side of the first core particle 203; the two core particle arrays are mirror images of the first core particle 203. Each core particle array includes second core particles 204 arranged in a 2x2 array; there are equally spaced gaps between adjacent core particles; wherein, within the same core particle array, the spacing between adjacent horizontally positioned second core particles 204 is equal, and the spacing between adjacent vertically positioned second core particles 204 is equal. The length of the first core particle 203 is equal to the length of the core particle array. The distance between the first core particle 203 and the second core particle 204 closest to it is greater than the distance between adjacent horizontally positioned second core particles 204.

[0100] The upper surfaces of the first core 203 and the second core 204 are each provided with manifold microchannels configured for heat dissipation of the cores.

[0101] Substrate 201, which is disposed below the core layer, is configured to connect the first core 203, the second core 204 and external logic circuits.

[0102] Manifold microchannel adapter plate 205 is arranged above the core layer, and each manifold microchannel on the back of the core is provided with a first cooling medium inlet and outlet communicating with the manifold microchannel.

[0103] Encapsulation cover 206 is arranged above the manifold microchannel adapter plate 205;

[0104] The above structure will be described in detail below.

[0105] As an example, such as Figure 9The manifold microchannel A 2031 of the first core particle 203 includes 20 sub-channels A, a first inlet / outlet A 20311, a second inlet / outlet A 20312, and a third inlet / outlet A 20313. Ten sub-channels A are connected at one end to the first inlet / outlet A 20311 and at the other end to the second inlet / outlet A 20312. Another ten sub-channels A are connected at one end to the first inlet / outlet A 20311 and at the other end to the third inlet / outlet A 20313. A strip-shaped protrusion A is provided between adjacent sub-channels A. The shape of the strip-shaped protrusion A can be crescent-shaped, rectangular, etc., and each sub-channel follows the rule that each core particle is equipped with a cooling medium inlet / outlet to avoid uneven heat dissipation and hot spots.

[0106] The manifold microchannel B 2041 of the second core 204 includes 7 sub-channels B, a first inlet / outlet B 20411, and a second inlet / outlet B 20412. One end of each sub-channel B is connected to the first inlet / outlet B 20411, and the other end is connected to the second inlet / outlet B 20412. A strip-shaped protrusion B is left between adjacent sub-channels B. The shape of the strip-shaped protrusion can be crescent-shaped, rectangular, etc., and each sub-channel follows the rule that each core is equipped with a cooling medium inlet / outlet to avoid uneven heat dissipation and hot spots.

[0107] As an example, such as Figure 10 The first cooling medium inlet and outlet of the manifold microchannel adapter plate 205 includes nine cooling medium inlets for the inflow of coolant into the manifold microchannels configured with core particles, and ten cooling medium outlets for the outflow of coolant from the manifold microchannels configured with core particles. The first cooling medium inlet 20511 is located above and connected to the first inlet / outlet A 20311 of the manifold microchannel A 2031 of the first core particle 203. The second to fifth cooling medium inlets 20512-20515 are located above and connected to the first inlet / outlet B 20411 of the manifold microchannels B 2041 of the four second core particles 204 of the left core particle array, respectively. The left port of the first cooling medium inlet 20511 is connected to the second to fifth cooling medium inlets 20512-20515 via the first channel 20531. The sixth to ninth cooling medium inlets 20516-20519 are located at the first inlet / outlet B 2041 of the manifold microchannels 2041 of the second core particles 204 of the right core particle array, respectively. Above and connected to 20411, the right port of the first cooling medium inlet 20511 is connected to the sixth to ninth cooling medium inlets 20516-20519 via the second channel 20532;

[0108] The first and second cooling medium outlets 20521-20522 are located above and connected to the second inlet / outlet A20312 and the third inlet / outlet A20313 of the first core particle 203, respectively; the third to sixth cooling medium outlets 20523-20526 are located at the second inlet / outlet B of the manifold microchannel B2041 of the four second core particles 204 in the left core particle array. Above and connected to 20412; the third cooling medium outlet 20523 and the fourth cooling medium outlet 20524 are connected through the third channel 20533, the fifth cooling medium outlet 20525 and the sixth cooling medium outlet 20526 are connected through the fourth channel 20534, the fourth cooling medium outlet 20524 and the first cooling medium outlet 20521 are connected through the fifth channel 20535, and the sixth cooling medium outlet 20526 and the second cooling medium outlet 20522 are connected through the sixth channel 20536; the seventh to tenth cooling medium outlets 20527-205230 are respectively located in the manifold microchannels B 2041 second inlet and outlet B of the four second core particles 204 of the right core particle array. Above and connected to 20412; the seventh cooling medium outlet 20527 and the eighth cooling medium outlet 20528 are connected through the seventh channel 20537, the ninth cooling medium outlet 20529 and the tenth cooling medium outlet 205210 are connected through the eighth channel 20538, the seventh cooling medium outlet 20527 and the first cooling medium outlet 20521 are connected through the ninth channel 20539, and the ninth cooling medium outlet 20529 and the second cooling medium outlet 20522 are connected through the tenth channel 205310;

[0109] As an example, such as Figure 11 The encapsulation cover 206 is provided with a second cooling medium inlet and outlet 2061, configured for the coolant to flow in and out through the first cooling medium inlet and outlet of the manifold microchannel adapter plate; the second cooling medium inlet and outlet 2061 includes a total inlet 20611 for configuring the coolant to flow into the manifold microchannel adapter plate, and two total outlets 20612 for configuring the coolant to flow out of the manifold microchannel adapter plate; the total inlet 20611 is located above and communicates with the first cooling medium inlet 20511; the two total outlets 20612 are located above and communicate with the first cooling medium outlet 20521 and the second cooling medium outlet 20522, respectively;

[0110] As an example, sealant 207 is also provided at the position between the edge of each core and the manifold microchannel adapter plate 205 and the position between the edge of the manifold microchannel adapter plate 205 and the encapsulation cover plate 206, which is configured to protect the connection structure.

[0111] As an example, contact points 202 are also provided at the positions between the edges of each core and the substrate 201, serving as circuit connections between the first core 203 and the second core 204 and the substrate 201.

[0112] This embodiment also provides a method for forming the above-mentioned multi-core heat dissipation packaging structure, including:

[0113] Step S1: Prepare core pellet 103;

[0114] Based on the different wafers where the core particles 103 of different sizes are located, the core particles 103 are arranged in a 2*2 array. Without affecting the electrical properties and reliability of the core particles 103, the manifold microchannel 1031 structure of the core particles 103 is designed. Then, the manifold microchannel 1031 structure of the core particles 103 is prepared by photolithography, etching and other processes.

[0115] Core particles with manifold microchannel structures fabricated on different wafers were divided;

[0116] Based on the given combinations of different sized cores 103 and the required external logic circuit layout and routing requirements, design a reasonable layout position for the cores 103.

[0117] Step S2: Prepare substrate 101;

[0118] The substrate 101 is a printed circuit board made of materials such as glass fiber yarn, copper foil, copper clad laminate, epoxy resin, ink, and wood pulp.

[0119] Step S1: Prepare the first core 203 and the second core 204;

[0120] Based on the different wafers where the core particles of different sizes are located, and according to the core particle layout with the core particle array distributed on both sides of the first core particle, the manifold microchannel structure of the first core particle 203 and the second core particle 204 is designed without affecting the electrical properties and reliability of the core particles. Then, the manifold microchannel structure of the core particles is prepared by photolithography, etching and other processes.

[0121] First core 203 and second core 204, which have manifold microchannel structures, are prepared on different wafers;

[0122] Based on the specific combination of the first chip 203 and the second chip 204 and the required external logic circuit layout and wiring requirements, design a reasonable layout position for the first chip 203 and the second chip 204.

[0123] Step S2: Prepare substrate 201;

[0124] The substrate 201 is a printed circuit board made of materials such as glass fiber yarn, copper foil, copper clad laminate, epoxy resin, ink, and wood pulp.

[0125] Step S3: The substrate 201 and the first chip 203 and the second chip 204 are connected by metal wires, solder paste or tin particles.

[0126] Step S4: Based on the core layout of the first core 203 and the second core 204 and the designed manifold microchannel structure, the size of the manifold microchannel adapter plate 205 is defined, and a first cooling medium inlet and outlet communicating with the manifold microchannel is designed on the manifold microchannel adapter plate 205; finally, the manifold microchannel adapter plate 205 is prepared by photolithography, etching, mechanical cutting and other processes; the material of the manifold microchannel adapter plate 205 is one of silicon-based materials, metal alloys, glass, etc., and the processing method of the manifold microchannel adapter plate 205 varies depending on the selected substrate, and can be prepared by conventional industrial processing methods;

[0127] Step S5: Based on the layout of the first core 203 and the second core 204, and the designed manifold microchannel structure, the size of the encapsulation cover plate 206 is defined, and a second cooling medium inlet / outlet 2061 connected to the first cooling medium inlet / outlet is designed on the encapsulation cover plate 206; finally, the encapsulation cover plate 206 is prepared using photolithography, etching, mechanical cutting, and other processes. The substrate of the encapsulation cover plate 206 is one of metal alloy, silicon-based material, glass, etc. The processing method of the encapsulation cover plate 206 varies depending on the selected substrate and can be prepared using conventional industrial processing methods.

[0128] The components consisting of the first core 203, the second core 204, the manifold microchannel adapter plate 205, and the encapsulation cover plate 206 are connected to the substrate 201 to form a multi-core heat dissipation encapsulation structure as described in this invention.

[0129] The steps described above will be explained in detail below.

[0130] As an example, during the fabrication of the substrate 201, the external logic circuit traces and the contacts between the first core 203 and the second core 204 are designed on the substrate 201 according to the layout structure of the combination of the first core 203 and the second core 204 with different sizes and thicknesses.

[0131] As an example, in the process of preparing the first core 203 and the second core 204, since the wafer thickness of different cores may be inconsistent, in order to ensure a high degree of consistency during packaging, the core with the smallest thickness in different core combinations is used as the reference core. Without affecting the electrical properties or reliability of the core, the back side of the core with a thickness greater than the reference core is thinned to achieve a consistent thickness for all cores.

[0132] As an example, depending on the different combinations of the first core 203 and the second core 204, strip-shaped protrusions are left between the sub-channels in the manifold microchannel. The shape of the strip-shaped protrusions can be crescent-shaped, strip-shaped, rectangular, etc., and each sub-channel follows the rule that each core is equipped with a cooling medium inlet and outlet to avoid uneven heat dissipation and hot spots.

[0133] As an example, the upper surfaces of the first core 203 and the second core 204 can also be coated with a dielectric protective layer (the entire upper surface of the core, including the inner surface of the manifold microchannel embedded in the first core 203 and the second core 204) by a physicochemical method; the material of the dielectric protective layer is one of silicon dioxide, silicon nitride, etc.

[0134] As an example, a bonding metal layer can be deposited on the first core 203, the second core 204, the top and bottom of the manifold microchannel adapter plate 205, and the bottom of the encapsulation cover plate 206; the bonding metal can be copper, gold-tin alloy, etc.; specifically, the bonding of the core, manifold microchannel adapter plate 205 and encapsulation cover plate 206 is completed by hot pressing under a nitrogen atmosphere, applying a pressure of 80 MPa and maintaining a temperature of 240°C for 1 hour.

[0135] As an example, a ring of sealant 207 can also be filled around the manifold microchannel adapter 205 and the encapsulation cover 206 to enhance the sealing and stability of the encapsulation structure.

[0136] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention.

Claims

1. A multi-core heat dissipation packaging structure, characterized in that... include: The core layer is configured with multiple core particles; A substrate, disposed below the core layer, is configured to connect the core to external logic circuitry. Manifold microchannel adapter plate, which is arranged above the core layer; A manifold microchannel is disposed between each core and the manifold microchannel adapter plate; wherein the manifold microchannel is configured to provide heat dissipation for each core. A sealing cover plate is disposed above the manifold microchannel adapter plate; The manifold microchannels on each core particle in the core layer include multiple sub-channels, a first inlet / outlet, and a second inlet / outlet. One end of each sub-channel is connected to the first inlet / outlet, and the other end is connected to the second inlet / outlet. The manifold microchannel adapter plate is configured with a first cooling medium inlet / outlet connected to the corresponding manifold microchannel of each core particle. The first cooling medium inlet / outlet includes a cooling medium inlet capable of accommodating the inflow of coolant into all core particle manifold microchannels, and multiple cooling medium outlets capable of accommodating the outflow of coolant from all core particle manifold microchannels. The cooling medium inlet is connected to the first cooling medium outlet of all core particle manifold microchannels. The inlet and outlet are connected, and the multiple cooling medium outlets are respectively connected to the second inlet and outlet of each core particle manifold microchannel; the encapsulation cover plate is provided with a second cooling medium inlet and outlet, configured for the coolant to flow in and out through the first cooling medium inlet and outlet of the manifold microchannel adapter plate; the second cooling medium inlet and outlet includes a total inlet that can be configured for the coolant to flow into the manifold microchannel adapter plate, and multiple total outlets that can be configured for the coolant to flow out of the manifold microchannel adapter plate; the total inlet is connected to the cooling medium inlet, and the multiple total outlets are respectively connected to the multiple cooling medium outlets.

2. The multi-core heat dissipation packaging structure according to claim 1, characterized in that... There are gaps between the core particles in the core layer; the size and thickness of each core particle in the core layer may be the same or not completely the same.

3. The multi-core heat dissipation packaging structure according to claim 1, characterized in that... The multi-core heat dissipation packaging structure also includes a sealant, which is placed between the edge of each core and the manifold microchannel adapter plate, and between the edge of the manifold microchannel adapter plate and the packaging cover plate, and is configured as a protective connection structure.

4. A method for forming a multi-core heat dissipation packaging structure according to any one of claims 1-3, characterized in that... include: Based on the different wafers where the cores of different sizes are located, and according to the different layouts of the multi-cores, the manifold microchannel structure corresponding to each core is designed without affecting the electrical properties and reliability of the cores. Design a reasonable chip layout position based on the given combinations of different chip sizes and the required external logic circuit layout and routing requirements. Preparing a substrate; Circuit connections are made between the substrate and the chip; Based on the different layouts of the multi-core particles and the designed manifold microchannel structure, the size of the manifold microchannel adapter plate is determined, and a first cooling medium inlet and outlet connected to the manifold microchannel is designed on the manifold microchannel adapter plate. Based on the different layouts of the multi-core particles and the designed manifold microchannel structure, the size of the encapsulation cover is determined, and a second cooling medium inlet and outlet connected to the first cooling medium inlet and outlet is designed on the encapsulation cover.

5. The method according to claim 4, characterized in that, During the substrate fabrication process, based on the layout structure of the core combinations with different sizes and thicknesses, the external logic circuit traces and the contacts between the cores are designed on the substrate.

6. The method according to claim 4, characterized in that, The upper surface of the core particle can also be deposited with a protective dielectric layer through physicochemical means.

7. The method according to claim 4, characterized in that, A bonding metal layer is deposited on the outer periphery of the manifold microchannel, on the top and bottom of the manifold microchannel adapter plate, and on the bottom of the encapsulation cover plate.

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