Memristor-based neuron circuit, spiking neural network device, computing device

Abstract

The application belongs to the technical field of brain-like bionics, and discloses a neuron circuit based on a memristor, a pulse neural network device and a computing device. The neuron circuit comprises a volatile bidirectional threshold transition memristor TS, a resistor R1, a resistor R2, a capacitor C1 and a capacitor C2. A first end of the resistor R1 is used as a signal input end for receiving a staircase wave signal, and a second end of the resistor R1 is connected with a first end of the memristor TS. A first end of the capacitor C1 is connected with the first end of the memristor TS, and a second end of the capacitor C1 is grounded. A first end of the capacitor C2 is connected with a second end of the memristor TS, and a second end of the capacitor C2 is connected with a first end of the resistor R2. The first end of the resistor R2 is a signal output end of the neuron circuit, and the second end of the resistor R2 is grounded. According to the above neuron circuit, an output pulse can be triggered only when the signal change of the signal input end is large enough, so that the interference of noise accumulation on pulse conversion can be avoided, and the accuracy of pulse triggering is improved.

Description

Technical Field

[0001] This application belongs to the field of brain-inspired bionics technology, and more specifically, relates to a memristor-based neuronal circuit, a spiking neural network device, and a computing device. Background Technology

[0002] Traditional neural networks consume enormous amounts of energy during training and their learning flexibility is far inferior to that of the human brain. Therefore, inspired by the brain's information processing mechanisms, researchers have proposed a new generation of artificial neural networks: spiking neural networks (SNNs). SNNs use event-driven pulse signals as information carriers, making them closer to the biological nervous system. Therefore, the application of SNNs requires designing appropriate pulse coding schemes to convert perceived environmental information into event-based pulse signals, emphasizing the event occurrence as much as possible while minimizing noise interference.

[0003] Typically, events cause drastic changes in environmental signals, while noise does not. Therefore, during pulse conversion, it is necessary to ignore slow changes in the signal and focus on abrupt changes to filter out noise. Traditional pulse coding methods, which rely on complex CMOS circuits such as LC-ADCs, are frequency-coded. They convert the absolute change in the amplitude of an analog signal into the frequency of a pulse, thus achieving the transformation from analog to pulse signals. Traditional pulse coding methods continuously monitor the input analog signal, generating a pulse representing event information when its absolute change exceeds a preset range. Over long periods of monitoring, slow changes in the analog signal accumulate. Traditional asynchronous pulse coding techniques, which rely on complex CMOS circuits such as LC-ADCs, do not have the ability to ignore slowly changing information. When the accumulated slow changes (noise) exceed the preset range, it leads to erroneous pulse delivery. Summary of the Invention

[0004] In view of the above-mentioned defects or improvement needs of the prior art, this application provides a memristor-based neuron circuit, spiking neural network device, and computing device, the purpose of which is to avoid interference of pulse conversion due to noise accumulation and improve the accuracy of pulse triggering.

[0005] To achieve the above objectives, according to one aspect of this application, a neuron circuit based on a memristor is provided, comprising: a volatile bidirectional threshold switching memristor TS, resistors R1 and R2, and capacitors C1 and C2.

[0006] The first end of the resistor R1 serves as a signal input terminal for receiving a stepped wave signal, which is obtained by sampling and holding an analog voltage signal from the environment. The second end of the resistor R1 is connected to the first end of the volatile bidirectional threshold switching memristor TS.

[0007] The first terminal of capacitor C1 is connected to the first terminal of the volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C1 is grounded.

[0008] The first terminal of capacitor C2 is connected to the second terminal of volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C2 is connected to the first terminal of resistor R2.

[0009] The first end of resistor R2 is the signal output terminal of the neuron circuit, and the second end of resistor R2 is grounded.

[0010] In some embodiments, the resistive switching material of the volatile bidirectional threshold switching memristor TS is any one of VO2, NbO2, and OTS materials.

[0011] In some embodiments, the volatile bidirectional threshold switching memristor TS is a Mott insulator memristor.

[0012] In some embodiments, capacitors C1 and C2 have the same capacitance.

[0013] In some embodiments, the resistance value of resistor R1 is on the same order of magnitude as the resistance value of the memristor in its high-resistance state, and the resistance value of resistor R2 is two orders of magnitude smaller than the resistance value of resistor R1.

[0014] In some embodiments, the resistance value of resistor R1 ranges from 2000Ω to 4000Ω, and the resistance value of resistor R2 ranges from 10Ω to 20Ω.

[0015] In some embodiments, the neuron circuit further includes a sensor, which contains a sample-and-hold sub-circuit. The sensor is used to collect environmental information and first convert the collected environmental signal into a model voltage signal, and then convert the analog voltage signal into the stepped wave signal via the sample-and-hold circuit and input it to the first terminal of the resistor R1.

[0016] According to another aspect of this application, a spiking neural network device is provided, comprising at least one neuron circuit, wherein the neuron circuit comprises a memristor-based neuron circuit as described above.

[0017] According to another aspect of this application, a computing device is provided, on which a neural network device as described above is deployed, the computing device further comprising an interface for transmitting received data to be computed to the neural network device; and for obtaining computation results from the output of the neural network.

[0018] In summary, compared with the prior art, the memristor-based neuron circuit, spiking neural network device, and computing device provided by this application have the following advantages:

[0019] 1. The memristor-based neuron circuit provided in this application has a memristor TS, resistors R1 and R2, and capacitors C1 and C2. Resistor R1 and capacitor C1 form a first charging and discharging circuit, and resistors R1, memristor TS, capacitor C2 and resistor R2 constitute a second charging and discharging circuit. The charging and discharging speed of the first charging and discharging circuit is greater than that of the second charging and discharging circuit. When a positive abrupt change occurs in the signal received at the signal input terminal, the first charging and discharging circuit rapidly charges capacitor C1, causing the potential at the first terminal of memristor TS to increase rapidly. However, because memristor TS is in a high-resistance state, the second charging circuit charges more slowly, and the potential at the second terminal of memristor TS remains low. Thus, if the potential difference across memristor TS exceeds its threshold, memristor TS changes from a high-resistance state to a low-resistance state, capacitor C2 charges rapidly, a positive pulse is output at the signal output terminal, and the potential difference across memristor TS decreases, allowing memristor TS to return to a high-resistance state. If the potential difference across memristor TS does not exceed its threshold, the state of memristor TS remains unchanged, and a pulse cannot be triggered at the signal output terminal. Similarly, when the signal input terminal receives a negative abrupt change in the signal, the first charging and discharging circuit rapidly discharges capacitor C1, causing the potential at the first end of the memristor TS to decrease rapidly. However, because the memristor TS is in a high-resistance state, the second charging circuit discharges more slowly, and the potential at the second end of the memristor TS remains relatively high. Thus, if the potential difference across the memristor TS exceeds its threshold, the memristor TS changes from a high-resistance state to a low-resistance state, capacitor C2 discharges rapidly, the signal output terminal outputs a negative pulse, and the potential difference across the memristor TS decreases, allowing the memristor TS to return to a high-resistance state. If the potential difference between capacitor C2 and the memristor TS does not exceed its threshold, the state of the memristor TS remains unchanged, and a pulse cannot be triggered at the signal output terminal. Therefore, through the above neuron circuit, only when the signal change at the signal input terminal is large enough can the memristor TS be triggered to change its resistance state, thereby triggering the output pulse. Thus, environmental noise will only cause a slow change in the signal and will not trigger the memristor TS to change its resistance state, that is, it will not trigger the output pulse. This avoids interference from noise accumulation on pulse conversion and improves the accuracy of pulse triggering.

[0020] 2. In one embodiment, capacitors C1 and C2 have the same capacitance. Using the same capacitor for sampling can reduce the number of circuit parameters and simplify the analysis of capacitor values ​​for input signals with different frequencies and sampling intervals.

[0021] 3. In one embodiment, the value of resistor R1 is comparable to that of the memristor, ensuring that the memristor voltage divider exceeds the threshold voltage and maintaining a low capacitance time constant to guarantee the operating frequency of the neuron circuit. Resistor R2 is used to convert current information into voltage information, and its resistance is much smaller than that of the memristor to reduce its voltage division. In a specific example, the preferred range for resistor R1 is 2000Ω to 4000Ω, and the preferred range for resistor R2 is 10Ω to 20Ω. Within these ranges, event information can be converted into a reasonable memristor voltage divider, allowing for a wider selection range for the event information threshold. Attached Figure Description

[0022] Figure 1 This is a circuit diagram of a memristor-based neuron circuit according to an embodiment of this application;

[0023] Figure 2 This is an IV characteristic curve of a volatile bidirectional threshold switching memristor TS in one embodiment of this application;

[0024] Figure 3 This is a schematic diagram of the output of a memristor-based neuron circuit under square wave excitation of different intensities in one embodiment of this application;

[0025] Figure 4 This is a schematic diagram of the output of a memristor-based neuron circuit under sinusoidal excitation in one embodiment of this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. Furthermore, the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other.

[0027] like Figure 1 The diagram shown is a circuit diagram of a memristor-based neuron circuit according to an embodiment of this application. The neuron circuit includes a volatile bidirectional threshold switching memristor TS, resistors R1 and R2, and capacitors C1 and C2.

[0028] The first terminal of resistor R1 serves as the signal input terminal for receiving the stepped wave signal, which is obtained by sampling and holding the analog voltage signal of the environment. The second terminal of resistor R1 is connected to the first terminal of the volatile bidirectional threshold switching memristor TS.

[0029] The first terminal of capacitor C1 is connected to the first terminal of volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C1 is grounded.

[0030] The first terminal of capacitor C2 is connected to the second terminal of volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C2 is connected to the first terminal of resistor R2.

[0031] The first end of resistor R2 is the signal output terminal of the neuron circuit, and the second end of resistor R2 is grounded.

[0032] like Figure 2 The figure shown is an IV characteristic curve of a volatile bidirectional threshold-switching memristor TS according to an embodiment of this application. The volatile bidirectional threshold-switching memristor TS has a positive and negative symmetrical threshold voltage and holding voltage. When the voltage of the memristor TS increases to exceed the threshold voltage of the device, the device will switch to a low-resistance state; at this time, when the voltage of the memristor TS decreases to below the holding voltage, the memristor TS will automatically return to a high-resistance state. The memristor has the same characteristics in the positive and negative voltage regions.

[0033] In the above neuron circuit, resistor R1 and capacitor C1 form the first charging / discharging loop, while resistor R1, memristor TS, capacitor C2, and resistor R2 constitute the second charging / discharging loop. The charging / discharging speed of the first loop is greater than that of the second loop. When the input signal changes, according to Kirchhoff's laws, during the recovery period corresponding to the new input signal, the voltage distribution of each part of the circuit changes, and capacitors C1 and C2 begin to charge and discharge, readjusting the voltage distribution in the circuit. During this process, the maximum potential difference across the memristor, which has positive and negative symmetrical double threshold characteristics, is proportional to the amplitude of the input signal change. When the signal amplitude exceeds the threshold, the potential difference across the memristor exceeds the threshold voltage, thus becoming a low-resistance state, causing the circuit to generate a pulse. Subsequently, the low-resistance memristor establishes a low-resistance path between capacitors C1 and C2, accelerating its charging / discharging process, causing the voltage across the memristor to drop rapidly, thus returning to the high-resistance state.

[0034] Understandably, the detection threshold for whether a staircase wave signal in a neuron circuit triggers a pulse depends on the resistance, capacitance, and memristor values ​​within the neuron circuit. Different ranges of analog signals can be adapted by adjusting these circuit parameters.

[0035] Therefore, the above-described neuron circuit can process the event information contained in analog information and convert it into a pulse signal output. The processed analog information can be a stepped wave signal passed through a sample-and-hold circuit. Whether the neuron circuit fires a pulse is determined by the rate of change of the input signal. When the input signal remains constant or the rate of change is low, the input signal will not trigger a response from the neuron circuit. Only when the rate of change of the input signal exceeds a threshold will the neuron circuit fire a pulse signal corresponding to the event information. This has the following advantages: First, compared with traditional threshold detection methods such as LC-ADC, the neuron circuit in this application can ignore the slowly changing part of the input signal, thereby avoiding interference caused by the slow change of the overall signal, so that the generated pulse signal response focuses on the event itself; Second, the pulse generation in this application relies on the symmetrical dual-threshold characteristics, volatility, and differences in the charging and discharging speed of the memristor, eliminating the need for ADC / DAC and complex digital circuits, greatly simplifying the circuit structure and saving costs.

[0036] In one embodiment, the resistive switching material of the volatile bidirectional threshold switching memristor TS is any one of VO2, NbO2, and OTS materials.

[0037] In one embodiment, the volatile bidirectional threshold switching memristor TS is a Mott insulator memristor.

[0038] In one embodiment, the neuron circuit further includes a sensor, which contains a sample-and-hold sub-circuit. The sensor is used to collect environmental information and first convert the collected environmental signal into a model voltage signal, and then convert the analog voltage signal into a stepped wave signal input to the first terminal of the input resistor R1 via the sample-and-hold circuit.

[0039] In one embodiment, the input signal is a sine wave with an amplitude of 7V and a frequency of 200Hz. The sampling interval should be comparable to the duration of the event to avoid multiple samplings of a single event. Preferably, the sampling interval is 0.1ms.

[0040] In one embodiment, capacitors C1 and C2 have the same capacitance. Using the same capacitor for sampling reduces circuit parameters and simplifies the analysis of capacitor values ​​to adapt to input signals with different frequencies and sampling intervals. In a specific example, the preferred capacitance range for capacitors C1 and C2 is 8nF to 10nF. Within this range, a reasonable event information discrimination threshold and a faster relaxation time can be obtained, adapting to event information of different frequencies while avoiding excessively strong single event stimulation leading to multiple pulse firings.

[0041] In one embodiment, resistor R1 is valued similarly to the memristor, ensuring that the memristor voltage divider exceeds the threshold voltage and maintaining a low capacitance time constant to guarantee the operating frequency of the neuron circuit. Resistor R2 is used to convert current information into voltage information, and its resistance is much smaller than that of the memristor to reduce its voltage division. In a specific example, the preferred range for resistor R1 is 2000Ω to 4000Ω, and the preferred range for resistor R2 is 10Ω to 20Ω. Within these ranges, event information can be converted into a reasonable memristor voltage divider, allowing for a wider selection range for the event information threshold.

[0042] In one embodiment, the threshold voltage range of the volatile bidirectional threshold switching memristor TS is preferably 0.5V to 1V, and the holding voltage range is preferably 0.2V to 0.3V. Within this range, it can be ensured that the neuron circuit can withstand events of greater intensity under the condition of generating only one pulse, reducing the dependence on large capacitors and enabling the neuron circuit to have a faster operating frequency.

[0043] Figure 3 This is a schematic diagram of the output of a memristor-based neuron circuit under different intensities of square wave excitation in one embodiment of this application. Figure 3 The upper part shows the output pulse signal of the neuron circuit, and the lower part shows the input analog signal via a sample-and-hold circuit. It can be seen that when the input signal is a pulse with a very low amplitude, the neuron circuit does not respond. Only when the input signal amplitude exceeds a threshold will the neuron circuit output the corresponding event pulse signal. Then, by converting a linear signal into a stepped-wave input circuit using a sample-and-hold circuit, a uniform event pulse output can be obtained. Generally, the neuron circuit will only generate one pulse firing for each event.

[0044] Figure 4 This is a schematic diagram of the output of a memristor-based neuron circuit under sinusoidal excitation in one embodiment of this application. Figure 4 The upper part shows the output pulse signal of the neuron circuit, and the lower part shows the input analog signal via a sample-and-hold circuit. It can be seen that the sample-and-hold circuit acquires external analog signals at a fixed frequency and inputs them into the neuron circuit as a sine wave. As the phase of the sine wave changes, its rate of change also changes. At a certain sampling rate, when the rate of change of the sine wave signal exceeds the threshold of the neuron circuit, the neuron circuit begins to generate uniform pulse firing.

[0045] This application also relates to a neural network device, which may include multiple neuron circuits arranged in layers, with each layer including at least one neuron circuit. The output of a neuron circuit in a previous layer may be connected to the input of a neuron circuit in a subsequent layer.

[0046] This application also relates to a computing device on which a neural network device may be deployed. The computing device may further include an interface capable of receiving data to be computed, inputting the data to be computed into the neural network device, and acquiring and sending the computation result output by the neural network device.

[0047] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered to be within the scope of this specification. It should be noted that the terms "in one embodiment," "for example," and "as in another example" in this application are intended to illustrate the application and are not intended to limit the application.

[0048] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are quite specific and detailed. However, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application.

Claims

1. A neuron circuit based on memristors, characterized in that, include: Volatile bidirectional threshold switching memristor TS, resistor R1, resistor R2, and capacitors C1 and C2; The first end of the resistor R1 serves as a signal input terminal for receiving a stepped wave signal, which is obtained by sampling and holding an analog voltage signal from the environment. The second end of the resistor R1 is connected to the first end of the volatile bidirectional threshold switching memristor TS. The first terminal of capacitor C1 is connected to the first terminal of the volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C1 is grounded. The first terminal of capacitor C2 is connected to the second terminal of volatile bidirectional threshold switching memristor TS, and the second terminal of capacitor C2 is connected to the first terminal of resistor R2. The first end of resistor R2 is the signal output terminal of the neuron circuit, and the second end of resistor R2 is grounded. The memristor TS has a positive and negative symmetrical threshold voltage and holding voltage. When the voltage of the memristor TS increases to exceed its threshold voltage, it will switch to a low-resistance state; when the voltage of the memristor TS decreases to below the holding voltage, it will automatically return to a high-resistance state. Resistor R1 and capacitor C1 form the first charging and discharging circuit. Resistor R1, volatile bidirectional threshold switching memristor TS, capacitor C2 and resistor R2 constitute the second charging and discharging circuit. The charging and discharging speed of the first charging and discharging circuit is greater than that of the second charging and discharging circuit. When a positive abrupt change occurs in the signal received at the signal input terminal, the first charging and discharging circuit rapidly charges capacitor C1, causing the potential at the first terminal of memristor TS to increase rapidly. Meanwhile, the second charging circuit, due to the high resistance state of memristor TS, charges more slowly, and the potential at the second terminal of memristor TS remains low. If the potential difference across memristor TS exceeds its threshold, memristor TS transitions from a high-resistance state to a low-resistance state, capacitor C2 charges rapidly, a positive pulse is output at the signal output terminal, the potential difference across memristor TS decreases, and memristor TS returns to a high-resistance state. If the potential difference across memristor TS does not exceed its threshold, the state of memristor TS remains unchanged, and a pulse cannot be triggered at the signal output terminal. When the signal input terminal receives a negative abrupt change in the signal, the first charging and discharging circuit rapidly discharges capacitor C1, causing the potential at the first terminal of memristor TS to decrease rapidly. However, because memristor TS is in a high-resistance state, the second charging circuit discharges more slowly, and the potential at the second terminal of memristor TS remains relatively high. If the potential difference across memristor TS exceeds its threshold, memristor TS changes from a high-resistance state to a low-resistance state, capacitor C2 discharges rapidly, and a negative pulse is output at the signal output terminal. The potential difference across memristor TS decreases, and memristor TS returns to a high-resistance state. If the potential difference across memristor TS does not exceed its threshold, the state of memristor TS remains unchanged, and a pulse cannot be triggered at the signal output terminal.

2. The memristor-based neuron circuit as described in claim 1, characterized in that, The resistive switching material of the volatile bidirectional threshold switching memristor TS is any one of VO2, NbO2, and OTS materials.

3. The memristor-based neuron circuit as described in claim 2, characterized in that, The volatile bidirectional threshold switching memristor TS is a Mott insulator memristor.

4. The memristor-based neuron circuit as described in claim 1, characterized in that, The capacitors C1 and C2 have the same capacitance.

5. The memristor-based neuron circuit as described in claim 1, characterized in that, The resistance value of resistor R1 is on the same order of magnitude as the resistance value of the memristor in its high-resistance state, while the resistance value of resistor R2 is two orders of magnitude smaller than that of resistor R1.

6. The memristor-based neuron circuit as described in claim 5, characterized in that, The resistance value of resistor R1 ranges from 2000Ω to 4000Ω, and the resistance value of resistor R2 ranges from 10Ω to 20Ω.

7. The memristor-based neuron circuit as described in claim 1, characterized in that, The neuron circuit also includes a sensor, which contains a sample-and-hold sub-circuit. The sensor is used to collect environmental information and first convert the collected environmental signal into a model voltage signal. Then, the analog voltage signal is converted into the stepped wave signal by the sample-and-hold circuit and input to the first terminal of the resistor R1.

8. A spiking neural network device, comprising at least one neuron circuit, characterized in that, The neuron circuit includes the memristor-based neuron circuit as described in any one of claims 1-7.

9. A computing device, characterized in that, The computing device is equipped with the neural network device as described in claim 8, and the computing device further includes an interface for transmitting received data to be computed to the neural network device. And obtain the calculation results from the output of the neural network.

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