A dense small target chip image segmentation method based on multi-scale local aggregation

Abstract

The application discloses a dense small target chip image segmentation method based on multi-scale local aggregation, relates to the field of semantic segmentation and defect detection, and aims to improve the detection effect of dense small target chip surface defects. The application iteratively trains a chip image segmentation model based on multi-scale local aggregation by using a labeled data set, extracts spatial features and semantic features of an input image by using the model, fuses and recognizes the spatial features and the semantic features, obtains an output image, and performs supervised training on a spatial feature extraction stage. After iterative training and testing are completed, the model is used to recognize a dense small target chip image to be segmented. The application improves the extraction capability and retention degree of local details of the dense small target chip image, guides learning of spatial detail features of the chip image, and thus improves the detection effect of dense small target chip surface defects.

Description

Technical Field

[0001] This invention relates to the fields of semantic segmentation and defect detection, and in particular to a method for segmenting dense small target chip images based on multi-scale local aggregation. Background Technology

[0002] For chips with dense small targets, traditional defect detection methods cannot meet the requirements of industrialization in terms of accuracy and cost, making chip defect detection methods based on image surfaces a key technology. Therefore, it is of great significance to study how to improve the defect detection effect of chips with dense small targets.

[0003] Semantic segmentation and object detection are both important tasks in defect detection. Semantic segmentation is performed at the pixel level, which aligns well with the massive transfer of chips at the pixel level during chip manufacturing processes. Meanwhile, object detection often uses pooling layers for downsampling, while semantic segmentation typically utilizes convolutional layers of varying lengths for downsampling. Compared to convolution, pooling operations lose pixel-level feature information, and the loss of even a small amount of feature information can significantly impact the detection of small objects. Therefore, semantic segmentation models are more suitable for detecting chip defects with densely packed small objects.

[0004] For densely packed microchips, existing semantic segmentation algorithms still suffer from insufficient ability to extract local detail features. Local detail features play a crucial role in distinguishing different chips and accurately locating boundaries, especially since microchips themselves contain limited information, and their dense density can interfere with boundary localization. However, existing feature extraction networks rely on convolutional kernels to extract features and use stacked kernels to obtain a larger receptive field. This leads to insufficient extraction of local detail features at shallow layers, failing to fully exploit information from individual pixels and the inter-pixel relationships. Consequently, the model lacks sufficient feature information to distinguish between dense foreground elements and different microchips, resulting in both false positives and false negatives.

[0005] Therefore, researching and designing a dense small target chip image segmentation model that fully extracts local detail information has become an urgent problem to be solved in this field. Summary of the Invention

[0006] The purpose of this invention is to provide a method for segmenting dense small target chip images based on multi-scale local aggregation, in order to improve the detection effect of surface defects of dense small target chips, in order to address the problems mentioned above.

[0007] The technical solution adopted in this invention is as follows:

[0008] A method for segmenting dense small target chip images based on multi-scale local aggregation, comprising:

[0009] S1. Collect chip sample images and label each chip with its category to construct a chip segmentation dataset;

[0010] S2. The pre-constructed chip image segmentation model based on multi-scale local aggregation is iteratively trained and tested using the chip segmentation dataset.

[0011] The chip image segmentation model is constructed as follows:

[0012] The spatial features of the input image are extracted using a multi-scale local aggregation feature extraction module, and semantic features are extracted based on these spatial features.

[0013] The spatial and semantic features are fused and recognized using a feature fusion module to obtain an output image.

[0014] The spatial feature extraction stage of the multi-scale local aggregation feature extraction module is trained using a supervised training module.

[0015] S3. Using the chip image segmentation model obtained in step S2, identify the dense small target chip images to be segmented, and complete the segmentation of different types of chips.

[0016] Furthermore, the method for extracting spatial features by the multi-scale local aggregation feature extraction module includes:

[0017] The input image is upscaled through two consecutive CBR modules;

[0018] By using two consecutive multi-scale receptive field local aggregation modules to aggregate and extract low-level spatial information, the resulting shallow feature map is the spatial feature.

[0019] Furthermore, the processing method of the input feature map by the multi-scale receptive field local aggregation module includes:

[0020] The input feature map is convolved by the first convolution module to obtain the first feature map. Then, the first feature map is convolved by the three branches of the first convolution module in two, three, and four consecutive ways. The feature maps of the three branches are concatenated and residually connected with the first feature map. The convolution kernel of the first convolution module is 3×3 and the stride is 1.

[0021] Furthermore, the method for extracting semantic features by the multi-scale local aggregation feature extraction module includes:

[0022] A multi-scale local aggregation downsampling module and two consecutive CBR modules are used to perform deep semantic extraction on spatial features, and the resulting deep feature map is the semantic feature.

[0023] Furthermore, the processing method of the input feature map by the multi-scale local aggregation downsampling module includes:

[0024] The input feature map is convolved by the first convolutional module to obtain the second feature map. This second feature map is then convolved through three branches: the first branch includes one consecutive first convolutional module and one consecutive second convolutional module; the second branch includes two consecutive first convolutional modules and one consecutive second convolutional module; and the third branch includes three consecutive first convolutional modules and one consecutive second convolutional module. The second feature map is then convolved by the second convolutional module to obtain the third feature map. The feature maps from the three branches are concatenated and residually concatenated with the third feature map. The second convolutional module has a 3×3 kernel and a stride of 2.

[0025] Furthermore, the method by which the feature fusion module fuses and identifies the spatial features and semantic features includes:

[0026] The spatial features and semantic features are concatenated.

[0027] The scale of the connected features is adjusted using a CBR module;

[0028] The scaled features are then transformed into feature vectors through global pooling and convolution.

[0029] The feature vectors are batch standardized, activated by the Sigmoid function, and multiplied to obtain the weight vectors.

[0030] The scaled features are weighted using a weight vector, and then upsampled to obtain the output image.

[0031] Furthermore, the method for supervising the training of the spatial feature extraction stage in the multi-scale local aggregation feature extraction module by the supervised training module includes:

[0032] The spatial feature extraction stage of the multi-scale local aggregation feature extraction module is trained under supervised conditions with the objective of minimizing the loss function configured for the supervised training module.

[0033] The loss function includes semantic segmentation loss and detail feature loss; the semantic segmentation loss is calculated from the semantic segmentation feature map and the semantic segmentation ground truth according to the semantic segmentation loss function, and the semantic segmentation feature map is generated by loading the output image into the semantic segmentation head; the detail feature loss is calculated from the detail feature map and the detail map ground truth according to the detail loss function, and the detail feature map is generated by loading spatial features into the detail feature head.

[0034] Furthermore, the method for generating the truth value of the detail graph includes:

[0035] Multi-scale edge features are extracted from semantic segmentation ground values ​​using the Labrador operator;

[0036] Upsample multi-scale edge features to the original size;

[0037] Multi-scale edge features are fused into single-channel features through 1×1 convolution;

[0038] Threshold segmentation is used to convert single-channel features into ground truth values ​​of detail maps.

[0039] Furthermore, the semantic segmentation loss function is a binary cross-entropy loss function.

[0040] Furthermore, the detailed loss function consists of binary cross-entropy and Dess loss.

[0041] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0042] This invention improves the ability of image segmentation models to extract and preserve local details in images of densely packed small-target chips. The multi-scale receptive field local aggregation module in the feature extraction stage weights and mixes features from multiple receptive fields, giving higher weights to smaller receptive fields, thereby focusing on extracting and preserving local detail features. Furthermore, the image segmentation model incorporates a training supervision module to guide the spatial feature extraction stage in learning the spatial detail features of the chip image, thus improving the detection performance of surface defects on densely packed small-target chips. Attached Figure Description

[0043] The present invention will be described by way of example and with reference to the accompanying drawings, wherein:

[0044] Figure 1 This is a flowchart of a dense small target chip segmentation method based on multi-scale local aggregation according to an embodiment of the present invention;

[0045] Figure 2 These are chip surface images of the Mini / Micro LED dataset in this embodiment of the invention, wherein (a) is a chip wafer surface image, (b) is a chip image of a portion of good chip categories, (c) is a chip image of a portion of dirty defect chip categories, and (d) is a chip image of a portion of floating crystal defect chip categories.

[0046] Figure 3 This is a network structure diagram of the chip image segmentation model based on multi-scale local aggregation as described in an embodiment of the present invention;

[0047] Figure 4 The diagram shows the structure of the multi-scale receptive field local aggregation module and the multi-scale local aggregation downsampling module according to the embodiments of the present invention. (a) is the multi-scale receptive field local aggregation module, and (b) is the multi-scale local aggregation downsampling module. Detailed Implementation

[0048] All features disclosed in this specification, or all steps in all disclosed methods or processes, may be combined in any way, except for mutually exclusive features and / or steps.

[0049] Any feature disclosed in this specification (including any appended claims and abstract) may be replaced by other equivalent or similar features, unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is merely one example of a series of equivalent or similar features.

[0050] like Figure 1 As shown, the dense small target chip image segmentation method based on multi-scale local aggregation includes the following steps:

[0051] S1. Constructing a dataset: Images of the surface of various types of chip sample wafers (such as Mini / Micro LED chips) are captured using visible light imaging equipment as chip sample images. In this embodiment, a total of 5000 images are collected. For each chip sample image (e.g....), ... Figure 2 The chips shown in (a) are categorized. Chips are divided into good chips and defective chips, with defective chips further divided into dirty chips and floating chips. Some chip sample images are shown below. Figure 2 As shown in (b)-(d).

[0052] Regarding the labeling of chip categories, in some embodiments, good chips are designated as the first category (represented by 0), dirty / defective chips as the second category (represented by 1), and chips with floating crystal defects as the third category (represented by 2). After labeling the chip sample images, a chip segmentation dataset for Mini / Micro LED target detection is constructed. The chip sample images are in JPG format, and each chip sample image is normalized to the same pixel size of 640×640. Chip sample images are randomly selected from the dataset at a 4:1 ratio to form the training set and the test set, respectively, for iterative training and testing of the model to be trained. The training set contains 4000 chip sample images, and the test set contains 1000 chip sample images. The number of chip samples of each category in the training set is shown in Table 1.

[0053] Table 1. Number of Mini / Micro LED chip samples in the training set

[0054] number 1,025,874 12,846 2175

[0055] S2. Construct a chip image segmentation model based on multi-scale local aggregation: Construct a chip image segmentation model that includes a multi-scale local aggregation feature extraction module, a feature fusion module, and a supervised training module. The network structure of this model is as follows: Figure 3As shown.

[0056] For the chip image segmentation model, the first step is to extract features from the chip sample image using a multi-scale local aggregation feature extraction module. The extracted features include spatial features and semantic features extracted based on these spatial features. Therefore, the execution of the multi-scale local aggregation feature extraction module includes a spatial feature extraction stage and a semantic feature extraction stage.

[0057] 1) Spatial feature extraction stage:

[0058] The input image is upscaled through two consecutive CBR modules. The CBR module is composed of Conv (convolutional layer), BN (normalization layer), and ReLU (activation layer).

[0059] By using two consecutive multi-scale receptive field local aggregation modules to aggregate and extract low-level spatial information, the resulting shallow feature map is the spatial feature.

[0060] Taking the above example, firstly, the 640×640 chip sample image is channel-upgraded using two consecutive CBR modules with a stride of 1, resulting in a 640×640×64 image; then, two consecutive Multi-Scale Receptive Field Local Aggregation (MRLAM) modules are used to aggregate and extract the underlying spatial information, resulting in a shallow feature map F of size 640×640×256. L It is used to capture local details and low-level features of an image.

[0061] 2) Semantic feature extraction stage:

[0062] A multi-scale local aggregation downsampling module and two consecutive CBR modules are used to perform deep semantic extraction on spatial features, and the resulting deep feature map is the semantic feature.

[0063] Continuing with the example above, the Multi-Scale Local Aggregated Downsampling (MRLASM) module and two consecutive CBR modules with a stride of 2 are used to further extract deep semantic information from the shallow feature map, thereby obtaining a deep feature map F containing high-level semantic information. H F H The image size is 80×80×256.

[0064] Table 2 shows the specific network parameters of the multi-scale local aggregation feature extraction module.

[0065] Table 2 Network parameters of the multi-scale local aggregation feature extraction module

[0066]

[0067] The structures of the multi-scale receptive field local aggregation module and the multi-scale local aggregation downsampling module are as follows: Figure 4 As shown in Table 2, the processing methods of the input feature map by the multi-scale receptive field local aggregation module and the multi-scale local aggregation downsampling module can be understood.

[0068] In the multi-scale receptive field local aggregation module, all convolutions use a first convolutional module with a 3×3 kernel and a stride of 1. The multi-scale receptive field local aggregation module convolves the input feature map F0 (size 640×640×64) through the first convolutional module to extract features, resulting in a first feature map F1 (size 640×640×32). This first feature map F1 is then convolved through the three branches of two, three, and four consecutive first convolutional modules, respectively, to obtain the corresponding feature maps F1 and F2. 21 F 22 F 23 This allows for the collection of local features from different receptive fields, and the feature maps from the three branches are then stitched together. Feature map F 21 F 22 F 23 The sizes are 640×640×16, 640×640×8, and 640×640×8, respectively. At the same time, the spliced ​​feature map is spliced ​​and fused with the first feature map F1 using residual connection, and finally a feature map F3 with 64 channels is generated. This feature map F3 contains multi-scale local features.

[0069] The receptive field of the above feature map can be calculated using the receptive field calculation formula, as follows:

[0070]

[0071] Among them l k Let l represent the receptive field of the k-th layer. k-1 f represents the receptive field of the (k-1)th layer. k s represents the size of the k-th convolutional kernel. l This represents the step size of the i-th layer.

[0072] Therefore, the receptive field of feature map F1 can be calculated to be 3×3, and the feature map F 21 F 22 F 23 The receptive fields are 7×7, 9×9, and 11×11, respectively. The components of feature map F3 are as follows:

[0073]

[0074] The feature map F3 output by the second multi-scale receptive field local aggregation module is the shallow feature map F. L .

[0075] The multi-scale local aggregation downsampling module introduces a convolutional module with a stride of 2 on top of the multi-scale receptive field local aggregation module to perform high-resolution downsampling aggregation of feature maps and provide a larger receptive field. The multi-scale local aggregation downsampling module processes shallow feature maps F of size 640×640×256. L After convolution in the first convolutional module, features are extracted to obtain a second feature map F1′ with a size of 640×640×128. Then, the second feature map F1′ is processed through three branches for feature extraction and downsampling to obtain feature maps F21′, F22′, and F32′ respectively. 22 ′、F 23 The first branch contains one consecutive first convolutional module and one consecutive second convolutional module; the second branch contains two consecutive first convolutional modules and one consecutive second convolutional module; and the third branch contains three consecutive first convolutional modules and one consecutive second convolutional module. The second convolutional module has a 3x3 kernel and a stride of 2. The feature map F is then concatenated. 21 ′、F 22 ′、F 23 The two feature maps F1 and F2 are then merged together. Simultaneously, the second feature map F1' is downsampled and spliced ​​using residual connections to generate a final feature map F3' with 256 channels. This feature map F3' also contains multi-scale local features. (Feature maps F1' and F2' are then mentioned.) 21 ′、F 22 ′、F 23 The sizes of feature map F3′ are 320×320×128, 320×320×64, 320×320×32, and 320×320×32, respectively. The components of feature map F3′ are as follows:

[0076]

[0077] The chip image segmentation model then utilizes the feature fusion module to process the shallow feature map F. L (i.e., spatial features) and deep feature map F H The semantic features are fused and recognized to obtain the output image.

[0078] The chip image segmentation model first divides the shallow feature map F L Spatial information and deep feature map F H The features are concatenated using contextual information; the feature scale is adjusted using a CBR module; then these cascaded features are transformed into vector form through a global pooling module and a convolution module, and a weight vector is calculated by batch normalization, Sigmoid activation, and multiplication; the scale-adjusted features are reweighted using this weight vector, and finally, the image is upsampled eight times to restore it to the original image size of 640×640×3.

[0079] In addition, during the model training phase, to better supervise the model's learning, the chip image segmentation model utilizes a supervised training module to supervise the spatial feature extraction stage of the multi-scale local aggregation feature extraction module. The supervised training module includes a semantic segmentation head and a detail feature head, used to extract features from the output image and spatial features respectively, to evaluate the performance of recognition and feature extraction.

[0080] The supervised training module aims to minimize the loss function configured for the supervised training module by supervising the spatial feature extraction stage of the multi-scale local aggregation feature extraction module. The loss function includes semantic segmentation loss and detail feature loss. The semantic segmentation loss is calculated using the semantic segmentation feature map and the ground truth semantic segmentation value (i.e., the true annotation for each chip sample in the dataset) according to the semantic segmentation loss function. The semantic segmentation feature map is generated by loading the output image into the semantic segmentation head. The detail feature loss is calculated using the detail feature map and the ground truth detail map according to the detail loss function. The detail feature map is generated by loading spatial features into the detail feature head.

[0081] The output of the feature fusion module is inserted into a semantic segmentation head to generate a semantic feature map, which guides the deep encoding of semantic information. The semantic segmentation head consists of a CBR module and a 1×1 convolutional module. Spatial features are inserted into a detail feature head to generate a high-resolution detail feature map. Then, the ground truth of the detail map and the detail loss function are used for auxiliary training. During training, the first three layers of the model are supervised to learn the detail information of the learning target.

[0082] The loss function-assisted training process is as follows: First, a combined Laplacian operator is used to generate detail feature maps from the semantic segmentation ground truth. The Laplacian operator can generate edge features of the target, and multi-scale edge features are obtained by changing the stride. Then, the multi-scale edge features are upsampled to the original size and fused into single-channel features using a trainable 1×1 convolution. Finally, a 0.1 threshold segmentation is used to convert the predicted single-channel features into the final binary detail map ground truth with Mini / Micro LED chip edges. By constructing a detail loss function, the learning of the model in the spatial feature extraction stage is supervised.

[0083] In some embodiments, the semantic segmentation loss uses the binary cross-entropy loss (Bce Loss) function. For a semantic segmentation feature map with height H and width W, the semantic segmentation loss function is expressed as follows:

[0084]

[0085] in This represents the predicted segmentation feature map, also known as the semantic segmentation feature map. This represents the actual segmentation ground truth, i.e., the semantic segmentation ground truth. 'i' represents the i-th pixel. This represents the predicted probability of the i-th pixel in the predicted segmentation feature map. Let represent the predicted probability of the i-th pixel in the semantic segmentation ground truth. This indicates whether the category of the i-th pixel in the predicted segmentation feature map is consistent with the category of the i-th pixel in the ground truth segmentation value; 1 indicates consistency, 0 indicates non-consistency.

[0086] The detail loss function employs binary cross-entropy and Dice loss. Dice loss measures the similarity between the detail feature map and the ground truth detail; it is insensitive to the number of foreground and background pixels, thus mitigating class imbalance. For a detail feature map with height H and width W, the detail loss function is formulated as follows:

[0087] L d (p d ,g d ) = L dice (p d ,g d )+L bce (p d ,g d )

[0088] in Represents the predicted detailed feature map. This represents the actual truth value of the detail, i.e., the truth value of the detail map.

[0089] L bce It is a binary cross-entropy loss function, expressed as follows:

[0090]

[0091] Where i is the i-th pixel. This represents the predicted probability of the i-th pixel in the predicted detail feature map. Let represent the predicted probability of the i-th pixel in the detail map's ground truth. This indicates whether the category of the i-th pixel in the predicted detail feature map is consistent with the category of the i-th pixel in the ground truth detail map; 1 indicates consistency, 0 indicates non-consistency.

[0092] L dice The Desce loss function is expressed as follows:

[0093]

[0094] Where i is the i-th pixel, and ∈ is a Laplacian smoothing operator to avoid zero terms in the denominator. In this model, ∈ is set to 1.

[0095] Finally, a balance between the auxiliary and primary loss functions is achieved by adjusting the coefficient α. The detail loss function serves as the auxiliary loss function, while the semantic segmentation loss function serves as the primary loss function, as shown in the following equation. In this embodiment, α is set to 0.5 (or another coefficient less than 1). The introduced auxiliary loss function makes the optimizer perform the model optimization more smoothly.

[0096] L all =L s (p s ,g s )+αL d (p d ,g d )

[0097] S3. Model Training: The training set obtained in step S1 is input in batches into the chip image segmentation model based on multi-scale local aggregation constructed in step S2 for iterative training. In each iteration, the network parameters of the model are updated according to the loss calculated by the supervised training module. After each batch of network parameter updates, the next iteration is performed. After all iterations are complete, the final chip image segmentation model based on multi-scale local aggregation is obtained.

[0098] S4. Model Testing: The test set constructed in step S1 is input into the final chip image segmentation model based on multi-scale local aggregation obtained in step S3. After passing through the network backbone structure composed of the multi-scale local aggregation feature extraction module and the feature fusion module, the detection results are output, completing the chip image segmentation and detection. The segmentation pixel accuracy of each category is shown in Table 3.

[0099] Table 3. Segmentation Effects of Mini / Micro LED Chips by Category

[0100] quantity 236,412 3055 548 Pixel accuracy 97.5％ 93.8％ 94.6％

[0101] S5. Using the chip image segmentation model tested in step S4, identify the dense small target chip images to be segmented, and complete the segmentation of different types of chips.

[0102] This invention is not limited to the specific embodiments described above. The invention extends to any new feature or combination disclosed in this specification, as well as any new method or process step or combination disclosed herein.

Claims

1. A method for segmenting dense small target chip images based on multi-scale local aggregation, characterized in that, include: S1. Collect chip sample images and label each chip with its category to construct a chip segmentation dataset; S2. The pre-constructed chip image segmentation model based on multi-scale local aggregation is iteratively trained and tested using the chip segmentation dataset. The chip image segmentation model is constructed as follows: The spatial features of the input image are extracted using a multi-scale local aggregation feature extraction module, and semantic features are extracted based on these spatial features. The method for extracting spatial features by the multi-scale local aggregation feature extraction module includes: The input image is upscaled through two consecutive CBR modules; Two consecutive multi-scale receptive field local aggregation modules are used to aggregate and extract low-level spatial information, and the resulting shallow feature map is the spatial feature. The processing method of the input feature map by the multi-scale receptive field local aggregation module includes: convolving the input feature map through a first convolution module to obtain a first feature map; then convolving the first feature map through the three branches of two, three, and four consecutive first convolution modules respectively; concatenating the feature maps of the three branches; and performing a residual connection with the first feature map; the convolution kernel of the first convolution module is 3×3, and the stride is 1. The method for extracting semantic features by the multi-scale local aggregation feature extraction module includes: A multi-scale local aggregation downsampling module and two consecutive CBR modules are used to perform deep semantic extraction on spatial features, and the resulting deep feature map is the semantic feature. The spatial and semantic features are fused and recognized using a feature fusion module to obtain an output image. The spatial feature extraction stage of the multi-scale local aggregation feature extraction module is trained using a supervised training module. S3. Using the chip image segmentation model obtained in step S2, identify the dense small target chip images to be segmented, and complete the segmentation of different types of chips.

2. The method for dense small target chip image segmentation based on multi-scale local aggregation as described in claim 1, characterized in that, The multi-scale local aggregation downsampling module processes the input feature map using the following methods: The input feature map is convolved by the first convolutional module to obtain the second feature map. This second feature map is then convolved through three branches: the first branch includes one consecutive first convolutional module and one consecutive second convolutional module; the second branch includes two consecutive first convolutional modules and one consecutive second convolutional module; and the third branch includes three consecutive first convolutional modules and one consecutive second convolutional module. The second feature map is then convolved by the second convolutional module to obtain the third feature map. The feature maps from the three branches are concatenated and residually concatenated with the third feature map. The second convolutional module has a 3×3 kernel and a stride of 2.

3. The method for dense small target chip image segmentation based on multi-scale local aggregation as described in claim 2, characterized in that, The method by which the feature fusion module fuses and identifies the spatial features and semantic features includes: The spatial features and semantic features are concatenated. The scale of the connected features is adjusted using a CBR module; The scaled features are then transformed into feature vectors through global pooling and convolution. The feature vectors are batch standardized, activated by the Sigmoid function, and multiplied to obtain the weight vectors. The scaled features are weighted using a weight vector, and then upsampled to obtain the output image.

4. The method for dense small target chip image segmentation based on multi-scale local aggregation as described in claim 1, characterized in that, The method for supervising the training of the spatial feature extraction stage in the multi-scale local aggregation feature extraction module includes: The spatial feature extraction stage of the multi-scale local aggregation feature extraction module is trained under supervised conditions with the objective of minimizing the loss function configured for the supervised training module. The loss function includes semantic segmentation loss and detail feature loss; the semantic segmentation loss is calculated from the semantic segmentation feature map and the semantic segmentation ground truth according to the semantic segmentation loss function, and the semantic segmentation feature map is generated by loading the output image into the semantic segmentation head; the detail feature loss is calculated from the detail feature map and the detail map ground truth according to the detail loss function, and the detail feature map is generated by loading spatial features into the detail feature head.

5. The dense small target chip image segmentation method based on multi-scale local aggregation as described in claim 4, characterized in that, The method for generating the truth value of the detail map includes: Multi-scale edge features are extracted from semantic segmentation ground values ​​using the Labrador operator; Upsample multi-scale edge features to the original size; Multi-scale edge features are fused into single-channel features through 1×1 convolution; Threshold segmentation is used to convert single-channel features into ground truth values ​​of detail maps.

6. The method for segmenting dense small target chip images based on multi-scale local aggregation as described in claim 5, characterized in that, The semantic segmentation loss function is the binary cross-entropy loss function.

7. The method for dense small target chip image segmentation based on multi-scale local aggregation as described in claim 5, characterized in that, The detailed loss function consists of binary cross-entropy and Dess loss.

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