Electrostatic discharge protection system for micro devices

Abstract

An electrostatic discharge (ESD) protection system (500) for a micro device includes a pixel driver circuit (01) and a first ESD protection unit (021). The pixel driver circuit (01) is electrically connected to at least one micro LED pixel (00) to control the turning on or off of the micro LED pixel. The first ESD protection unit (021) is electrically connected to the micro LED pixel (00). The ESD protection system (500) is capable of protecting the micro LED pixel (00) from being damaged due to electrostatic discharge.

Description

Technical Field

[0001] This invention generally relates to display devices and technologies, and more specifically, to ESD protection systems for microdevices. Background Technology

[0002] Display technology is becoming increasingly important in today's commercial electronic devices. These display panels are widely used in fixed large screens, such as LCD TVs and OLED TVs, as well as portable electronic devices, such as laptops, smartphones, tablets, and wearable devices.

[0003] Electrostatic discharge (ESD) is one of the most common threats to the reliability of electronic components. An ESD-related event occurs when a limited amount of charge is transferred from one object to another, such as from the human body to a microdevice. This process results in a very high current flowing through the microdevice for a very short period. In fact, over 35% of chip damage can be attributed to ESD-related events. Common failures caused by ESD include contact damage, current leakage, short circuits, gate oxide cracking, and burnout. ESD failures are unpredictable or difficult to diagnose after they occur.

[0004] Furthermore, designing on-chip ESD structures to protect integrated circuits from ESD stress is a high-priority task in the semiconductor industry. Continued advancements in metal-oxide-semiconductor (MOS) and other processing technologies have made ESD-induced failures even more prominent. In fact, many semiconductor companies worldwide are struggling to meet the increasingly stringent ESD protection requirements of various electronic applications, and it can be confidently predicted that the availability of effective and robust ESD protection solutions will be a key and necessary factor for the well-being and commercialization of the electronics industry.

[0005] Furthermore, miniature light-emitting diode (LED) panels are widely studied worldwide. However, miniature LEDs lack ESD protection, which can lead to damage to the panels and limit their implementation and reliability. Summary of the Invention

[0006] There is a need for improved display designs that address and mitigate the shortcomings of conventional display systems, such as those mentioned above. In particular, display panels with improved stability and reliability, as well as better image quality, are required.

[0007] In some embodiments, integrated circuit (IC) chips require ESD protection at all pins of the packaged device. ESD clamping circuitry ideally operates in a high-impedance state with a tolerable capacitive load and triggers only upon detection of an ESD pulse, thereby protecting the input / output (I / O) circuitry. As an ESD pulse appears on the IC pads, the protection device clamps the majority of the ESD current energy to the ground bus. The clamping device needs to be fully compatible with the I / O functionality.

[0008] Various embodiments include display panels with integrated micro-LED arrays. Display panels typically include an array of pixel light sources (e.g., LEDs, OLEDs) electrically coupled to corresponding pixel driver circuitry (e.g., FETs). The micro-LED panel includes an IC backplane and a micro-LED array electrically formed on the IC backplane.

[0009] In some embodiments, this disclosure provides an electrostatic discharge (ESD) protection system for micro-devices, particularly for micro-LED panels, to address the problem that micro-LED panels are always damaged by external electrostatic discharge.

[0010] To achieve the above objectives, in one aspect, this disclosure provides an ESD protection system for a microdevice, comprising: a pixel driver circuit electrically connected to at least one microLED pixel for controlling the microLED pixel to turn on or off; and a first ESD protection unit electrically connected to the microLED pixel.

[0011] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the micro LED pixels are connected to a second level voltage (Vcom).

[0012] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the cathode of the micro LED pixel is connected to a second level voltage (Vcom).

[0013] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the first ESD protection unit is connected to a third level voltage (Vss) and a second level voltage (Vcom).

[0014] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the third level voltage (Vss) is greater than the second level voltage (Vcom).

[0015] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the third level voltage (Vss) is zero; and the second level voltage (Vcom) is a negative voltage.

[0016] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the first ESD protection unit includes a power supply ESD clamping circuit.

[0017] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for a microdevice, the first ESD protection unit includes a MOS transistor; the gate of the first ESD protection unit is connected to the source of the first ESD protection unit and a second level voltage (Vcom); the drain of the first ESD protection unit is connected to a third level voltage (Vss); and the first ESD protection unit has parasitics on the MOS transistor.

[0018] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the MOS transistor is an NMOS.

[0019] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the first ESD protection unit includes: a P-type semiconductor substrate; a P-well region formed in the P-type semiconductor substrate; an N-well formed around the P-well region; a deep N-well formed at the bottom of the N-well and the bottom of the P-well region; an N+ drain formed in the P-well region; an N+ source formed in the P-well region; a first P+ implantation region formed next to the N+ source in the P-well region; a gate formed on a portion of the P-well region between the N+ source and the N+ drain and connected to the N+ source and the first P+ implantation region; and a second P+ implantation region formed next to the N-well in the P-type semiconductor substrate.

[0020] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for a microdevice, the N-well, N+ drain, and second P+ injection region are connected to a third level voltage (Vss); and the first P+ injection region, N+ source, and gate are connected to a second level voltage (Vcom).

[0021] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system of the microdevice, at least one micro LED pixel is a micro LED pixel array; and the pixel driver circuit controls the turning on or off of each micro LED pixel in the micro LED pixel array.

[0022] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, a first ESD protection unit is connected to each micro LED pixel.

[0023] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the micropixel driver circuit is connected to a first level voltage (Vdd) and the microLED pixel.

[0024] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the system further includes a second ESD protection unit connected to a first voltage level (Vdd) and a third voltage level (Vss).

[0025] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the second ESD protection unit includes a plurality of second ESD sub-clamping circuits; the first terminal of each second ESD sub-clamping circuit is connected to a first level voltage (Vdd) and a pixel driver circuit, and the second terminal of each second ESD sub-clamping circuit is connected to a third level voltage (Vss); and the second ESD sub-clamping circuits are connected in parallel with each other.

[0026] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the first voltage level (Vdd) is greater than the second voltage level (Vcom); the third voltage level (Vss) is greater than the second voltage level (Vcom); and the first voltage level (Vdd) is greater than the third voltage level (Vss).

[0027] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the second level voltage (Vcom) is a negative voltage; the first level voltage (Vdd) is a positive voltage; and the third level voltage (Vss) is zero.

[0028] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the second ESD protection unit includes a power rail ESD clamping circuit.

[0029] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, a first ESD protection unit and a second ESD protection unit are formed in a semiconductor substrate.

[0030] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the microdevices are selected from micro inorganic LED devices and micro organic LED devices; and the micro LED pixels are selected from inorganic micro LEDs or organic micro LEDs.

[0031] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the system further includes a third ESD protection unit; and a first terminal of the third ESD protection unit is connected to a first voltage level (Vdd), and a second terminal of the third ESD protection unit is connected to a third voltage level (Vss).

[0032] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, a third ESD protection unit is connected to the IO circuit.

[0033] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the third ESD protection unit includes at least two third ESD sub-clamping circuits; and the third ESD sub-clamping circuits are connected in series with each other.

[0034] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, a first terminal of the micropixel driver circuit is connected to a fourth level voltage (Vdd), and a second terminal of the micropixel driver circuit is connected to a microLED pixel.

[0035] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the system further includes a fourth ESD protection unit; and a first terminal of the fourth ESD protection unit is connected to a fourth voltage level (Vdd), while a second terminal of the fourth ESD protection unit is connected to a third voltage level (Vss).

[0036] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the third level voltage (Vss) is less than the fourth level voltage (Vdd).

[0037] In some exemplary embodiments or any combination of exemplary embodiments of the ESD protection system for microdevices, the pixel driver circuit includes at least one switch.

[0038] The display devices and systems disclosed in this paper are designed to reduce ESD damage, improving the light emission efficiency and overall performance of the display system. Therefore, implementations of display systems with microlens arrays are better suited to meet the display requirements of augmented reality (AR) and virtual reality (VR), head-up displays (HUDs), mobile device displays, wearable device displays, high-definition projectors, and automotive displays compared to conventional displays.

[0039] Note that the various embodiments described above can be combined with any other embodiments described herein. The features and advantages described in the specification are not exhaustive, and in particular, many additional features and advantages will be apparent to those skilled in the art from the accompanying drawings, specification, and claims. Furthermore, it should be noted that the language used in the specification has been chosen primarily for readability and instruction purposes and is not intended to define or limit the subject matter of the invention. Attached Figure Description

[0040] To gain a more detailed understanding of this disclosure, reference can be made to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the drawings only illustrate relevant features of this disclosure and should not be considered limiting, as the specification may allow for other valid features.

[0041] For convenience, "up" is used to indicate the substrate away from the light-emitting structure, "down" indicates the direction towards the substrate, and other directional terms such as top, bottom, above, below, under, and below are explained accordingly.

[0042] Figure 1 The illustration shows a schematic block diagram of an electrostatic discharge (ESD) protection system for a microdisplay according to some embodiments.

[0043] Figure 2 The diagram illustrates a circuit diagram of an ESD protection system for a microdisplay according to some embodiments.

[0044] Figure 3 The diagram illustrates a circuit diagram of an ESD protection system according to some embodiments.

[0045] Figure 4 The figure shows a cross-sectional view of an ESD protection system according to some embodiments.

[0046] Figure 5 The diagram illustrates a circuit diagram of an ESD protection system for a microdisplay according to some embodiments.

[0047] By convention, the various features shown in the accompanying drawings may not be drawn to scale. Therefore, for clarity, the dimensions of various features may be arbitrarily enlarged or reduced. Additionally, some drawings may not depict all components of a given system, method, or apparatus. Finally, the same reference numerals may be used to denote the same features throughout the specification and drawings. Detailed Implementation

[0048] Numerous details are described herein to provide a thorough understanding of the exemplary embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many specific details, and the scope of the claims is limited only to those features and aspects specifically set forth in the claims. Furthermore, well-known processes, components, and materials are not described exhaustively so as not to unnecessarily obscure relevant aspects of the embodiments described herein.

[0049] As discussed above, in order to address the problems in the related art, an ESD protection system for microdevices is provided in some embodiments of this disclosure. Figure 1The illustration shows a schematic block diagram of an electrostatic discharge (ESD) protection system for a microdisplay according to some embodiments.

[0050] Figure 2 The illustration depicts an ESD protection system for a microdisplay according to some embodiments, such as... Figure 1 The circuit diagram of the ESD protection system shown is shown.

[0051] Reference Figure 1 and Figure 2 The ESD protection system for the microdevice includes a pixel driver circuit 01 and a first ESD protection unit 021. The pixel driver circuit 01 is electrically connected to at least one micro-LED pixel 00, such as a micro-LED pixel array, to control the on / off state of the at least one micro-LED pixel 00. In some embodiments, the first ESD protection unit 021 is electrically connected to the micro-LED pixel 00. Here, the pixel driver circuit 01 is connected to a first voltage level (Vdd) 03 and the micro-LED pixel 00. Furthermore, a first terminal of the micro-pixel driver circuit 01 is connected to the first voltage level (Vdd) 03, and a second terminal of the micro-pixel driver circuit 01 is connected to the micro-LED pixel 00. In some embodiments, the second terminal of the micro-pixel driver circuit 01 is connected to the cathode of the micro-LED pixel 00, and the micro-LED pixel 00 is connected to a second voltage level (Vcom) 04. In some embodiments, a second ESD protection unit 022 is connected to the first voltage level 03 and a third voltage level 05. In some instances, the second ESD protection unit 022 includes a second ESD clamping circuit.

[0052] like Figure 1 and Figure 2 As shown, in some embodiments, the first ESD protection unit 021 includes a first ESD clamping circuit. Here, one end of the first ESD protection unit 021 (e.g., the first ESD clamping circuit) is connected to a third voltage level (Vss) 05. The other end of the first ESD protection unit 021 is connected to a second voltage level (Vcom) 04. The second ESD protection unit 022 is connected to both the first voltage level (Vdd) 03 and the third voltage level (Vss) 05.

[0053] In some embodiments, preferably, the second voltage level (Vcom) 04 is a negative voltage, the first voltage level (Vdd) 03 is a positive voltage, and the third voltage level (Vss) 05 is a positive voltage or zero. For example, the voltage of Vdd can be 1 to 2V, the voltage of Vss can be 0V, and / or the voltage of Vcom can be -5 to 0V.

[0054] Figure 3 The diagram illustrates a circuit diagram of an ESD protection unit according to some embodiments. For example, Figure 3 The figures illustrate embodiments according to this disclosure. Figure 1 and Figure 2 The circuit diagram shown is for an ESD protection unit or ESD clamping circuit.

[0055] Reference Figure 3 and Figure 2 In some embodiments, the first ESD protection unit 021 and / or the second protection unit 022 are power rail ESD clamping circuits. Figure 3 This is an exemplary illustration of a power pin ESD network composed of ground-gate n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) devices. In some embodiments, Figure 3 The left structure 021L in the diagram is the actual power supply clamping circuit, while Figure 3 The right structure 021R in the diagram illustrates the principle of a power supply clamp ESD protection system. A ground-gate N-type metal-oxide-semiconductor (NMOS) ESD network (such as 021L) is used in complementary metal-oxide-semiconductor (CMOS) technology. Typically, it is an n-channel MOSFET with a MOSFET drain connected to a power supply pin 302 with V'DD. The n-channel MOSFET also connects its source and gate to a ground power rail 304. This circuit remains "off" during normal operation. When the signal pin 302 exceeds the MOSFET fast-return voltage, the circuit discharges to the V'SS power rail. In some instances, the fast-return voltage is the voltage applied to the transistor when avalanche breakdown or impact ionization in the transistor provides sufficient base current to turn it on. When the voltage at the signal pin 302 is below ground potential, the MOSFET drain is forward biased to the p-well or p-substrate region for electrostatic protection.

[0056] In some embodiments, such as Figures 1 to 3 As shown, preferably, the first ESD protection unit 021 is a negative power supply ESD clamping circuit. (Refer to...) Figure 2 The first ESD protection unit 021 includes a MOS transistor; furthermore, the first ESD protection unit has parasitic characteristics on the MOS transistor. Here, the gate of the first ESD protection unit 021 is connected to the source of the first ESD protection unit 021 and the second level voltage (Vcom) 04. Additionally, the drain of the first ESD protection unit 021 is connected to the third level voltage (Vss) 05. In some embodiments, when the second level voltage (Vcom) 04 is negative, the MOS transistor is preferably NMOS. Here, the cathode of the micro LED pixel 00 is connected to the second level voltage (Vcom) 04.

[0057] Figure 4 The figure shows a cross-sectional view of an ESD protection system according to some embodiments.

[0058] Figure 4 The semiconductor substrate 400 may be a first type of silicon substrate. In some embodiments, the first ESD protection unit 021 includes: a first type well region 403, a second type well 401, a second type deep well 402, a second type source 405, a second type drain 404, a first implantation region 406, a gate 408, and a second implantation region 407. Furthermore, the first type well region 403 is formed in the first type semiconductor substrate 400. The second type well 401 is formed around the first type well region 403. The second type deep well 402 is formed at the bottom of the second type well 401 and at the bottom of the first type well region 403. The second type source 405 is formed in the first type well region 403. The second type drain 404 is formed in the first type well region 403. The first implantation region 406 is formed next to the second type source 405. The gate 408 is formed on a portion of the first type well region 403 between the second type source 405 and the second type drain 404, and is connected to the second type source 405 and the first implantation region 406. The second injection region 407 is formed next to the second type of sink 401.

[0059] In some embodiments, both the first ESD protection unit 021 and the second ESD protection unit 022 are formed in a semiconductor substrate. In some examples, the first type is P-type and the second type is N-type, which is not limited to the scope of this disclosure.

[0060] like Figure 4 As shown, in some embodiments, an N-deep well 402 is formed in the P-type substrate 400, and an N-well 401 is formed on and around the top edge of the N-deep well 402, with the N-well 401 and N-deep well 402 surrounding the P-well region 403. The N-well 401 is formed around the P-well region 403. The N-deep well 402 is formed at the bottom of the N-well 401 and the bottom of the P-well region 403. An N+ implantation region 404 serving as the N+ drain is formed in the P-well region 403, and an N+ implantation region 405 serving as the N+ source is formed in the P-well region 403. A gate 408 is formed on a portion of the P-well region 403 between the N+ drain 404 and the N+ source 405. The gate 408 is connected to the N+ source 405 and the first P+ implantation region 406. The first P+ implantation region 406 is formed in the P-well region 403 and close to the N+ source 405. A second P+ injection region 407 is formed next to or around the N-well 401. In some embodiments, the N+ injection region 404, the N-well 401, and the second P+ injection region 407 are connected to a third level voltage (Vss), for example... Figure 1 and Figure 2 Vss 05 in the example. In some embodiments, the N+ injection region 405, the first P+ injection region 406, and the gate 408 are connected to a second level voltage (Vcom), for example... Figure 1 and Figure 2Vcom 04 in the middle. In some instances, the second P+ injection region 407 is connected to Vss (e.g., Figure 1 and Figure 2 Vss 05 in the diagram is used as ground. In some embodiments, gate 408 may be a gate structure comprising several material layers such as a dielectric layer and spacers. Gate 408 is a conventional gate structure, which will be understood by those skilled in the art and will not be described herein. In some embodiments, 4011 is an implantation region, such as an N+ implantation region.

[0061] Figure 5 The diagram illustrates a circuit diagram of an ESD protection system for a microdisplay according to some embodiments.

[0062] In some embodiments, Figure 1 and Figure 2 The micro LED pixel 00 shown can be replaced by a micro LED pixel array, and Figure 1 and Figure 2 The pixel driver circuit 01 controls the on / off state of each micro-LED pixel in the micro-LED pixel array. Preferably, the second ESD protection unit 022 is connected to each micro-LED pixel. In another embodiment, the second ESD protection unit 022 may include a plurality of second ESD protection units 022, and each second ESD protection unit 022 is connected to a first level voltage (Vdd) 03 and a third level voltage Vss 05, and is respectively connected to each micro-LED pixel.

[0063] like Figure 5 As shown, in some embodiments, the second ESD protection unit 022 includes multiple second ESD protection units 022, such as 0221 and 0222. In some embodiments, one end of each second ESD protection unit 022 is connected to a first level voltage 03 (Vdd), and the first level voltage 03 (Vdd) is connected to the pixel driver circuit 01 (e.g., ...). Figure 1 and Figure 2 As shown), the other end of each second ESD protection unit 022 is connected to the third level voltage 05 (Vss).

[0064] Reference Figure 5 , Figure 1 and Figure 2In another embodiment, one end of the micro-pixel driver circuit 01 is connected to a fourth level voltage 07 (Vdd), while the other end of the micro-pixel driver circuit 01 is connected to the micro-LED pixel 00. The pixel driver circuit 01 includes at least one switch, such as switches 011, 012, and 013. Preferably, switches 011, 012, and / or 013 are formed by transistors. Switches 011, 012, and 013 are connected in series to achieve three-level control of the micro-LED pixel to turn on or off, thereby controlling the luminous intensity and luminous time. For example, switches 011, 012, and 013 are connected in series to control the current of the micro-pixel driver circuit 01 to be turned on or off, control the PWM signal from an external source to be turned on or off, and control the scan signal from an external source to be turned on or off, respectively.

[0065] in addition, Figure 5 The ESD protection system 500 also includes a third ESD protection unit 023. One end of the third ESD protection unit 023 is connected to the first level voltage 03 (Vdd), and the other end of the third ESD protection unit 023 is connected to the third level voltage 05 (Vss).

[0066] Here, an input / output (I / O) circuit 06 is formed next to the pixel driver circuit 01 for receiving signals from the outside or outputting signals to external circuits. A third ESD protection unit 023 is connected to the I / O circuit 06 for performing ESD protection on the I / O circuit 06. In some embodiments, the I / O circuit 06 may be formed relatively far around the micro LED pixel 00, for example, equal to or greater than 10 micrometers to 50 mm, such as 10 micrometers, 20 micrometers, 100 micrometers, 300 micrometers, 500 micrometers, 1 mm, 5 mm, 10 mm, 20 mm, 30 mm, 40 mm, or 50 mm. The third ESD protection unit 023 includes at least two third ESD sub-clamping circuits connected in series with each other, such as third ESD sub-clamping circuits 0231 and 0232. In some instances, the third ESD sub-clamping circuit 0231 is a PMOS and the third ESD sub-clamping circuit 0232 is an NMOS. One end of a third ESD sub-clamping circuit 0231 is connected to a first voltage level 03 (Vdd), and the other end of the third ESD sub-clamping circuit 0231 is connected to another third ESD sub-clamping circuit 0232, which is connected to a third voltage level 05 (Vss). Furthermore, the gate and source of the third ESD sub-clamping circuit 0231 are connected to the first voltage level 03 (Vdd), the drain of the third ESD sub-clamping circuit 0231 is connected to the source of the third ESD sub-clamping circuit 0232, and the gate and drain of the third ESD sub-clamping circuit 0232 are connected to the third voltage level 05 (Vss). An I / O circuit 06 is connected to the drain of the third ESD sub-clamping circuit 0231 and the source of the third ESD sub-clamping circuit 0232.

[0067] Preferably, in some embodiments, the first voltage level 03 (Vdd) is greater than the second voltage level 04 (Vcom). The first voltage level 03 (Vdd) is greater than the fourth voltage level 07 (Vdd"). The third voltage level 05 (Vss) is greater than the second voltage level 04 (Vcom), and the first voltage level 03 (Vdd) is greater than the third voltage level 05 (Vss). Because the micro LED pixel 00 cannot operate at high voltage values, the second voltage level 04 (Vcom) is a negative voltage applied to the micro LED pixel 00. In some embodiments, preferably, the first voltage level 03 (Vdd) is a positive voltage, the fourth voltage level 07 (Vdd") is a positive voltage, and the third voltage level 05 (Vss) is zero. For example, the voltage of Vdd can be 1V to 3V, the voltage of Vdd" can be 1V to 2V, the voltage of Vss can be 0V, and the voltage of Vcom can be -5V to 0V.

[0068] Reference Figure 5In some embodiments, the ESD protection system 500 further includes a fourth ESD protection unit 024. One end of the fourth ESD protection unit 024 is connected to a fourth voltage level 07 (Vdd), while the other end of the fourth ESD protection unit 024 is connected to a third voltage level 05 (Vss).

[0069] In some embodiments, the second ESD protection unit 022, the third ESD protection unit 023, and the fourth ESD protection unit 024 are power rail ESD clamping circuits, which can be referred to Figure 3 The description.

[0070] In some embodiments, the microdevice (e.g., 500) having one or more ESD protection units is selected from micro-inorganic LED devices and / or micro-organic LED devices. In some embodiments, the micro-LED pixels are selected from inorganic micro-LEDs or organic micro-LEDs. For example, the microdevice may be a micro-display panel. The micro-LED display panel includes a micro-LED array forming a pixel array, such as a 640*480 pixel array. In some embodiments, the length of the micro-LED display panel cannot exceed 100, 200, 300, 400, or 500 micrometers, and the width of the parallel LED display panel cannot exceed 100, 200, 300, 400, or 500 micrometers. In some embodiments, the length of the micro-LED display panel cannot exceed 1 cm, and the width of the micro-LED display panel cannot exceed 1 cm. In some embodiments, the length of the micro-LED display panel cannot exceed 2 cm, and the width of the micro-LED display panel cannot exceed 2 cm. In some embodiments, the length of the micro-LED display panel cannot exceed 10 cm, and the width of the micro-LED display panel cannot exceed 10 cm. In some embodiments, the length of the micro-LED display panel cannot exceed 20 cm, and the width of the micro-LED display panel cannot exceed 20 cm. The micro-LED display panel also includes an IC backplane. The micro-LED display plane includes a micro-LED array comprising multiple inorganic micro-LEDs to display an image. The micro-LED array is electrically connected and bonded to the IC backplane. One or more ESD protection units and pixel driver circuitry are formed within the IC backplane. In some embodiments, the one or more ESD protection units are part of the IC circuitry and are used to protect the IC circuitry under electrostatic discharge conditions. The ESD protection units prevent current leakage from the IC circuitry within the IC backplane.

[0071] Here, the micro-LEDs can be selected from inorganic LEDs or organic LEDs. On the IC backplane, electrode connection areas are electrically connected to the micro-LED array, and signal line areas are formed around the electrode connection areas. The IC backplane acquires signals such as image data from the outside via the signal lines to control the illumination of the corresponding micro-LEDs. The IC backplane typically employs an 8-bit digital-to-analog converter (DAC). An 8-bit DAC has 256 levels of performance, and each level corresponds to a gray level; that is, an 8-bit DAC can provide 256 different gray levels. Since any of the 256 gray levels can be applied to the micro-LEDs, a gray level ranging from 0 to 255 can be displayed by a single pixel. Optionally, the brightness value of the micro-LEDs can be controlled by the voltage or current amplitude of the signal acquired by the IC backplane, while the gray levels can be indicated by the time interval of the signal (e.g., pulse width).

[0072] Those skilled in the art should understand that microdisplay panels are not limited to the above-described structure and may include more or fewer components than those illustrated, or may combine some components, or may use different components.

[0073] Those skilled in the art will understand that all or part of the steps used to implement the foregoing embodiments can be implemented by hardware, or by a program that instructs the relevant hardware. This program can be stored in flash memory, conventional computer equipment, a central processing module, a control module, etc.

[0074] The above description is merely an embodiment of this disclosure, and this disclosure is not limited thereto. Modifications, equivalent substitutions, and improvements made without departing from the concepts and principles of this disclosure will fall within the protection scope of this disclosure.

[0075] Other embodiments also include, for example, including, Figures 1 to 5 The above embodiments shown are various subsets combined or rearranged in various other embodiments.

[0076] While the detailed description contains many details, these should not be construed as limiting the scope of the invention, but merely as illustrating different examples and aspects of the invention. It should be understood that the scope of the invention includes other embodiments not discussed in detail above. For example, the methods described above can be applied to the integration of non-LED and OLED functional devices with control circuitry that is not pixel driver. Examples of non-LED devices include vertical-cavity surface-emitting lasers (VCSELs), photodetectors, microelectromechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples of other control circuitry include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0077] The foregoing description of the disclosed embodiments is provided to enable making or using the embodiments and variations thereof described herein. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Therefore, this disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

[0078] The features of this invention can be implemented using a computer program product or with the aid of a computer program product, such as a storage medium (of various media) or a computer-readable storage medium (of various media), wherein instructions are stored thereon or thereon, which can be used to program a processing system to perform any of the features presented herein. The storage medium may include, but is not limited to, high-speed random access memory, such as DRAM, SRAM, DDRRAM, or other random access solid-state memory devices, and may include non-volatile memory, such as one or more disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state memory devices. The memory may optionally include one or more storage devices located remotely from the CPU. The non-volatile memory devices within the memory or optionally the memory include non-transitory computer-readable storage media.

[0079] Features of the invention, stored on any machine-readable medium (of various kinds), can be contained in software and / or firmware for controlling the hardware of a processing system and enabling the processing system to interact with other entities using the results of the invention. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments / containers.

[0080] It should be understood that although the terms “first,” “second,” etc., may be used in this document to describe various elements or steps, these elements or steps should not be limited by these terms. These terms are only used to distinguish one element or step from another.

[0081] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the appended claims, the singular forms “a,” “an,” and “this” are intended to include multiple forms as well, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items. It should also be understood that the terms “comprising” and / or “including”, when used in this specification, specify the presence of said features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups.

[0082] As used herein, the term "if" can be interpreted as meaning, depending on the context, that the prerequisite of a statement is true "in the case of," "when," or "in response to detection." Similarly, the phrases "if it is determined that [the prerequisite of that statement is true]," "if [the prerequisite of the statement is true]," or "when [the prerequisite of the statement is true]" can be interpreted as meaning, depending on the context, that the stated prerequisite is true "when determined," "in response to determined," "according to determined," "when detected," or "in response to detection."

[0083] The foregoing description, used for illustration, has been described with reference to specific embodiments. However, the foregoing illustrative discussion is not intended to be exhaustive or to limit the claims to the precise forms disclosed. Many modifications and variations can be made in light of the foregoing teachings. The embodiments were chosen and described in order to best explain the principles of practical application and operation, thereby enabling others skilled in the art to best utilize the invention and its various embodiments.

Claims

1. An electrostatic discharge (ESD) protection system for a microdevice, comprising: A pixel driver circuit, electrically connected to at least one micro LED pixel, is used to control the micro LED pixel to turn on or off; as well as, The first ESD protection unit is electrically connected to the micro LED pixel. The micro-LED pixels are connected to a second voltage level, and the first ESD protection unit is connected to both a third voltage level and the second voltage level. The third voltage level is zero, and the second voltage level is negative. The first ESD protection unit includes an NMOS transistor; The gate of the first ESD protection unit is connected to the source of the first ESD protection unit and the second level voltage; The drain of the first ESD protection unit is connected to the third level voltage; and the first ESD protection unit has parasitics on the MOS transistor.

2. The ESD protection system for microdevices according to claim 1, wherein, The cathode of the micro LED pixel is connected to the second voltage level.

3. The ESD protection system for microdevices according to claim 1, wherein, The first ESD protection unit includes: P-type semiconductor substrate; A P-well region is formed in the P-type semiconductor substrate; N-wells are formed around the P-well region; A deep N-well is formed at the bottom of the N-well and at the bottom of the P-well region; The N+ drain is formed in the P-well region; The N+ source is formed in the P-well region; The first P+ injection region located in the P-well region is formed next to the N+ source. A gate is formed on the P-well region located between the N+ source and the N+ drain, and is connected to the N+ source and the first P+ implantation region; and, A second P+ implantation region is formed next to the N-well in the P-type semiconductor substrate.

4. The ESD protection system for microdevices according to claim 3, wherein, The N-well, the N+ drain, and the second P+ injection region are connected to the third voltage level; and the first P+ injection region, the N+ source, and the gate are connected to the second voltage level.

5. The ESD protection system for microdevices according to claim 1, wherein, The at least one micro LED pixel is a micro LED pixel array; and the pixel driver circuit controls the turning on or off of each micro LED pixel in the micro LED pixel array.

6. The ESD protection system for microdevices according to claim 5, wherein, The first ESD protection unit is connected to each of the micro LED pixels.

7. The ESD protection system for microdevices according to claim 1, wherein, The pixel driver circuit is connected to the first voltage level and the micro LED pixel.

8. The ESD protection system for microdevices according to claim 7, wherein, The system further includes a second ESD protection unit, which is connected to the first voltage level and the third voltage level.

9. The ESD protection system for microdevices according to claim 8, wherein: The second ESD protection unit includes a plurality of second ESD sub-clamping circuits; the first terminal of each second ESD sub-clamping circuit is connected to the first level voltage and the pixel driver circuit, and the second terminal of each second ESD sub-clamping circuit is connected to the third level voltage; and the second ESD sub-clamping circuits are connected in parallel with each other.

10. The ESD protection system for microdevices according to claim 9, wherein, The first voltage level is higher than the second voltage level; the third voltage level is higher than the second voltage level; and the first voltage level is higher than the third voltage level.

11. The ESD protection system for microdevices according to claim 10, wherein, The second voltage level is a negative voltage; the first voltage level is a positive voltage; and the third voltage level is zero.

12. The ESD protection system for microdevices according to claim 8, wherein, The second ESD protection unit includes a power rail ESD clamping circuit.

13. The ESD protection system for microdevices according to claim 8, wherein, The first ESD protection unit and the second ESD protection unit are formed in a semiconductor substrate.

14. The ESD protection system for microdevices according to claim 1, wherein, The micro-device is selected from micro-inorganic LED devices and micro-organic LED devices; and the micro-LED pixel is selected from inorganic micro-LEDs or organic micro-LEDs.

15. The ESD protection system for a microdevice according to claim 1, wherein: the system further comprises a third ESD protection unit; and, a first terminal of the third ESD protection unit is connected to a first voltage level, and a second terminal of the third ESD protection unit is connected to a third voltage level.

16. The ESD protection system for microdevices according to claim 15, wherein, The third ESD protection unit is connected to the IO circuit.

17. The ESD protection system for microdevices according to claim 15, wherein, The third ESD protection unit includes at least two third ESD sub-clamping circuits; and the third ESD sub-clamping circuits are connected in series with each other.

18. The ESD protection system for microdevices according to claim 1, wherein, The first terminal of the pixel driver circuit is connected to a fourth level voltage, and the second terminal of the micro pixel driver circuit is connected to the micro LED pixel.

19. The ESD protection system for microdevices according to claim 1, wherein, The system further includes a fourth ESD protection unit; and the first terminal of the fourth ESD protection unit is connected to a fourth voltage level, and the second terminal of the fourth ESD protection unit is connected to a third voltage level.

20. The ESD protection system for a microdevice according to claim 19, wherein, The third voltage level is lower than the fourth voltage level.

21. The ESD protection system for microdevices according to claim 1, wherein, The pixel driver circuit includes at least one switch.

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