Test circuits and test methods for continuous shutdown conditions of power semiconductor devices

Abstract

This invention discloses a test circuit and method for continuous shutdown conditions of power semiconductor devices. It continuously shuts off overload current and provides high voltage and high current to simulate the continuous shutdown conditions of power semiconductor devices with voltage-current decoupling. The circuit includes: a current generator, a test module, an auxiliary module, a load module, and a discharge module. The current generator generates the test current. The auxiliary modules, including a first auxiliary module and a second auxiliary module, assist the current generator, load module, and discharge module in cyclically testing the test module's operating conditions. The test module is used for cyclic testing of the circuit under test. The load module protects the auxiliary module and the test module for normal operation. The discharge module carries the voltage of the test circuit. This achieves voltage-current separation, reduces the requirements for the voltage source, and can better provide the high voltage and high current required for simulating the continuous shutdown conditions of power semiconductor devices.

Description

Technical Field

[0001] This invention relates to the field of power semiconductor device testing technology, and in particular to a test circuit and test method for power semiconductor devices under continuous shutdown conditions. Background Technology

[0002] In power electronics applications, IGBTs primarily operate in switching states and periodically undergo various static and dynamic cycles, resulting in energy loss, heat generation in the power-dissipating devices, and fluctuations in the IGBT junction temperature. The IGBT power cycling test is a rapid method to verify IGBT lifespan. It involves intermittently flowing a large heating current through the chip, causing temperature fluctuations and verifying the chip's ability to withstand electrical and thermal stresses. This test can accelerate the verification of IGBT lifespan.

[0003] The key to equivalent testing of IGBT devices is including the switching transient process and ensuring the effective current matches the actual operating conditions; that is, the switching frequency needs to be close to the actual operating conditions. The equivalent test platform for IGBT devices including the switching transient process is a series valve operating condition power cycle test platform, which simulates the bridge arm current through PWM control and high-frequency switching of the devices, where the IGBT device switching frequency is very high. However, under MMC conditions, the switching frequency of IGBT devices is lower, with conduction losses being the primary factor. This requires the equivalent test platform to simultaneously provide high voltage and high current. Test power supplies that meet these requirements are bulky, extremely expensive, and practically impossible to implement. This poses a significant challenge to the power supply design of the equivalent test platform and is one of the key design difficulties in equivalent testing of IGBT devices under MMC conditions.

[0004] Existing long-term operational evaluation methods for IGBT devices mainly include three types: DC power cycling test platforms, parallel-drive test platforms, and full-bridge current source platforms. The DC power cycling test platform is the standard-recommended method for IGBT device operational reliability testing. During the test, the IGBT device is not involved in the switching process, resulting in a significant difference in electrical stress compared to actual application conditions. Parallel-drive test platforms are mainly used for multi-level submodule interconnection testing, generating current and voltage stresses during MMC steady-state operation. However, they primarily serve assembled submodules, leading to high time and economic costs for IGBT device testing. Furthermore, these platforms cannot conduct further IGBT device reliability evaluation tests or provide monitoring of key IGBT reliability parameters. The full-bridge current source scheme can generate current and voltage stresses during MMC steady-state operation, but due to the high-frequency switching required by the full-bridge inverter, its inherent reliability is very low, limiting its application in the steady-state evaluation of IGBT devices under MMC conditions.

[0005] For example, a search revealed that Chinese invention patent CN202311051123.3 discloses an "IGBT Power Cyclic Test Method and Test Circuit," including a heating current source, a test current source, a voltage source, a switching device, a diode, and an IGBT (Internet Test Device). This patent can simulate the steady-state operation of an IGBT, with a simple test circuit and low test cost. However, it requires two current sources to simulate the steady-state operation of the IGBT, resulting in high operating losses during the test process, making it unsuitable for long-term operation tests of the converter valve submodule. Another Chinese invention patent CN202022455571.8 discloses an "IGBT Test Circuit and IGBT Test Device," including a first voltage source, a second voltage source, a first current source, and a voltage source switching circuit. This patent can switch between different voltage sources to provide drive voltage to the IGBT to control the IGBT's operation in different regions. Combined with the current source, it can effectively collect specific relevant parameters of the IGBT when switching to a specific voltage source to provide drive voltage, resulting in lower cost and improved test efficiency. However, current sources need to be able to provide both high voltage and high current simultaneously. Test power supplies that meet these requirements are bulky, expensive, and difficult to implement. Summary of the Invention

[0006] To address the aforementioned shortcomings, this invention discloses a test circuit for continuous shutdown of power semiconductor devices, which continuously shuts off overload current and provides high voltage and high current to simulate the continuous shutdown of power semiconductor devices.

[0007] In a first aspect, the present invention provides a test circuit for continuous shutdown of power semiconductor devices, comprising: a current generator, a test module, an auxiliary module, a load module, and a discharge module.

[0008] The current generator is used to generate the test current.

[0009] The auxiliary module includes a first auxiliary module and a second auxiliary module, which are used to assist the current generator, the load module and the discharge module in performing cyclic testing of the operating conditions of the test module.

[0010] The test sample module is used to be cyclically tested by the test circuit.

[0011] The load module is used to protect the normal operation of the auxiliary module and the sample module.

[0012] The discharge module is used to carry the voltage of the test circuit.

[0013] According to one embodiment of the present invention, the current generator 1 includes a voltage source U0, a first capacitor C0, a first power switching element T1, a first diode D0, and an inductor L. The positive terminal of the voltage source U0 is connected in parallel with the first capacitor C0 and then in series with the first power switching element T1. The gate of the first power switching element T1 is connected to the positive terminal of the voltage source U0 and one end of the first capacitor C0, respectively. The emitter of the first power switching element T1 is connected to the cathode of the first diode D0 and one end of the inductor L. The negative terminal of the voltage source U0, the other end of the first capacitor C0, and the positive terminal of the first diode D0 are grounded.

[0014] According to one embodiment of the present invention, the first auxiliary module 21 includes a second power switching element T2 and a second diode D1. The other end of the inductor L is connected to the gate of the second power switching element T2 and the anode of the second diode D1, respectively. The cathode of the second diode D1 is connected to the first end of the sample module and the first end of the second auxiliary module 22, respectively.

[0015] According to one embodiment of the present invention, the load module 3 includes: a second capacitor C1 and a first resistor R1, the second capacitor C1 and the first resistor R1 are connected in parallel, one end of the second capacitor C1 and the first resistor R1 are respectively connected to the second end of the test module, and the emitter of the second power switch element T2, the other end of the second capacitor C1 and the other end of the first resistor R1 are grounded together.

[0016] According to one embodiment of the present invention, the second auxiliary module is a third power switching element T3, the emitter of the third power switching element T3 is connected to the cathode of the second diode D1 and the first end of the sample module, and the gate of the third power switching element T3 is connected to one end of the discharge module.

[0017] According to one embodiment of the present invention, the discharge module includes: a third capacitor C2, a switch K, and a second resistor R0. The switch K and the second resistor R0 are connected in series and then connected in parallel with the third capacitor C2. One end of the third capacitor C2 and one end of the switch K are respectively connected to the gate of the third power switching element T3. The other end of the third capacitor C2, the other end of the second resistor R0, and the other end of the first resistor R1 are grounded together.

[0018] According to one embodiment of the present invention, a diode is connected in parallel between the gate and emitter of the first power switching element T1. The cathode of the diode is connected to the gate of the first power switching element T1, and the anode of the diode is connected to the emitter of the first power switching element T1. This provides protection. When the load of the transistor is inductive, when the transistor is turned off, a momentary high voltage will be generated across the inductive load because the current flowing through the inductive load cannot change abruptly. Under the action of this high voltage, the diode conducts, absorbing the momentary energy in time and preventing the transistor from being broken down by the momentary high voltage.

[0019] According to one embodiment of the present invention, similar mechanisms also include a first power switching element T2 and a third power switching element T3, as well as a test module DUT.

[0020] In a second aspect, the present invention discloses a test method for continuous shutdown conditions of power semiconductor devices. The test is performed using a test circuit for continuous shutdown conditions of power semiconductor devices. The test circuit is tested by controlling the on / off state of the power semiconductor device, the second power switching element T2, and the third power switching element T3 of the module under test. The method includes:

[0021] S101: The current generator outputs a stable current, the power semiconductor device of the test module is in the ON state, the second power switch element T2 and the third power switch element T3 are disconnected, and the current generator, the power semiconductor device of the test module and the load module form a circuit.

[0022] S102: After time t1, the power semiconductor device of the test module is locked to complete the current test of the power semiconductor device of the test module.

[0023] S103: Simultaneously connect the second power switching element T2 and the third power switching element T3, and the current generator and the second power switching element T2 form a circuit to complete the voltage test of the power semiconductor device of the test module.

[0024] S104: Jump back to step S101.

[0025] The beneficial effects provided by the present invention are as follows: The test circuit for continuous shutdown of power semiconductor devices provided by the present invention reduces energy loss by using switching elements to reduce voltage, thereby enabling high-efficiency energy conversion between input and output and generating the large current required for the experiment.

[0026] The test circuit provided by this invention achieves voltage and current separation, reduces the requirements for the voltage source, and can better provide the high voltage and high current required for simulating the continuous shutdown condition of power semiconductor devices. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0028] Figure 1 This is a test circuit diagram for continuous shutdown conditions of power semiconductor devices disclosed in an embodiment of the present invention;

[0029] Figure 2 The key timing waveform diagram of the power semiconductor device is shown in the embodiment of the present invention for the test circuit of the power semiconductor device under continuous turn-off condition.

[0030] Figure 3 This is a flowchart of a test method for continuous shutdown conditions of power semiconductor devices disclosed in an embodiment of the present invention.

[0031] In the diagram: 1-Current generator; 2-Auxiliary module; 3-Load module; 4-Discharge module 4; DUT-Sample module;

[0032] 21-First auxiliary module; 22-Second auxiliary module.

[0033] The accompanying drawings have illustrated specific embodiments of this disclosure, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this disclosure to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0034] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0035] The first aspect of the invention, as Figure 1 As shown, a test circuit for continuous shutdown of power semiconductor devices is provided, including: a current generator 1, a test substrate module (DUT), an auxiliary module 2, a load module 3, and a discharge module 4.

[0036] The current generator 1 is used to generate the test current. (Refer to...) Figure 1 As shown, voltage source U0, capacitor C0, power switching element T1, diode D0, and inductor L constitute current generator 1 to generate the required test current.

[0037] The auxiliary module 2 includes a first auxiliary module 21 and a second auxiliary module 22, which are used to assist the current generator 1, the load module 3 and the discharge module 4 in performing cyclic testing of the operating conditions of the test sample module DUT.

[0038] The test sample module (DUT) is used to be cyclically tested by the test circuit.

[0039] The load module 3 is used to protect the normal operation of the auxiliary module 2 and the sample module DUT.

[0040] The discharge module 4 is used to carry the voltage of the test circuit.

[0041] According to one embodiment of the present invention, the current generator 1 includes a voltage source U0, a first capacitor C0, a first power switching element T1, a first diode D0, and an inductor L. The positive terminal of the voltage source U0 is connected in parallel with the first capacitor C0 and then in series with the first power switching element T1. The gate of the first power switching element T1 is connected to the positive terminal of the voltage source U0 and one end of the first capacitor C0, respectively. The emitter of the first power switching element T1 is connected to the cathode of the first diode D0 and one end of the inductor L. The negative terminal of the voltage source U0, the other end of the first capacitor C0, and the positive terminal of the first diode D0 are grounded.

[0042] According to one embodiment of the present invention, the first auxiliary module 21 includes a second power switching element T2 and a second diode D1. The other end of the inductor L is connected to the gate of the second power switching element T2 and the anode of the second diode D1, respectively. The cathode of the second diode D1 is connected to the first end of the sample module and the first end of the second auxiliary module 22, respectively.

[0043] According to one embodiment of the present invention, the load module 3 includes: a second capacitor C1 and a first resistor R1, the second capacitor C1 and the first resistor R1 are connected in parallel, one end of the second capacitor C1 and the first resistor R1 are respectively connected to the second end of the test module, and the emitter of the second power switch element T2, the other end of the second capacitor C1 and the other end of the first resistor R1 are grounded together.

[0044] According to one embodiment of the present invention, the second auxiliary module 22 is a third power switching element T3, the emitter of the third power switching element T3 is connected to the cathode of the second diode D1 and the first end of the test module DUT, respectively, and the gate of the third power switching element T3 is connected to one end of the discharge module 4.

[0045] According to one embodiment of the present invention, the discharge module 4 includes: a third capacitor C2, a switch K, and a second resistor R0. The switch K and the second resistor R0 are connected in series and then connected in parallel with the third capacitor C2. One end of the third capacitor C2 and one end of the switch K are respectively connected to the gate of the third power switching element T3. The other end of the third capacitor C2, the other end of the second resistor R0, and the other end of the first resistor R1 are grounded together.

[0046] According to one embodiment of the present invention, a diode is connected in parallel between the gate and emitter of the first power switching element T1. The cathode of the diode is connected to the gate of the first power switching element T1, and the anode of the diode is connected to the emitter of the first power switching element T1. This provides protection. When the load of the transistor is inductive, when the transistor is turned off, a momentary high voltage will be generated across the inductive load because the current flowing through the inductive load cannot change abruptly. Under the action of this high voltage, the diode conducts, absorbing the momentary energy in time and preventing the transistor from being broken down by the momentary high voltage.

[0047] According to one embodiment of the present invention, similar mechanisms also include a first power switching element T2 and a third power switching element T3, as well as a test module (DUT). Figure 2 The figure shows the timing diagram of the power semiconductor device under test and T2 and T3. 0 represents the off state and 1 represents the on state.

[0048] In a second aspect, the present invention discloses a test method for continuous shutdown conditions of power semiconductor devices, such as... Figure 3 As shown, the test is performed using a test circuit for continuous power semiconductor device shutdown conditions. The test circuit is tested by controlling the on / off state of the power semiconductor device, the second power switch element T2, and the third power switch element T3 of the module under test, including:

[0049] S101: The current generator outputs a stable current, the power semiconductor device of the test module is in the ON state, the second power switch element T2 and the third power switch element T3 are disconnected, and the current generator, the power semiconductor device of the test module and the load module form a circuit.

[0050] Specifically, in this test circuit, T1 uses PWM control to ensure that the output current of the current generator is maintained at the set value. First, T1 is opened, and T2 and T3 are locked. At this time, the current generator 1, T1, and load module 3 form a loop, and the power semiconductor device under test operates in a high current and low voltage state.

[0051] The power switching element T3, along with the diodes connected in series in the main circuit, forms auxiliary module 2, which controls whether a large voltage is applied across the power semiconductor device under test. The discharge module 4, including capacitor C2 and a switch K (which can be a power semiconductor device) and a protective resistor R0 connected in series with it, is used to control the voltage applied across the power semiconductor device.

[0052] S102: After time t1, the power semiconductor device of the test module is locked to complete the current test of the power semiconductor device of the test module.

[0053] S103: Simultaneously connect the second power switching element T2 and the third power switching element T3, and the current generator and the second power switching element T2 form a circuit to complete the voltage test of the power semiconductor device of the test module.

[0054] After a period of time, the power semiconductor devices are locked and T3 and T2 are turned on simultaneously. At this time, current generator 1 and T2 form a circuit. The capacitor in discharge module 4 is connected in parallel across the power semiconductor device and the load module through T3. Since the capacitor voltage in discharge module 4 is much greater than the capacitor voltage in the load module, it can be approximated that capacitor C2 in discharge module 4 is directly connected in parallel across the power semiconductor device to provide a large voltage for the power semiconductor device. At this time, the power semiconductor device is operating in a high voltage state, while the power supply does not need to bear a large voltage.

[0055] S104: Jump back to step S101.

[0056] Finally, turn off T2 and T3, and turn on the power semiconductor device. At this point, current generator 1, power semiconductor device, and load module 3 form a circuit, and the power semiconductor device operates under a high current and low voltage condition. This completes one cycle.

[0057] The test circuit described above in this invention simulates the transition of a power semiconductor device from a high-current, low-voltage state to a no-current, high-voltage state, and the transition of a power semiconductor device from a no-current, high-voltage state to a high-current, low-voltage state. It realizes the simulation of the continuous shutdown condition of the power semiconductor device and achieves voltage-current separation, reducing the requirements for the voltage source.

[0058] Obviously, the above specific implementation examples are merely illustrative of the application of this method and not intended to limit the implementation. Those skilled in the art can make other variations and modifications based on the above description to study other related issues. Therefore, the scope of protection of this invention should be limited to the scope of the claims.

[0059] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as ROM, RAM, magnetic disk, or optical disk.

[0060] The electronic devices and other embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0061] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, and are not intended to limit them. Although the embodiments of the present invention have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

[0063] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0064] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A test circuit for continuous turn-off conditions of power semiconductor devices, characterized in that, The test circuit includes: a current generator (1), a test sample module, an auxiliary module (2), a load module (3), and a discharge module (4). The current generator (1) is used to generate the test current; The auxiliary module (2) includes a first auxiliary module (21) and a second auxiliary module (22), which are used to assist the current generator (1), the load module (3) and the discharge module (4) in performing cyclic testing of the operating conditions of the test module; The sample module is used to be cyclically tested by the test circuit; The load module (3) is used to protect the normal operation of the auxiliary module (2) and the sample module; The discharge module (4) is used to carry the voltage of the test circuit; The current generator (1) includes a voltage source U0, a first capacitor C0, a first power switching element T1, a first diode D0, and an inductor L. The positive terminal of the voltage source U0 is connected in parallel with the first capacitor C0 and then connected in series with the first power switching element T1. The gate of the first power switching element T1 is connected to the positive terminal of the voltage source U0 and one end of the first capacitor C0. The emitter of the first power switching element T1 is connected to the cathode of the first diode D0 and one end of the inductor L. The negative terminal of the voltage source U0, the other end of the first capacitor C0, and the positive terminal of the first diode D0 are grounded. The first auxiliary module (21) includes a second power switching element T2 and a second diode D1. The other end of the inductor L is connected to the gate of the second power switching element T2 and the anode of the second diode D1, respectively. The cathode of the second diode D1 is connected to the first end of the sample module and the first end of the second auxiliary module (22), respectively. The load module (3) includes: a second capacitor C1 and a first resistor R1, the second capacitor C1 and the first resistor R1 are connected in parallel, one end of the second capacitor C1 and the first resistor R1 are respectively connected to the second end of the test module, and the emitter of the second power switch element T2, the other end of the second capacitor C1 and the other end of the first resistor R1 are grounded together. The second auxiliary module (22) is a third power switching element T3. The emitter of the third power switching element T3 is connected to the cathode of the second diode D1 and the first end of the test module, respectively. The gate of the third power switching element T3 is connected to one end of the discharge module (4).

2. The test circuit according to claim 1, characterized in that, The discharge module (4) includes: a third capacitor C2, a switch K, and a second resistor R0. The switch K and the second resistor R0 are connected in series and then in parallel with the third capacitor C2. One end of the third capacitor C2 and one end of the switch K are respectively connected to the gate of the third power switch element T3. The other end of the third capacitor C2, the other end of the second resistor R0, and the other end of the first resistor R1 are grounded together.

3. A test method for continuous turn-off conditions of power semiconductor devices, characterized in that, The test is performed using the test circuit for continuous power semiconductor device shutdown as described in claim 1 or 2. The test circuit is completed by controlling the on / off state of the power semiconductor device, the second power switching element T2, and the third power switching element T3 of the module under test, including: S101: The current generator outputs a stable current, the power semiconductor device of the test module is in the ON state, the second power switch element T2 and the third power switch element T3 are disconnected, and the current generator, the power semiconductor device of the test module and the load module form a loop. S102: After time t1, the power semiconductor device of the test module is locked; the current test of the power semiconductor device of the test module is completed. S103: Simultaneously connect the second power switching element T2 and the third power switching element T3, and the current generator and the second power switching element T2 form a circuit to complete the voltage test of the power semiconductor device of the test module. S104: Jump back to step S101.

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