A transformerless soft-switching high step-down ratio DC-DC converter, a control method and a steady-state analysis method thereof

Abstract

The application belongs to the field of DC-DC conversion, and particularly relates to a novel transformerless soft-switching high step-down ratio DC-DC converter and a control method and a steady-state analysis method thereof. The converter combines the double step-down advantage of the SC-Buck converter and the zero-voltage switching advantage of the resonant hybrid Buck converter. The introduction of the resonant cavity in the hybrid structure not only realizes the soft switching of all switches, but also eliminates the current spikes generated by the switching. In combination with the circuit structure improvement of the SC-Buck converter, the converter can eliminate the high switching voltage stress problem encountered by the existing converter during the starting process. In addition, the converter can realize self-current sharing between two interleaved modules without using an additional current sharing control method. Other advantages of the topology include lower switching loss, lower conduction loss, lower voltage stress and lower inductance loss.

Description

Technical Field

[0001] This invention belongs to the field of DC-DC conversion, specifically relating to a transformerless soft-switching high step-down ratio DC-DC converter and its control method and steady-state analysis method. Background Technology

[0002] As the power consumption of modern microprocessors continues to increase, the 48V bus architecture is becoming increasingly attractive due to reduced power distribution losses and improved overall efficiency. Point-of-load converters require higher voltage conversion ratios and larger output currents, as well as high efficiency and high power density at low output voltages. In two-stage data center power supply systems, the conversion ratio of the preceding stage is typically greater than 10 to reduce voltage stress on the subsequent stage and improve overall efficiency.

[0003] The Buck converter is the most popular topology for DC-DC buck conversion because it is simple to implement and inexpensive. However, the Buck converter has limitations in high buck ratio applications due to problems such as extremely small duty cycle, low voltage regulation accuracy, high main switch current stress, and high voltage stress on the freewheeling diode.

[0004] Achieving a high buck ratio in a topology can generally be divided into the following two categories.

[0005] 1) Isolated high buck ratio DC-DC topologies, such as LLC resonant converters, achieve high conversion ratios and high current outputs through matrix transformers and fractional-turn designs.

[0006] 2) Non-isolated high buck ratio DC-DC topology, typically based on series capacitors and coupled inductors or a combination thereof.

[0007] LLC resonant converters can efficiently deliver power at their resonant frequency. However, their dynamic performance is limited by the control method, and efficiency drops rapidly if the operating point is not at the resonant frequency. To address this issue, researchers have proposed sigma converters combining LLC and Buck converters. The LLC converter operates at the resonant frequency to maintain very high efficiency, while the Buck converter focuses on output voltage regulation and load transient response. However, since the LLC converter handles most of the power in steady state, while the Buck converter handles most of the power during dynamic processes, both the LLC and Buck converters must be designed to handle the entire system power. Furthermore, the parallel structure increases control complexity.

[0008] The series capacitor Buck (SC Buck) converter combines a switched capacitor circuit with a multiphase Buck converter, offering advantages such as a higher step-down ratio, higher efficiency, and automatic current sharing compared to traditional Buck converters. However, because the series capacitors in the topology charge from zero, the voltage stress on the switching transistors is significant during startup, and soft switching cannot be achieved. Soft switching can be achieved by adding a resonant cavity to the SC Buck, where all switching transistors conduct at zero voltage (ZVS), while the low-side switch is turned off at zero current (ZCS). However, the addition of the resonant circuit introduces additional losses, increases the voltage stress on the low-side switch, and complicates control and circuit design.

[0009] A topology combining series capacitors and coupled inductors can achieve ultra-high step-down ratios, reducing voltage stress on semiconductor devices and significantly extending the duty cycle. Furthermore, the presence of leakage inductance enables soft switching of the main switch. However, the introduction of additional active and passive components, particularly the coupled inductor, increases the converter's cost, size, weight, and circuit complexity, while also reducing its reliability.

[0010] Besides the aforementioned combination of series capacitors and coupled inductors, some studies have expanded the buck ratio by combining switched capacitor topologies and traditional Buck topologies, with the Buck regulating the output voltage while transferring energy. However, the buck ratio of this topology remains limited, and the Buck section cannot achieve soft switching. Furthermore, some studies have combined the advantages of dual-path hybrid buck topologies and SC buck topologies, proposing a two-phase series capacitor dual-path hybrid DC-DC converter with at least a 1 / 6 buck ratio. However, the hybrid structure alters the series and parallel connections of the inductors and capacitors through hard switching, generating current spikes during switching. This not only increases the current stress on the switches but also results in larger output current and voltage ripple. Summary of the Invention

[0011] This invention provides a transformerless soft-switching high step-down ratio DC-DC converter and its control method and steady-state analysis method. In order to improve the voltage conversion ratio and achieve soft switching, the existing structure will generate current spikes when switching, which not only increases the current stress of the switch, but also leads to large output current ripple and voltage ripple.

[0012] This invention is achieved through the following technical solution: A transformerless soft-switching high step-down ratio DC-DC converter, wherein the converter adopts a resonant dual-path hybrid structure as the basic unit, and the two basic units are parallel and interleaved. Each unit of the converter includes an active switch. Q a Active switchesQ c rectifier tube Q b rectifier tube Q d Resonant capacitor C r capacitors C 1. Capacitor C 2. Resonant inductor L r and filter inductor L; The active switch Q 1a One end is connected to the capacitor C 1's positive terminal and power supply V in The positive terminal is connected to the active switch. Q 1a The other end is connected to the resonant capacitor. C r1 Positive terminal and active switch Q 1c One end of the resonant capacitor is connected to the other end. C r1 The negative terminal of the resonant inductor L r1 One end is connected to the active switch. Q 1c The other end is connected to one end of filter inductor L1, one end of filter inductor L2, and capacitor respectively. C One end of the resonant inductor is connected to one end of the resistor R0. L r1 The other end is connected to the rectifier tube. Q 1b One end of it is connected to the other end of the filter inductor L1; The rectifier tube Q 1b The other end is connected to the rectifier tube. Q 1d one end and capacitor C The other end of 0 is connected to the rectifier tube. Q 1d The other end is connected to the rectifier tube. Q 2d one end and capacitor C The positive terminal of 1 is connected to the rectifier tube. Q 2d The other end is connected to the resonant capacitor. C r2 Positive terminal and active switch Q 2c One end of the resonant capacitor is connected to the other end. C r2The negative terminal of the resonant inductor L r2 One end is connected to the active switch. Q 2c The other end is connected to the other end of the filter inductor L2, the resonant inductor L r2 The other end is connected to the rectifier tube Q 2b One end is connected to the rectifier tube. Q 2b The other end is connected to the active switch. Q 1a One end of the capacitor C One end of resistor R0 is connected to one end of resistor R0; The active switch Q 2a The other end is connected to the capacitor. C The negative terminal of 2 and the power supply V in Connect the negative end.

[0013] A control method for a transformerless soft-switching high step-down ratio DC-DC converter, specifically comprising controlling the switching based on the set conditions of the transformerless soft-switching high step-down ratio DC-DC converter as described in the claim, divided into […]. t 0- t 1] Time period, [ t 1- t 2] Time period, [ t 2- t 3] Time period, [ t 3- t 4] Time period, [ t 4- t 5] Time period, [ t 5- t 6] Time period, [ t 6- t 7] Time period, [ t 7- t 8] time period, [ t 8- t 9] time period and [ t 9- t 10 Time period; The specific conditions set are as follows: 1) Q 1a - Q 2d It is an ideal switch with no voltage drop. When no drive signal is applied, the reverse conduction resistance is infinite. 2) Two capacitors in series C 1. C2 is large enough to ensure a constant voltage across the capacitor; 3) Two filter inductors L 1 and L 2. Two resonant inductors with the same inductance value. L r1 and L r2 They have the same value; 4) Filter inductor L 1 and L 2 is large enough to ensure that it operates in continuous conduction mode when the duty cycle is below 0.5.

[0014] A control method for a transformerless soft-switching high step-down ratio DC-DC converter, when time is [ t 0- t When [1], switch Q 1b and Q 1c Close simultaneously; Q 1b The body diode is conducting. i L1 and i Lr1 Provide a continuation path; i Lr1 The direction is negative and flows through Q 2c and Q 2d Body diode; Q 1d Turn off; C 1d The voltage on is V o ; L r1 and C 1a and C 1c Resonance; where C 1a from V in / 2 discharges to zero; C 1c From zero charging to V in / 2; The dual paths in the second phase release the stored energy to the load; Q 2b and Q 2c Conduct and i L2 and i Lr2Provides a continuous flow path; the differential equation of the resonant network in the second phase is expressed as (1); (1) When the time is [ t 1- t At time 2], Q 1a Conducts under ZVS conditions; i Lr1 The direction changes from negative to positive; Q 1b The body diode remains conducting and current flows through it. i L1 and i Lr1 The current difference between them; Q 1d It remains off, therefore, current flows through C 1d And will C 1d The energy stored in the medium is released to the load; C 1 and C 2. Discharge and charge separately; at the same time, due to C 1d Voltage drop on C 1c from V in Discharge to ( V in / 2- V o ), C 2a from( V in / 2- V o Charging to V in / 2, C 2d From zero charging to V o ; Q 2b and Q 2c Conduct and i L2 and i Lr2 Provide a continuous circulation path; when C 1d This interval ends when the voltage drops to zero. When the time is [ t 2- t At 3] Q 1d Enabled under ZVS conditions; iLr1 exist t 2 + Catch up at all times i L1 Therefore, in t 2 + Before Q 1b The body diode is conducting. L r1 The voltage on is ( V in / 2- v Cr1 The differential equation of the resonant network can be obtained from formula (2); Q 1b exist t 2 + ZCS is turned off at any time, then C r1 and( L r1 + L 1) Resonance, the differential equation of the resonant network can be expressed as (3); Q 2b and Q 2c Still conducting and i L2 and i Lr2 Provide a continuation path; (2) (3) When the time is [ t 3- t When [4], switch Q 1a and Q 1c Close simultaneously; i Lr1 The direction is positive. Q 1d Body diode; L r1 and C 1a and C 1c resonance, C 1a From zero charging to ( V in / 2- V o ), C 1c from( V in / 2- Vo Discharge to zero; during this time interval, Q 1b disconnect, i L1 and i Lr1 The current difference between them flows through C 1b and release C 1b The energy stored in it; Q 2b and Q 2c Still conducting i L2 and i Lr2 Provide a continuation path; When the time is [ t 4- t At 5 o'clock, Q 1b and Q 1c It conducts under ZVS conditions. Q 1b Flowing i L1 and i Lr1 , Q 1c Flowing i Lr1 . L 1 and L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear decrease. The four paths in the ISC-RHB converter release energy to the load. The differential equation of the resonant network can be obtained from (4).

[0015] (4).

[0016] A control method for a transformerless soft-switching high step-down ratio DC-DC converter, when time is [ t 5- t At 6 o'clock, Q 2b and Q 2c Close simultaneously; Q 2b The body diode is turned on and freewheeling current is applied. i L2 and i Lr2 The sum;i Lr2 The direction is negative. C 2d ; L r2 and C 2a , C 2c , C 2d , C 1d Resonance, in which C 2a from V in / 2 discharges to zero, while C 1d From zero charging to V in / 2, C 2c and C 2d It is also charged, when C 2c The voltage exceeds C 2d ( V in / 2- V o When ), according to Kirchhoff's voltage law C 2a The voltage drops to zero; Q 1b and Q 1c Still conducting and i L1 and i Lr1 Provide a continuation path; When the time is [ t 6- t At 7 o'clock, Q 2a Conducts under ZVS conditions; i Lr2 The direction changes from negative to positive, and increases almost linearly; Q 2b The body diode remains conducting and current flows through it. i L2 and i Lr2 The current difference between them; Q 2d It remains off, therefore, current flows through C 2d and release C 2d Energy stored in; series capacitor C1 and C 2 are charged and discharged respectively; at the same time, due to C 2d Voltage drop on C 2c Discharge to ( V in / 2- V o ); Q 1b and Q 1c Still conducting and i L1 and i Lr1 Provide a continuous circulation path; when C 2d This interval ends when the voltage drops to zero. When the time is [ t 7- t At 8 o'clock, Q 2d Activated under ZVS conditions; i Lr2 exist t 7 + Catch up at all times i L2 Therefore, in t 7 + Before Q 2b The body diode is conducting. L r2 The voltage on is ( V in / 2- v Cr2 The differential equation of the resonant network can be obtained from formula (5); Q 2b exist t 2 + ZCS is always off. C r2 and( L r2 + L 2) Resonance, the differential equation of the resonant network can be obtained as formula (6); due to L The sensitivity value of 2 is relatively large. i Lr2 and i L2 It increases almost linearly; Q 1b and Q 1c Still conducting and i L1 and iLr1 Provide a continuation path; (5) (6) When the time is [ t 8- t At time 9, switch Q 2a and Q 2c Simultaneously shut down; i Lr2 The direction is positive. Q 2d Body diode; L r2 and C 2a and C 2c resonance, C 2a From zero charging to ( V in / 2- V o ), C 2c from( V in / 2- V o Discharge to zero; due to C 2a The voltage on it increases. C 1a from( V in - V o Discharge to V in / 2; During this time interval Q 2b disconnect, i L2 and i Lr2 The current difference between them flows through C 2b and release C 2b The energy stored in it; When the time is [ t 9- t 10 ]hour, Q 1b and Q 1c Conducts under ZVS conditions; Q 1b Flowing i L1and i Lr1 , Q 1c Flowing i Lr1 ; L 1 and L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear descent; four paths in the ISC-RHB converter release energy to the load; the differential equation of the resonant network can be obtained from (4); (4).

[0017] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter, the steady-state analysis method comprising performing inductor DC current analysis using the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 and the operating method as described in claim 2, wherein the set conditions specifically include: 1) the output capacitor of the switch. C 1a - C 2d Ignore their charging and discharging times; 2) k= L r1 / L 1= L r2 / L 2, k << 1; 3) T s It is the switching cycle. DT s Indicates from t 1 to t 3 or t 6 to t 8 hours dT s Indicates from t 2 to t 2+ or t 6 to t 7+ The time.

[0018] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter, wherein the method utilizes the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 to perform inductor DC current analysis. Specifically, the inductor DC current analysis can be divided into three stages throughout the entire cycle. dT s、( Dd ) T s (1-D) T s ; inductance L The average current of 1 is expressed as: (7) in I 1 represents the average current of the first phase. I Lr11 , I Lr12 and I Lr13 These represent three stages. L r1 The average current; resonant capacitor C r1 In a steady state, the ampere-second balance is satisfied: (8) As can be seen from (2), in dT s period, i Lr1 It increases approximately linearly; (9) in Indicator L The current ripple rate of 1, i.e. ; Combining formulas (7)-(9), calculate I L1 ; (10) Approximately, we obtain I L2 ; (11) From formulas (10) and (11), it can be seen that the duty cycle D The larger, L The smaller the current ratio in 1, L r1 The larger the proportion of current in the medium, the lower the proportion of current in the medium, and vice versa; when D When the current is 0.5, the output current is almost evenly divided into four paths, each carrying... I o / 4.

[0019] A steady-state analysis method for a transformerless soft-switching high-step-out ratio DC-DC converter is provided, which uses the set conditions of the transformerless soft-switching high-step-out ratio DC-DC converter as described in claim 1 to derive waveforms. Specifically, the waveform derivation involves... When the time is [ t 0, t 1] When: Assuming t 0 i Lr1 and v Cr1 The values ​​are respectively i Lr1_0 and v Cr1_0 ; i Lr1 The direction is negative. L r1 and C 1a and C 1c Resonance, therefore, C 1a and C 1c Discharging and charging separately; over time t At time 1, the current drops to zero under ideal conditions; that is... (12) When the time is [ t 1, t 2 + When: The differential equation of the resonant network in formula (2) is solved as follows: (13) in , ; When the time is [ t 2 + , t 3] When the resonance process ends, i Lr1_d (t) and v Cr1_d The value of (t) is [ t 2 + , t 3] The initial state of the resonance process during the period; by using i Lr1_1 and v Cr_1 The solution to the differential equation in formula (3) is as follows: (14) in , ; When the time is [ t 3, t 4] When the resonance process ends i Lr1_D (t) and v Cr1_D The value of (t) is [ t 3, t 4] The initial state of the resonance process during this interval; V 1b The average value is approximately ( V in / 2- v Cr1_2 ) / 2, and we can derive L r1 The average voltage across the two ends is –( V in / 4+ v Cr1_2 / 2- V o ),therefore, i Lr1 Linear descent; assumption i Lr1 exist t 4 hours later i Lr1_3 ;Right now (15) in i Lr1_3 and v Cr1_3 They represent t 4 moments i Lr1 and v Cr1 value, t dead Indicates dead time; When the time is [ t 4, t 10 When: The differential equation in formula (4) is solved as follows: (16) in , ; In a steady state, at the beginning of the switching cycle t 0 i Lr1 and v Cr1 The value at the end of the switching cycle t 10 The values ​​are the same, that is: (17) (18).

[0020] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter is proposed. This method derives the voltage conversion ratio using the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1. Specifically, the voltage conversion ratio derivation involves, based on volt-second balance, the filter inductor... L 1 and L 2. The average voltage over one switching cycle is zero; this is achieved by calculating the average switching node voltage over one switching cycle. v ds1b To calculate the output voltage; node voltages are only calculated during time intervals. C The inner value is non-zero; Time interval t 2 + - t The equivalent circuit of 3 is used for calculation; (19) because L r1 << L 1, v Cr1 Depend on C r1 The average voltage on is expressed as ( v Cr1_1 + v Cr1_2 ) / 2; Therefore, the expression in formula (19) is simplified; (20) start time and end time i Lr1 They are respectively i Lr1_1 and i Lr1_2 Therefore, by combining formula (10), we obtain the following expression.

[0021] (twenty one) By combining formulas (18), (20), and (21), different output currents are obtained. I o and resonance parameters L r1 , C r1 Voltage conversion ratio of downconverter M = V o / V in , M Calculated in MATLAB.

[0022] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter is proposed. This method utilizes the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 to design ZVS conditions and resonant parameters. Specifically, the ZVS conditions and resonant parameter design are implemented to ensure… Q 1a Achieving ZVS under different input voltages and different load currents. i Lr1_0 It should be negative enough; Q 2d The voltage on it is zero. Q 2c Conduction, therefore Q 1d and V o The circuit is connected in parallel, therefore the resonant current will not flow through it. Q 1d The resonant current has two loops, one from... L r1 and C r1 Departure, flow through C 1a ,go through C 1. Q 2d , Q 2c , V o , and then from Q 1b Return; another from L r1 and C r1 Departure, flow through C 1c Flowing through V o and from Q 1b return; L r1 and C 1a and C 1c resonance, C 1a from V in / 2 discharges to zero, C 1c From zero charging to V in / 2; To ensure Q 1a The ZVS operation should satisfy formula (22); (twenty two) Similarly, L r2 and C 1d , C 2a , C 2c , C 2d Resonance, therefore, C 2a Discharge, C 1d , C 1c , C 2c Charging. To ensure... Q 2a The ZVS operation should satisfy formula (23), where i Lr2_0 express Q 2b and Q 2c Resonant current during turn-off i Lr2 , V 2c and V 2d Representing the dead time respectively Q 2c and Q 2d The voltage on it.

[0023] (twenty three) Comparing formulas (22) and (23), we find that Q 2a Compare Q 1a Soft switching is more difficult to achieve. If ZVS is not achieved, the resonant network must be adjusted to obtain lower [performance / reduction]. i Lr1_0 or i Lr2_0 ; for Q 1c , because when Q 1a and Q 1d When shut down i Lr1 Reaching the maximum value, therefore Q1c ZVS is easier to implement. Q 2c The same applies. To ensure the ZVS operation of Q1c and Q2c, equations (24) and (25) should be satisfied respectively. Q 1b , Q 1d , Q 2b , Q 2d It is a rectifier switch; as long as the dead time is set properly, soft switching can be achieved.

[0024] (twenty four) (25).

[0025] A steady-state analysis method for a transformerless soft-switching high-step-down ratio DC-DC converter is proposed. Besides meeting the soft-switching requirements, the selection of resonant parameters should also satisfy the minimum turn-off current to reduce switching losses and improve system efficiency. Considering both soft-switching and losses, the same... f r Down, D The larger, i Lr1_0 More negative; same D Down, f r The lower, i L r1_0 The more negative; that is, by increasing C r It can yield more negative results. i Lr1_0 and i Lr2_0 ,vice versa; I o The larger, the same D Under the conditions i The more negative Lr1_0 is, the more likely it is that if soft switching can be achieved under light load conditions for the same set of parameters, it can definitely be achieved under heavy load conditions.

[0026] The beneficial effects of this invention are: This invention combines the double voltage reduction advantage of the SC-Buck converter with the zero-voltage switching advantage of the resonant hybrid Buck converter.

[0027] The invention introduces a resonant cavity into the hybrid structure, which not only enables soft switching of all switches, but also eliminates current spikes generated during switch switching.

[0028] The converter of the present invention can eliminate the high switching voltage stress problem encountered by existing converters during startup.

[0029] This invention features lower switching losses, lower conduction losses, lower voltage stress, and lower inductance losses. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the structure of the present invention.

[0031] Figure 2 This is a schematic diagram of the key operating waveforms of the converter in this invention.

[0032] Figure 3 This is an equivalent circuit diagram of each working mode of the present invention, wherein (a) is mode 1, (b) is mode 2, (c) is mode 3, (d) is mode 4, (e) is mode 5, (f) is mode 6, (g) is mode 7, (h) is mode 8, and (i) is mode 9.

[0033] Figure 4 This is a schematic diagram of the three stages in one cycle of the present invention.

[0034] Figure 5 It is the same output current of the present invention ( I o =20A), same input voltage ( V in =48V), same switching frequency ( f s =200kHz) and different resonant frequencies f r Voltage gain under M and D A diagram illustrating the relationship, where (a) is... f r =0.8 f s , k =0.055, voltage gain M and I o The relationship, (b) is f r = f s , k At 0.055, the voltage gain M and I o The relationship.

[0035] Figure 6 The present invention demonstrates the same resonant frequency and the same input voltage. V in =48V), same switching frequency ( f s=200kHz) and different output currents I o Voltage gain under M and I o A diagram illustrating the relationship, where (a) f r =0.8 f s (b) f r = f s .

[0036] Figure 7 This is a schematic diagram comparing the voltage conversion ratios of different topologies of the present invention.

[0037] Figure 8 This is the invention Q 1a ZVS equivalent circuit diagram.

[0038] Figure 9 This is the invention Q 2a Equivalent circuit diagram of ZVS operation.

[0039] Figure 10 This is the invention i Lr1_0 and D or I o The diagram illustrates the relationships between different relationships, where (a) represents different relationships. f r (same) L r Different C r )Down i Lr1_0 and D The relationship, (b) is different D under conditions i Lr1_0 and I o The relationship.

[0040] Figure 11 This is the hardware circuit of the present invention, wherein (a) is the front side and (b) is the back side.

[0041] Figure 12 This is a schematic diagram of the experimental voltage and current waveforms of the present invention, wherein, (a) I o =10A, (b) I o =20A, (c) I o=40A.

[0042] Figure 13 This invention is when I o =20A current, gate signal, and drain-source voltage, where, (a) Q 1a (b) Q 1c (c) Q 1d (d) Q 2a (e) Q 2c (f) Q 2d .

[0043] Figure 14 This is a schematic diagram of the experimental waveforms of the converter proposed in this invention during startup.

[0044] Figure 15 This is a schematic diagram of the measurement efficiency of the present invention under different output currents.

[0045] Figure 16 This is a schematic diagram of the calculated power loss distribution of the converter proposed in this invention under full load. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] This converter combines the double-step-down advantage of the SC-Buck converter with the zero-voltage switching advantage of the resonant hybrid Buck converter. Introducing a resonant cavity into the hybrid structure not only achieves soft switching for all switches but also eliminates current spikes caused by switching. Combined with circuit structure improvements to the SC Buck converter, this converter eliminates the high switching voltage stress encountered by existing converters during startup. Furthermore, this converter can achieve self-current sharing between the two interleaved modules without using additional current balancing control methods. Other advantages of this topology include lower switching losses, lower conduction losses, lower voltage stress, and lower inductance losses.

[0048] A transformerless soft-switching high step-down ratio DC-DC converter, wherein the converter adopts a resonant dual-path hybrid structure as the basic unit, and the two basic units are parallel and interleaved. Each unit of the converter includes an active switch.Q a Active switches Q c rectifier tube Q b rectifier tube Q d Resonant capacitor C r capacitors C 1. Capacitor C 2. Resonant inductor L r and filter inductor L; The active switch Q 1a One end is connected to the capacitor C 1's positive terminal and power supply V in The positive terminal is connected to the active switch. Q 1a The other end is connected to the resonant capacitor. C r1 Positive terminal and active switch Q 1c One end of the resonant capacitor is connected to the other end. C r1 The negative terminal of the resonant inductor L r1 One end is connected to the active switch. Q 1c The other end is connected to one end of filter inductor L1, one end of filter inductor L2, and capacitor respectively. C One end of the resonant inductor is connected to one end of the resistor R0. L r1 The other end is connected to the rectifier tube. Q 1b One end of it is connected to the other end of the filter inductor L1; The rectifier tube Q 1b The other end is connected to the rectifier tube. Q 1d one end and capacitor C The other end of 0 is connected to the rectifier tube. Q 1d The other end is connected to the rectifier tube. Q 2d one end and capacitor C The positive terminal of 1 is connected to the rectifier tube. Q 2d The other end is connected to the resonant capacitor. C r2 Positive terminal and active switch Q 2cOne end of the resonant capacitor is connected to the other end. C r2 The negative terminal of the resonant inductor L r2 One end is connected to the active switch. Q 2c The other end is connected to the other end of the filter inductor L2, the resonant inductor L r2 The other end is connected to the rectifier tube Q 2b One end is connected to the rectifier tube. Q 2b The other end is connected to the active switch. Q 1a One end of the capacitor C One end of resistor R0 is connected to one end of resistor R0; The active switch Q 2a The other end is connected to the capacitor. C The negative terminal of 2 and the power supply V in Connect the negative end.

[0049] A control method for a transformerless soft-switching high step-down ratio DC-DC converter is disclosed. Specifically, the control method employs duty cycle control, wherein the duty cycle cannot exceed 50%, otherwise the converter's operating mode will change. Figure 2 The key waveforms of the converter are shown. The first phase operates on a similar principle to the second phase. The drive signals for the first and second phases are phase-shifted by 180°. V GS1a and V GS1d They are Q 1a and Q 1d The drive signal, where Q 1d Compare Q 1a To ensure Q 1d ZVS can be implemented, the time interval depends on the storage location. C 1d Energy. V GS1b，1c yes Q 1b and Q 1c The drive signals are simultaneously turned on and off. I Q1a - I Q2c They represent Q 1a- Q 2c The current. In addition, the resonant inductor... L r1 , L r2 Current, resonant capacitor C r1 , C r2 Voltage and filter inductor L 1. L The current of 2 is as follows Figure 2 As shown.

[0050] Based on the setting conditions of the transformerless soft-switching high step-down ratio DC-DC converter as described in the claims, the switching control is divided into […]. t 0- t 1] Time period, [ t 1- t 2] Time period, [ t 2- t 3] Time period, [ t 3- t 4] Time period, [ t 4- t 5] Time period, [ t 5- t 6] Time period, [ t 6- t 7] Time period, [ t 7- t 8] time period, [ t 8- t 9] time period and [ t 9- t 10 Time period; The specific conditions set are as follows: 1) Q 1a - Q 2d It is an ideal switch with no voltage drop. When no drive signal is applied, the reverse conduction resistance is infinite. 2) Two capacitors in series C 1. C 2 is large enough to ensure a constant voltage across the capacitor; 3) Two filter inductors L 1 and L 2. Two resonant inductors with the same inductance value. L r1 and L r2 They have the same value; 4) Filter inductor L 1 and L2 is large enough to ensure that it operates in continuous conduction mode (CCM) when the duty cycle is below 0.5.

[0051] A control method for a transformerless soft-switching high step-down ratio DC-DC converter, when time is [ t 0- t 1] When, see Figure 3 (a) During this time interval, the switch Q 1b and Q 1c Close simultaneously; Q 1b The body diode is conducting. i L1 and i Lr1 Provide a continuation path; i Lr1 The direction is negative and flows through Q 2c and Q 2d Body diode; Q 1d Turn off; C 1d The voltage on is V o ; L r1 and C 1a and C 1c Resonance; where C 1a from V in / 2 discharges to zero; C 1c From zero charging to V in / 2; The dual paths in the second phase release the stored energy to the load; Q 2b and Q 2c Conduct and i L2 and i Lr2 Provides a continuous flow path; the differential equation of the resonant network in the second phase is expressed as formula (1); (1) When the time is [ t 1- t 2] When, see Figure 3 (b) During this time interval Q 1a Conducts under ZVS conditions; iLr1 The direction changes from negative to positive; Q 1b The body diode remains conducting and current flows through it. i L1 and i Lr1 The current difference between them; Q 1d It remains off, therefore, current flows through C 1d And will C 1d The energy stored in the medium is released to the load; C 1 and C 2. Discharge and charge separately; at the same time, due to C 1d Voltage drop on C 1c from V in Discharge to ( V in / 2- V o ), C 2a from( V in / 2- V o Charging to V in / 2, C 2d From zero charging to V o ; Q 2b and Q 2c Conduct and i L2 and i Lr2 Provide a continuous circulation path; when C 1d This interval ends when the voltage drops to zero. When the time is [ t 2- t 3] When, see Figure 3 (c) During this time interval Q 1d Enabled under ZVS conditions; i Lr1 exist t 2 + Catch up at all times i L1 Therefore, in t 2 + Before Q 1bThe body diode is conducting. L r1 The voltage on is ( V in / 2- v Cr1 The differential equation of the resonant network can be obtained from formula (2); Q 1b exist t 2 + ZCS is turned off at any time, then C r1 and( L r1 + L 1) Resonance, the differential equation of the resonant network can be expressed as formula (3); due to L A sensitivity value of 1 is relatively large. i Lr1 and i L1 It increases almost linearly; Q 2b and Q 2c Still conducting and i L2 and i Lr2 Provide a continuation path; (2) (3) When the time is [ t 3- t 4] When, see Figure 3 (d) During this time interval, the switch Q 1a and Q 1c Close simultaneously; i Lr1 The direction is positive. Q 1d Body diode; L r1 and C 1a and C 1c resonance, C 1a From zero charging to ( V in / 2- V o ), C 1c from( V in / 2- V oDischarge to zero; during this time interval, Q 1b disconnect, i L1 and i Lr1 The current difference between them flows through C 1b and release C 1b The energy stored in it; Q 2b and Q 2c Still conducting i L2 and i Lr2 Provide a continuation path; When the time is [ t 4- t 5] When, see Figure 3 (e) During this time interval, Q 1b and Q 1c It conducts under ZVS conditions. Q 1b Flowing i L1 and i Lr1 , Q 1c Flowing i Lr1 . L 1 and L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear decrease. The four paths in the ISC-RHB converter release energy to the load. The differential equation of the resonant network can be obtained from (4).

[0052] (4).

[0053] A control method for a transformerless soft-switching high step-down ratio DC-DC converter, wherein when the time is [ t 5- t At 6 o'clock, see Figure 3 (f), at the beginning of this interval Q 2b and Q 2c Close simultaneously; Q 2b The body diode is turned on and freewheeling current is applied. iL2 and i Lr2 The sum; i Lr2 The direction is negative. C 2d ; L r2 and C 2a , C 2c , C 2d , C 1d Resonance, in which C 2a from V in / 2 discharges to zero, while C 1d From zero charging to V in / 2, C 2c and C 2d It is also charged, when C 2c The voltage exceeds C 2d ( V in / 2- V o When ), according to Kirchhoff's voltage law C 2a The voltage drops to zero; Q 1b and Q 1c Still conducting and i L1 and i Lr1 Provide a continuation path; When the time is [ t 6- t 7] At that time, see Figure 3 (g), during this time interval, Q 2a Conducts under ZVS conditions; i Lr2 The direction changes from negative to positive, and increases almost linearly; Q 2b The body diode remains conducting and current flows through it. i L2 and i Lr2 The current difference between them; Q 2d It remains off, therefore, current flows throughC 2d and release C 2d Energy stored in; series capacitor C 1 and C 2 are charged and discharged respectively; at the same time, due to C 2d Voltage drop on C 2c Discharge to ( V in / 2- V o ); Q 1b and Q 1c Still conducting and i L1 and i Lr1 Provide a continuous circulation path; when C 2d This interval ends when the voltage drops to zero. When the time is [ t 7- t At 8 o'clock, see Figure 3 (h), during this time interval Q 2d Activated under ZVS conditions; i Lr2 exist t 7 + Catch up at all times i L2 Therefore, in t 7 + Before Q 2b The body diode is conducting. L r2 The voltage on is ( V in / 2- v Cr2 The differential equation of the resonant network can be obtained from formula (5); Q 2b exist t 2 + ZCS is always off. C r2 and( L r2 + L 2) Resonance, the differential equation of the resonant network can be obtained as formula (6); due to L The sensitivity value of 2 is relatively large. i Lr2 and i L2 It increases almost linearly;Q 1b and Q 1c Still conducting and i L1 and i Lr1 Provide a continuation path; (5) (6) When the time is [ t 8- t At 9 o'clock, see Figure 3 (i) At the start of this interval, the switch Q 2a and Q 2c Simultaneously shut down; i Lr2 The direction is positive. Q 2d Body diode; L r2 and C 2a and C 2c resonance, C 2a From zero charging to ( V in / 2- V o ), C 2c from( V in / 2- V o Discharge to zero; due to C 2a The voltage on it increases. C 1a from( V in - V o Discharge to V in / 2; During this time interval Q 2b disconnect, i L2 and i Lr2 The current difference between them flows through C 2b and release C 2b The energy stored in it; When the time is [ t 9- t10 When, see Figure 3 (e) The working process of mode 10 is similar to that of mode 5. During this time interval... Q 1b and Q 1c Conducts under ZVS conditions; Q 1b Flowing i L1 and i Lr1 , Q 1c Flowing i Lr1 ; L 1 and L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear descent; four paths in the ISC-RHB converter release energy to the load; the differential equation of the resonant network can be obtained from (4); (4).

[0054] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter, the steady-state analysis method comprising performing inductor DC current analysis using the operating conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 and the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 2, wherein the specific setting conditions are: 1) the output capacitor of the switch. C 1a - C 2d So small that their charging and discharging times can be ignored; 2) k= L r1 / L 1= L r2 / L 2, k << 1; 3) T s It is the switching cycle. DT s Indicates from t 1 to t 3 or t 6 to t 8 hours dT s Indicates from t 2 to t 2+ ort 6 to t 7+ The time.

[0055] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter, wherein the method utilizes the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 to perform inductor DC current analysis, specifically as follows: Figure 4 As shown, the entire cycle can be divided into three stages, namely... dT s 、( Dd ) T s (1-D) T s ; inductance L The average current of 1 is expressed as: (7) in I 1 represents the average current of the first phase. I Lr11 , I Lr12 and I Lr13 These represent three stages. L r1 The average current; resonant capacitor C r1 Under steady-state conditions, the ampere-second balance is satisfied: (8) As can be seen from formula (2), in dT s period, i Lr1 It increases approximately linearly; (9) in Indicator L The current ripple rate of 1, i.e. ; Combining formulas (7) and (9), calculate I L1 ; (10) Approximately, we obtain I L2 ; (11) From formulas (10) and (11), it can be seen that the duty cycle D The larger,L The smaller the current ratio in 1, L r1 The larger the proportion of current in the medium, the lower the proportion of current in the medium, and vice versa; when D When the current is 0.5, the output current is almost evenly divided into four paths, each carrying... I o / 4. Since inductor losses are proportional to the square of the current, this structure greatly reduces inductor losses and dissipates heat, making it suitable for high current output applications.

[0056] A steady-state analysis method for a transformerless soft-switching high-step-out ratio DC-DC converter is provided, which uses the set conditions of the transformerless soft-switching high-step-out ratio DC-DC converter as described in claim 1 to derive waveforms. Specifically, the waveform derivation involves... Figure 2 Showing i Lr1 , i Lr2 , v Cr1 , v Cr2 and i Q1a - i Q2c The waveform. i Lr1 and v Cr1 Taking this as an example, we can derive its mathematical expression. The mathematical expressions for other waveforms can be derived from... i Lr1 and v Cr1 Export.

[0057] When the time is [ t 0, t 1] When: Assuming t 0 i Lr1 and v Cr1 The values ​​are respectively i Lr1_0 and v Cr1_0 ; i Lr1 The direction is negative. L r1 and C 1a and C 1c Resonance, therefore, C 1a and C 1c Discharge and charge separately; dead time is very short. iLr1 It can be considered a linear decline. v Cr1 It can be considered a constant value. In time... t At time 1, the current drops to zero under ideal conditions; that is... (12) When the time is [ t 1, t 2 + When: The differential equation of the resonant network in formula (2) is solved as follows: (13) in , ; When the time is [ t 2 + , t 3] When the resonance process ends, i Lr1_d (t) and v Cr1_d The value of (t)[ i Lr1_d ( dT s )and v Cr1_d ( dT s ), recorded as i Lr1_1 and v Cr_1 ]yes[ t 2 + , t 3] The initial state of the resonance process during the period; by using i Lr1_1 and v Cr_1 The solution to the differential equation in formula (3) is as follows: (14) in , ; When the time is [ t 3, t 4] When the resonance process ends i Lr1_D (t) and v Cr1_D The value of (t)[i] Lr1_D (( D - d ) c )and v Cr1_d (( D- d )v), respectively recorded as i Lr1_2 and v Cr1_2 ]yes[ t 3, t 4] The initial state of the resonance process during the period; L r1 and C 1a and C 1c Resonance occurs because the resonant current is relatively large at this point. C 1a and C 1c They are fully charged and discharged instantly, respectively. C 1b pass i L1 and i Lr1 The difference in current discharge between them, and C 1b Relatively large (generally, the smaller the on-resistance, the larger the output capacitor), therefore V 1b It decreases slowly. During this interval... v Cr1 It can be considered a constant value, therefore, during this interval V 1b The average value is approximately ( V in / 2- v Cr1_2 ) / 2, and we can derive L r1 The average voltage across the two ends is –( V in / 4+ v Cr1_2 / 2- V o ),therefore, i Lr1 Linear descent; assumption i Lr1 exist t 4 hours later i Lr1_3 ;Right now (15) in i Lr1_3 and v Cr1_3 They represent t 4 moments i Lr1 and vCr1 value, t dead Indicates dead time; When the time is [ t 4, t 10 When: The differential equation in formula (4) is solved as follows: (16) in , ; In a steady state, at the beginning of the switching cycle t 0 i Lr1 and v Cr1 The values ​​[are respectively] i Lr1_0 and v Cr1_0 At the end of the switching cycle t 10 The values ​​[are respectively] i Lr1_D ， ((1- D ) T s )and v Lr1_D ， [(1-D)Ts)] is the same, that is: (17) (18).

[0058] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter is proposed. This method derives the voltage conversion ratio using the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1. Specifically, the voltage conversion ratio derivation involves calculating the voltage conversion ratio using a steady-state model; and based on volt-second balance, the filter inductor... L 1 and L 2. The average voltage over one switching cycle is zero; this is achieved by calculating the average switching node voltage over one switching cycle. v ds1b To calculate the output voltage; node voltages are only calculated during time intervals. C The inner value is non-zero; Figure 3 The time interval shown t 2 + - t The equivalent circuit of 3 is used for calculation; (19) because Lr1 << L 1, with v L1 compared to, v Lr1 It can be ignored. v Cr1 It can be by C r1 The average voltage on is expressed as ( v Cr1_1 + v Cr1_2 ) / 2; Therefore, the expression in formula (19) is simplified; (20) As can be seen from the preceding analysis, in t 2 + - t 3. During this period, the start and end times i Lr1 They are respectively i Lr1_1 and i Lr1_2 Therefore, by combining (10), the following expression can be obtained.

[0059] (twenty one) By combining formulas (18), (20), and (21), different output currents can be obtained. I o and resonance parameters L r1 , C r1 Voltage conversion ratio of downconverter M = V o / V in , M Calculated in MATLAB; Figure 5 The same output current was displayed. I o =20A), same input voltage ( V in =48V), same switching frequency ( f s =200kHz) and different resonant frequencies f r Voltage gain under M and D The relationship. Figure 5 In (a), f r The change is due toL r Caused by changes, and C r Remain unchanged ( C r =5.5uF), Figure 5 In (b), f r The change is due to C r The changes caused by, and L r Remain unchanged ( L r =0.18uH). and C r Compared to the change in resonant frequency caused by the change, L r Changes in voltage gain have a significant impact. Figure 6 The same resonant frequency was shown. Figure 6 (a) f r =0.8 f s , Figure 6 (b) f r = f s Same input voltage V in =48V), same switching frequency ( f s =200kHz) and different output currents I o Voltage gain under M and I o The relationship. It can be seen that, with... I o The increase in voltage gain M It has decreased slightly. This is because... d along with I o The increase in the effective duty cycle (due to the increase in the number of hours) leads to an increase in the effective duty cycle. D - d () decrease.

[0060] Comparison of voltage conversion ratios for different topologies, such as Figure 7 As shown, the proposed converter has a lower voltage conversion ratio than other converters, which further proves that the proposed converter is a suitable topology for high-step DC-DC applications.

[0061] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter is disclosed. This method utilizes the set conditions of the transformerless soft-switching high-dropout-ratio DC-DC converter as described in claim 1 to design ZVS conditions and resonant parameters. Specifically, by rationally designing the resonant parameters and dead time, the converter proposed in this invention can achieve soft switching for all switches. To ensure... Q 1a Achieving ZVS under different input voltages and different load currents. i Lr1_0 It should be negative enough. To better understand... Q 1a ZVS, Q 1b and Q 1c Disconnected Q 1a The equivalent circuit when it is about to be turned on is as follows: Figure 8 As shown; at this time, Q 2d The voltage on it is zero. Q 2c Conduction, therefore Q 1d and V o The circuit is connected in parallel, therefore the resonant current will not flow through it. Q 1d The resonant current has two loops, one from... L r1 and C r1 Departure, flow through C 1a ,go through C 1. Q 2d , Q 2c , V o , and then from Q 1b Return; another from L r1 and C r1 Departure, flow through C 1c Flowing through V o and from Q 1b return; L r1 and C 1a and C 1c resonance,C 1a from V in / 2 discharges to zero, C 1c From zero charging to V in / 2; To ensure Q 1a The ZVS operation should satisfy formula (22); (twenty two) Similarly, when Q 2b and Q 2c disconnect Q 2a The equivalent circuit when it is about to be turned on is as follows: Figure 9 As shown. L r2 and C 1d , C 2a , C 2c , C 2d Resonance, therefore, C 2a Discharge, C 1d , C 1c , C 2c Charging. To ensure... Q 2a The ZVS operation should satisfy formula (23), where i Lr2_0 express Q 2b and Q 2c Resonant current during turn-off i Lr2 , V 2c and V 2d Representing the dead time respectively Q 2c and Q 2d The voltage on it.

[0062] (twenty three) Comparing formulas (22) and (23), we can find that Q 2a Compare Q 1aSoft switching is more difficult to achieve. If ZVS is not achieved, the resonant network must be adjusted to obtain lower [performance / reduction]. i Lr1_0 or i Lr2_0 .

[0063] for Q 1c , because when Q 1a and Q 1d When shut down i Lr1 Reaching the maximum value, therefore Q 1c ZVS is easier to implement. Q 2c The same applies. To ensure the ZVS operation of Q1c and Q2c, equations (24) and (25) should be satisfied respectively. Q 1b , Q 1d , Q 2b , Q 2d It is a rectifier switch; as long as the dead time is set properly, soft switching can be achieved.

[0064] (twenty four) (25).

[0065] A steady-state analysis method for a transformerless soft-switching high-dropout-ratio DC-DC converter requires, in addition to meeting the soft-switching requirements, that the selection of resonant parameters also satisfies the minimum turn-off current (i.e., i Lr1_0 and i Lr2_0 To reduce switching losses and improve system efficiency; L r The value should not be too large in order to minimize losses on the resonant inductor. L r It shouldn't be too small either, otherwise, in order to achieve soft switching, i Lr1_0 and i Lr2_0 This will be larger, resulting in greater switching losses; considering soft switching and losses, in this invention... L r The value is chosen to be 0.18uH, i.e., k=0.055; Figure 10 (a) shows different f r (same) L r DifferentC r )Down i Lr1_0 and D The relationship; it can be seen that the same f r Down, D The larger, i Lr1_0 More negative; same D Down, f r The lower, i L r1_0 The more negative; that is, by increasing C r It can yield more negative results. i Lr1_0 and i Lr2_0 ,vice versa; Figure 10 (b) shows different D under conditions i Lr1_0 and I o From the relationship, we can see that I o The larger, the same D Under the conditions i The more negative Lr1_0 is, that is, for the same set of parameters, if soft switching can be achieved under light load conditions, then it can definitely be achieved under heavy load conditions; therefore, when designing the resonant parameters, the soft switching conditions and the magnitude of the turn-off current in the full load range should be comprehensively considered to improve the system efficiency; in this design, the resonant parameters are selected so that soft switching is exactly at half load, that is, the parameters that satisfy the equality in (23) can be used to achieve soft switching under heavy load; although soft switching cannot be fully achieved under light load conditions, since L r With the presence of [something], when the switch is turned on, the current gradually increases, the overlap between voltage and current is relatively small, the switching loss is also small, and therefore the efficiency is relatively high.

[0066] A hardware circuit was designed to verify the proposed topology. A diagram of the hardware circuit is shown below. Figure 11 As shown. To handle high output current and improve system efficiency, the printed circuit board (PCB) is made of four layers, each 70µm thick. Simultaneously, high-current paths were optimized in the PCB design to ensure the shortest possible current loop. Experimental parameters are detailed in Table 1.

[0067] Experimental voltage and current waveforms are as follows Figure 12 and 13 As shown. Figure 12 (a)- Figure 12 (c) shows the output current at different levels.Q 1a Drain-source voltage, gate signal, and first phase resonant current i Lr1 The waveform. It can be seen that... Q 1a The drain-source voltages are four-level signals of 0V, 20V, 44V, and 24V, corresponding to 0V, ( V in / 2- V o ), ( V in - V o )and V in / 2, which verifies the analysis in Section 2. i Lr1 The waveform is divided into three stages within one cycle, corresponding to... dT s (Dd) T s (1-D) T s Furthermore, the amplitude increases with the increase of the output current. Q 1b and Q 1c When shut down i Lr1 Value, that is i Lr1_0 It also increases with the increase of output current, therefore, ZVS is easier to implement. Figure 14 (a)- Figure 14 (f) shows I o =20A i Lr1 and i Lr2 waveform, switch Q 1a - Q 2d The gate signal and drain-source voltage. The dead time is 1% of the period, approximately 0.05µs. It can be seen that all switches are turned on under ZVS conditions. Q 1b and Q 2b It is a synchronous rectifier with natural ZVS characteristics, which greatly reduces switching losses. (Except for...) Q 2c and Q 2d Apart from that, there were no voltage spikes in other switches. Q 2c andQ 2d The reason for the voltage spike is L r2 During the dead zone time and C 2c and C 2d Resonance can be achieved by reducing the turn-off current (i.e., i Lr2_0 To reduce voltage spikes, Q 2d Connecting a small capacitor in parallel across the two ends can also reduce the resonant peak voltage and prevent damage to the switch. Figure 14 Displayed during startup Q 1a and Q 2a Drain-source voltage, output voltage v o Resonant current i Lr1 The startup process was performed under a fixed duty cycle, without any soft-start procedures. As expected, the switching voltage rose slowly during startup. No voltage overshoot was detected, verifying the correctness of the aforementioned structural modifications.

[0068] Experimental parameters of the topology proposed in Table 1

[0069] The efficiency and output current of the converter were measured, such as Figure 15 As shown, the converter's efficiency exceeds 93% under full load, with a peak efficiency of 96.26% when the output current reaches 15A. Subsequently, as the output current increases, the converter's efficiency decreases due to increased semiconductor conduction losses and PCB copper losses, reaching 93.86% under full load.

[0070] Figure 16 The diagram shows the loss distribution of the converter under full load. It's important to note that conduction losses are the primary loss factor due to the relatively large number of switches in the topology and the significant current flowing through some of them. Inductor losses are also substantial, with the output inductor current exhibiting a large DC component and high DC losses; the resonant inductor current is primarily AC, resulting in significant AC losses. Clearly, due to ZVS operation of all switches, switching losses are significantly reduced.

Claims

1. A transformerless soft-switching high step-down ratio DC-DC converter, characterized in that, The converter uses a resonant dual-path hybrid structure as the basic unit, with two basic units running in parallel and interleaving. The converter includes a first unit and a second unit, the first unit including an active switch. Q 1a Active switches Q 1c rectifier tube Q 1b rectifier tube Q 1d Resonant capacitor C r1 capacitors C 1. Resonant inductor L r1 and filter inductor L 1; The second unit includes an active switch. Q 2a Active switches Q 2c rectifier tube Q 2b rectifier tube Q 2d Resonant capacitor C r2 capacitors C 2. Resonant inductor L r2 and filter inductor L 2; The active switch Q 1a One end is connected to the capacitor C 1's positive terminal and power supply V in The positive terminal is connected to the active switch. Q 1a The other end is connected to the resonant capacitor. C r1 Positive terminal and active switch Q 1c One end of the resonant capacitor is connected to the other end. C r1 The negative terminal of the resonant inductor L r1 One end is connected to the active switch. Q 1c The other end is connected to one end of filter inductor L1, one end of filter inductor L2, and capacitor respectively. C One end of the resonant inductor is connected to one end of the resistor R0. L r1 The other end is connected to the rectifier tube. Q 1b One end of it is connected to the other end of the filter inductor L1; The rectifier tube Q 1b The other end is connected to the rectifier tube. Q 1d one end and capacitor C The other end of 0 is connected to the rectifier tube. Q 1d The other end is connected to the rectifier tube. Q 2d one end and capacitor C The negative terminal of 1, capacitor C The positive end of 2 is connected to the rectifier tube. Q 2d The other end is connected to the resonant capacitor. C r2 Positive terminal and active switch Q 2c One end of the resonant capacitor is connected to the other end. C r2 The negative terminal of the resonant inductor L r2 One end is connected to the active switch. Q 2c The other end is connected to the other end of the filter inductor L2, the resonant inductor L r2 The other end is connected to the rectifier tube Q 2b One end is connected to the rectifier tube. Q 2b The other end is connected to the active switch. Q 2a One end of the capacitor C The other end of 0 is connected to the other end of resistor R0; The active switch Q 2a The other end is connected to the capacitor. C 2's negative terminal and power supply V in Connect the negative terminals; Active switch Q 1a Active switches Q 1c rectifier tube Q 1b rectifier tube Q 1d Active switches Q 2a Active switches Q 2c rectifier tube Q 2b rectifier tube Q 2d Each of them is connected in parallel with an output capacitor, and they are denoted as follows: C 1a , C 1c , C 1b , C 1d , C 2a , C 2c , C 2b , C 2d .

2. A control method for a transformerless soft-switching high step-down ratio DC-DC converter, characterized in that, The control method specifically involves controlling the switch based on the setting conditions of the transformerless soft-switching high step-down ratio DC-DC converter described in claim 1, divided into […]. t 0- t 1] Time period, [ t 1- t 2] Time period, [ t 2- t 3] Time period, [ t 3- t 4] Time period, [ t 4- t 5] Time period, [ t 5- t 6] Time period, [ t 6- t 7] Time period, [ t 7- t 8] time period, [ t 8- t 9] time period and [ t 9- t 10 Time period; The specific conditions set are as follows: 1) All active switches and rectifier diodes Q 1a - Q 2d It is an ideal switch with no voltage drop; when no drive signal is applied, the reverse conduction resistance is infinite. 2) Two capacitors in series C 1. Capacitor C 2 is large enough to ensure a constant voltage across the capacitor; 3) Filter inductor L 1 and filter inductor L 2. Resonant inductors with the same inductance value L r1 Resonant inductor L r2 They have the same value; 4) Filter inductor L 1 and filter inductor L 2 is large enough to ensure that it operates in continuous conduction mode when the duty cycle is below 0.

5.

3. The control method according to claim 2, characterized in that, When the time is [ t 0- t When 1], the rectifier tube Q 1b and active switches Q 1c Simultaneously shut down; rectifier tube Q 1b The body diode is conducting. i L1 and i Lr1 Provide a continuation path; i Lr1 The direction is negative and the current flows through the active switch. Q 2c and rectifier tube Q 2d Body diode; rectifier diode Q 1d Turn off; C 1d The voltage on is V o resonant inductor L r1 With output capacitor C 1a and output capacitor C 1c Resonance; where the output capacitor C 1a From power supply V in / 2 Discharges to zero; Output capacitor C 1c From zero charging to power supply V in / 2; The dual paths in the second phase release the stored energy to the load; rectifier tube Q 2b and active switches Q 2c Conduct and i L2 and i Lr2 Provides a continuous flow path; the differential equation of the resonant network in the second phase is expressed as (1); (1) When the time is [ t 1- t When [2], active switch Q 1a Conducts under ZVS conditions; i Lr1 The direction changes from negative to positive; rectifier tube Q 1b The body diode remains conducting and current flows through it. i L1 and i Lr1 The current difference between them; rectifier tube Q 1d It remains off, therefore, current flows through the output capacitor. C 1d And the resonant capacitor C 1d The energy stored in the capacitor is released to the load; C 1 and capacitor C 2. Discharge and charge separately; simultaneously, due to the output capacitor C 1d Voltage drop on output capacitor C 1c from V in Discharge to ( V in / 2- V o ), output capacitor C 2a from( V in / 2- V o Charging to V in / 2, Output capacitor C 2d From zero charging to V o ; rectifier tube Q 2b and active switches Q 2c Conduct and i L2 and i Lr2 Provides a freewheeling path; when the output capacitor C 1d This interval ends when the voltage drops to zero. When the time is [ t 2- t At time 3], the rectifier tube Q 1d Enabled under ZVS conditions; i Lr1 exist t 2 + Catch up at all times i L1 Therefore, in t 2 + Previous rectifier tube Q 1b The body diode is conducting. L r1 The voltage on is ( V in / 2- v Cr1 The differential equation of the resonant network is obtained from formula (2); rectifier tube Q 1b exist t 2 + At time ZCS is turned off, then the resonant capacitor C r1 and( L r1 + L 1) Resonance, the differential equation of the resonant network is expressed as formula (3); rectifier tube Q 2b and active switches Q 2c Still conducting and i L2 and i Lr2 Provide a continuation path; (2) (3) When the time is [ t 3- t When [4], active switch Q 1a and active switches Q 1c Close simultaneously; i Lr1 The direction is positive as the flow passes through the rectifier tube. Q 1d Body diode; resonant inductor L r1 With output capacitor C 1a and output capacitor C 1c Resonance, output capacitor C 1a From zero charging to ( V in / 2- V o Output capacitor C 1c from( V in / 2- V o Discharge to zero; during this time interval, the rectifier diode... Q 1b disconnect, i L1 and i Lr1 The current difference between them flows through the output capacitor. C 1b and release the output capacitor. C 1b The energy stored in it; rectifier tube Q 2b and active switches Q 2c Still conducting i L2 and i Lr2 Provide a continuation path; When the time is [ t 4- t At time 5], the rectifier tube Q 1b and active switches Q 1c Conducts under ZVS conditions; rectifier diode Q 1b Flowing i L1 and i Lr1 Active switch Q 1c Flowing i Lr1 ; Filter inductor L 1 and filter inductor L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear descent; four paths in the ISC-RHB converter release energy to the load; the differential equation of the resonant network is obtained by (4); (4)。 4. The control method according to claim 3, characterized in that, When the time is [ t 5- t At time 6], the rectifier tube Q 2b and active switches Q 2c Simultaneously shut down; rectifier tube Q 2b The body diode is turned on and freewheeling current is applied. i L2 and i Lr2 The sum; i Lr2 The direction of the current is negative as it flows through the output capacitor. C 2d resonant inductor L r2 With output capacitor C 2a Output capacitor C 2c Output capacitor C 2d Output capacitor C 1d Resonance, where the output capacitor C 2a from V in / 2 discharges to zero, while the output capacitor C 1d From zero charging to V in / 2, Output capacitor C 2c and output capacitor C 2d It is also charged when the output capacitor is used. C 2c The voltage exceeds C 2d ( V in / 2- V o When ), according to Kirchhoff's voltage law, the output capacitor... C 2a The voltage drops to zero; rectifier tube Q 1b and active switches Q 1c Still conducting and i L1 and i Lr1 Provide a continuation path; When the time is [ t 6- t At time 7], active switch Q 2a Conducts under ZVS conditions; i Lr2 The direction changes from negative to positive, and increases almost linearly; rectifier tube Q 2b The body diode remains conducting and current flows through it. i L2 and i Lr2 The current difference between them; rectifier tube Q 2d It remains off, therefore, current flows through the output capacitor. C 2d And release the output capacitor C 2d Energy stored in; series capacitor C 1 and C 2 are charged and discharged respectively; at the same time, due to the output capacitor C 2d Voltage drop on output capacitor C 2c Discharge to ( V in / 2- V o ); rectifier tube Q 1b and active switches Q 1c Still conducting and i L1 and i Lr1 Provides a freewheeling path; when the output capacitor C 2d This interval ends when the voltage drops to zero. When the time is [ t 7- t At time 8], the rectifier tube Q 2d Activated under ZVS conditions; i Lr2 exist t 7 + Catch up at all times i L2 Therefore, in t 7 + Previous rectifier tube Q 2b The body diode is conducting. L r2 The voltage on is ( V in / 2- v Cr2 The differential equation of the resonant network is obtained from (5); rectifier tube Q 2b exist t 2 + When ZCS is turned off, the resonant capacitor C r2 and( L r2 + L 2) Resonance, the differential equation of the resonant network is (6); due to the filter inductor L The sensitivity value of 2 is relatively large. i Lr2 and i L2 The increase is almost linear; rectifier tubes Q 1b and active switches Q 1c Still conducting and i L1 and i Lr1 Provide a continuation path; (5) (6) When the time is [ t 8- t At time 9], active switch Q 2a and active switches Q 2c Simultaneously shut down; i Lr2 The direction is positive as the flow passes through the rectifier tube. Q 2d Body diode; resonant inductor L r2 With output capacitor C 2a and output capacitor C 2c Resonance, output capacitor C 2a From zero charging to ( V in / 2- V o Output capacitor C 2c from( V in / 2- V o Discharge to zero; due to the output capacitor C 2a The voltage on the output capacitor increases. C 1a from( V in - V o Discharge to V in / 2; During this time interval, the rectifier tube Q 2b disconnect, i L2 and i Lr2 The current difference between them flows through the output capacitor. C 2b and release the output capacitor. C 2b The energy stored in it; When the time is [ t 9- t 10 At that time, the rectifier tube Q 1b and active switches Q 1c Conducts under ZVS conditions; rectifier diode Q 1b Flowing i L1 and i Lr1 Active switch Q 1c Flowing i Lr1 ; Filter inductor L 1 and filter inductor L The voltage across 2 is (- V o ),therefore i L1 and i L2 Linear descent; four paths in the ISC-RHB converter release energy to the load; the differential equation of the resonant network is obtained by (4); (4)。 5. A steady-state analysis method for a transformerless soft-switching high step-down ratio DC-DC converter, characterized in that, The steady-state analysis method includes performing inductor DC current analysis using the set conditions of the transformerless soft-switching high step-down ratio DC-DC converter as described in claim 1 and the control operation method as described in claim 4. Specifically, the set conditions are: 1) the output capacitor of the switch. C 1a - C 2d Ignore their charging and discharging times; 2)k= L r1 / L 1= L r2 / L 2,k<<1; 3) T s It is the switching cycle. DT s Indicates from t 1 to t 3 or t 6 to t 8 hours dT s Indicates from t 2 to t 2 + or t 6 to t 7 + The time.

6. The steady-state analysis method according to claim 5, characterized in that, The inductor DC current analysis is performed using the set conditions of the transformerless soft-switching high buck ratio DC-DC converter as described in claim 1. Specifically, the inductor DC current analysis is divided into three stages throughout the entire cycle. dT s 、( Dd ) T s (1-D) T s ; inductance L The average current of 1 is expressed as: (7) resonant capacitor C r1 In a steady state, the ampere-second balance is satisfied: (8) in I 1 represents the average current of the first phase. I Lr11 , I Lr12 and I Lr13 These represent three stages. L r1 The average current; As can be seen from formula (2), in dT s period, i Lr1 It increases approximately linearly; (9) in Indicator L The current ripple rate of 1, i.e. ; Combining formulas (7)-(9), calculate I L1 ; (10) Approximately, we obtain I L2 ; (11) From formulas (10) and (11), it can be seen that the duty cycle D The larger, L The smaller the current ratio in 1, L r1 The larger the proportion of current in the medium, the lower the proportion of current in the medium; when D When the current is 0.5, the output current is almost evenly divided into four paths, each carrying... I o / 4.

7. The steady-state analysis method according to claim 5, characterized in that, Waveform derivation is performed using the setting conditions of the transformerless soft-switching high buck ratio DC-DC converter as described in claim 1. Specifically, the waveform derivation is as follows: When the time is [ t 0, t 1] When: Assuming t 0 i Lr1 and v Cr1 The values ​​are respectively i Lr1_0 and v Cr1_0 ; i Lr1 The direction is negative, resonant inductor L r1 With output capacitor C 1a and output capacitor C 1c Resonance, therefore, the output capacitor C 1a and output capacitor C 1c Discharging and charging separately; over time t At time 1, the current drops to zero under ideal conditions; Right now (12) When the time is [ t 1, t 2 + When: The differential equation of the resonant network in formula (2) is solved as follows: (13) in , ; When the time is [ t 2 + , t 3] When the resonance process ends, i Lr1_d (t) and v Cr1_d The value of (t) is [ t 2 + , t 3] The initial state of the resonance process during the period; by using i Lr1_1 and v Cr1_1 The solution to the differential equation in formula (3) is as follows: (14) in , ; When the time is [ t 3, t 4] When the resonance process ends i Lr1_D (t) and v Cr1_D The value of (t) is [ t 3, t 4] The initial state of the resonance process during this interval; V 1b The average value is ( V in / 2- v Cr1_2 ) / 2, and obtain L r1 The average voltage across the two ends is –( V in / 4+ v Cr1_2 / 2- V o ),therefore, i Lr1 Linear descent; assumption i Lr1 exist t 4 hours later i Lr1_3 ;Right now (15) in i Lr1_3 and v Cr1_3 They represent t 4 moments i Lr1 and v Cr1 value, t dead Indicates dead time; When the time is [ t 4, t 10 When: The differential equation in formula (4) is solved as follows: (16) in , ; In a steady state, at the beginning of the switching cycle t 0 i Lr1 and v Cr1 The value at the end of the switching cycle t 10 The values ​​are the same, that is: (17) (18)。 8. The steady-state analysis method according to claim 7, characterized in that, The voltage conversion ratio is derived using the setting conditions of the transformerless soft-switching high step-down ratio DC-DC converter as described in claim 1. Specifically, the voltage conversion ratio is derived based on volt-second balance and the filter inductor... L 1 and L 2. The average voltage over one switching cycle is zero; this is achieved by calculating the average switching node voltage over one switching cycle. v ds1b To calculate the output voltage; node voltages are only calculated during time intervals. t 2 + - t 3 is non-zero; Time interval t 2 + - t The equivalent circuit of 3 is used for calculation; (19) because L r1 << L 1, v Cr1 By resonant capacitor C r1 The average voltage on is expressed as ( v Cr1_1 + v Cr1_2 ) / 2; Therefore, the expression in (19) is simplified; (20) start time and end time i Lr1 They are respectively i Lr1_1 and i Lr1_2 Therefore, by combining formula (10), the following expression is obtained; (21) By combining formulas (18), (20), and (21), different output currents are obtained. I o Resonant parameters and resonant inductor L r1 Resonant capacitor C r1 Voltage conversion ratio of downconverter M = V o / V in , M Calculated in MATLAB.

9. The steady-state analysis method according to claim 5, characterized in that, ZVS conditions and resonant parameters are designed using the setting conditions of the transformerless soft-switching high buck ratio DC-DC converter as described in claim 1. Specifically, the ZVS conditions and resonant parameter design aims to ensure active switching... Q 1a Achieving ZVS under different input voltages and different load currents. i Lr1_0 It should be negative enough; rectifier tube Q 2d The voltage on it is zero, active switch Q 2c Conduction, therefore the rectifier tube Q 1d and V o Because they are connected in parallel, the resonant current will not flow through the rectifier diodes. Q 1d The resonant current has two loops, one from the resonant inductor. L r1 and resonant capacitor C r1 Starting from, flowing through the output capacitor C 1a After passing through the capacitor C 1. Rectifier tube Q 2d Active switches Q 2c , V o Then from the rectifier tube Q 1b Return; another from L r1 and resonant capacitor C r1 Starting from, flowing through the output capacitor C 1c Flowing through V o and from the rectifier tube Q 1b return; L r1 With output capacitor C 1a and output capacitor C 1c Resonance, output capacitor C 1a from V in / 2 Discharges to zero, output capacitor C 1c From zero charging to V in / 2; To ensure the active switch Q 1a The ZVS operation should satisfy formula (22); (22) Similarly, L r2 With output capacitor C 1d Output capacitor C 2a Output capacitor C 2c Output capacitor C 2d Resonance, therefore, the output capacitor C 2a Discharge, output capacitor C 1d Output capacitor C 1c Output capacitor C 2c Charging; to ensure active switching Q 2a The ZVS operation should satisfy formula (23), where i Lr2_0 Indicates rectifier tube Q 2b and active switches Q 2c Resonant current during turn-off i Lr2 , V 2c and V 2d These represent the active switches during the dead time. Q 2c and rectifier tube Q 2d The voltage on; (23) Comparing formulas (22) and (23), we find that the active switch... Q 2a Compared to active switches Q 1a Soft switching is more difficult to achieve; if ZVS is not achieved, the resonant network must be adjusted to obtain lower [voltage / temperature]. i Lr1_0 or i Lr2_0 ; For active switches Q 1c Because when the active switch Q 1a and rectifier tube Q 1d When shut down i Lr1 The active switch reaches its maximum value. Q 1c ZVS is easier to implement with active switches. Q 2c This is also true; to ensure active switching Q 1c and active switches Q 2c The ZVS operation should satisfy formulas (24) and (25) respectively; rectifier tube Q 1b rectifier tube Q 1d rectifier tube Q 2b rectifier tube Q 2d It is a rectifier switch; as long as the dead time is set properly, soft switching can be achieved. (24) (25)。 10. The steady-state analysis method according to claim 9, characterized in that, In addition to meeting the requirements of soft switching, the selection of resonant parameters should also satisfy the minimum turn-off current to reduce switching losses and improve system efficiency; considering soft switching and losses, the same f r Down, D The larger, i Lr1_0 More negative; same D Down, f r The lower, i Lr1_0 The more negative; that is, by increasing the resonant capacitor. C r To obtain more negative i Lr1_0 and i Lr2_0 ,vice versa; I o The larger, the same D Under the conditions i Lr1_0 The more negative the value, the more likely it is to be true that if soft switching can be achieved under light load conditions, it can definitely be achieved under heavy load conditions, given the same set of parameters.

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