A method for fast matching of spatial index quadtree applied to layout pattern recognition

Abstract

The application discloses a fast matching method of spatial index quadtree applied to layout pattern recognition. The application firstly acquires a template to be matched, analyzes the template, acquires a layout by using a best layout graph in the template, performs preliminary matching, obtains a potential matching area, stores the potential matching area by using a spatial index tree Quadtree, greatly reduces the query time of pattern matching, finally performs accurate matching on the potential matching by using the template, and obtains a matching result completely same as or similar to the template. Compared with a Pattern Match method of an existing EDA company, the application improves the matching time by 95%. Therefore, when a layout pattern matching is used to search a bad point layout or a layout violating a design rule, the application can improve the layout pattern matching speed and accelerate the process research and development progress.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology and relates to a fast matching method for layout pattern recognition using a spatial index quadtree. Background Technology

[0002] Advances in semiconductor technology have led to higher standards for chip performance and energy efficiency. To achieve more compact, efficient, and energy-efficient chip designs, the manufacturing process requires further miniaturization of the patterns on the chip and the gaps between them. However, reducing the gaps may result in design spacing smaller than the wavelength of light, increasing the risk of defects. Identifying these potential defects during photolithography is crucial for improving product yield. Once a short circuit or open circuit in the photoresist pattern is detected—a defect—it needs to be quickly located and repaired.

[0003] In the wafer lithography process, once a defect is detected, the relevant pattern needs to be analyzed, and similar defect layouts need to be found in existing patterns. This process is called "layout pattern matching" and is a key step in semiconductor manufacturing to identify specific patterns. By analyzing the geometric patterns in the layout data file, regions similar to the defect can be identified. This technology can comprehensively locate all patterns that meet specific conditions, regardless of their size, orientation, or flip state.

[0004] Engineers need to identify layout patterns that may lead to process problems and optimize and adjust the layout design accordingly to prevent these issues from occurring. Traditional layout pattern matching methods rely on design rule checks, using EDA tools to find similar or identical patterns in the layout. This method uses a line scan approach, requiring two acquisitions of the layout file: first the layout in the x-direction, then the layout in the y-direction, to determine the matching template. The runtime of this method is affected by various factors, including the number of layout acquisitions, equipment configuration, and the number of EDA tool cores. For a layout coordinate file containing a large number of layout graphics, pattern matching using EDA tools can be very time-consuming. If a large number of defects need to be found and corrected in the layout, pattern matching using EDA tools can be extremely time-consuming, which is a bottleneck in process development. Therefore, developing a fast pattern matching method is crucial for reducing defect detection time and accelerating process development. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing technologies by proposing a fast matching method for layout pattern recognition using a spatial index quadtree. Compared with traditional layout pattern matching based on line scanning, this method only requires acquiring the layout once, significantly reducing the running time while ensuring 100% accuracy, thus accelerating the progress of process development.

[0006] In one aspect, the present invention provides a fast matching method for applying a spatial index quadtree to layout pattern recognition, comprising:

[0007] S1: The layout graphic coordinate file containing the coordinates of each layout graphic A0 and its vertices;

[0008] S2: Identify the best matching graphic layout:

[0009] The template file identifies the layout graphic that best matches the size of the query window Q area and is denoted as the best matching layout graphic B1. The template file contains a query window Q and various layout graphics B0 of different shapes and sizes, all of which are located within the query window.

[0010] The specific method for selecting the best matching layout graphic B1 in the template file is as follows:

[0011] First, frequency statistics are performed on all vertex coordinates in the template file, and the vertex coordinate with the fewest occurrences is identified and marked as P0. Then, among all layout graphics that do not overlap with the query window Q, the graphics containing vertex coordinate P0 are identified, and one of them is randomly selected as the best matching layout graphic B1.

[0012] S3: Initial Matching and Determination of Potential Matching Regions:

[0013] The layout graphic B1 is used to perform a preliminary match on the layout graphic coordinate file, and potential matching areas are determined based on the area size of the query window Q; specifically:

[0014] Using the position information of the best-matching layout graphic B1 in the query window Q, the layout graphic is located and identified as A0, which is identical to the best-matching layout graphic B1. This A0 is denoted as A1. The query window containing A1 is the potential matching area.

[0015] S4: Construct a Quadtree according to the Quadtree spatial indexing rules.

[0016] 1. Construct a two-dimensional spatial region.

[0017] Find the smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) among all potential matching regions. The smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) constitute a two-dimensional spatial region containing all potential matching regions.

[0018] 2. Construct the root node of the Quadtree

[0019] The root node is positioned at (bbox0, bbox1), with a height of |bbox3-bbox1| and a width of |bbox2-bbox0|. Each parent node has four child nodes, each representing one of the four quadrants of the area it represents.

[0020] 3. Determine the node position of the potential matching region in the Quadtree based on its position in the two-dimensional spatial region; specifically:

[0021] Starting from the root node, traverse each potential matching region and perform the following iteration operation:

[0022] (a) Determine the current parent node I i The four child nodes I i+1 Is it full? If not, assign the potential matching region to the corresponding child node I. i+1 If so, proceed to step (b); i represents the level of the Quadtree, i = 0 when it is the root node;

[0023] (b) Take the child node at the corresponding position of the potential matching region as the parent node, and then return to step (a);

[0024] The above node I i If no child nodes exist beforehand, the current node needs to be split: the four quadrants of the current node's region are transformed into new child nodes of the current node.

[0025] S5: Traverse the map:

[0026] Based on each node of the Quadtree, traverse all layout patterns A0 of the wafer layout once, filter out layout patterns A2 that overlap with the Quadtree, and store these layout patterns A2 in the potential matching region list L; specifically:

[0027] First, the query begins from the root node of the quadtree. Then, based on the location of potential matching regions, the search quadrant is determined. The query continues recursively downwards through the tree structure until the queried node is found, or the search of all nodes is complete.

[0028] S6: Edge Trimming Operation: Trimming the edges of the layout graphics in the list, retaining the portions that intersect with potential matching areas; specifically:

[0029] Based on the potential matching region, perform edge trimming on the parts of all layout graphics A2 in list L that exceed the boundary, take only the parts that intersect with the potential matching region, and retain the layout graphics parts inside the potential matching region to obtain a new layout graphic, denoted as C;

[0030] S7: Verification and Matching Completed: By correcting and verifying the vertex coordinates of the layout graphic C, the regions that were successfully or unsuccessfully matched are determined, and the coordinates of the successfully matched regions are obtained accordingly; specifically:

[0031] 7-1 Subtract the offset from the vertex coordinates of the layout graphic C to obtain the corrected vertex coordinates of the layout graphic C;

[0032] 7-2 Determine whether the corrected vertex coordinates of the layout graphic C are exactly the same as the vertex coordinates of all layout graphics B0 in the template file. If they are the same, the current potential matching area is considered to be a successfully matched area and saved to list W; if they are not the same, the current potential matching area is considered to be a failed matching area and deleted.

[0033] 7-3 Based on list W, obtain the coordinates of the lower left and upper right corners of the successfully matched areas in the current map that are exactly the same as or similar to the template;

[0034] The offset is the displacement between the lower left corner coordinates of the potential matching region and the lower left corner coordinates of the query window Q;

[0035] Preferably, if the template file also includes a layout graphic A3 with variable edges, then after determining that the matching has failed, step 7-2 needs to further determine whether the corrected vertex coordinates of the layout graphic C still fall within the range of the variable edges of the layout graphic A3. If so, the current candidate region is considered to be a candidate region that has been successfully matched; if not, the current candidate region is considered to be a candidate region that has failed to match, and the current candidate region is deleted.

[0036] In a second aspect, the present invention provides a computing device, including a memory and a processor, wherein the memory stores executable code, and the processor executes the executable code to implement the method described thereon.

[0037] The beneficial effects of this invention are as follows:

[0038] This invention leverages the spatial indexing advantages of Quadtrees to significantly improve the speed and efficiency of layout pattern matching, reduce runtime during the process development phase, accelerate the development process, and ensure matching accuracy. Furthermore, this method can also effectively match layout graphics containing variable edges, enhancing its applicability and flexibility. Attached Figure Description

[0039] Figure 1 This is a flowchart of the layout pattern matching method of the present invention;

[0040] Figure 2 Quadtree, a spatial index used to store potential matching regions;

[0041] Figure 3The diagram shows eight template graphic types that can be matched by fast mode matching after rotation or flipping. The first row of the diagram shows templates after rotation of 0 degrees, 90 degrees, 180 degrees, and 270 degrees, and the second row shows templates after flipping along the y-axis and rotating 0 degrees, 90 degrees, 180 degrees, and 270 degrees.

[0042] Figure 4 To compare the three different types of template graphics used in the experiment, in (a) the layout graphic in the template does not intersect with the query window, in (b) the layout graphic in the template intersects with the query window, and in (c) the layout graphic in the template has variable edges. The dark blue layout graphic is the layout graphic with variable edges, and the black border is the query window. Detailed Implementation

[0043] The specific implementation details of the present invention will be described in more detail below with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, used only to facilitate and clearly illustrate the purpose of the embodiments of the present invention.

[0044] In existing technologies, traditional layout pattern matching methods rely on line scanning based on design rules. This method is time-consuming when performing bad pixel detection, which cannot meet the urgent needs of advanced process node development. To address this issue, this invention proposes an innovative fast pattern matching method. This method employs spatial indexing Quadtree technology, which quickly filters out layout graphics related to candidate regions through ordered storage in geospatial space, thereby significantly improving the speed of nearest neighbor search. This method not only maintains high accuracy but also significantly reduces the time required for layout matching. A quadtree is used, which is a tree-like data structure particularly suitable for two-dimensional spatial representation and partitioning. Each node of the quadtree is divided into four child nodes, representing four quadrant regions. The query efficiency of the quadtree varies with the uniformity of data distribution, and its average query time complexity is O(logN), where N is the number of elements.

[0045] like Figure 1As shown, the Quadtree spatial index structure is the core of this invention. Quadtree recursively divides a two-dimensional space into four quadrants: northeast, northwest, southwest, and southeast, constructing an efficient multi-level tree-like index structure. This structure effectively reduces query complexity when processing large-scale data, saves computational resources, and significantly improves query efficiency. This invention is implemented using a Quadtree class written in C++, utilizing its insert method to store the coordinate information of candidate regions into the index. When performing nearest neighbor search, the intersects method of the Quadtree class is called to traverse all map graphics, filtering out graphics that intersect with candidate regions, laying the foundation for further precise matching.

[0046] See Figure 2 The diagram illustrates the flowchart of a fast matching method for layout pattern recognition using a spatial indexed quadtree, as described in this invention. Layouts typically exist in GDS and OAS formats, storing the coordinates of the layout graphics. The method used in this invention directly obtains the coordinates from a layout graphic coordinate file that stores the coordinates of each layout graphic A0 and its vertices. This method is faster than directly obtaining the layout. Specifically:

[0047] S1: The layout graphic coordinate file containing the coordinates of each layout graphic A0 and its vertices; the layout graphic coordinate file is converted from a GDSII file.

[0048] S2: Identify the best matching graphic layout:

[0049] The template file identifies the layout graphic that best matches the size of the query window Q area and is denoted as the best matching layout graphic B1. The template file contains a query window Q and various layout graphics B0 of different shapes and sizes, all of which are located within the query window.

[0050] The specific method for selecting the best matching layout graphic B1 in the template file is as follows:

[0051] First, frequency statistics are performed on all vertex coordinates in the template file, and the vertex coordinate with the fewest occurrences is identified and marked as P0. Then, among all the layout graphics that do not overlap with the query window Q, the graphics containing vertex coordinate P0 are identified, and one of them is randomly selected as the best matching layout graphic B1, which prepares for obtaining candidate region coordinates in the next step of obtaining layout graphics.

[0052] S3: Initial Matching and Determination of Potential Matching Regions:

[0053] The layout graphic B1 is used to perform a preliminary match on the layout graphic coordinate file, and potential matching areas are determined based on the area size of the query window Q; specifically:

[0054] Using the position information of the best-matching layout graphic B1 in the query window Q, the layout graphic is located and identified as A0, which is identical to the best-matching layout graphic B1. This A0 is denoted as A1. The query window containing A1 is the potential matching area.

[0055] S4: Construct a Quadtree according to the Quadtree spatial indexing rules.

[0056] A Quadtree, using spatial indexing, is used to store potential matching regions. The `insert` method of the Quadtree class is used to add potential matching regions to the Quadtree. When adding potential matching regions, the Quadtree distributes them in an ordered manner according to their coordinates. The algorithm traverses the tree structure, finds a suitable node, and adds it to that position. If the tree is full, a split operation is performed, dividing the Quadtree node into four child nodes and reallocating the leaf nodes. This process ensures the balance and stability of the tree. When all potential matching regions are stored in the Quadtree, the Quadtree is a balanced tree.

[0057] 1. Construct a two-dimensional spatial region.

[0058] Find the smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) among all potential matching regions. The smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) constitute a two-dimensional spatial region containing all potential matching regions.

[0059] 2. Construct the root node of the Quadtree

[0060] The root node is positioned at (bbox0, bbox1), with a height of |bbox3-bbox1| and a width of |bbox2-bbox0|. Each parent node has four child nodes, each representing one of the four quadrants of the area it represents.

[0061] 3. Determine the node position of the potential matching region in the Quadtree based on its position in the two-dimensional spatial region; specifically:

[0062] Starting from the root node, traverse each potential matching region and perform the following iteration operation:

[0063] (a) Determine the current parent node I i The four child nodes I i+1 Is it full? If not, assign the potential matching region to the corresponding child node I. i+1If so, proceed to step (b); i represents the level of the Quadtree, i = 0 when it is the root node;

[0064] (b) Take the child node at the corresponding position of the potential matching region as the parent node, and then return to step (a);

[0065] The above node I i If no child nodes exist beforehand, the current node needs to be split: the four quadrants of the current node's region are transformed into new child nodes of the current node.

[0066] S5: Exact Match

[0067] Based on each node of the Quadtree, traverse all layout patterns A0 of the wafer layout once, filter out layout patterns A2 that overlap with the Quadtree, and store these layout patterns A2 in the potential matching region list L; specifically:

[0068] First, the query begins from the root node of the quadtree. Then, based on the location of potential matching regions, the search quadrant is determined. The query continues recursively downwards through the tree structure until the queried node is found, or the search of all nodes is complete.

[0069] This step leverages the advantage of Quadtree's nearest neighbor search, which has an average time complexity of O(log N), where N is the number of candidate regions. Compared to brute-force search's O(N), the time complexity is significantly reduced when N is large. Therefore, the query time for pattern matching can be greatly reduced. Edge trimming is performed on the layout graphics contained in the candidate regions, including only the parts that intersect with the query window. Finally, the layout graphics are compared with all layout graphics in the template; if they are identical, a match is successful.

[0070] S6: Edge Trimming Operation: Trimming the edges of the layout graphics in the list, retaining the portions that intersect with potential matching areas; specifically:

[0071] Based on the potential matching region, perform edge trimming on the parts of all layout graphics A2 in list L that exceed the boundary, take only the parts that intersect with the potential matching region, and retain the layout graphics parts inside the potential matching region to obtain a new layout graphic, denoted as C;

[0072] S7: Verification and Matching Completed: By correcting and verifying the vertex coordinates of the layout graphic C, the regions that were successfully or unsuccessfully matched are determined, and the coordinates of the successfully matched regions are obtained accordingly; specifically:

[0073] 7-1 Subtract the offset from the vertex coordinates of the layout graphic C to obtain the corrected vertex coordinates of the layout graphic C;

[0074] 7-2 Determine whether the corrected vertex coordinates of the layout graphic C are exactly the same as the vertex coordinates of all layout graphics B0 in the template file. If they are the same, the current potential matching area is considered to be a successfully matched area and saved to list W; if they are not the same, the current potential matching area is considered to be a failed matching area and deleted.

[0075] 7-3 Based on list W, obtain the coordinates of the lower left and upper right corners of the successfully matched areas in the current map that are exactly the same as or similar to the template;

[0076] The offset is the displacement between the lower left corner coordinates of the potential matching region and the lower left corner coordinates of the query window Q;

[0077] If the template file also includes a layout graphic A3 with variable edges, then after determining that the match has failed, step 7-2 needs to further determine whether the corrected vertex coordinates of the layout graphic C still fall within the range of the variable edges of the layout graphic A3. If so, the current candidate region is considered to be a candidate region with a successful match; if not, the current candidate region is considered to be a candidate region with a failed match, and the current candidate region is deleted.

[0078] Based on the above, the method of this invention mainly utilizes the advantage of the Quadtree spatial index for fast nearest neighbor lookup. Through filtering, a large number of spatial objects irrelevant to the query window are excluded, thereby improving the speed and efficiency of spatial operations. It stores potentially matching candidate regions in the layout, further improving query efficiency and significantly reducing runtime. This reduces development time during the defect detection phase of process development.

[0079] In addition, this implementation provides a comparison of runtime between Quadtree-based fast pattern matching and EDA's Pattern Match under the same operating configuration, using the same layout graphic with two million polygons and the same template, as shown in Table 1. The layout has two million polygons and a size of 14.5 MB.

[0080] Table 2 shows the comparison of runtime between the Quadtree-based fast pattern matching method of this invention and the existing EDA company's Pattern Match method under the same operating configuration and on the same layout and template. The layout has eight million polygons and a size of 290MB.

[0081] Compared to existing pattern matching methods used by EDA companies, this invention improves matching time by 95%. Therefore, when using pattern matching to find bad layouts or layouts that violate design rules, this invention can improve the speed of pattern matching and accelerate process development.

[0082] Table 1 Comparison of runtime for layout matching using different methods

[0083]

[0084] Table 2 Comparison of runtime for layout matching using different methods

[0085]

Claims

1. A fast matching method for spatial indexed quadtrees applied to layout pattern recognition, characterized in that... The method includes: S1: The layout graphic coordinate file containing the coordinates of each layout graphic A0 and its vertices; S2: Identify the best matching graphic layout: The layout graphic that best matches the size of the query window Q region is identified in the template file and denoted as the best matching layout graphic B1; specifically: First, count the frequency of all vertex coordinates in the template file and find the vertex coordinates that appear the least, marking them as P0; then, among all the layout graphics that do not overlap with the query window Q, find the graphics that contain vertex coordinates P0, and randomly select one of them as the best matching layout graphics B1. S3: Initial Matching and Determination of Potential Matching Regions: The best matching layout graphic B1 is used to perform a preliminary matching of the layout graphic coordinate file, and the potential matching area is determined according to the area size of the query window Q. S4: Based on the Quadtree spatial indexing rules, construct a Quadtree tree using potential matching regions as nodes; specifically: 4-1. Construct a two-dimensional spatial region; Find the smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) among all potential matching regions. The smallest bottom-left corner coordinate (bbox0, bbox1) and the largest top-right corner coordinate (bbox2, bbox3) constitute a two-dimensional spatial region containing all potential matching regions. 4-2. Construct the root node of the Quadtree Set the root node's position to (bbox0, bbox1), its height to |bbox3-bbox1|, and its width to |bbox2-bbox0|; each parent node's four child nodes represent the four quadrants of the area represented by the parent node. 4-3. Determine the node position of the potential matching region in the Quadtree based on its position in the two-dimensional spatial region; S5: Traverse the map: Based on each node of the Quadtree, traverse all layout graphics A0 of the wafer layout once, filter out layout graphics A2 that overlap with the Quadtree, and store these layout graphics A2 into the potential matching region corresponding list L; S6: Edge trimming operation: Trim the edges of the layout graphics in the list, retaining the parts that intersect with potential matching areas; S7: Verification and Matching Completed: By correcting and verifying the vertex coordinates of the layout graphic C, the regions that are successfully or unsuccessfully matched are determined, and the coordinates of the successfully matched regions are obtained accordingly.

2. The method according to claim 1, characterized in that, Step S3 is as follows: Using the position information of the best matching graphic B1 in the query window Q, the graphic A0 that is the same as the best matching graphic B1 is located in the graphic and identified as A1; the query window where A1 is located is the potential matching area.

3. The method according to claim 1, characterized in that, Step 4-3 specifically involves: Starting from the root node, traverse each potential matching region and perform the following iteration operation: (a) Determine the current parent node The four child nodes Is the region full? If not, divide the potential matching region into child nodes at the corresponding positions. If so, proceed to step (b); i represents the level of the Quadtree, i=0 when it is the root node; (b) Take the child node at the corresponding position of the potential matching region as the parent node, and then return to step (a); The above nodes If no child nodes exist beforehand, the current node needs to be split: the four quadrants of the current node's region are transformed into new child nodes of the current node.

4. The method according to claim 1, characterized in that, Step S5 is as follows: First, start the query from the root node of the quadtree. Then, determine the search quadrant region based on the location of the potential matching region. Continue to search the tree structure downwards using recursive queries until the queried node is found or the search of all nodes ends.

5. The method according to claim 1, characterized in that, Step S6 is as follows: Based on the potential matching region, perform edge trimming on the parts of all layout graphics A2 in list L that exceed the boundary, and only take the parts that intersect with the potential matching region. Keep the layout graphics parts inside the potential matching region to obtain a new layout graphic, denoted as C.

6. The method according to claim 1, characterized in that, Step S7 is as follows: 7-1 Subtract the offset from the vertex coordinates of the layout graphic C to obtain the corrected vertex coordinates of the layout graphic C; 7-2 Determine whether the corrected vertex coordinates of the layout graphic C are exactly the same as the vertex coordinates of all layout graphics B0 in the template file. If they are the same, the current potential matching area is considered to be a successfully matched area and saved to list W; if they are not the same, the current potential matching area is considered to be a failed matching area and deleted. 7-3 Based on list W, obtain the coordinates of the lower left and upper right corners of the successfully matched areas in the current map that are exactly the same as or similar to the template; The offset is the displacement between the lower left corner coordinates of the potential matching region and the lower left corner coordinates of the query window Q.

7. The method according to claim 1, characterized in that, If the template file also includes a layout graphic A3 with variable edges, then after determining that the match has failed, step 7-2 needs to further determine whether the corrected vertex coordinates of the layout graphic C still fall within the range of the variable edges of the layout graphic A3. If so, the current candidate region is considered to be a candidate region with a successful match; if not, the current candidate region is considered to be a candidate region with a failed match, and the current candidate region is deleted.

8. A computing device comprising a memory and a processor, wherein the memory stores executable code, and the processor, when executing the executable code, implements the method of any one of claims 1-7.

Images