A method for manufacturing a crystalline silicon-wide band gap compound heterojunction solar cell
Patent Information
- Application Number
- CN202410987631.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-23
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2044-07-23
AI Technical Summary
先前的研究无法精确调制功函数,从而提高载流子选择性和传输能力困难
相比于通过生长界面层,例如生长氧化硅、氧化铝和本征氢化非晶硅来钝化硅表面并抑制硅表面与过渡金属氧化物之间的氧化还原反应,本发明在原子层沉积过渡金属氧化物的过程当中进行原位的氢氧等离子体处理,精确的调控TMOs材料本身的功函数,实现有效的材料改性同时,并对c-Si/TMOs界面钝化接触特性优化。一方面,HPT/FPT处理有效的引入氢/氟原子,在c-Si/TMOs的界面氢/氟原子与硅键接,钝化额外的硅表面悬挂键,实现良好的化学钝化,同时界面氢/氟原子与悬挂键键接之后促进界面的电子往硅一侧移动,形成相对于硅由外指向内的电场,消除界面偶极子的同时,使硅表面一侧能带向上弯曲,增强空穴的传输效果。另一方面,OPT处理有效的减少VO含量,增加TMOs的功函数,使硅表面一侧能带向上弯曲量更大,场钝化效果增强,钝化接触特性改善。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of solar cells, and more specifically to a method for preparing a crystalline silicon-wide bandgap compound heterojunction solar cell. Background Technology
[0002] Silicon-based solar cells dominate the photovoltaic market, with PERC (Passivated Emitter and Rear Solar Cell) being the dominant type. However, due to the direct contact between the metal electrode and the silicon substrate in the rear contact area, severe carrier recombination occurs in this region, limiting its theoretical efficiency to around 24.5%. Industrially, efforts have been made to continuously reduce the contact area to bring the power conversion efficiency (PCE) closer to this limit. Further efficiency improvements require new solar cell technologies. Therefore, TOPCon (Tunnel Oxide Passivated Contact) and SHJ (Silicon Hereto-junction) solar cells, based on passivated contact technology, have emerged and are gradually replacing PERC cells to further improve PCE. However, the use of amorphous silicon and transparent conductive oxides (typically indium tin oxide) in SHJ cells and the use of doped polycrystalline silicon in TOPCon cells lead to severe parasitic absorption, resulting in low short-circuit current density. To improve the efficiency of JSC (Joint Structural Cell) at a lower cost, researchers are focusing on doped materials with wide bandgap and high work function, particularly transition metal oxides (TMOs), to replace p-type doped amorphous silicon (a-Si:H(p)) or p-type doped polycrystalline silicon layers as novel hole transport layers. TMOs with high work function and wide bandgap can induce upward band bending on the c-Si surface, thereby achieving hole transport. The high work function of TMOs and bandgap matching (the conduction band energy of TMOs is similar to that of c-Si) are key to achieving excellent hole transport characteristics. Furthermore, the work function is closely related to the oxygen vacancy defects in the TMOs themselves; more oxygen vacancies result in a lower work function, while fewer oxygen vacancy defects result in a higher work function. Transition metal oxides used as hole transport layers mainly include molybdenum oxide (MoO₂). X ), Vanadium oxide (V2O) X ), tungsten oxide (WO) X )wait.
[0003] MoO X Considered the most successful hole transport layer to date, it possesses a high work function (>5 eV) and a wide bandgap (~3.0 eV). The conversion efficiency has increased from an initial 16.7% to a current high of 23.83%, with its interface passivation layer being plasma-processed intrinsic hydrogenated amorphous silicon. (The last sentence appears to be incomplete and possibly refers to MoO2.) XIn comparison, V2O X With a higher work function, it can generate a larger upward band bend on the c-Si surface, resulting in better hole transport characteristics. Vanadium oxide directly grown on the silicon wafer surface achieves a device efficiency of 19.77%, which increases to 21.6% after intercalation with intrinsic hydrogenated amorphous silicon. Similarly, by growing vanadium oxide on c-Si / tungsten oxide (WO3)... X Introducing an intrinsic hydrogenated amorphous silicon interface layer between the two layers improves efficiency to 17.9%. In addition, the hole transport layer consists of cuprous oxide (Cu₂O) and nickel oxide (NiO). X ) respectively grown on alumina (Al2O X ) and silicon dioxide (SiO) X Hole passivation contact stacks are formed on the interface passivation layer, with efficiencies of 20.35% and 19.2%, respectively.
[0004] Through the development of transition metal oxides (TMOs) for hole transport layers, the main methods to improve device efficiency focus on adding an interface passivation layer and pre-treating the passivation layer to improve passivation contact properties. Improving the PCE of TMO-based hole transport layer devices hinges on enhancing the carrier selectivity or transport capability of the TMOs, which depends on the work function and band structure of the TMO material itself. The work function and band structure are closely related to external excitation and stoichiometry / defects, such as the deposition process and oxygen vacancies (V0.05). O Oxygen vacancies and ion doping have been shown in previous studies to improve the conductivity or electron selectivity of TMOs, but reduce their high work function and hole selectivity, due to the inability to modulate V0. O The lack of effective modification of the TMO material itself is due to the precise modulation of the work function by the content of doped atoms.
[0005] Currently, improving the PCE (Potential Carrier Equivalence) of hole transport layer devices based on TMOs mainly focuses on interface research, specifically adding an interface passivation layer between c-Si and TMOs and pretreating the passivation layer to improve passivation contact properties. Interface research aims to reduce redox reactions between TMOs and the silicon surface, reduce oxygen vacancies in the TMOs themselves, and prevent a decrease in the work function of the TMOs. However, improving the PCE of hole transport layers based on TMOs primarily involves improving the carrier selectivity or transport capability of the TMO materials themselves. This capability is highly dependent on the material's work function and band structure, which are closely related to external excitation and stoichiometry / defects, such as deposition processes and oxygen vacancies (V0.05). O (and ion doping.) Previous studies have been unable to precisely modulate the work function, making it difficult to improve carrier selectivity and transport capability. Summary of the Invention
[0006] To overcome the problems existing in the prior art, this invention provides a method for controlling the work function through in-situ plasma treatment of the hole transport layer and a method for fabricating solar cells using the same. This method is universally applicable to TMOs that serve as hole transport layers, such as MoO2. X WO X and V2O X Etc. Specifically, V2O is grown by atomic layer deposition. X Taking in-situ HPT / OPT / FPT treatment as an example, after n cycles of VTIP with deionized water precursor (i.e., atomic layer deposition of a certain thickness of V2O) X Afterwards, an HPT / OPT / FPT process is performed, and V2O is adjusted by changing the value of n. X The work function of the thin film, simultaneously modulating c-Si / V2O X Passivation characteristics between interfaces. Ultimately, ALD-V2O X In-situ HPT / OPT / FPT treatment improves c-Si / V2O X The passivated contact characteristics of hole transport stacks improve V2O-based performance. X The device conversion efficiency of thin-film solar cells. In addition, this method can be combined with interface passivation processes to further improve device efficiency. The introduction of hydrogen / oxygen / fluorine can optimize the passivation contact characteristics of the c-Si / TMOs interface, i.e., improve chemical passivation and field-effect passivation; the introduction of hydrogen / oxygen / fluorine can achieve a balance between the work function and conductivity of the TMOs material itself, optimizing carrier transport performance.
[0007] This invention fabricates a high-efficiency crystalline silicon / compound heterojunction solar cell based on a hydrogen / oxygen / fluorination TMOs process: the hole transport stack on the back surface of the crystalline silicon / compound heterojunction solar cell is c-Si(p) / TMOs, specifically c-Si(p) / HPT / OPT / FPT-V2O in this invention. X (Hydrogen / oxygen / fluorinated vanadium oxide), compared to c-Si(p) / i-V2O X (Intrinsic vanadium oxide) significantly improves photoelectric parameters and greatly enhances device conversion efficiency.
[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows: The first aspect of this invention provides a method for in-situ modification of transition metal oxides, comprising the following steps: A P-type silicon wafer is placed in a plasma-enhanced atomic layer deposition chamber, and pure transition metal oxides are prepared by atomic layer deposition. After n cycles of pure transition metal oxides, a modified gas plasma treatment is added once, which is one large cycle. Then, the large cycle is repeated N times to achieve in-situ modification of the transition metal oxides. The modified gas is one of the following: hydrogen-containing gas, oxygen-containing gas, or fluorine-containing gas.
[0009] Preferably, the P-type silicon wafer has a thickness of 160 μm and a resistivity of 0.6-1.0 ohm·cm.
[0010] Preferably, the P-type silicon wafer needs to be cleaned first. The cleaning steps include tetramethylammonium hydroxide (TMAH) cleaning and standard RCA cleaning. More preferably, the TMAH cleaning steps are as follows: 25% TMAH is placed in a water bath at 90°C. Once the TMAH solution reaches 70°C, the basket containing the P-type silicon wafer is immersed in the TMAH for 10 minutes. The standard RCA cleaning steps are as follows: After TMAH cleaning, the P-type silicon wafer is removed, rinsed with deionized water, and then immersed in an RCA1 solution at 70-80°C for 10 minutes. It is then removed, immersed in a 2% hydrofluoric acid (HF) solution for 1 minute, removed, immersed in an RCA2 solution at 70-80°C, removed, and immersed in a 2% HF solution for further cleaning. The P-type silicon wafer is then removed and set aside for use. During each removal, the P-type silicon wafer needs to be rinsed with deionized water three times before proceeding to the next step.
[0011] Preferably, the preparation process of the pure transition metal oxide is as follows: a P-type silicon wafer is placed in a plasma-enhanced atomic layer deposition chamber at a temperature of 100-350°C, the chamber is evacuated by turning on the mechanical pump, and a pure transition metal oxide film is grown through n cycles of transition metal precursor and oxygen precursor; the transition metal precursor is one of hexacarbonylmolybdenum, hexacarbonyltungsten, triisopropoxyvanadium oxide, dimethylaminomolybdenum, tricarbonylcycloheptatrienylmolybdenum, vanadium ethyl esteramide, vanadium acetate, and dimethylethylenediaminevanadium; the oxygen precursor is deionized water or ozone; more preferably, the chamber is evacuated to a vacuum level below 5E-2 torr.
[0012] Preferably, the value of n is 5-100, and the value of N is 1-40.
[0013] More preferably, when the modified gas is a hydrogen-containing gas, the value of n is 5-10 and the value of N is 10-20; when the modified gas is oxygen, the value of n is 40-60 and the value of N is 1-3.
[0014] Preferably, the hydrogen-containing gas is selected from argon-hydrogen mixture, nitrogen-hydrogen mixture, and hydrogen; when the hydrogen-containing gas is argon-hydrogen mixture or nitrogen-hydrogen mixture, the hydrogen content is 10%.
[0015] Preferably, the fluorine-containing gas is selected from carbon tetrafluoride, nitrogen trifluoride, and sulfur hexafluoride.
[0016] Preferably, the flow rate of the modified gas plasma treatment is 100-140 sccm, the power is 20-250W, and the duration of one modified gas plasma treatment is 0.5-1200s.
[0017] More preferably, when the modified gas is a hydrogen-containing gas, the time for one modified gas plasma treatment is 2-4 seconds; when the modified gas is oxygen, the time for one modified gas plasma treatment is 1-3 seconds.
[0018] A second aspect of the present invention provides a heterojunction solar cell, the structure of which includes a hole transport layer, the hole transport layer being prepared by the aforementioned in-situ modification method of transition metal oxides.
[0019] Preferably, the structure of the heterojunction solar cell, from bottom to top, includes: a full-area back electrode, a hole transport layer, a silicon substrate, an N+ / N++ doped layer, a passivation layer, an anti-reflection layer, and a gate electrode; The N+ / N++ doped layer is an N++ doped layer in the region corresponding to the gate electrode, and the rest of the region is an N+ doped layer.
[0020] A third aspect of the present invention provides a method for fabricating the heterojunction solar cell described above, comprising the following steps: (1) The front surface of the P-type silicon substrate is texturized and the back surface is polished; (2) A phosphorus diffusion layer is formed on the front surface of the substrate to form an N+ doped layer and a pn junction is formed; the metal gate area on the front surface of the silicon substrate is subjected to laser N-type heavy doping to form an N++ doped layer. (3) Remove the PSG layer from the edge and back of the substrate, and polish the back of the substrate at the same time; (4) Oxidize the front and back surfaces of the substrate to generate silicon dioxide, and remove the silicon dioxide from the front surface; (5) A passivation layer and an antireflection layer are sequentially deposited on the front surface of the substrate; the gate electrode is obtained by screen printing on the corresponding N++ doped region on the antireflection layer. (6) Remove silicon dioxide from the back surface of the substrate; (7) A hole transport layer is prepared on the back surface of the substrate, wherein the hole transport layer is prepared by the in-situ modification method of the transition metal oxide described above; (8) Ag is thermally vaporized on the hole transport layer to form the back full-area electrode.
[0021] Preferably, in step (2), the phosphorus diffusion is liquid POCl3, and the phosphorus doping concentration is 1E20-1E22 atoms / cm³. 3 The doping depth (pn junction) is 150-300 nm.
[0022] Preferably, in step (2), the laser-doped N-type heavy doping is laser-doped phosphorus with a doping concentration of 1E22-1E23 atoms / cm³. 3 .
[0023] Preferably, in step (3), HF is used to remove the PSG layer.
[0024] Preferably, in step (4), the silicon dioxide is grown by thermal oxidation, and the specific steps are as follows: the substrate is placed in an oxidation furnace at 740-760°C, nitrogen and oxygen gas are introduced, and the oxidation time is 28-32 minutes.
[0025] Preferably, in step (6), HF is used to remove silica, and the concentration of HF is 2-5 wt%.
[0026] Preferably, the passivation layer has a thickness of 10-20 nm, the antireflection layer has a thickness of 60-80 nm, the hole transport layer has a thickness of 2-13 nm, and the back full-area electrode has a thickness of 100-1000 nm.
[0027] Preferably, the passivation layer is made of aluminum oxide; the antireflection layer is made of silicon nitride.
[0028] Compared with the prior art, the beneficial effects of the present invention are: Compared to passivating the silicon surface and suppressing redox reactions between the silicon surface and transition metal oxides by growing interface layers, such as silicon oxide, aluminum oxide, and intrinsic hydrogenated amorphous silicon, this invention performs in-situ hydrogen-oxygen plasma treatment during the atomic layer deposition of transition metal oxides. This precisely controls the work function of the TMOs material itself, achieving effective material modification while optimizing the passivation contact characteristics of the c-Si / TMOs interface. On one hand, HPT / FPT treatment effectively introduces hydrogen / fluorine atoms, which bond with silicon at the c-Si / TMOs interface, passivating additional dangling bonds on the silicon surface and achieving good chemical passivation. Simultaneously, the bonding of interface hydrogen / fluorine atoms with dangling bonds promotes the movement of electrons towards the silicon side, forming an electric field pointing inward relative to silicon. This eliminates interface dipoles and causes the energy bands on the silicon surface to bend upward, enhancing hole transport. On the other hand, OPT treatment effectively reduces V... O The increased content of TMOs increases the work function of TMOs, resulting in a greater upward bending of the energy band on one side of the silicon surface, enhanced field passivation effect, and improved passivation contact characteristics.
[0029] In summary, this invention achieves in-situ hydrogen / oxygen / fluorine plasma treatment of atomic layer deposition (ALT) transition metal oxides, introducing hydrogen / fluorine atoms to enhance chemical passivation and field-effect passivation at the interface. Simultaneously, it achieves in-situ oxygen plasma treatment of ALT transition metal oxides, increasing the work function of TMOs materials and enhancing interfacial field-effect passivation. Furthermore, HPT treatment improves the conversion efficiency of crystalline silicon / compound heterojunction solar cell devices. Attached Figure Description
[0030] Figure 1 For passivation contact performance with different HPT ratios and different HPT times; Figure 2 The passivation contact performance for different OPT treatment times; Figure 3 This is a structural diagram of the heterojunction solar cell of the present invention; Figure 4 JV curves for solar cells with intrinsic vanadium oxide and vanadium hydrogen oxide as hole transport layers; Appendix Figure 3 In the diagram, 1-gate electrode, 2-N++ heavily doped layer, 3-antireflection layer, 4-passivation layer, 5-N+ doped layer, 6-substrate, 7-hole transport layer, 8-full-area electrode. Detailed Implementation
[0031] The specific embodiments of the present invention will be further described below. It should be noted that these descriptions are for the purpose of aiding understanding the present invention, but do not constitute a limitation thereof. Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0032] Unless otherwise specified, the experimental methods used in the following embodiments are conventional methods, and the experimental materials used in the following embodiments are all available through conventional commercial channels.
[0033] Example 1 With V2O X For example, this embodiment provides a method for in-situ hydrogen plasma treatment of atomic layer deposition TMOs, including the following steps: (1) TMAH cleaning: Cut the double-sided polished crystalline silicon substrate (P-type silicon wafer, resistivity 0.6~1.0 ohm·cm, thickness 160um) into 4cm*4cm squares, place them in a flower basket, and immerse the silicon wafers in a 90℃ water bath heated TMAH solution for 10min (25% aqueous solution). Remove the silicon wafers and clean them three times with deionized water for later use. (2) RCA cleaning: The P-type silicon wafer cleaned in step (1) is immersed in RCA1 solution heated in an 80°C water bath (50ml ammonia water + 50ml hydrogen peroxide + 300ml deionized water) for 10 minutes. After cleaning, it is taken out and rinsed three times with deionized water. Then it is immersed in 2% HF solution for 1 minute. After cleaning, it is taken out and rinsed three times with deionized water. Then it is immersed in RCA2 solution heated in an 80°C water bath (60ml ammonia water + 60ml hydrochloric acid + 300ml deionized water) for 10 minutes. After cleaning, it is taken out and rinsed three times with deionized water. Then it is immersed in 2% HF solution for 1 minute. After cleaning, it is taken out and rinsed three times with deionized water for use. (3) Atomic layer deposition of V2O X Thin film: The P-type silicon wafer, after the above cleaning process, is placed in a PEALD chamber and evacuated to 5E-2 torr. Pure V2O is grown through n cycles of vanadium triisopropoxy oxide and deionized water precursor. X Thin film, intrinsic vanadium oxide thin film deposited and fixed for n (5 / 10 / 25 / 50 / 100) cycles; (4) In-situ hydrogen plasma treatment with a fixed total number of cycles: After depositing the intrinsic vanadium oxide film for a fixed number of n cycles, an in-situ hydrogen plasma treatment is performed. At this time, the gas is an argon-hydrogen mixture of Ar:H2=90%:10%, the gas flow rate is 120sccm, the plasma power is 70W, and the plasma treatment time is 3s. The deposition of intrinsic vanadium oxide for a fixed number of n (5 / 10 / 25 / 50 / 100) plus one hydrogen plasma treatment is taken as a small cycle. The small cycle is performed for N (1 / 2 / 4 / 10 / 20) large cycles, and the total number of cycles is 100 cycles (in terms of n). The film thickness is about 6nm. A passivation test sample is made by growing hydrogenated vanadium oxide film on both sides of a P-type silicon wafer substrate. A contact test sample is made by growing hydrogenated vanadium oxide film on one side of a P-type silicon wafer substrate and then growing silver (Ag) of 300nm~500nm on the hydrogenated vanadium oxide film using a transmission line model (TLM) metal mask. (5) In-situ hydrogen plasma treatment with a fixed doping ratio: i.e., the doping ratio is n:1=5:1, the plasma treatment time is (1 / 3 / 4.5 / 6 / 10s), and a large cycle of N=20 is performed. The total number of cycles is 100 cycles, and the film thickness is about 6nm. A passivation test sample is made by growing vanadium hydrogen oxide film on both sides of a P-type silicon wafer substrate. A vanadium hydrogen oxide film is grown on one side of a P-type silicon wafer substrate, and then Ag of 300nm~500nm is grown on the vanadium hydrogen oxide film using a TLM metal mask to make a contact test sample.
[0034] Passivated contact testing: Minority carrier lifetime testing equipment (WCT-120) tests the hidden open circuit voltage (iV). OCThe four-probe method was used to test the contact resistance (ρ) and the TLM method was used to extract the contact resistance. c );like Figure 1 As shown, for different HPT ratio variables, the iV of 6nm intrinsic vanadium oxide without HPT treatment is... OC It is 609.1mV, ρ c 47 mΩ·cm 2 After HPT treatment, as the HPT ratio increases, passivation first increases and then decreases, while contact first decreases and then increases, especially when the HPT ratio is 5:1. OC It is 654.9mV, ρ C 43mΩ·cm 2 For different HPT processing time variables, after HPT processing, passivation gradually increases with increasing HPT time, while overall contact first decreases and then increases, especially for HPT time of 3s, iV OC It is 654.6mV, ρ C 43mΩ·cm 2 Compared with the untreated samples, the passivation contact performance of samples treated with different HPT ratios was improved. The passivation of samples treated with different HPT times was also improved. The contact resistance first decreased and then increased, which may be related to the decrease in the work function of vanadium hydrogen oxide itself. However, in general, the passivation contact performance of c-Si / TMOs stacks can be improved by adjusting the HPT ratio and time.
[0035] Example 2 With V2O X For example, this invention provides a method for in-situ oxygen plasma treatment of atomic layer deposition TMOs, comprising the following steps: (1) TMAH cleaning: Cut the double-sided polished crystalline silicon substrate (P-type silicon wafer, resistivity 0.6~1.0 ohm·cm, thickness 160um) into 4cm*4cm squares, place them in a flower basket, and immerse the silicon wafers in a 90℃ water bath heated TMAH solution for 10min (25% aqueous solution). Remove the silicon wafers and clean them three times with deionized water for later use. (2) RCA cleaning: The P-type silicon wafers cleaned in step 1 are immersed in RCA1 solution (50ml ammonia water + 50ml hydrogen peroxide + 300ml deionized water) heated in an 80℃ water bath for 10 minutes. After cleaning, they are taken out and rinsed three times with deionized water. Then, they are immersed in 2% HF solution for 1 minute. After cleaning, they are taken out and rinsed three times with deionized water. Finally, they are immersed in RCA2 solution (60ml ammonia water + 60ml hydrochloric acid + 300ml deionized water) heated in an 80℃ water bath for 10 minutes. After cleaning, they are taken out and rinsed three times with deionized water. Finally, they are immersed in 2% HF solution for 1 minute. After cleaning, they are taken out and rinsed three times with deionized water for use. (3) Atomic layer deposition of V2O X Thin film: The P-type silicon wafer, after the above cleaning process, is placed in a PEALD chamber and evacuated to 5E-2 torr. Pure V2O is grown through n cycles of vanadium triisopropoxy oxide and deionized water precursor. X Thin film, intrinsic vanadium oxide thin film deposited and fixed for n (50) cycles; (4) In-situ oxygen plasma treatment at different times: After depositing the intrinsic vanadium oxide film for a fixed number of n cycles, an in-situ oxygen plasma treatment is performed. At this time, the gas is ultrapure oxygen, the gas flow rate is 120 sccm, the plasma power is 50 W, and the plasma treatment time is X (2 / 5 / 8) s. The deposition of intrinsic vanadium oxide for a fixed number of n (50) times plus one oxygen plasma treatment is taken as a small cycle. The small cycle is performed for N (2) large cycles, and the total number of cycles is 100 Cycles (in terms of n). The film thickness is about 6 nm. Vanadium oxide films are grown on both sides of a P-type silicon wafer to make passivation test samples. Vanadium oxide films are grown on one side of a P-type silicon wafer, and then silver (Ag) of 300 nm to 500 nm is grown on the vanadium oxide film using a transmission line model (TLM) metal mask to make contact test samples.
[0036] Passivated contact testing: Minority carrier lifetime testing equipment (WCT-120) tests the hidden open circuit voltage (iV). OC The four-probe method was used to test the contact resistance (ρ) and the TLM method was used to extract the contact resistance. C );like Figure 2 As shown, for different OPT processing time variables, after OPT processing, as the OPT time increases, passivation first increases and then decreases, while overall contact first decreases and then increases, especially for an OPT time of 2 seconds, iV OC It is 622.4mV, ρ C 23mΩ·cm 2 Compared with the untreated sample, the passivation contacts of the sample treated with 2s OPT were improved. In other words, the passivation contact performance of c-Si / TMOs stacks can be improved by adjusting the OPT time.
[0037] Example 3 This embodiment is based on the hydrogenated V2O described in Embodiment 1 above. X As a hole transport layer, a hybrid crystalline silicon / compound heterojunction solar cell is provided.
[0038] like Figure 3 As shown, the hydrogenated V2O XThe structure of the crystalline silicon / compound heterojunction solar cell, which serves as the hole transport layer, is as follows: a P-type silicon wafer is used as the substrate 6, the P-type silicon has a pyramidal front surface and a polished back surface, the front surface of the substrate 6 has an N+ doped layer 5, an N++ heavily doped layer 2, a passivation layer 4, an antireflection layer 3 and a grid electrode 1, and the back surface of the substrate 6 has a hole transport layer (vanadium hydride) 7 and a full-area electrode 8.
[0039] Hydrogenated V2O X The fabrication method of a crystalline silicon / compound heterojunction solar cell, which serves as a hole transport layer, includes the following steps: (1) Select a P-type silicon wafer with a resistivity of 0.7~1 ohm·cm as substrate 6, and texture the front surface of the substrate 6. The texturing surface is 5μm and the reflectivity is 7.5%; polish the back surface. The polishing solution is a 50% sodium hydroxide solution at 70℃. (2) An N+ doped layer 5 is formed by phosphorus diffusion on the front side of the substrate 6 to form a pn junction. The temperature is maintained at 1100℃. Phosphorus diffusion is performed on the front side of the silicon substrate. The phosphorus source is POCl3 and the phosphorus doping concentration is 4E21 atoms / cm. 3 The junction depth is 250nm; (3) Laser scanning doping is performed on the front metal gate area of the substrate 6 to form the N++ heavily doped layer 2 with a doping concentration of 5E22 atoms / cm. 3 ; (4) Use 40% HF to remove the PSG layer on the edge and back side, and use NaOH solution to neutralize the HF and complete the etching and polishing of the back side of the silicon wafer; (5) Silicon dioxide on the front and back surfaces is prepared by thermal oxidation. The substrate 6 is placed in an oxidation furnace at 750°C and nitrogen and oxygen gas is introduced for 30 min. Silicon dioxide on the front surface is removed by 2% HF. (6) The aluminum oxide passivation layer 4 with a thickness of 10 nm is deposited on the front side of the substrate 6 using an ALD process; (7) The silicon nitride passivation antireflection layer 3 with a thickness of 70 nm is deposited on the front side of the substrate 6 using a PECVD process; (8) The gate line Ag electrode 1 is obtained by screen printing in the region of the N++ heavily doped layer 2 on the front side of the substrate 6; (9) Remove silica from the back surface using 2% HF; (10) Intrinsic vanadium oxide and hydrogenated vanadium oxide were grown on the back surface of the substrate 6 by ALD to prepare the hole transport layer 7. The preparation process is the same as in Example 1. The thickness is 6nm. During the growth of hydrogenated vanadium oxide, n is 5, N is 20, the hydrogenation power is 70W, the flow rate of 90% / 10% argon-hydrogen mixture is 120sccm, and the hydrogenation treatment time is 3s. (11) Ag is thermally deposited on the back side of the substrate 6 to form the full-area back electrode 8 with a thickness of 300 nm, and finally the back surface is obtained based on V2O. X / Ag crystalline silicon / compound heterojunction solar cells.
[0040] Comparative Example 1 Based on Example 3, intrinsic vanadium oxide was prepared as a comparison. The difference between this comparative example and Example 3 is that in-situ hydrogen plasma treatment was not performed in step (10).
[0041] Experimental results: Figure 4 This is a JV curve diagram of a solar cell with intrinsic vanadium oxide and vanadium hydrogen oxide as the hole transport layer. (Example:) Figure 4 As shown, when intrinsic vanadium oxide acts as the hole transport layer, the open-circuit voltage is 644.9 mV and the short-circuit current density is 40.39 mA / cm². 2 The fill factor is 78.55%, and the cell conversion efficiency is 20.46%. When vanadium hydride is used as the hole transport layer, the open-circuit voltage is 663.0 mV, and the short-circuit current density is 41.07 mA / cm². 2 The fill factor was 80.64%, and the battery conversion efficiency was 21.96%. This demonstrates that the method of in-situ hydrogenation growth of transition metal oxides as a hole transport layer proposed in this invention can comprehensively improve the photoelectric performance parameters of the battery and significantly increase the conversion efficiency.
[0042] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.
Claims
1. A method for fabricating a heterojunction solar cell, characterized in that, Includes the following steps: (1) The front surface of the P-type silicon substrate is texturized and the back surface is polished; (2) A phosphorus diffusion layer is formed on the front surface of the substrate to form an N+ doped layer and a pn junction is formed; the metal gate area on the front surface of the silicon substrate is subjected to laser N-type heavy doping to form an N++ doped layer. (3) Remove the PSG layer from the edge and back of the substrate, and polish the back of the substrate at the same time; (4) Oxidize the front and back surfaces of the substrate to generate silicon dioxide, and remove the silicon dioxide from the front surface; (5) A passivation layer and an antireflection layer are sequentially deposited on the front surface of the substrate; a gate electrode is fabricated by screen printing on the corresponding N++ doped region on the antireflection layer. (6) Remove silicon dioxide from the back surface of the substrate; (7) Preparation of hole transport layer on the back surface of substrate: Pure transition metal oxide is prepared on the back surface of substrate by atomic layer deposition. The cavity temperature of the atomic layer deposition is 100-350℃. The mechanical pump switch is turned on to evacuate the cavity. Pure transition metal oxide film is grown by n cycles of transition metal precursor and oxygen precursor. After n cycles of pure transition metal oxide, a modified gas plasma treatment with a flow rate of 100-140 sccm and a power of 20-250W is added. This is one large cycle. Then, the large cycle is repeated N times to achieve in-situ modification of transition metal oxide. The transition metal precursor is one of hexacarbonylmolybdenum, hexacarbonyltungsten, triisopropoxyvanadium oxide, and tricarbonylcycloheptatrienylmolybdenum. The oxygen precursor is deionized water or ozone. The modified gas is hydrogen-containing gas or oxygen. The hydrogen-containing gas is argon-hydrogen mixture or nitrogen-hydrogen mixture. When the modified gas is a hydrogen-containing gas, the value of n is 5-10, the value of N is 10-20, and the time for one modified gas plasma treatment is 2-4 seconds; when the modified gas is oxygen, the value of n is 40-60, the value of N is 1-3, and the time for one modified gas plasma treatment is 1-3 seconds. (8) Ag is thermally vaporized on the hole transport layer to form a full-area back electrode.
2. The method for fabricating a heterojunction solar cell according to claim 1, characterized in that, The pn junction has a depth of 150-300 nm, the passivation layer has a thickness of 10-20 nm, the antireflection layer has a thickness of 60-80 nm, and the hole transport layer has a thickness of 2-13 nm.
3. A heterojunction solar cell prepared by the method according to any one of claims 1-2, characterized in that, The structure of the heterojunction solar cell, from bottom to top, includes: a full-area back electrode, a hole transport layer, a silicon substrate, an N+ / N++ doped layer, a passivation layer, an anti-reflection layer, and a gate electrode. The N+ / N++ doped layer is an N++ doped layer in the region corresponding to the gate electrode, and the rest of the region is an N+ doped layer.
Citation Information
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