Method for handling high voltage interlock faults and high voltage interlock system

Abstract

The embodiment of the application discloses a high-voltage interlock fault processing method and a high-voltage interlock system. The method comprises the following steps: in response to a fault signal of a target high-voltage interlock loop in a plurality of high-voltage interlock loops, determining the fault level of the target high-voltage interlock loop based on the current driving speed of an electric vehicle; wherein the plurality of high-voltage interlock loops comprise at least two of a thermal management high-voltage interlock loop, a front-end power driving high-voltage interlock loop, a battery high-voltage interlock loop, a rear-end power driving high-voltage interlock loop and a charging and discharging high-voltage interlock loop; determining the target processing strategy of the target high-voltage interlock loop corresponding to the fault level; and controlling the operation of a high-voltage component in the target high-voltage interlock loop based on the target processing strategy.

Description

Technical Field

[0001] This application relates to the field of automotive technology, specifically to a method for handling high-voltage interlock faults and a high-voltage interlock system. Background Technology

[0002] When conducting high-voltage circuit testing, the national standard GB 18384-2020 "Safety Requirements for Electric Vehicles" imposes mandatory safety requirements on high-voltage connectors. High-voltage interlock circuits can verify whether high-voltage connectors meet these safety requirements. Therefore, high-voltage interlock circuits are a crucial design component of current electric vehicle high-voltage circuits. However, conventional high-voltage interlock circuit layouts are relatively simple, not arranged according to the functional sets of high-voltage components. Instead, high-voltage components in electric vehicles are connected through a single high-voltage interlock circuit, resulting in excessively long wiring harnesses. Consequently, when a high-voltage interlock problem occurs, it becomes impossible to locate the abnormally connected high-voltage component, hindering the localization of the problem. This prevents the implementation of corresponding fault handling measures for abnormally connected high-voltage components, leading to the use of a uniform fault handling approach, which is detrimental to cost control and driver safety. Summary of the Invention

[0003] The purpose of this application is to provide a method for handling high-voltage interlock faults and a high-voltage interlock system.

[0004] The technical solution adopted in this application is as follows:

[0005] A method for handling high-voltage interlock faults includes: responding to a fault signal of a target high-voltage interlock circuit among a plurality of high-voltage interlock circuits; determining the fault level of the target high-voltage interlock circuit based on the current driving speed of an electric vehicle; wherein the plurality of high-voltage interlock circuits includes at least two of a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit; determining a target handling strategy for the target high-voltage interlock circuit corresponding to the fault level; and controlling the operation of high-voltage components in the target high-voltage interlock circuit based on the target handling strategy.

[0006] Based on the aforementioned technical means, firstly, the high-voltage components in electric vehicles are divided into multiple high-voltage interlock circuits according to their installation area and function. This allows for the identification of the target high-voltage interlock circuit that triggers the fault signal, solving the problem of excessive series-connected components in high-voltage interlock circuits, which hinders the localization of high-voltage interlock faults. Furthermore, dividing the high-voltage interlock circuits by their installation area optimizes the problem of excessively long wiring harnesses in the high-voltage interlock circuits, facilitating cost control. Secondly, by considering the handling strategies of multiple high-voltage interlock circuits under different fault levels, a target handling strategy for the target high-voltage interlock circuit is determined. This allows the electric vehicle to operate according to the target handling strategy, thereby maximizing the safety of passengers while addressing high-voltage safety issues.

[0007] Furthermore, the target high-voltage interlock circuit includes a thermal management high-voltage interlock circuit; the high-voltage components in the thermal management high-voltage interlock circuit include an air conditioning compressor, a positive temperature coefficient connector, and a positive temperature coefficient heater; the target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: in the case of a level 1 fault, the target handling strategy is determined to be: prohibiting the electric vehicle from accessing the high voltage and prompting the user to perform immediate maintenance; in the case of a level 2 fault, the target handling strategy is determined to be: prohibiting the operation of the air conditioning compressor, the positive temperature coefficient connector, and the positive temperature coefficient heater, and prompting the user to perform maintenance; in the case of a level 3 fault, the target handling strategy is determined to be: prohibiting the operation of the air conditioning compressor, the positive temperature coefficient connector, and the positive temperature coefficient heater, and prompting the user to perform maintenance.

[0008] Based on the above technical means, the handling strategies for the thermal management high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the thermal management high-voltage interlock circuit, the operation of the thermal management high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0009] Furthermore, the target high-voltage interlock circuit includes a front-end power drive high-voltage interlock circuit; the high-voltage component in the front-end power drive high-voltage interlock circuit includes a front-end motor; the target processing strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a Level 1 fault, the target processing strategy is determined to be: prohibiting the electric vehicle from accessing the high voltage and prompting the user to immediately perform maintenance; In the case of a Level 2 fault, the target processing strategy is determined to be: delaying the electric vehicle from accessing the high voltage when the electric vehicle has no rear-wheel drive and prompting the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limiting the output power of the front-end motor to 0, while simultaneously transmitting the required torque to the front-end motor to the rear-end motor, and prompting the user to perform maintenance; In the case of a Level 3 fault, the target processing strategy is determined to be: when the electric vehicle has no rear-wheel drive, limiting the output power of the front-end motor to a first threshold and prompting the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limiting the output power of the front-end motor to 0, while simultaneously transmitting the required torque to the front-end motor to the rear-end motor, and prompting the user to perform maintenance.

[0010] Based on the above technical means, the handling strategies of the front-end power drive high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the high-voltage interlock fault in the front-end power drive high-voltage interlock circuit, the operation of the front-end power drive high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0011] Furthermore, the target high-voltage interlock circuit includes a battery high-voltage interlock circuit; the high-voltage component in the battery high-voltage interlock circuit includes a power battery; the target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: in the case of a level 1 fault, the target handling strategy is determined to be: prohibiting the electric vehicle from accessing the high voltage and prompting the user to perform immediate maintenance; in the case of a level 2 fault, the target handling strategy is determined to be: limiting both the charging power and discharging power of the power battery to 0, delaying the electric vehicle from accessing the high voltage, and prompting the user to perform maintenance; in the case of a level 3 fault, the target handling strategy is determined to be: limiting the charging power to 0, while limiting the discharging power to a second threshold, and prompting the user to perform maintenance.

[0012] Based on the above technical means, the handling strategies for the battery high-voltage interlock circuit under different fault levels are explained. This allows the operation of the battery high-voltage interlock circuit to be controlled according to the handling strategy corresponding to the fault level after determining the fault level of the high-voltage interlock fault.

[0013] Furthermore, the target high-voltage interlock circuit includes a rear-end power drive high-voltage interlock circuit; the high-voltage component in the rear-end power drive high-voltage interlock circuit includes a rear-end motor; the target processing strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a Level 1 fault, the target processing strategy is determined to be: prohibiting the electric vehicle from accessing the high voltage and prompting the user to immediately perform maintenance; In the case of a Level 2 fault, the target processing strategy is determined to be: delaying the electric vehicle from accessing the high voltage when the electric vehicle has no front-wheel drive and prompting the user to perform maintenance; or, when the electric vehicle has front-wheel drive, limiting the output power of the rear-end motor to 0, while simultaneously transmitting the required torque to the rear-end motor to the front-end motor, and prompting the user to perform maintenance; In the case of a Level 3 fault, the target processing strategy is determined to be: limiting the output power of the front-end motor to a third threshold when the electric vehicle has no front-wheel drive, and prompting the user to perform maintenance; or, when the electric vehicle has front-wheel drive, limiting the output power of the rear-end motor to 0, while simultaneously transmitting the required torque to the rear-end motor to the front-end motor, and prompting the user to perform maintenance.

[0014] Based on the above technical means, the handling strategies for the high-voltage interlock circuit of the back-end power drive under different fault levels are explained. In this way, after determining the fault level of the high-voltage interlock fault in the high-voltage interlock circuit of the back-end power drive, the operation of the high-voltage interlock circuit of the back-end power drive can be controlled according to the handling strategy corresponding to the fault level.

[0015] Furthermore, the target high-voltage interlock circuit includes a charging and discharging high-voltage interlock circuit; the high-voltage component in the charging and discharging high-voltage interlock circuit includes an on-board charger; the target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: in the case of a level 1 fault, the target handling strategy is determined to be: prohibiting the electric vehicle from accessing the high voltage and prompting the user to perform immediate maintenance; in the case of a level 2 fault, the target handling strategy is determined to be: limiting the external charging and discharging power of the on-board charger to 0, delaying the electric vehicle from accessing the high voltage, and prompting the user to perform maintenance; in the case of a level 3 fault, the target handling strategy is determined to be: limiting the external charging and discharging power of the on-board charger to 0 and prompting the user to perform maintenance.

[0016] Based on the above technical means, the handling strategies of the charging and discharging high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the charging and discharging high-voltage interlock circuit, the operation of the charging and discharging high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0017] Furthermore, determining the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle includes: determining the target speed range where the current driving speed of the electric vehicle is located from multiple speed ranges that correspond one-to-one with multiple fault levels; and determining the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range.

[0018] Based on the aforementioned technical means, the fault level corresponding to the target speed range can be determined based on the current driving speed of the battery vehicle. Then, based on the judgment threshold corresponding to the fault level, it can be determined whether the target high-voltage interlock circuit has triggered the fault level corresponding to the target speed range. This can solve the problem of incorrect judgment of high-voltage interlock faults of electric vehicles caused by abnormal signal jumps.

[0019] Furthermore, determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit includes: determining a preset duration threshold corresponding to the target speed range; and determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit when the fault signal of the target high-voltage interlock circuit continuously triggers the duration threshold.

[0020] Based on the above technical means, after the target high-voltage interlock circuit triggers a fault signal for the first time, a timer is started. The timer determines whether the fault signal of the target high-voltage interlock circuit is continuously triggered within the time threshold corresponding to the target speed range, thereby determining whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event. This solves the problem of misjudging the high-voltage interlock circuit fault event caused by abnormal signal jumps.

[0021] Furthermore, determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit includes: determining a preset number threshold corresponding to the target speed range; and determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit when the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to the number threshold within a fixed duration.

[0022] Based on the above technical means, after the target high-voltage interlock circuit triggers a fault signal for the first time, a counter is started. The counter determines whether the number of times the fault signal of the target high-voltage interlock circuit is triggered within a fixed time period is greater than or equal to a threshold number. This determines whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event, thus solving the misjudgment of high-voltage interlock circuit fault events caused by abnormal signal jumps.

[0023] Furthermore, the method includes: determining the circuit detection result of the pulse width modulation chip in the target high-voltage interlock circuit; the circuit detection result includes one of the following: normal, short circuit, and open circuit; determining the duty cycle and period of the received pulse width modulation signal in the target high-voltage interlock circuit; and determining the target high-voltage interlock circuit trigger fault signal when the circuit detection result is open circuit or short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold.

[0024] Based on the above technical means, the presence of a fault in the high-voltage interlock circuit can be determined by combining the circuit detection results of the pulse width modulation chip and the pulse width modulation signal, thereby improving the accuracy of fault diagnosis in the high-voltage interlock circuit.

[0025] A high-voltage interlock system includes multiple high-voltage interlock circuits; the multiple high-voltage interlock circuits include at least two of a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit; the high-voltage interlock system includes at least one controller, the controller including a pulse width modulation chip and a high-voltage interlock fault handling device; wherein...

[0026] The high-voltage interlock fault handling device is used to respond to a fault signal of a target high-voltage interlock circuit among multiple high-voltage interlock circuits, determine the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle; determine the target handling strategy of the target high-voltage interlock circuit corresponding to the fault level; and control the operation of high-voltage components in the target high-voltage interlock circuit based on the target handling strategy.

[0027] Furthermore, the high-voltage interlock system includes: a high-voltage interlock fault handling device, which is also used to determine the target speed range in which the current driving speed of the electric vehicle is located from multiple speed ranges that correspond one-to-one with multiple fault levels; and to determine the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a high-voltage interlocking system provided in an embodiment of this application;

[0029] Figure 2 A schematic diagram of the implementation process of a high-voltage interlock fault handling method provided in this application embodiment. Figure 1 ;

[0030] Figure 3A A schematic diagram illustrating the communication implementation of various controllers in a high-voltage interlocking system provided in an embodiment of this application;

[0031] Figure 3B A schematic diagram of the implementation process of a high-voltage interlock fault handling method provided in this application embodiment. Figure 2 ;

[0032] Figure 4 A schematic diagram of the implementation process of a high-voltage interlock fault handling method provided in this application embodiment is shown in Figure 3.

[0033] Figure 5 This is a schematic diagram of the composition structure of a high-voltage interlock fault handling device provided in an embodiment of this application. Detailed Implementation

[0034] The embodiments of this application will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be understood that the preferred embodiments are only for illustrating this application and are not intended to limit the scope of protection of this application.

[0035] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0036] This embodiment provides a high-voltage interlock system, which includes multiple high-voltage interlock circuits. These circuits include at least two of the following: a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit. The high-voltage interlock system includes at least one controller, which comprises a pulse width modulation chip and a high-voltage interlock fault handling device.

[0037] The high-voltage interlock fault handling device is used to respond to a fault signal of a target high-voltage interlock circuit among multiple high-voltage interlock circuits, determine the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle; determine the target handling strategy of the target high-voltage interlock circuit corresponding to the fault level; and control the operation of high-voltage components in the target high-voltage interlock circuit based on the target handling strategy.

[0038] In some implementations, the high-voltage components in an electric vehicle can be divided into multiple high-voltage interlock circuits based on their installation location and function. These multiple high-voltage interlock circuits include at least two of the following: a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit.

[0039] Here, the thermal management high-voltage interlock circuit refers to a high-voltage interlock circuit composed of high-voltage components that control the temperature and manage the heat of various automotive parts. The front-end power drive high-voltage interlock circuit refers to a high-voltage interlock circuit composed of high-voltage components that drive the front of the vehicle. The battery high-voltage interlock circuit refers to a high-voltage interlock circuit composed of high-voltage components that enhance the vehicle's electrical energy. The rear-end power drive high-voltage interlock circuit refers to a high-voltage interlock circuit composed of high-voltage components that drive the rear of the vehicle. The charge / discharge high-voltage interlock circuit refers to a high-voltage interlock circuit composed of high-voltage components that charge or discharge the vehicle.

[0040] In some implementations, when multiple high-voltage interlock circuits include a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit, and the number of controllers is one, the thermal management high-voltage interlock circuit, the front-end power drive high-voltage interlock circuit, the battery high-voltage interlock circuit, the rear-end power drive high-voltage interlock circuit, and the charge / discharge high-voltage interlock circuit can be integrated onto the same controller; when multiple high-voltage interlock circuits include a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit, and the number of controllers is five, the thermal management high-voltage interlock circuit, the front-end power drive high-voltage interlock circuit, the battery high-voltage interlock circuit, the rear-end power drive high-voltage interlock circuit, and the charge / discharge high-voltage interlock circuit can be integrated onto different controllers; When there are multiple high-voltage interlock circuits, including a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit, and the number of controllers is three, the thermal management high-voltage interlock circuit, the battery high-voltage interlock circuit, and the front-end power drive circuit can be integrated on the same controller, while the rear-end power drive high-voltage interlock circuit and the charge / discharge high-voltage interlock circuit can be integrated on different controllers. When there are multiple high-voltage interlock circuits, including a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit, and the number of controllers is four, the thermal management high-voltage interlock circuit and the front-end power drive high-voltage interlock circuit can be integrated on the same controller, while the battery high-voltage interlock circuit, the rear-end power drive high-voltage interlock circuit, and the charge / discharge high-voltage interlock circuit can be integrated on different controllers.

[0041] like Figure 1 As shown in the diagram, the high-voltage interlock system is described with four controllers. The thermal management high-voltage interlock circuit 1 and the front-end power drive high-voltage interlock circuit 2 are integrated on the same controller, while the battery high-voltage interlock circuit 3, the rear-end power drive high-voltage interlock circuit 4, and the charge-discharge high-voltage interlock circuit 5 are integrated on different controllers.

[0042] Thermal management high-voltage interlock circuit 1 and front-end power drive high-voltage interlock circuit 2 are respectively connected to controller 61; battery high-voltage interlock circuit 3 is connected to controller 62; rear-end power drive high-voltage interlock circuit 4 is connected to controller 63; and charging / discharging high-voltage interlock circuit 5 is connected to controller 64. Specifically, the high-voltage interlock fault handling device 612 in controller 61 is used to detect and handle high-voltage interlock faults in thermal management high-voltage interlock circuit 1 and front-end power drive high-voltage interlock circuit 2; the high-voltage interlock fault handling device 622 in controller 62 is used to detect and handle high-voltage interlock faults in battery high-voltage interlock circuit 3; the high-voltage interlock fault handling device 632 in controller 63 is used to detect and handle high-voltage interlock faults in rear-end power drive high-voltage interlock circuit 4; and the high-voltage interlock fault handling device 642 in controller 64 is used to detect and handle high-voltage interlock faults in charging / discharging high-voltage interlock circuit 5. The controller 61 also includes a pulse width modulation chip 611, the controller 62 also includes a pulse width modulation chip 621, the controller 63 also includes a pulse width modulation chip 631, and the controller 64 also includes a pulse width modulation chip 641.

[0043] This application does not limit the number of controllers or the correspondence between high-voltage interlock circuits and controllers. Those skilled in the art can determine the number of controllers and the correspondence between multiple high-voltage interlock circuits and controllers according to actual needs, which will not be elaborated here.

[0044] In some embodiments, the high-voltage components in the thermal management high-voltage interlock circuit 1 may include an air conditioning compressor, a positive temperature coefficient (PTC) connector, and a PTC heater; the high-voltage components in the front-end power drive high-voltage interlock circuit 2 may include a front-end motor and a generator; the high-voltage components in the battery high-voltage interlock circuit 3 may include a power battery; the high-voltage components in the rear-end power drive high-voltage interlock circuit 4 may include a rear-end motor and a rear-end heater; and the high-voltage components in the charge / discharge high-voltage interlock circuit 5 may include an on-board charger and a discharge junction box.

[0045] In some implementations, controller 61 may be a front electric drive controller, controller 62 may be a battery management system, controller 63 may be a rear electric drive controller, and controller 64 may be an on-board charger.

[0046] Based on the above technical means, by dividing the high-voltage components in electric vehicles into multiple high-voltage interlock circuits according to their installation location and function, the target high-voltage interlock circuit that triggers the fault signal can be identified from multiple high-voltage interlock circuits. This solves the problem of too many series components in the high-voltage interlock circuit, which is not conducive to the location of high-voltage interlock faults.

[0047] In some embodiments, the high-voltage interlock fault handling device is further configured to determine the target speed range in which the current driving speed of the electric vehicle is located from multiple speed ranges that correspond one-to-one with multiple fault levels; and to determine the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range.

[0048] This embodiment provides a method for handling high-voltage interlock faults, such as... Figure 2 As shown, the method may include steps S201 to S203:

[0049] Step S201: In response to a fault signal of a target high-voltage interlock circuit among multiple high-voltage interlock circuits, determine the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle;

[0050] Here, the High Voltage Interlock System (HVIL) is a safety mechanism that monitors the integrity of a high-voltage electrical system using low-voltage signals. It is primarily used to detect the electrical connection integrity of all branches connected to the high-voltage bus in an electric vehicle, including the air conditioning compressor, power battery, motor controller, and on-board charger. The target high-voltage interlock circuit refers to the high-voltage interlock circuit that has failed.

[0051] In some implementations, where each high-voltage interlock circuit corresponds to a controller, when a fault signal is triggered, the high-voltage interlock circuit corresponding to that controller can be identified as the target high-voltage interlock circuit.

[0052] In some implementations, when at least two high-voltage interlock circuits correspond to the same controller, when a fault signal is triggered, the fault signal may include information about the high-voltage interlock circuits, thereby identifying the high-voltage interlock circuit corresponding to the information about the high-voltage interlock circuits in the fault signal as the target high-voltage interlock circuit.

[0053] In some implementations, the driving speed of an electric vehicle corresponds to different speed ranges, and each speed range corresponds to a different fault level. It can be understood that after determining the speed range in which the current driving speed of the electric vehicle falls, the fault level corresponding to that speed range can be determined.

[0054] Step S202: Determine the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level;

[0055] In some implementations, the handling strategies for multiple high-voltage interlock circuits at different levels are preset in the controller. In this way, after determining the target high-voltage interlock circuit and the fault level of the target high-voltage interlock circuit, the target handling strategy can be determined based on the information of the target high-voltage interlock circuit and the fault level.

[0056] Step S203: Based on the target processing strategy, control the operation of the high-voltage components in the target high-voltage interlock circuit.

[0057] In some implementations, after determining the target processing strategy, the controller corresponding to the target high-voltage interlock circuit can send the target processing strategy control command to the high-voltage component in the target high-voltage interlock circuit. After receiving the control command, the high-voltage component in the target high-voltage interlock circuit adjusts its own operating state according to the control command.

[0058] Based on the aforementioned technical methods, firstly, the high-voltage components in electric vehicles are divided into multiple high-voltage interlock circuits according to their installation area and function. This allows for the identification of the target high-voltage interlock circuit that triggers the fault signal, solving the problem of excessive series-connected components in high-voltage interlock circuits, which hinders the localization of high-voltage interlock faults. Furthermore, dividing the high-voltage interlock circuits by their installation area optimizes the problem of excessively long wiring harnesses in the high-voltage interlock circuits, facilitating cost control. Secondly, by considering the handling strategies of multiple high-voltage interlock circuits under different fault levels, a target handling strategy for the target high-voltage interlock circuit is determined. This allows the electric vehicle to operate according to the target handling strategy, thereby maximizing the safety of passengers while addressing high-voltage safety issues.

[0059] In some embodiments, step S201 above, determining the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle, may include steps S2011 and S2012:

[0060] Step S2011: Determine the target speed range where the electric vehicle's current driving speed is located from multiple speed ranges that correspond one-to-one with multiple fault levels;

[0061] Here, multiple speed ranges correspond one-to-one with multiple fault levels. This can be understood as follows: the number of speed ranges corresponds to the number of fault levels. For example, when there are 2 fault levels, there are 2 speed ranges; when there are 3 fault levels, there are 3 speed ranges. Alternatively, each speed range can be understood as corresponding to one fault level.

[0062] In some implementations, when there are three speed ranges, the speed ranges can include a first range, a second range, and a third range. The first range can be when the electric vehicle's speed is 0 km / h, which means the electric vehicle is not moving. The second range can be when the electric vehicle's speed is less than or equal to a speed threshold. The third range can be when the electric vehicle's speed is greater than the speed threshold. For example, if the speed threshold is 5 km / h, the second range can be (0, 5 km / h) and the third range can be (5 km / h, the maximum speed of the electric vehicle).

[0063] In some implementations, it can be determined whether the electric vehicle is in a driving state by whether the gear of the electric vehicle is in the parking gear (P gear) or whether the power status of the electric vehicle is in the READY state; wherein, when the gear of the electric vehicle is in the P gear or the power status of the electric vehicle is not in the READY state, it is determined that the electric vehicle is currently in a non-driving state, that is, the target speed range in which the current driving speed of the electric vehicle is located is the first range.

[0064] In some implementations, when the electric vehicle is in motion, its current speed can be determined using a vehicle speed sensor, and then compared with a speed threshold. For example, if the speed threshold is 5 km / h and the electric vehicle's speed is 3 km / h, the target speed range where the electric vehicle's current speed falls can be determined as the second range; similarly, if the speed threshold is 5 km / h and the electric vehicle's speed is 12 km / h, the target speed range where the electric vehicle's current speed falls can be determined as the third range.

[0065] In some implementations, different speed ranges correspond to different fault levels, and the fault level gradually decreases as the boundary value of the speed range increases. For example, the speed range includes a first range, a second range, and a third range, and the boundary values ​​of the first range, the second range, and the third range gradually increase. Therefore, the fault level corresponding to the first range is a level one fault, the fault level corresponding to the second range is a level two fault, and the fault level corresponding to the third range is a level three fault.

[0066] In some implementations, the driver's intention can be assessed based on different speed ranges to determine the corresponding fault level. For example, if the electric vehicle's current speed is in the first range, the vehicle is not in motion, and it can be assumed that the driver has no current need to drive, but there is a possibility of touching high-voltage devices, resulting in the highest risk of an accident. The fault level corresponding to the first range can be set as a level one fault. If the electric vehicle's current speed is in the second range, the vehicle is in motion, but at a lower speed, and the driver has a current need to drive, but the possibility of touching high-voltage devices cannot be ruled out, resulting in the next lowest risk of an accident. The fault level corresponding to the second range can be set as a level two fault. If the electric vehicle's current speed is in the third range, the vehicle is in motion, but at a relatively high speed, and the possibility of the driver touching high-voltage devices is the lowest, resulting in the lowest risk of an accident. The fault level corresponding to the third range can be set as a level three fault.

[0067] Step S2012: Determine the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit.

[0068] In some implementations, after determining the target speed range of the target high-voltage interlock circuit, the fault level corresponding to the target speed range can be determined. Then, based on the judgment threshold corresponding to the target speed range, it is determined whether the target high-voltage interlock circuit triggers the fault level corresponding to the target speed. This is because there may be abnormal signal jumps during vehicle operation. However, such abnormal jumps are generally instantaneous. Therefore, the judgment threshold can solve the problem of incorrect judgment of high-voltage interlock faults of electric vehicles caused by abnormal signal jumps.

[0069] Based on the aforementioned technical means, the fault level corresponding to the target speed range can be determined based on the current driving speed of the battery vehicle. Then, based on the judgment threshold corresponding to the fault level, it can be determined whether the target high-voltage interlock circuit has triggered the fault level corresponding to the target speed range. This can solve the problem of incorrect judgment of high-voltage interlock faults of electric vehicles caused by abnormal signal jumps.

[0070] In some embodiments, step S2012 above, determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit, may include steps S20121 and S20122:

[0071] Step S20121: Determine the preset duration threshold corresponding to the target speed range;

[0072] Here, abnormal signal jumps may occur during vehicle operation. However, such abnormal jumps are generally instantaneous. Therefore, in order to prevent incorrect judgment of high-voltage interlock faults in electric vehicles due to abnormal signal jumps, if the fault signal is continuously triggered within a preset time threshold, it can be determined that the electric vehicle has a high-voltage interlock fault.

[0073] In some implementations, when the target speed range is a first range, the corresponding fault level is a level one fault, and the preset duration threshold corresponding to the target speed range can be determined as the first duration threshold; when the target speed range is a second range, the corresponding fault level is a level two fault, and the preset duration threshold corresponding to the target speed range can be determined as the second duration threshold; when the target speed range is a third range, the corresponding fault level is a level three fault, and the preset duration threshold corresponding to the target speed range can be determined as the third duration threshold.

[0074] In some implementations, as the fault level gradually increases, the duration threshold corresponding to each fault level gradually decreases. As the fault level decreases, the risk of an accident also decreases. Therefore, in order to reduce the occurrence of accidents, the first duration threshold corresponding to a level 1 fault is the smallest, the second duration threshold corresponding to a level 2 fault is the next smallest, and the third duration threshold corresponding to a level 3 fault is the largest.

[0075] Step S20122: If the fault signal of the target high-voltage interlock circuit continues to trigger the duration threshold, determine the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit.

[0076] Here, when a fault signal is triggered in the target high-voltage interlock circuit, it could be due to a fault in the target high-voltage interlock circuit or an abnormal signal jump in the target high-voltage interlock circuit. Therefore, in order to filter out misjudgments of the target high-voltage interlock circuit fault event caused by abnormal signal jumps, a timer can be activated after the fault signal is first triggered. The timer is used to determine whether the fault signal of the target high-voltage interlock circuit continues to trigger the duration threshold corresponding to the target speed range, thereby determining whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event.

[0077] In some implementations, a timer can be activated after the fault signal is first triggered. During the fault signal triggering process, the timer continues to count. If the count of the counter is greater than the duration threshold corresponding to the target speed range, it can be determined that the fault signal of the target high-voltage interlock circuit is triggered for a continuous duration threshold, thereby determining that the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event.

[0078] In some implementations, a timer can be activated after the fault signal is triggered for the first time. During the fault signal triggering process, the timer continues to count. If the count of the counter is less than the duration threshold corresponding to the target speed range, the fault signal stops triggering. It can be determined that the fault signal of the target high-voltage interlock circuit has not been continuously triggered within the duration threshold, thereby determining that the fault signal of the target high-voltage interlock circuit is caused by an abnormal jump in the signal in the target high-voltage interlock circuit. At the same time, the timer needs to be cleared.

[0079] In some implementations, if the fault signal of the target high-voltage interlock circuit continuously triggers a first duration threshold, it is determined that the target high-voltage interlock circuit has experienced a level one fault; or, if the fault signal of the target high-voltage interlock circuit continuously triggers a second duration threshold, it is determined that the target high-voltage interlock circuit has experienced a level two fault; or, if the fault signal of the target high-voltage interlock circuit continuously triggers a third duration threshold, it is determined that the target high-voltage interlock circuit has experienced a level three fault.

[0080] In some implementations, after determining the fault level of the target high-voltage interlock circuit, a fault alarm message can be generated based on the information of the target high-voltage interlock circuit and the corresponding fault level.

[0081] In some implementations, fault alarm information may be displayed in the human-machine interface of the electric vehicle via a pop-up window.

[0082] Based on the above technical means, after the target high-voltage interlock circuit triggers a fault signal for the first time, a timer is started. The timer determines whether the fault signal of the target high-voltage interlock circuit is continuously triggered within the time threshold corresponding to the target speed range, thereby determining whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event. This solves the problem of misjudging the high-voltage interlock circuit fault event caused by abnormal signal jumps.

[0083] In some embodiments, step S2012 above, determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit, may include steps S20123 and S20124:

[0084] Step S20123: Determine the preset number of times threshold corresponding to the target speed range;

[0085] In some implementations, when the target speed range is the first range, the corresponding fault level is a level one fault, and the preset number of times threshold corresponding to the target speed range can be determined as the first number threshold; when the target speed range is the second range, the corresponding fault level is a level two fault, and the preset number of times threshold corresponding to the target speed range can be determined as the second number threshold; when the target speed range is the third range, the corresponding fault level is a level three fault, and the preset number of times threshold corresponding to the target speed range can be determined as the third number threshold.

[0086] In some implementations, as the fault level gradually increases, the threshold number of occurrences for each fault level gradually decreases. This is because as the fault level decreases, the risk of an accident also decreases. Therefore, in order to reduce the occurrence of accidents, the threshold number for the first occurrence of a fault should be the smallest, the threshold number for the second occurrence of a fault should be the next smallest, and the threshold number for the third occurrence of a fault should be the largest.

[0087] Step S20124: If the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to the number threshold within a fixed duration, determine the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit.

[0088] Here, when a fault signal is triggered in the target high-voltage interlock circuit, it could be due to a fault in the target high-voltage interlock circuit or an abnormal signal jump in the target high-voltage interlock circuit. Therefore, in order to filter out misjudgments of high-voltage interlock circuit fault events caused by abnormal signal jumps, a counter can be activated after the fault signal is triggered for the first time. The counter can be used to determine whether the number of times the fault signal is triggered by the target high-voltage interlock circuit is greater than or equal to the number threshold within a fixed time period, thereby determining whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event.

[0089] In some implementations, a counter can be activated after the fault signal is first triggered. During the fault signal triggering process, the counter counts, incrementing by 1 each time the fault signal is triggered. If the counter count is greater than or equal to the number of times corresponding to the target speed range within a fixed time period, it can be determined that the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event.

[0090] In some implementations, a counter can be activated after the fault signal is first triggered. During the fault signal triggering process, the counter counts, incrementing by 1 for each fault signal trigger. If the counter count is less than the number of times corresponding to the target speed range within a fixed time period, it can be determined that the fault signal of the target high-voltage interlock circuit is caused by an abnormal jump in the signal in the target high-voltage interlock circuit, and the counter needs to be cleared.

[0091] In some implementations, a Level 1 fault is determined to have occurred in the target high-voltage interlock circuit if the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to a first count threshold over a fixed duration; or a Level 2 fault is determined to have occurred in the target high-voltage interlock circuit if the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to a second count threshold over a fixed duration; or a Level 3 fault is determined to have occurred in the target high-voltage interlock circuit if the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to a third count threshold over a fixed duration. For example, with a fixed duration of 1 hour (H), a first count threshold of 3, and a counter count of 4 within 1 hour, a Level 1 fault is determined to have been triggered; with a fixed duration of 1 hour, a second count threshold of 5, and a counter count of 6 within 1 hour, a Level 2 fault is determined to have been triggered; with a fixed duration of 1 hour, a third count threshold of 7, and a counter count of 8 within 1 hour, a Level 3 fault is determined to have been triggered.

[0092] Based on the above technical means, after the target high-voltage interlock circuit triggers a fault signal for the first time, a counter is started. The counter determines whether the number of times the fault signal of the target high-voltage interlock circuit is triggered within a fixed time period is greater than or equal to a threshold number. This determines whether the fault signal of the target high-voltage interlock circuit is caused by a high-voltage interlock circuit fault event, thus solving the misjudgment of high-voltage interlock circuit fault events caused by abnormal signal jumps.

[0093] In some embodiments, the target high-voltage interlock circuit includes a thermal management high-voltage interlock circuit; the thermal management high-voltage interlock circuit includes high-voltage components such as an air conditioning compressor, a positive temperature coefficient connector, and a positive temperature coefficient heater.

[0094] Step S202 above, determining the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level, may include at least one of the following steps S210 to S212:

[0095] Step S210: If the fault level is a Level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out maintenance immediately;

[0096] Here, "high voltage" refers to the process by which an electric vehicle transmits electrical energy from high-voltage components such as the power battery to high-voltage electrical equipment such as the drive motor and air conditioning compressor through a high-voltage system during startup or driving, thereby driving the vehicle or meeting other electrical needs.

[0097] In some implementations, after a fault signal is triggered, the human-machine interface of the electric vehicle will output a prompt message corresponding to the handling measures for the fault event of the target high-voltage interlock circuit. The prompt message may include the entire content of the target handling strategy, or it may only include the prompt content in the target handling strategy.

[0098] Step S211: In the case of a level 2 fault, the target handling strategy is determined to be: to disable the operation of the air conditioning compressor, the positive temperature coefficient connector and the positive temperature coefficient heater, and to prompt the user to perform maintenance.

[0099] Step S212: In the case of a level 3 fault, the target handling strategy is determined to be: to disable the operation of the air conditioning compressor, the positive temperature coefficient connector and the positive temperature coefficient heater, and to prompt the user to perform maintenance.

[0100] Here, based on the location and function of each high-voltage component in the electric vehicle, multiple high-voltage interlock circuits are defined. In the event of an abnormality in the thermal management high-voltage interlock circuit, only the thermal management high-voltage interlock circuit needs to be troubleshooted, without affecting the operation of other high-voltage interlock circuits.

[0101] Based on the above technical means, the handling strategies for the thermal management high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the thermal management high-voltage interlock circuit, the operation of the thermal management high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0102] In some embodiments, the target high-voltage interlock circuit includes a front-end power-driven high-voltage interlock circuit; the high-voltage component in the front-end power-driven high-voltage interlock circuit includes a front-end motor;

[0103] Step S202 above, determining the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level, may include at least one of the following steps S213 to S215:

[0104] Step S213: If the fault level is a Level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out maintenance immediately;

[0105] Step S214: In the case of a level 2 fault, the target handling strategy is determined as follows: when the electric vehicle has no rear-wheel drive, delay the high voltage of the electric vehicle and prompt the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limit the output power of the front motor to 0, and at the same time, transmit the required torque to the front motor to the rear motor, and prompt the user to perform maintenance.

[0106] Here, "lowering the high voltage" refers to disconnecting the vehicle's high-voltage system to eliminate the potential dangers posed by high-voltage electricity. Rear-wheel drive (RWD) is a vehicle drive system characterized by the transmission of engine power to the rear wheels via a driveshaft, propelling the vehicle forward. In this drive system, the rear wheels act as drive wheels, responsible for propelling the entire vehicle, while the front wheels primarily serve the functions of load-bearing and steering. The front-end motor refers to the motor located in the vehicle's drivetrain closest to the engine. Required torque refers to the torque value calculated by the system to meet the power demands of the vehicle during operation. The rear-end motor refers to the motor located at the rear end of the drive system, i.e., the output or load end of the motor.

[0107] In some implementations, the required torque value can be calculated based on the driver's control input (such as accelerator pedal opening, brake pedal opening, etc.), the vehicle's current state (such as vehicle speed, gear, etc.), and the vehicle's power performance parameters (such as engine torque characteristics, motor torque characteristics, etc.).

[0108] When an electric vehicle has rear-wheel drive, after limiting the output power of the front motor to 0, the required torque transmitted to the front motor is transmitted to the rear motor. In this way, the rear motor can control the rear-wheel drive to realize the operation of the electric vehicle, so that the electric vehicle does not lose power and thus ensures the driving safety of the electric vehicle.

[0109] Step S215: In the case of a level 3 fault, the target processing strategy is determined as follows: when the electric vehicle has no rear-wheel drive, the output power of the front motor is limited to a first threshold, and the user is prompted to perform maintenance; or, when the electric vehicle has rear-wheel drive, the output power of the front motor is limited to 0, and the required torque transmitted to the front motor is transmitted to the rear motor, and the user is prompted to perform maintenance.

[0110] Based on the above technical means, the handling strategies of the front-end power drive high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the high-voltage interlock fault in the front-end power drive high-voltage interlock circuit, the operation of the front-end power drive high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0111] In some embodiments, the target high-voltage interlock circuit includes a battery high-voltage interlock circuit; the high-voltage component in the battery high-voltage interlock circuit includes a power battery;

[0112] Step S202 above, determining the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level, may include at least one of the following steps S216 to S218:

[0113] Step S216: If the fault level is a Level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out maintenance immediately;

[0114] Step S217: In the case of a level 2 fault, the target handling strategy is determined to be: limit the charging power and discharging power of the power battery to 0, delay the high voltage of the electric vehicle, and prompt the user to perform maintenance.

[0115] Here, charging power refers to the power generated by the battery of an electric vehicle gradually absorbing electrical energy during the charging process. Discharging power refers to the power generated by the battery gradually releasing electrical energy during the discharging process, reflecting the amount of electricity output by the battery of an electric vehicle per unit time.

[0116] Step S218: In the case of a level 3 fault, the target processing strategy is determined to be: limit the charging power to 0, limit the discharging power to a second threshold, and prompt the user to perform maintenance.

[0117] Based on the above technical means, the handling strategies for the battery high-voltage interlock circuit under different fault levels are explained. This allows the operation of the battery high-voltage interlock circuit to be controlled according to the handling strategy corresponding to the fault level after determining the fault level of the high-voltage interlock fault.

[0118] In some embodiments, the target high-voltage interlock circuit includes a back-end power-driven high-voltage interlock circuit; the high-voltage component in the back-end power-driven high-voltage interlock circuit includes a back-end motor;

[0119] Step S202 above, determining the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level, may include at least one of the following steps S219 to S221:

[0120] Step S219: If the fault level is a Level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out maintenance immediately;

[0121] Step S220: In the case of a level 2 fault, the target handling strategy is determined as follows: when the electric vehicle is not front-wheel drive, delay the high voltage of the electric vehicle and prompt the user to perform maintenance; or, when the electric vehicle is front-wheel drive, limit the output power of the rear motor to 0, and at the same time, transmit the required torque to the rear motor to the front motor, and prompt the user to perform maintenance.

[0122] Here, front-wheel drive refers to a driving method in which the car's engine transmits power directly to the front wheels through the transmission device, thereby driving the vehicle forward. In this configuration, the front wheels are responsible for both steering and driving.

[0123] When an electric vehicle has front-wheel drive, after limiting the output power of the rear motor to 0, the required torque that was sent to the rear motor is transmitted to the front motor. In this way, the front motor can control the front-wheel drive to realize the operation of the electric vehicle, so that the electric vehicle does not lose power and thus ensures the driving safety of the electric vehicle.

[0124] Step S221: In the case of a level 3 fault, the target processing strategy is determined as follows: when the electric vehicle has no front-wheel drive, the output power of the front motor is limited to the third threshold, and the user is prompted to perform maintenance; or, when the electric vehicle has front-wheel drive, the output power of the rear motor is limited to 0, while the required torque transmitted to the rear motor is transmitted to the front motor, and the user is prompted to perform maintenance.

[0125] Based on the above technical means, the handling strategies for the high-voltage interlock circuit of the back-end power drive under different fault levels are explained. In this way, after determining the fault level of the high-voltage interlock fault in the high-voltage interlock circuit of the back-end power drive, the operation of the high-voltage interlock circuit of the back-end power drive can be controlled according to the handling strategy corresponding to the fault level.

[0126] In some embodiments, the target high-voltage interlock circuit includes a charge-discharge high-voltage interlock circuit; the high-voltage component in the charge-discharge high-voltage interlock circuit includes an on-board charger;

[0127] Step S202 above, determining the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level, may include at least one of the following steps S222 to S224:

[0128] Step S222: If the fault level is a Level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out maintenance immediately;

[0129] Step S223: In the case of a level 2 fault, the target handling strategy is determined to be: limit the external charging and discharging power of the on-board charger to 0, delay the electric vehicle from being charged at high voltage, and prompt the user to perform maintenance.

[0130] Here, external charging and discharging power refers to the amount of electricity absorbed from or output to the outside world per unit time during the charging and discharging process of an electric vehicle.

[0131] Step S224: In the case of a level 3 fault, the target handling strategy is determined to be: limit the external charging and discharging power of the on-board charger to 0 and prompt the user to perform maintenance.

[0132] Based on the above technical means, the handling strategies of the charging and discharging high-voltage interlock circuit under different fault levels are explained. In this way, after determining the fault level of the charging and discharging high-voltage interlock circuit, the operation of the charging and discharging high-voltage interlock circuit can be controlled according to the handling strategy corresponding to the fault level.

[0133] In some embodiments, steps S204 to S206 may be included before responding to a fault signal in a target high-voltage interlock circuit among a plurality of high-voltage interlock circuits:

[0134] Step S204: Determine the circuit detection result of the pulse width modulation chip in the target high-voltage interlock circuit; the circuit detection result includes one of the following: normal, short circuit, and open circuit;

[0135] Here, a pulse width modulation (PWM) chip is an integrated circuit chip widely used in power electronics, industrial automation, automotive electronics and other fields. It contains multiple circuit modules to realize the generation and control of PWM signals.

[0136] In some implementations, the PWM chip has a built-in detection module. After completing the detection, the detection module in the PWM chip sends the detection result to the high-voltage interlock fault handling device in the controller.

[0137] In some implementations, when the PWM chip sends a PWM signal, it will simultaneously send a diagnostic voltage for the PWM. When the high-voltage interlock fault handling device in the controller receives the PWM signal, it will simultaneously receive the diagnostic voltage for the PWM. By judging whether the diagnostic voltage of the PWM is within the preset voltage range, it can determine whether the PWM chip has a short circuit or open circuit fault.

[0138] Step S205: Determine the duty cycle and period of the pulse width modulation signal received in the target high-voltage interlock circuit;

[0139] In some implementations, the PWM chip sends PWM signals to each high-voltage interlock circuit, and the PWM signals return to the high-voltage interlock fault handling device in the controller after passing through each high-voltage component in the high-voltage interlock circuit.

[0140] In some implementations, the controller processes the received PWM signal to determine the duty cycle and period of the received PWM signal.

[0141] In some implementations, when at least two high-voltage interlock circuits correspond to the same controller, the PWM chip sends a PWM signal to each high-voltage interlock circuit. In this way, the high-voltage interlock fault handling device in the controller receives the PWM signal returned by each high-voltage interlock circuit and processes each returned PWM signal to determine the duty cycle and period of each returned PWM signal.

[0142] Step S206: If the circuit detection result is open circuit or short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold, determine that the target high-voltage interlock circuit triggers a fault signal.

[0143] In some implementations, a high-voltage interlock circuit fault signal is determined when the circuit detection result is an open circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold. A high-voltage interlock circuit fault signal is also determined when the circuit detection result is a short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold.

[0144] Based on the above technical means, the circuit detection results of the pulse width modulation chip and the PWM signal are used to jointly determine whether there is a fault in the high-voltage interlock circuit, thereby improving the accuracy of fault diagnosis of the high-voltage interlock circuit.

[0145] The following describes the above-mentioned high-voltage interlock system and the method for handling high-voltage interlock faults applied to the high-voltage interlock system using a specific embodiment. For ease of understanding, the following example illustrates that the thermal management high-voltage interlock circuit and the front-end power drive high-voltage interlock circuit correspond to the same controller, while the battery high-voltage interlock circuit, the rear-end power drive high-voltage interlock circuit, and the charge-discharge high-voltage interlock circuit correspond to different controllers. This describes a possible process applicable to the embodiments of this application. However, it is worth noting that this specific embodiment is only for better illustrating this application and does not constitute an improper limitation of this application.

[0146] The national standard GB 18384-2020 "Safety Requirements for Electric Vehicles" imposes mandatory safety requirements on high-voltage connectors. High-voltage interlock circuits can verify whether high-voltage connectors meet these safety requirements, making them a crucial design component of the high-voltage circuit in electric vehicles. High-voltage interlock circuits utilize low-voltage circuits to detect the continuity of the high-voltage circuit. Voltage, current, or resistance in the low-voltage circuit can be used to determine the proper connection of high-voltage components. However, conventional high-voltage interlock circuit layouts are relatively simple and not arranged according to the functional sets of high-voltage components, resulting in excessively long wiring harnesses. This hinders the localization of high-voltage interlock problems and is detrimental to cost control. Furthermore, the single signal detection method of high-voltage interlock circuits may lead to false alarms or missed alarms. Moreover, the post-fault handling lacks a strategy for individual fault handling for each high-voltage interlock circuit within the functional set; a one-size-fits-all approach, such as cutting off high-voltage power, may cause power loss in the electric vehicle and lead to safety accidents.

[0147] This embodiment proposes a distributed high-voltage interlock system, which is divided into multiple high-voltage interlock circuits according to the installation area and functional clusters of high-voltage components. Different high-voltage interlock circuits are connected and monitored by different controllers, and can be expanded and added to. This distributed high-voltage interlock system can shorten the wiring of high-voltage interlock circuits, facilitate the identification of high-voltage interlock problems, and facilitate the isolation and handling of problematic modules after a problem occurs.

[0148] like Figure 1 As shown, the distributed high-voltage interlock system includes a thermal management high-voltage interlock circuit 1, a front-end power drive high-voltage interlock circuit 2, a battery high-voltage interlock circuit 3, a rear-end power drive high-voltage interlock circuit 4, and a charge / discharge high-voltage interlock circuit 5. The thermal management high-voltage interlock circuit 1 and the front-end power drive high-voltage interlock circuit 2 correspond to controller 61, the battery high-voltage interlock circuit 3 corresponds to controller 62, the rear-end power drive high-voltage interlock circuit 4 corresponds to controller 63, and the charge / discharge high-voltage interlock circuit 5 corresponds to controller 64. Figure 3A As shown, controllers 61, 62, 63, and 64 exchange information via a bus. It should be noted that... Figure 1 The diagram shows a typical structure where the thermal management high-voltage interlock circuit 1 and the front-end power drive high-voltage interlock circuit 2 share a single controller, while the remaining circuits are each controlled by a separate controller. In practical applications, one or more high-voltage interlock circuits can be integrated into any single controller depending on the specific layout.

[0149] This embodiment proposes a fault detection method for high-voltage interlocks in such distributed high-voltage interlock systems. It employs a dual redundancy verification method. First, the PWM chip performs a self-test to determine if there is an open-circuit or short-circuit electrical fault. If so, a preliminary determination can be made that there is a problem with the interlock circuit. Then, the fault processing logic module (a high-voltage interlock fault processing device) analyzes the duty cycle and period of the received PWM signal. By determining whether both the duty cycle and period are within the expected range, it confirms whether there is a problem with the high-voltage interlock circuit, thus confirming the occurrence of a high-voltage interlock fault.

[0150] like Figure 3B As shown, steps S301 to S314 are included:

[0151] Step S301: PWM signal transmission and reception;

[0152] Here, the PWM signal is used as the detection signal for the high-voltage interlock circuit. In implementation, firstly, the duty cycle and period of the PWM signal are set through the fault handling logic module. Then, the PWM chip in the controller continuously generates the PWM signal according to the set duty cycle and period and outputs it to the high-voltage interlock circuit. Finally, the PWM signal is received by the fault handling logic module after passing through the high-voltage interlock circuit.

[0153] Step S302: The PWM chip performs a self-test;

[0154] Here, if it is (Y), proceed to step S303; if it is (N), proceed to step S301.

[0155] During implementation, the PWM chip continuously diagnoses the circuit built into the PWM chip and sends the diagnosis results to the fault handling logic module. When the diagnosis result is an open circuit or a short circuit, the process proceeds to step S303.

[0156] Step S303: Whether the received duty cycle and period are within the preset range;

[0157] Here, if it is (Y), proceed to step S302; if it is (N), proceed to step S304.

[0158] During implementation, the fault handling logic module continuously identifies and judges the received PWM signal. First, it determines the period and duty cycle of the received PWM signal. Then, it compares the period and duty cycle with preset period thresholds and duty cycle thresholds, respectively. If the period is greater than the period threshold, the duty cycle is greater than the duty cycle threshold, or there is an electrical fault (open circuit or short circuit) from the PWM chip, a high-voltage interlock fault is preliminarily determined to have occurred.

[0159] Step S304: Is the vehicle in a drivable condition?

[0160] Here, if it is (Y), proceed to step S308; if it is (N), proceed to step S305.

[0161] In practice, the drivability of an electric vehicle is determined by whether its gear is in Park (P) or its power status is Ready. Based on this drivability, the driver's intention is assessed. For example, if the electric vehicle is not drivable, it is assumed that the driver has no immediate need to drive and there is a possibility of touching high-voltage components, resulting in the highest risk of an accident, triggering timer 11. If the vehicle is drivable, further speed assessment is conducted, requiring a further evaluation of the risk of an accident.

[0162] Step S305: Timer 11;

[0163] Here, once it is determined that the electric vehicle is not in motion, timer 11 is started to count.

[0164] Step S306: Timing is greater than T1;

[0165] Here, if it is yes (Y), proceed to step S307; if it is no (N), proceed to step S305. During implementation, the timing of timer 11 is compared with the preset T1.

[0166] Step S307: High-voltage interlock level 1 fault;

[0167] Here, if the timer 11 counts more than T1, a high-voltage interlock level one fault is determined to have occurred.

[0168] Step S308: Is the vehicle speed greater than N?

[0169] Here, if it is no (N), proceed to step S309; ​​if it is yes (Y), proceed to step S312.

[0170] If the vehicle is drivable but the speed is low, for example, N is 5 km / h, and the current speed is less than or equal to 5 km / h, the possibility of the driver touching the high voltage cannot be ruled out, and the risk of triggering an accident is considered high. In this case, measures should be taken in time to prevent the fault from worsening. This type of trigger timer is 12. If the current speed is greater than 5 km / h, the possibility of the driver touching the high voltage device is small. In this case, driving safety should be the priority, and power interruption should be avoided as much as possible. This type of trigger timer is 13.

[0171] Step S309: Timer 12;

[0172] Here, when it is determined that the electric vehicle is in motion and the speed is less than or equal to N, timer 12 is started to count.

[0173] Step S310: Timing is greater than T2;

[0174] Here, if it is (Y), proceed to step S311; if it is (N), proceed to step S309. During implementation, the timing of timer 12 is compared with the preset T2.

[0175] Step S311: High-voltage interlock level 2 fault;

[0176] Here, if the timer 12 counts more than T2, a high-voltage interlock level 2 fault is determined to have occurred.

[0177] Step S312: Timer 13;

[0178] Here, when it is determined that the electric vehicle is in motion and the speed is greater than N, timer 13 is started to count.

[0179] Step S313: Timing is greater than T3;

[0180] Here, if it is yes (Y), proceed to step S314; if it is no (N), proceed to step S312. During implementation, the timing of timer 13 is compared with the preset T2.

[0181] Step S314: High-voltage interlock level three fault;

[0182] Here, if the timer 13 counts more than T2, a high-voltage interlock level 3 fault is determined to have occurred.

[0183] This embodiment proposes a fault handling method for high-voltage interlocks applied to such a distributed high-voltage interlock system, and illustrates the corresponding execution measures for each high-voltage interlock circuit in the high-voltage interlock system at different fault levels.

[0184] like Figure 4 As shown, the execution strategies for a single high-voltage interlock fault at different levels may include steps S401 to S406:

[0185] Step S401: Level 1 fault of high-voltage interlock on one line;

[0186] Here, "Level 1 fault of high-voltage interlock" refers to the high-voltage interlock circuit 1 of the thermal management circuit triggering a high-voltage interlock level 1 fault alarm event.

[0187] Step S402: Prohibit high voltage access and issue the highest level of warning to the user;

[0188] Here, when a high-voltage interlock level one fault alarm event is triggered, the driver has no need to drive at this time. The driver should be prohibited from accessing the high voltage, and the user should be prompted with the highest level of warning that immediate maintenance is required to avoid the subsequent escalation of the fault and the occurrence of high-voltage electric shock accidents.

[0189] Step S403: Level 2 fault of high-voltage interlock on line 1;

[0190] Here, "Level 2 fault of high-voltage interlock" refers to the high-voltage interlock circuit 1 of the thermal management circuit triggering a Level 2 fault alarm event.

[0191] Step S404: Disable the power of air conditioners and PTC devices, and issue the highest level of warning to the user;

[0192] Here, when a high-voltage interlock level 2 fault alarm event is triggered, the operation of high-voltage components such as air conditioners and PTCs should be prohibited, and the user should be prompted to carry out maintenance immediately to avoid the fault from escalating.

[0193] Step S405: Level 3 fault of high-voltage interlock on one circuit;

[0194] Here, "Level 3 fault of high-voltage interlock" refers to the high-voltage interlock circuit 1 of the thermal management circuit triggering a Level 3 fault alarm event.

[0195] Step S406: Disable the power of air conditioners and PTC devices, and provide a general warning to the user;

[0196] Here, when a high-voltage interlock level 3 fault alarm event is triggered, the operation of high-voltage components such as air conditioners and PTCs should be prohibited, and the user should be prompted to perform maintenance while ensuring driving safety to the greatest extent possible.

[0197] The execution strategies for two-way high-voltage interlock faults at different levels may include steps S407 to S412:

[0198] Step S407: Level 1 fault of two-channel high-voltage interlock;

[0199] Here, "Level 1 fault of high-voltage interlock" refers to the high-voltage interlock circuit 2 of the front-end power drive triggering a high-voltage interlock level 1 fault alarm event.

[0200] Step S408: Prohibit high voltage application; issue the highest level of warning to the user.

[0201] Step S409: Level 2 fault of high-voltage interlock for two circuits;

[0202] Here, "Level 2 fault of high voltage interlock" refers to the high voltage interlock circuit 2 of the front-end power drive triggering a high voltage interlock level 2 fault alarm event.

[0203] Step S410: No rear-wheel drive: Delay high voltage; With rear-wheel drive: Front motor power limited to 0, highest level prompt to user;

[0204] Here, when a high-voltage interlock level 2 fault alarm event is triggered, in the case of no rear-wheel drive, the high-voltage operation should be delayed after reminding the user to ensure that the driver has time to operate and stop the vehicle autonomously; in the case of rear-wheel drive, the power of the front motor should be limited to 0, and the required torque transmitted to the front motor should be transferred to the rear motor for execution; and the user should be prompted to carry out maintenance immediately.

[0205] Step S411: Level 3 fault of high-voltage interlock for 2 lines;

[0206] Here, "Level 3 fault of high-voltage interlock" refers to the high-voltage interlock circuit 2 of the front-end power drive high-voltage interlock circuit triggering a high-voltage interlock level 3 fault alarm event.

[0207] Step S412: No rear-wheel drive: Limit the output power of the front motor; With rear-wheel drive: Limit the power of the front motor to 0; General level prompts the user;

[0208] Here, when a high-voltage interlock level 3 fault alarm event is triggered, in the case of no rear-wheel drive, the output power of the front motor is limited to ensure that the driver can continue driving; in the case of rear-wheel drive, the power of the front motor is limited to 0, the required torque transmitted to the front motor is transferred to the rear motor for execution, and the user is prompted to perform maintenance.

[0209] The execution strategies for three-way high-voltage interlock faults at different levels may include steps S413 to S418:

[0210] Step S413: Level 1 fault of 3-channel high-voltage interlock;

[0211] Here, "Level 1 fault of 3-way high voltage interlock" refers to the high voltage interlock circuit 3 of the battery triggering a Level 1 fault alarm event.

[0212] Step S414: Prohibit high voltage and issue the highest level of warning to the user;

[0213] Step S415: Level 2 fault of 3-channel high-voltage interlock;

[0214] Here, "Level 2 fault of high voltage interlock" refers to the high voltage interlock circuit 3 of the battery triggering a Level 2 fault alarm event.

[0215] Step S416: Charging power is limited to 0, discharging power is limited to 0, high voltage is delayed, and the user is prompted with the highest level of warning;

[0216] Here, when a high-voltage interlock level 2 fault alarm event is triggered, both charging and discharging power are limited to 0, and the high voltage is delayed to ensure that the driver can stop the vehicle independently and prompt the user to have it inspected immediately.

[0217] Step S417: Level 3 fault of three-channel high-voltage interlock;

[0218] Here, "Level 3 fault of high voltage interlock" refers to the high voltage interlock circuit 3 of the battery triggering a Level 3 fault alarm event.

[0219] Step S418: Charging power is limited to 0, discharging power is limited to a certain value, and a general level prompt is given to the user;

[0220] Here, when a high-voltage interlock level 3 fault alarm event is triggered, the charging power is limited to 0, and the discharging power is limited to a certain value to ensure that the driver can continue driving and to prompt the user to carry out maintenance.

[0221] The execution strategies for four-way high-voltage interlock faults at different levels may include steps S419 to S424:

[0222] Step S419: Level 1 fault of 4-channel high-voltage interlock;

[0223] Here, "Level 1 fault of 4-way high-voltage interlock" refers to the high-voltage interlock circuit 4 of the back-end power drive triggering a high-voltage interlock level 1 fault alarm event.

[0224] Step S420: Prohibit high voltage application; issue the highest level of warning to the user.

[0225] Here, when a high-voltage interlock level one fault alarm event is triggered, the driver has no need to drive at this time. The driver should be prohibited from accessing the high voltage, and the user should be prompted with the highest level of warning that immediate maintenance is required to avoid the subsequent escalation of the fault and the occurrence of high-voltage electric shock accidents.

[0226] Step S421: Level 2 fault of 4-channel high-voltage interlock;

[0227] Here, "Level 2 fault of high voltage interlock" refers to the high voltage interlock circuit 4 of the back-end power drive triggering a Level 2 fault alarm event.

[0228] Step S422: No front-wheel drive: Delay high voltage; With front-wheel drive: Rear motor power limited to 0, highest level prompt to user;

[0229] Here, when a high-voltage interlock level 2 fault alarm event is triggered, if there is no front-wheel drive, the high voltage will be delayed to ensure that the driver can stop the vehicle independently; if there is front-wheel drive, the power of the rear motor will be limited to 0, the required torque transmitted to the rear motor will be transferred to the front motor for execution, and the user will be prompted to perform immediate maintenance.

[0230] Step S423: Level 3 fault of 4-channel high-voltage interlock;

[0231] Here, the "Level 3 fault of the 4-way high-voltage interlock" refers to the high-voltage interlock circuit 4 of the back-end power drive triggering a Level 3 fault alarm event.

[0232] Step S424: No front-wheel drive: Limit motor power; With front-wheel drive: Rear motor power is limited to 0, and the user is prompted with a general level warning;

[0233] Here, when a high-voltage interlock level 3 fault alarm event is triggered, in the case of no front-wheel drive, the power of the rear motor should be limited to a certain value. In the case of front-wheel drive, the power of the rear motor should be limited to 0, and the required torque transmitted to the rear motor should be transferred to the front motor for execution, prompting the user to perform maintenance.

[0234] The execution strategies for 5-channel high-voltage interlock faults at different levels may include steps S425 to S430:

[0235] Step S425: Level 1 fault of 5-channel high-voltage interlock;

[0236] Here, "Level 1 fault of 5-channel high-voltage interlock" refers to the high-voltage interlock circuit 5 triggering a high-voltage interlock level 1 fault alarm event.

[0237] Step S426: Prohibit high voltage access and issue the highest level of warning to the user;

[0238] Step S427: Level 2 fault of 5-channel high-voltage interlock;

[0239] Here, the "Level 2 fault of the 4-way high-voltage interlock" refers to the high-voltage interlock circuit 5 triggering a Level 2 fault alarm event.

[0240] Step S428: Limit external charging and discharging power to 0, delay the application of high voltage, and provide the highest level of user alert;

[0241] Here, when a high-voltage interlock level 2 fault alarm event is triggered, the external charging and discharging power will be limited to 0, and the high voltage will be delayed to ensure that the driver can stop the vehicle independently and prompt the user to have it inspected immediately.

[0242] Step S429: Level 3 fault of 5-channel high-voltage interlock;

[0243] Here, the 5-channel high-voltage interlock level 3 fault refers to the charging and discharging high-voltage interlock circuit 5 triggering a high-voltage interlock level 3 fault alarm event.

[0244] Step S430: External charging and discharging power is limited to 0, and a general level prompt is given to the user;

[0245] Here, when a high-voltage interlock level 3 fault alarm event is triggered, the external charging and discharging power will be limited to 0, and the user will be prompted to perform maintenance.

[0246] This embodiment first discloses a high-voltage interlock architecture and then performs logic design for the high-voltage interlock based on this architecture, including fault diagnosis and handling methods after a fault occurs. Specifically, it includes: dividing the high-voltage interlock into multiple circuits and controllers according to components and functional clusters, solving the problems of too many series-connected components in the high-voltage interlock circuit, which hinders problem point identification, and addressing the issues of excessively long wiring harnesses, complex layout, and high cost. It uses the PWM signal emitted by the controller and the PWM chip within the controller for joint judgment, avoiding signal interference on the circuit and solving the problem of inaccurate interlock fault diagnosis. Different fault handling methods are used to differentiate between different scenarios and architectures, maximizing the safety of passengers while addressing high-voltage safety issues.

[0247] Based on the foregoing embodiments, this application provides a high-voltage interlock fault handling device. The device includes various modules and units included in each module, which can be implemented by a processor in an electric vehicle; of course, it can also be implemented by specific logic circuits. In the implementation process, the processor can be a central processing unit (CPU), a microprocessor unit (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA), etc.

[0248] Based on the foregoing embodiments, this embodiment provides a high-voltage interlock fault handling device, such as... Figure 5 As shown, the device includes: a first determining module 501, configured to determine the fault level of the target high-voltage interlock circuit based on the current driving speed of the electric vehicle in response to a fault signal of a target high-voltage interlock circuit among a plurality of high-voltage interlock circuits; wherein the plurality of high-voltage interlock circuits includes at least two of a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit; a second determining module 502, configured to determine a target processing strategy for the target high-voltage interlock circuit corresponding to the fault level; and a third determining module 503, configured to control the operation of high-voltage components in the target high-voltage interlock circuit based on the target processing strategy.

[0249] In this embodiment, the target high-voltage interlock circuit includes a thermal management high-voltage interlock circuit; the high-voltage components in the thermal management high-voltage interlock circuit include an air conditioning compressor, a positive temperature coefficient connector, and a positive temperature coefficient heater; the second determining module includes at least one of the following: a first determining unit, configured to determine the target handling strategy as follows when the fault level is a level one fault: prohibit the electric vehicle from accessing the high voltage and prompt the user to perform immediate maintenance; a second determining unit, configured to determine the target handling strategy as follows when the fault level is a level two fault: prohibit the operation of the air conditioning compressor, the positive temperature coefficient connector, and the positive temperature coefficient heater on the thermal management high-voltage interlock circuit and prompt the user to perform maintenance; a third determining unit, configured to determine the target handling strategy as follows when the fault level is a level three fault: prohibit the operation of the high-voltage components on the thermal management high-voltage interlock circuit and prompt the user to perform maintenance.

[0250] In this embodiment, the target high-voltage interlock circuit includes a front-end power drive high-voltage interlock circuit; the high-voltage component in the front-end power drive high-voltage interlock circuit includes a front-end motor; the second determining module includes at least one of the following: a fourth determining unit, used to determine the target processing strategy as follows when the fault level is a level one fault: prohibit the electric vehicle from accessing the high voltage and prompt the user to perform immediate maintenance; a fifth determining unit, used to determine the target processing strategy as follows when the fault level is a level two fault: delay the electric vehicle from accessing the high voltage when the electric vehicle has no rear-wheel drive and prompt the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limit the output power of the front-end motor to 0, while transmitting the required torque to the front-end motor to the rear-end motor, and prompt the user to perform maintenance; a sixth determining unit, used to determine the target processing strategy as follows when the fault level is a level three fault: limit the output power of the front-end motor to a first threshold when the electric vehicle has no rear-wheel drive, and prompt the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limit the output power of the front-end motor to 0, while transmitting the required torque to the front-end motor to the rear-end motor, and prompt the user to perform maintenance.

[0251] In this embodiment, the target high-voltage interlock circuit includes a battery high-voltage interlock circuit; the high-voltage component in the battery high-voltage interlock circuit includes a power battery; the second determining module includes at least one of the following: a seventh determining unit, used to determine the target handling strategy as follows when the fault level is a level one fault: prohibit the electric vehicle from accessing the high voltage, and prompt the user to perform immediate maintenance; an eighth determining unit, used to determine the target handling strategy as follows when the fault level is a level two fault: limit both the charging power and discharging power of the power battery to 0, delay the electric vehicle from accessing the high voltage, and prompt the user to perform maintenance; a ninth determining unit, used to determine the target handling strategy as follows when the fault level is a level three fault: limit the charging power to 0, limit the discharging power to a second threshold, and prompt the user to perform maintenance.

[0252] In this embodiment, the target high-voltage interlock circuit includes a rear-end power drive high-voltage interlock circuit; the high-voltage component in the rear-end power drive high-voltage interlock circuit includes a rear-end motor; the second determining module includes at least one of the following: a tenth determining unit, configured to determine the target handling strategy as follows when the fault level is a level one fault: prohibiting the electric vehicle from accessing the high voltage and prompting the user to perform immediate maintenance; an eleventh determining unit, configured to determine the target handling strategy as follows when the fault level is a level two fault: delaying the electric vehicle from accessing the high voltage and prompting the user to perform maintenance when the electric vehicle has no front-wheel drive; or, when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, delaying the electric vehicle from accessing the high voltage and prompting the user to perform maintenance ... the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the electric vehicle has no front-wheel drive, the target handling strategy is as follows: when the When the electric vehicle has front-wheel drive, the output power of the rear motor is limited to 0, while the required torque transmitted to the front motor is transmitted to the rear motor, and the user is prompted to perform maintenance; the twelfth determining unit is used to determine the target processing strategy as follows when the fault level is a level three fault: when the electric vehicle does not have front-wheel drive, the output power of the front motor is limited to a third threshold, and the user is prompted to perform maintenance; or, when the electric vehicle has front-wheel drive, the output power of the rear motor is limited to 0, while the required torque transmitted to the front motor is transmitted to the rear motor, and the user is prompted to perform maintenance.

[0253] In this embodiment, the target high-voltage interlock circuit includes a charging and discharging high-voltage interlock circuit; the high-voltage component in the charging and discharging high-voltage interlock circuit includes an on-board charger; the second determining module includes at least one of the following: a thirteenth determining unit, configured to determine the target handling strategy as follows when the fault level is a level one fault: prohibit the electric vehicle from accessing the high voltage and prompt the user to perform immediate maintenance; a fourteenth determining unit, configured to determine the target handling strategy as follows when the fault level is a level two fault: limit the external charging and discharging power of the on-board charger to 0, delay the electric vehicle from accessing the high voltage, and prompt the user to perform maintenance; a fifteenth determining unit, configured to determine the target handling strategy as follows when the fault level is a level three fault: limit the external charging and discharging power of the on-board charger to 0, and prompt the user to perform maintenance.

[0254] In this embodiment, the first determining module includes: a sixteenth determining unit, used to determine the target speed range in which the current driving speed of the electric vehicle is located from multiple speed ranges that correspond one-to-one with multiple fault levels; and a seventeenth determining unit, used to determine the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range.

[0255] In this embodiment, the seventeen determining units include: a first determining subunit, used to determine a preset duration threshold corresponding to the target speed range; and a second determining subunit, used to determine the fault level corresponding to the target high-voltage interlock triggering the target speed range when the fault signal of the target high-voltage interlock circuit continuously triggers the duration threshold.

[0256] In this embodiment, the seventeen determining units include: a third determining subunit, used to determine a preset number threshold corresponding to the target speed range; and a fourth determining subunit, used to determine the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit when the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to the number threshold within a fixed duration.

[0257] In this embodiment, the device includes: a fourth determining module, used to determine the detection result of the pulse width modulation chip in the high-voltage interlock circuit; the detection result includes at least one or more of the following: normal, short circuit, and open circuit; a fifth determining module, used to determine the duty cycle and period of the received pulse width modulation signal in the high-voltage interlock circuit; and a sixth determining module, used to determine the high-voltage interlock circuit trigger fault signal when the detection result is open circuit or short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold.

[0258] This embodiment also proposes a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements some or all of the steps in the above-described method. The computer-readable storage medium can be transient or non-transient.

[0259] This embodiment also proposes a computer program including computer-readable code, wherein when the computer-readable code is run in a computer device, a processor in the computer device performs some or all of the steps for implementing the above-described method.

[0260] This embodiment also proposes a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0261] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referred to interchangeably. The descriptions of the storage medium, computer program, and computer program product embodiments above are similar to the descriptions of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium, computer program, and computer program product embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0262] The above embodiments are merely preferred embodiments provided to fully illustrate this application, and the scope of protection of this application is not limited thereto. Equivalent substitutions or modifications made by those skilled in the art based on this application are all within the scope of protection of this application.

Claims

1. A method for handling high-voltage interlock faults, characterized in that, The method includes: In response to a fault signal from a target high-voltage interlock circuit among multiple high-voltage interlock circuits, a target speed range corresponding to the current driving speed of the electric vehicle is determined from multiple speed ranges that correspond one-to-one with multiple fault levels; the fault level increases as the speed range decreases; the fault level is used to characterize the risk of the driver touching high-voltage components; the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range is determined; wherein, the multiple high-voltage interlock circuits include at least two of the following: thermal management high-voltage interlock circuit, front-end power drive high-voltage interlock circuit, battery high-voltage interlock circuit, rear-end power drive high-voltage interlock circuit, and charge / discharge high-voltage interlock circuit; the multiple high-voltage interlock circuits are obtained by dividing multiple high-voltage components in the electric vehicle according to their setting areas and functions; the high-voltage components in the thermal management high-voltage interlock circuit include an air conditioning compressor, a positive temperature coefficient connector, and a positive temperature coefficient heater; the high-voltage components in the front-end power drive high-voltage interlock circuit include a front-end motor; the high-voltage components in the battery high-voltage interlock circuit include a power battery; the high-voltage components in the rear-end power drive high-voltage interlock circuit include a rear-end motor; and the high-voltage components in the charge / discharge high-voltage interlock circuit include an on-board charger. Determine the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level; Based on the target processing strategy, control the operation of high-voltage components in the target high-voltage interlock circuit; Wherein: determining the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit includes: Determine a preset duration threshold corresponding to the target speed range; if the fault signal of the target high-voltage interlock circuit continuously triggers the duration threshold, determine the fault level corresponding to the target high-voltage interlock triggering the target speed range; or, Determine a preset threshold number of occurrences corresponding to the target speed range; if the number of fault signals triggered by the target high-voltage interlock circuit is greater than or equal to the threshold number of occurrences within a fixed duration, determine the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range; The method further includes: The circuit detection result of the pulse width modulation chip in the target high-voltage interlock circuit is determined; the circuit detection result includes one of the following: normal, short circuit, and open circuit; the circuit detection result is determined based on the diagnostic voltage emitted by the pulse width modulation chip. Determine the duty cycle and period of the pulse width modulation signal received in the target high-voltage interlock circuit; If the circuit detection result is an open circuit or short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold, then the target high-voltage interlock circuit is determined to trigger a fault signal.

2. The method based on claim 1, characterized in that, The target high-voltage interlock circuit includes a thermal management high-voltage interlock circuit; the target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out immediate maintenance; In the case of a level 2 fault, the target handling strategy is determined to be: to disable the operation of the air conditioning compressor, the positive temperature coefficient connector, and the positive temperature coefficient heater, and to prompt the user to perform maintenance at the highest level. In the case of a level 3 fault, the target handling strategy is determined to be: to disable the operation of the air conditioning compressor, the positive temperature coefficient connector, and the positive temperature coefficient heater, and to prompt the user to perform maintenance in a general manner.

3. The method based on claim 1, characterized in that, The target high-voltage interlock circuit includes a front-end power-driven high-voltage interlock circuit; The target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out immediate maintenance; In the case of a level 2 fault, the target handling strategy is determined as follows: when the electric vehicle has no rear-wheel drive, delay the depressurization of the electric vehicle and prompt the user to perform maintenance; or, when the electric vehicle has rear-wheel drive, limit the output power of the front motor to 0, while transferring the required torque to the front motor to the rear motor, and prompt the user to perform maintenance. In the case of a level 3 fault, the target handling strategy is determined as follows: when the electric vehicle has no rear-wheel drive, the output power of the front motor is limited to a first threshold, and the user is prompted to perform maintenance; or, when the electric vehicle has rear-wheel drive, the output power of the front motor is limited to 0, while the required torque transmitted to the front motor is transmitted to the rear motor, and the user is prompted to perform maintenance.

4. The method according to claim 1, characterized in that, The target high-voltage interlock circuit includes a battery high-voltage interlock circuit; The target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out immediate maintenance; In the case of a level 2 fault, the target handling strategy is determined to be: limit both the charging power and discharging power of the power battery to 0, delay the high voltage of the electric vehicle, and prompt the user to perform maintenance. In the case of a level 3 fault, the target handling strategy is determined to be: limit the charging power to 0, limit the discharging power to a second threshold, and prompt the user to perform maintenance.

5. The method according to claim 1, characterized in that, The target high-voltage interlock circuit includes a back-end power-driven high-voltage interlock circuit. The target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out immediate maintenance; In the case of a level 2 fault, the target handling strategy is determined as follows: when the electric vehicle is not front-wheel drive, delay the depressurization of the electric vehicle and prompt the user to perform maintenance; or, when the electric vehicle is front-wheel drive, limit the output power of the rear motor to 0, while transferring the required torque to the rear motor to the front motor, and prompt the user to perform maintenance. In the case of a level three fault, the target handling strategy is determined as follows: when the electric vehicle has no front-wheel drive, the output power of the front motor is limited to the third threshold, and the user is prompted to perform maintenance; or, when the electric vehicle has front-wheel drive, the output power of the rear motor is limited to 0, while the required torque transmitted to the rear motor is transmitted to the front motor, and the user is prompted to perform maintenance.

6. The method according to any one of claims 1 to 5, characterized in that, The target high-voltage interlock circuit includes a charging and discharging high-voltage interlock circuit; The target handling strategy for determining the target high-voltage interlock circuit corresponding to the fault level includes at least one of the following: In the case of a level 1 fault, the target handling strategy is determined to be: prohibit the electric vehicle from being connected to high voltage and prompt the user to carry out immediate maintenance; In the case of a level 2 fault, the target handling strategy is determined to be: limit the external charging and discharging power of the on-board charger to 0, delay the high voltage of the electric vehicle, and prompt the user to perform maintenance. In the case of a level three fault, the target handling strategy is determined to be: limit the external charging and discharging power of the on-board charger to 0, and prompt the user to perform maintenance.

7. A high-voltage interlocking system, characterized in that, It includes multiple high-voltage interlock circuits; these multiple high-voltage interlock circuits include at least two of the following: a thermal management high-voltage interlock circuit, a front-end power drive high-voltage interlock circuit, a battery high-voltage interlock circuit, a rear-end power drive high-voltage interlock circuit, and a charge / discharge high-voltage interlock circuit; the multiple high-voltage interlock circuits are obtained by dividing multiple high-voltage components in the electric vehicle according to their setting areas and functions; wherein, the high-voltage components in the thermal management high-voltage interlock circuit include an air conditioning compressor, a positive temperature coefficient connector, and a positive temperature coefficient heater; the high-voltage components in the front-end power drive high-voltage interlock circuit include a front-end motor; the high-voltage components in the battery high-voltage interlock circuit include a power battery; the high-voltage components in the rear-end power drive high-voltage interlock circuit include a rear-end motor; and the high-voltage components in the charge / discharge high-voltage interlock circuit include an on-board charger; The high-voltage interlock system includes at least one controller, which includes a pulse width modulation chip and a high-voltage interlock fault handling device; wherein, The high-voltage interlock fault handling device is used to respond to a fault signal of a target high-voltage interlock circuit among multiple high-voltage interlock circuits, determine the target speed range where the electric vehicle's current driving speed is located from multiple speed ranges that correspond one-to-one with multiple fault levels; the fault level increases as the speed range decreases; the fault level is used to characterize the degree of risk of the driver touching high-voltage components; determine the fault level corresponding to the target speed range triggered by the target high-voltage interlock circuit; determine the target handling strategy for the target high-voltage interlock circuit corresponding to the fault level; and control the operation of the high-voltage components in the target high-voltage interlock circuit based on the target handling strategy. The high-voltage interlock fault handling device is further configured to: determine a preset duration threshold corresponding to the target speed range; determine the fault level corresponding to the target high-voltage interlock triggering the target speed range when the fault signal of the target high-voltage interlock circuit continuously triggers the duration threshold; or, determine a preset number threshold corresponding to the target speed range; determine the fault level corresponding to the target high-voltage interlock circuit triggering the target speed range when the number of times the fault signal triggered by the target high-voltage interlock circuit is greater than or equal to the number threshold within a fixed duration. The high-voltage interlock fault handling device is further configured to: determine the circuit detection result of the pulse width modulation chip in the target high-voltage interlock circuit; the circuit detection result includes one of the following: normal, short circuit, and open circuit; the circuit detection result is determined based on the diagnostic voltage emitted by the pulse width modulation chip; determine the duty cycle and period of the received pulse width modulation signal in the target high-voltage interlock circuit; and determine the target high-voltage interlock circuit trigger fault signal when the circuit detection result is open circuit or short circuit, the duty cycle is greater than a preset duty cycle threshold, and the period is greater than a preset period threshold.

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