Modulation Method for Soft-Switching Isolated Bridgeless Buck-Boost PFC Converter with Output Second Harmonic Voltage Suppression

Abstract

This invention discloses a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression. It consists of 11 switching transistors, a transformer, an inductor, a clamping capacitor, and an output filter capacitor, employing a single-stage structure. This converter suppresses the second harmonic on the output side through effective control of the switching devices using the clamping capacitor, thus reducing the output filter capacitor size. Simultaneously, the converter achieves power factor correction, high buck ratio output, and electrical isolation. It also enables soft switching of the switching transistors with relatively low voltage stress.

Description

Technical Field

[0001] This invention relates to power electronic circuit technology, specifically to a soft-switching isolated bridgeless Buck-Boost PFC converter and modulation method for suppressing output second harmonic voltage. Background Technology

[0002] With the rapid development of power electronics, a large number of high-frequency switching devices generate harmonic pollution, which seriously affects the power quality of the power grid. In order to improve the power quality of the power grid and the system power factor, active power factor correction technology has attracted much attention from scholars.

[0003] Traditional PFC converters are typically boost-type PFC converters, which have excessively high output voltages. In most cases, cascaded DC-DC converters are required to achieve voltage reduction, increasing hardware costs and control complexity. Unlike boost-type PFC converters, four-switch Buck-Boost PFC converters can achieve a wide voltage output range, with lower voltage stress on the switching transistors, and both transistors can achieve soft switching. Four-switch Buck-Boost PFC converters can be divided into isolated and non-isolated types. Compared to non-isolated four-switch Buck-Boost PFC converters, isolated four-switch Buck-Boost PFC converters achieve electrical isolation and can achieve a wider voltage reduction output range. However, they use a diode rectifier bridge, resulting in higher conduction losses and affecting converter efficiency. Furthermore, because the input power contains harmonics at twice the input voltage frequency (referred to as second harmonics), a large second harmonic voltage exists on the output side, requiring a large output filter capacitor in parallel, thus affecting the converter's power density. Summary of the Invention

[0004] The purpose of this invention is to provide a soft-switching isolated bridgeless Buck-Boost PFC converter and modulation method for suppressing the output second harmonic voltage.

[0005] The technical solution to achieve the purpose of this invention is: a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression, including switching transistors Q1~Q2. 11 Transformer, Inductor L R Clamping capacitor C R and output filter capacitor C oThe source of the first switch Q1 is connected to the drain of the second switch Q2, the source of the third switch Q3 is connected to the drain of the fourth switch Q4, the source of the second switch Q2 is connected to the source of the fourth switch Q4, the drain of the fifth switch Q5 is connected to the drain of the sixth switch Q6, the source of the fifth switch Q5 is connected to the source of the first switch Q1 and the drain of the second switch Q2, and the source of the sixth switch Q6 is connected to the source of the third switch Q3 and the drain of the fourth switch Q4.

[0006] The drain of the first switch Q1 is connected to one end of the AC power supply, defined as terminal a. The drain of the third switch Q3 is connected to the other end of the AC power supply, defined as terminal b. The source of the seventh switch Q7 is connected to the drain of the eighth switch Q8. The source of the ninth switch Q9 is connected to the drain of the tenth switch Q1. 10 The drains of the seventh switch Q7 and the ninth switch Q9 are connected to the clamping capacitor C. R The positive terminals are connected, the source of the eighth switch Q8, and the tenth switch Q... 10 The source and clamping capacitance C R The negative terminals are connected;

[0007] One end of the transformer primary side, defined as terminal c, is connected to the drain of the fifth switch Q5 and the drain of the sixth switch Q6 in the AC side bridge arm. The other end of the transformer primary side, defined as terminal d, is connected to the inductor L. R One end is connected, inductor L R The other end is connected to the source of the seventh switch Q7 and the drain of the eighth switch Q8 in the DC-side bridge arm, and the source of the ninth switch Q9 and the tenth switch Q8. 10 The drain of the eleventh switch Q is connected to the source of the second switch Q2 and the source of the fourth switch Q4. 11 The source and output filter capacitor C o The negative terminal is connected; one end of the transformer secondary side, defined as the e terminal, is connected to the output filter capacitor C. o The positive terminal is connected to the positive terminal, and the other end of the transformer secondary side is defined as terminal f, which is connected to the eleventh switch Q. 11 The drains are connected, and the C terminal and F terminal of the transformer are of the same name.

[0008] A modulation method for the soft-switching isolated bridgeless Buck-Boost PFC converter used for output second harmonic voltage suppression is as follows:

[0009] When the AC power supply voltage v inWhen the voltage at terminal a of the AC power supply is greater than the voltage at terminal b, the drive signals of the first switch Q1 and the second switch Q2 are complementary and have a dead time. The third switch Q3, the fourth switch Q4, and the fifth switch Q5 are always on, the sixth switch Q6 is always off, the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time, and the drive signals of the ninth switch Q9 and the tenth switch Q8 are also complementary. 10 The drive signals are complementary and have a dead time. The first switch Q1 and the eighth switch Q8 are turned on simultaneously, and the seventh switch Q7 and the tenth switch Q8 are turned on simultaneously. 10 Simultaneously activated, the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the secondary current drops to zero. 11 Turn off;

[0010] When the AC power supply voltage v in When the voltage at terminal a of the AC power supply is less than the voltage at terminal b, the first switch Q1, the second switch Q2, and the sixth switch Q6 are always on; the drive signals of the third switch Q3 and the fourth switch Q4 are complementary and have a dead time; the fifth switch Q5 is always off; the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time; and the drive signals of the ninth switch Q9 and the tenth switch Q6 are also on. 10 The drive signals are complementary and have a dead time. The third switch Q3 and the eighth switch Q8 are turned on simultaneously, and the seventh switch Q7 and the tenth switch Q8 are turned on simultaneously. 10 Simultaneously activated, the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the secondary current drops to zero. 11 Turn off.

[0011] Furthermore, the modulation method of the soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression includes operating mode one and operating mode two. When the absolute value of the input voltage rises from zero to the peak value, the duty cycle of the first switch Q1 gradually changes from less than to equal to and finally greater than the duty cycle of the eighth switch Q8. When the duty cycle of the first switch Q1 is less than the duty cycle of the eighth switch Q8, the converter operates in mode one. When the duty cycle of the first switch Q1 is greater than the duty cycle of the eighth switch Q8, the converter operates in mode two. The two operating modes are switched smoothly.

[0012] Furthermore, the modulation method adjusts the clamping capacitor voltage to a given reference voltage by controlling the current flowing into the clamping capacitor, thereby enabling the clamping capacitor to completely absorb the second harmonic power on the input side and completely suppress the second harmonic voltage at the output.

[0013] Compared with the prior art, the significant advantages of this invention are: 1) It eliminates the use of a diode rectifier bridge, avoiding the conduction loss caused by the forward voltage drop of the rectifier diodes and improving the efficiency of the converter; 2) It uses a clamping capacitor C R Suppressing the second harmonic voltage of the output greatly reduces the output filter capacitor and improves the power density; 3) All switches in the converter can achieve zero-voltage turn-on, and the eleventh switch Q 11 It can achieve zero-current shutdown, which can further improve the efficiency of the converter; 3) It can achieve high buck ratio output of single-stage PFC converter. Attached Figure Description

[0014] Figure 1 This invention relates to a soft-switching isolated bridgeless Buck-Boost PFC converter circuit topology for suppressing the second harmonic output voltage.

[0015] Figure 2 These are the theoretical waveforms of the input instantaneous power, the power absorbed by the clamping capacitor, the clamping capacitor voltage, and the output instantaneous power.

[0016] Figure 3 The converter operates in mode one (v in Theoretical waveform under >0).

[0017] Figure 4 The converter operates in mode one (v in Theoretical waveform under <0).

[0018] Figure 5 The converter operates in mode two (v in >0 and v in <v R The theoretical waveform under )

[0019] Figure 6 The converter operates in mode two (v in >0 and v in >v R The theoretical waveform under )

[0020] Figure 7 The converter operates in mode two (v in <0 and -v in <v R The theoretical waveform under )

[0021] Figure 8 The converter operates in mode two (v in <0 and -v in >v R The theoretical waveform under )

[0022] Figure 9This is a simulation waveform diagram of the input current and input power of the converter of the present invention.

[0023] Figure 10 This is a simulation waveform diagram of the converter operating in mode 1.

[0024] Figure 11 This is a simulation waveform diagram of the converter operating in mode two. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0026] The topology of the soft-switching isolated bridgeless Buck-Boost PFC converter with second harmonic voltage suppression of the present invention is as follows: Figure 1 As shown, it includes 11 switching transistors Q1~Q2. 11 Transformer, Inductor L R Clamping capacitor C R and output filter capacitor C o In this configuration, the source of the first switch Q1 is connected to the drain of the second switch Q2; the source of the third switch Q3 is connected to the drain of the fourth switch Q4; the source of the second switch Q2 is connected to the source of the fourth switch Q4; the drain of the fifth switch Q5 is connected to the drain of the sixth switch Q6; the source of the fifth switch Q5 is connected to the source of the first switch Q1 and the drain of the second switch Q2; and the source of the sixth switch Q6 is connected to the source of the third switch Q3 and the drain of the fourth switch Q4. The drain of the first switch Q1 is connected to one end of the AC power supply, defined as terminal a; the drain of the third switch Q3 is connected to the other end of the AC power supply, defined as terminal b; the source of the seventh switch Q7 is connected to the drain of the eighth switch Q8; and the source of the ninth switch Q9 is connected to the drain of the tenth switch Q1. 10 The drains of the seventh switch Q7 and the ninth switch Q9 are connected to the clamping capacitor C. R The positive terminals are connected, the source of the eighth switch Q8, and the tenth switch Q... 10 The source and clamping capacitance C R The negative terminal is connected; one end of the transformer primary side, defined as terminal c, is connected to the drain of the fifth switch Q5 and the drain of the sixth switch Q6 in the AC side bridge arm; the other end of the transformer primary side, defined as terminal d, is connected to the inductor L. R One end is connected, inductor L R The other end is connected to the source of the seventh switch Q7 and the drain of the eighth switch Q8 in the DC-side bridge arm, and the source of the ninth switch Q9 and the tenth switch Q8. 10The drain of the eleventh switch Q is connected to the source of the second switch Q2 and the source of the fourth switch Q4. 11 The source and output filter capacitor C o The negative terminal is connected; one end of the transformer secondary side, defined as the e terminal, is connected to the output filter capacitor C. o The positive terminal is connected to the positive terminal, and the other end of the transformer secondary side is defined as terminal f, which is connected to the eleventh switch Q. 11 The drains are connected, and the C terminal and F terminal of the transformer are of the same name.

[0027] The switching transistors in the converter are all composed of a unidirectional switching transistor and a diode connected in reverse parallel. The switching transistor can be a transistor, IGBT, or MOSFET. When the switching transistor is a transistor or IGBT, the source of the switching transistor corresponds to the emitter of the transistor or IGBT, and the drain of the switching transistor corresponds to the collector of the transistor or IGBT. The cathode of the diode is connected to the drain of the switching transistor, and the anode of the diode is connected to the source of the switching transistor. When the switching transistor is a MOSFET, the source of the switching transistor corresponds to the source of the MOSFET, and the drain of the switching transistor corresponds to the drain of the MOSFET. The diode is the body diode of the MOSFET. The eleventh switching transistor Q... 11 It can be a diode.

[0028] The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression is as follows: The on / off states of the switching transistors in the converter during one switching cycle are shown in Table 1. When the AC power supply voltage v... in When the voltage at terminal a of the AC power supply is greater than the voltage at terminal b, the drive signals of the first switch Q1 and the second switch Q2 are complementary and have a dead time. The third switch Q3, the fourth switch Q4, and the fifth switch Q5 are always on, the sixth switch Q6 is always off, the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time, and the drive signals of the ninth switch Q9 and the tenth switch Q8 are also complementary. 10 The drive signals are complementary and have a dead time; the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the transformer secondary current (hereinafter referred to as secondary current) drops to zero. 11 Turn off; when the AC power supply voltage V in When the voltage at terminal a of the AC power supply is less than the voltage at terminal b, the first switch Q1, the second switch Q2, and the sixth switch Q6 are always on; the drive signals of the third switch Q3 and the fourth switch Q4 are complementary and have a dead time; the fifth switch Q5 is always off; the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time; and the drive signals of the ninth switch Q9 and the tenth switch Q6 are also on. 10The drive signals are complementary and have a dead time; the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the secondary current drops to zero. 11 Turn off.

[0029] Table 1 Switch conduction status

[0030] Input voltage polarity Switching transistor on state <![CDATA[v in >0]]> <![CDATA[The driving signals of Q1 and Q2 are complementary with a dead time. Q3, Q4, and Q5 are always on, Q6 is always off. The driving signals of Q7 and Q8 are complementary with a dead time. The driving signals of Q9 and Q 10 are complementary with a dead time. Q 11 turns on when there is current flowing through its antiparallel diode. Q 11 turns off when the secondary side current is zero.]]> <![CDATA[v in <0]]> <![CDATA[Q1, Q2, and Q6 are always on. The drive signals of Q3 and Q4 are complementary with a dead time. Q5 is always off. The drive signals of Q7 and Q8 are complementary with a dead time. The drive signals of Q9 and Q 10 are complementary with a dead time. Q 11 turns on when there is current flowing through its anti-parallel diode. Q 11 turns off when the secondary side current is zero.]]>

[0031] The modulation method of this converter includes two operating modes: mode one and mode two. When the absolute value of the input voltage rises from zero to the peak value, the duty cycle of the first switch Q1 gradually changes from less than to equal to and finally greater than the duty cycle of the eighth switch Q8. When the duty cycle of the first switch Q1 is less than the duty cycle of the eighth switch Q8, the converter operates in mode one. When the duty cycle of the first switch Q1 is greater than the duty cycle of the eighth switch Q8, the converter operates in mode two. The two operating modes switch smoothly.

[0032] The theoretical waveforms of the power absorbed by the clamping capacitor, the clamping capacitor voltage, and the instantaneous output power are as follows: Figure 2 As shown, this converter uses a clamping capacitor to suppress the output second harmonic voltage. The power p of the energy absorbed by the clamping capacitor... c Clamping capacitor voltage v R and the current i flowing into the clamping capacitor R The derivation process is as follows:

[0033] Assuming the input power factor is 1, the AC input voltage and input current can be expressed as follows:

[0034] (1)

[0035] (2)

[0036] In the formula, V m and I m ω represents the amplitude of the input voltage and the input current, respectively. in ω is the angular frequency of the AC input voltage.

[0037] Ignoring converter losses, the output power P o The expression is:

[0038] (3)

[0039] The power p absorbed by the clamping capacitor c The time is equal to the difference between the output power and the output power, so we can get: (4)

[0040] Combining formula (4), the capacitance C RThe energy absorbed is:

[0041] (5)

[0042] Meanwhile, capacitor C R The absorbed energy can also be expressed as:

[0043] (6)

[0044] Combining formulas (5) and (6), the clamping capacitor voltage v can be obtained. R The expression for (t) is:

[0045] (7)

[0046] In the formula, v R_min The minimum value of the clamping capacitor voltage, v R_min The value should be greater than nV o ω in The input voltage angular frequency.

[0047] This converter regulates the clamping capacitor voltage to the reference voltage shown in formula (7) by controlling the current flowing into the clamping capacitor. This allows the clamping capacitor to completely absorb the second harmonic power on the input side, thereby completely suppressing the second harmonic voltage at the output. Differentiating formula (7) yields the current i flowing into the clamping capacitor. R The expression for (t) is:

[0048] (8)

[0049] The magnetizing inductance of the transformer is L M The inductance value (the leakage inductance of the transformer is considered as part of the inductance) is L. R Clamping capacitor C R The voltage across the terminals is v R Load R L The voltage across the terminals is V o The ratio of the number of turns in the primary winding to the number of turns in the secondary winding of the transformer is n (n=N). p / N s Define the primary current i of the transformer. p (referred to as primary current) with (|v in |+v R ) / (L M +L R The slope changes over time T1, and the primary current i p With v R / (L M +L R The time for the slope to change is T. 2L Primary current (nV)o -v R ) / L R The slope changes over time T3, and the primary current changes in nV. o / L R The time for the slope to change is T. c The primary current remains constant for a period of time T4 (T4 = T s -T1-T2-T3-T c The dead time is t. dead Define five duty cycle variables D. a D b D c D x D y The absolute value of the minimum primary-side current required to achieve zero-voltage turn-on of all switching transistors is defined as I. ZVS .

[0050] The modulation method of a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression is divided into operating mode one and operating mode two.

[0051] (1) When the converter is operating in mode one;

[0052] In this mode, the absolute value of the input voltage is less than a set threshold V. th The first switch Q1 (V in >0) and the third switch Q3 (v in The duty cycle of <0) is greater than that of the eighth switch Q8, when the absolute value of the input voltage equals the set threshold V. th At that time, the first switching transistor Q1(v in >0) and the third switch Q3 (v in The duty cycle of <0) is equal to the duty cycle of the eighth switch Q8, i.e., T 2L =0, set the threshold V th The calculation formula is:

[0053]

[0054] Define the start time of a switching cycle as t0, and the time elapsed after t0 is... dead The time after the specified time length is t1, and time t1 is the time elapsed after (T1-t). dead The time after the specified time length is t2, and t2 is the time elapsed after t. dead The time after the specified time length is t3. At time t3, (T...) 2L -t dead The time after the specified time length is t4, and t4 is the time elapsed after t. dead The time after the specified time length is t5. Time t5 is the time elapsed after (T3-t). deadThe time after the specified time length is t6, and t6 is the time elapsed after t. dead The time after the specified duration is t7. Time t7 elapses (T c -t dead The time after the specified time length is t8, and time t8 is t... dead The time after the specified duration is t9. Time t9 is the time interval (T4-t). dead The time after the duration is t. 10 ;

[0055] (a) When v in When >0,

[0056] D a D b D c D x D y The values ​​are respectively the duty cycle of the first switch Q1, the duty cycle of the seventh switch Q7, and the duty cycle of the tenth switch Q... 10 The duty cycle, the difference between the turn-on time of the seventh switch Q7 and the turn-on time of the first switch Q1 (within one switching cycle, the first switch Q1 turns on first, and the seventh switch Q7 turns on later, i.e., D). x >0) and switching period T s The ratio of the tenth switch Q 10 The difference between the turn-on time and the turn-on time of the first switch Q1 (within one switching cycle, the first switch Q1 turns on first, then the tenth switch Q...). 10 It was opened later, namely D. y >0) and switching period T s The ratio of D; where D a =T1 / T s D b =(T3+T c +T4) / T s D c =T3 / T s D x =(T1+T 2L ) / T s D y =(T1+T 2L ) / T s The converter operates sequentially in the following phases within one switching cycle:

[0057] (1a) Phase 1 of the work:

[0058] Before the start time t0 of the switching cycle, the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9 are kept on, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the second switch Q2 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the first switch Q1 and the eighth switch Q8 are discharged, while the junction capacitances of the second switch Q2 and the seventh switch Q7 are charged; at time t1, the junction capacitance voltage v of the first switch Q1 is... ds_Q1 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 When discharged to 0, the junction capacitance voltage v of the second switch Q2... ds_Q2 Charged to v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R ;

[0059] (1b) Phase Two of Work:

[0060] At time t1, the first switch Q1 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on of the first switch Q1 and the eighth switch Q8. The third switch Q3, the fourth switch Q4, the fifth switch Q5, and the ninth switch Q9 are maintained on, while the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are maintained on. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0061] (1c) Phase Three of Work:

[0062] At time t2, the first switch Q1 is turned off, while the third, fourth, fifth, eighth, and ninth switches Q3, Q4, Q5, Q8, and Q9 remain on. The second, sixth, seventh, and tenth switches Q2, Q6, Q7, and Q9 remain on. 10 and the eleventh switch Q 11 In the off state, the primary current i p The junction capacitance of the first switching transistor Q1 is charged, while the junction capacitance of the second switching transistor Q2 is discharged; at time t3, the junction capacitance voltage v of the first switching transistor Q1 is... ds_Q1 Charged to v in The junction capacitance voltage v of the second switch Q2 ds_Q2Discharged to 0;

[0063] (1d) Phase Four of the Work:

[0064] At time t3, the second switch Q2 is turned on, achieving zero-voltage turn-on of the second switch Q2. This maintains the on state of the third switch Q3, the fourth switch Q4, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9, while maintaining the on state of the first switch Q1, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0065] (1e) Phase Five of the Work:

[0066] At time t4, the eighth switch Q8 and the ninth switch Q9 are turned off, while the second switch Q2, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are kept on. The first switch Q1, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are also kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t5, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 junction capacitance voltage v ds_Q10 Discharged to 0;

[0067] (1f) Work Phase Six:

[0068] At time t5, the seventh switch Q7 and the tenth switch Q are controlled. 10 and the eleventh switch Q 11 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on and the eleventh switch Q 11 Zero-current turn-on maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, and the fifth switch Q5, while maintaining the off state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9. The primary current i p and excitation inductor current iM The secondary current i decreases linearly at different rates. s Linear increase;

[0069] (1g) Working Stage Seven:

[0070] At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the eleventh switch Q1. 11 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 junction capacitance voltage v ds_Q10 Charged to v R ;

[0071] (1h) Work Phase Eight:

[0072] At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and eleventh switch Q1. 11 The first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease;

[0073] (1i) Work Phase Nine:

[0074] At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 The zero-current turn-off maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9.10 The off state;

[0075] (1j) Work Phase Ten:

[0076] At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and ninth switch Q9, and maintaining the on state of the first switch Q1, sixth switch Q6, eighth switch Q8, and tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged;

[0077] (ii) When v in When <0,

[0078] D a D b D c D x D y The values ​​are respectively the duty cycle of the third switch Q3, the duty cycle of the seventh switch Q7, and the duty cycle of the tenth switch Q... 10 The duty cycle, the difference between the turn-on time of the seventh switch Q7 and the turn-on time of the third switch Q3 (within one switching cycle, the third switch Q3 turns on first, and the seventh switch Q7 turns on later, i.e., D). x >0) and switching period T s The ratio of the tenth switch Q 10 The difference between the turn-on time and the turn-on time of the third switch Q3 (within one switching cycle, the third switch Q3 turns on first, followed by the tenth switch Q...). 10 It was opened later, namely D. y >0) and switching period T s The ratio of D; where D a =T1 / T s D b =(T3+T c +T4) / T s D c =T3 / T s D x =(T1+T 2L ) / T s D y =(T1+T 2L ) / T s The converter operates sequentially in the following phases within one switching cycle:

[0079] (1k) Phase 1 of the work:

[0080] Before the start time t0 of the switching cycle, the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9 are kept on, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the third switch Q3 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the fourth switch Q4 and the seventh switch Q7 are charged, while the junction capacitances of the third switch Q3 and the eighth switch Q8 are discharged; at time t1, the junction capacitance voltage v of the fourth switch Q4 is... ds_Q4 Charged to -v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R The junction capacitance voltage v of the third switch Q3 ds_Q3 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 Discharged to 0;

[0081] (1l) Phase Two of Work:

[0082] At time t1, the third switch Q3 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on for the third switch Q3 and the eighth switch Q8. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, and the ninth switch Q9, and also maintains the on-state of the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0083] (1m) Working Phase Three:

[0084] At time t2, the third switch Q3 is turned off, while the first, second, sixth, eighth, and ninth switches Q1, Q2, Q6, Q8, and Q9 remain on, and the fourth, fifth, seventh, and tenth switches Q4, Q5, Q7, and Q9 remain on. 10 and the eleventh switch Q 11 In the off state, the primary current i p The junction capacitance of the third switch Q3 is charged, while the junction capacitance of the fourth switch Q4 is discharged; at time t3, the junction capacitance voltage v of the third switch Q3 is... ds_Q3 Charged to -v in The junction capacitance voltage v of the fourth switch Q4 ds_Q4Discharged to 0;

[0085] (1n) Phase Four of Work:

[0086] At time t3, the fourth switch Q4 is turned on, achieving zero-voltage turn-on of the fourth switch Q4. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9, and maintains the on-state of the third switch Q3, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0087] (1o) Work Phase Five:

[0088] At time t4, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the second switch Q2, the fourth switch Q4, and the sixth switch Q6 are kept on, and the third switch Q3, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t5, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 junction capacitance voltage v ds_Q10 Discharged to 0;

[0089] (1p) Work Phase Six:

[0090] At time t5, the seventh switch Q7 and the tenth switch Q are controlled. 10 and the eleventh switch Q 11 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on and the eleventh switch Q 11 Zero-current turn-on maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, and the sixth switch Q6, and maintains the off state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9. The primary current i p and excitation inductor current iM The secondary current i decreases linearly at different rates. s Linear increase;

[0091] (1q) Work Phase Seven:

[0092] At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the eleventh switch Q8. 11 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 junction capacitance voltage v ds_Q10 Charged to v R ;

[0093] (1r) Work Phase Eight:

[0094] At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the first switch Q1, second switch Q2, fourth switch Q4, sixth switch Q6, seventh switch Q7, and eleventh switch Q8. 11 The third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease;

[0095] (1s) Work Phase Nine:

[0096] At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 Zero-current turn-off maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9.10 The off state;

[0097] (1t) Work Phase Ten:

[0098] At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintaining the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged;

[0099] The theoretical waveform of the converter operating in mode one is as follows: Figure 3 , Figure 4 As shown, where Figure 3 For v in The theoretical waveform when >0, Figure 4 For v in Theoretical waveform when <0.

[0100] When the converter operates in this mode, for T1, T 2L T3, T c The derivation process for T4 is as follows:

[0101] T1, T 2L T3, T c T4 and T4 satisfy the following constraints:

[0102] (9)

[0103] At t=T s At time i, add a constraint, letting the primary current i at this time be... p The value I7 is equal to the minimum primary current required to achieve zero-voltage turn-on of the switching transistor - I zvs In the equivalent circuit, v in When the voltage is >0, switching transistors Q1 and Q8 can achieve zero-voltage turn-on. in When the voltage is less than 0, switching transistors Q3 and Q8 can achieve zero-voltage turn-on:

[0104] (10)

[0105] In T1+T 2L +T3+T c ≤t≤T s At that time, the primary current i p Since it remains unchanged, t = T1 + T2 + T3 + T c Primary current i at time t pThe value of I6 is:

[0106] (11)

[0107] When T1+T 2L +T3 <t<T1+T 2L +T3+T c At that time, the voltage across the inductor is nV o The voltage across the magnetizing inductor is -nV o Therefore, the primary current i at time t = T1 + T2 + T3 is... p The values ​​of I3 and magnetizing inductor current i M The value of I4 is:

[0108] (12)

[0109] (13)

[0110] When T1+T 2L <t<T1+T 2L At +T3, the voltage across the inductor is nV o -v R The voltage across the magnetizing inductor is -nV o Therefore, t = T1 + T 2L Primary current i at time t p The size I2 can be expressed as:

[0111] (14)

[0112] (15)

[0113] The ratio of the number of turns in the primary winding to the number of turns in the secondary winding of the transformer is n, at t=T1+T 2L +T3 time secondary current i s The value of I5 is:

[0114] (16)

[0115] Find the secondary current i s In a switching cycle T s Average value within :

[0116] (17)

[0117] By combining equations (11), (12), (13), (16), and (17), T3 and T can be obtained. c Relationship:

[0118] (18)

[0119] By combining equations (11), (12), (13), (14), (15), and (18), the value of T can be obtained. c The expression of:

[0120] (19)

[0121] t = T s The original side current value at the moment t is the same as that at t = 0, both are I7. When 0 < t < T1, the voltages across the inductor and the excitation inductor are |v in | + v R , and at t = T1, the value I1 of the primary side current i p is:

[0122] (20)

[0123] When T1 < t < T1 + T 2L [[ID=3))], the voltages across the inductor and the excitation inductor are v R , and at t = T2, the value I2 of the primary side current i p is:

[0124] (21)

[0125] By combining equations (11), (13), (14), (18), (19), (20), and (21), the relationship between T 2L and T1 is obtained:

[0126] (22)

[0127] When 0 < t < T1, the absolute value of the primary side current i p is equal to the absolute value of the input current i in , so there is:

[0128] (23)

[0129] By combining equations (11), (20), (22), and (23), the expressions of T1 and T 2L can be obtained. Therefore, the expressions of T1, T 2L , T3, T c , T4 are:

[0130] ​​​​​th The first switch Q1 (V in >0) and the third switch Q3 (v in The duty cycle of <0) is less than the duty cycle of the eighth switch Q8.

[0133] When the converter operates in mode two, the primary current of the transformer is (|v in |-v R ) / (L M +L R The time for the slope to change is T. 2D Define the start time of a switching cycle as t0, and the time interval after t0 is t... dead The time after the specified time length is t1, and time t1 is the time elapsed after (T1-t). dead The time after the specified time length is t2, and t2 is the time elapsed after t. dead The time after the specified time length is t3. At time t3, (T...) 2D -t dead The time after the specified time length is t4, and t4 is the time elapsed after t. dead The time after the specified time length is t5. Time t5 is the time elapsed after (T3-t). dead The time after the specified time length is t6, and t6 is the time elapsed after t. dead The time after the specified duration is t7. Time t7 elapses (T c -t dead The time after the specified time length is t8, and time t8 is t... dead The time after the specified duration is t9. Time t9 is the time interval (T4-t). dead The time after the duration is t. 10 ;

[0134] (a) When v in When >0,

[0135] D a D b D c D x D y The values ​​are respectively the duty cycle of the first switch Q1, the duty cycle of the seventh switch Q7, and the duty cycle of the tenth switch Q... 10 The duty cycle, the difference between the turn-on time of the seventh switch Q7 and the turn-on time of the first switch Q1 (within one switching cycle, the first switch Q1 turns on first, and the seventh switch Q7 turns on later, i.e., D). x >0) and switching period T s The ratio of the tenth switch Q 10 The difference between the turn-on time and the turn-on time of the first switch Q1 (within one switching cycle, the first switch Q1 turns on first, then the tenth switch Q...). 10 It was opened later, namely D.y >0) and switching period T s The ratio of D; where D a =(T1+T 2D ) / T s D b =(T 2D +T3+T c +T4) / T s D c =(T 2D +T3) / T s D x =T1 / T s D y =T1 / T s The converter operates sequentially in the following phases within one switching cycle:

[0136] (2a) Phase 1 of the work:

[0137] Before the start time t0 of the switching cycle, the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9 are kept on, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the second switch Q2 and the seventh switch Q7 are turned off, and the primary current i p Discharge the junction capacitance of the first switch Q1 and the eighth switch Q8, while simultaneously charging the junction capacitance of the second switch Q2 and the seventh switch Q7. The secondary current i s Give the eleventh switch Q 11 The junction capacitance of the first switching transistor Q1 is charged; at time t1, the junction capacitance voltage v of the first switching transistor Q1 is... ds_Q1 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 When discharged to 0, the junction capacitance voltage v of the second switch Q2... ds_Q2 Charged to v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R ;

[0138] (2b) Phase Two of the Work:

[0139] At time t1, the first switch Q1 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on of the first switch Q1 and the eighth switch Q8. The third switch Q3, the fourth switch Q4, the fifth switch Q5, and the ninth switch Q9 are maintained on, while the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are maintained on. 10and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0140] (2c) Phase Three of the Work:

[0141] At time t2, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are kept on, and the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges, and the secondary current i s Give the eleventh switch Q 11 The junction capacitance discharges; at time t3, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 junction capacitance voltage v ds_Q10 Discharged to 0;

[0142] (2d) Work Phase Four:

[0143] At time t3, the seventh switch Q7 and the tenth switch Q are controlled. 10 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on maintains the on state of the first switch Q1, the third switch Q3, the fourth switch Q4, and the fifth switch Q5, and maintains the on state of the second switch Q2, the sixth switch Q6, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q1. 11 The off state, during this working phase, if v in >v R Primary current i p and excitation inductor current i M Equal and increasing linearly at the same rate, if v in <v R Primary current i p and excitation inductor current i M They are equal and decrease linearly at the same rate;

[0144] (2e) Phase Five of the Work:

[0145] At time t4, the first switch Q1 is turned off, while the third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and tenth switch Q1 are kept on. 10 The second switch Q2, the sixth switch Q6, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q are kept in the on state. 11 In the off state, the primary current i p The junction capacitance of the first switching transistor Q1 is charged, while the junction capacitance of the second switching transistor Q2 is discharged; at time t5, the junction capacitance voltage v of the first switching transistor Q1 is... ds_Q1 Charged to v in The junction capacitance voltage v of the second switch Q2 ds_Q2 Discharged to 0;

[0146] (2f) Work Phase Six:

[0147] At time t5, the second switch Q2 and the eleventh switch Q are controlled. 11 Turning on the second switch Q2 achieves zero-voltage turn-on and the eleventh switch Q... 11 Zero-current turn-on, maintaining the operation of the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase;

[0148] (2g) Working Stage Seven:

[0149] At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the eleventh switch Q1. 11 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 junction capacitance voltage v ds_Q10 Charged to v R ;

[0150] (2h) Work Phase Eight:

[0151] At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and eleventh switch Q1. 11 The first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease;

[0152] (2i) Work Phase Nine:

[0153] At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 The zero-current turn-off maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9. 10 The off state;

[0154] (2j) Work Phase Ten:

[0155] At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and ninth switch Q9, and maintaining the on state of the first switch Q1, sixth switch Q6, eighth switch Q8, and tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged;

[0156] (ii) When v in When <0,

[0157] D a D b D c D x D yThe values ​​are respectively the duty cycle of the third switch Q3, the duty cycle of the seventh switch Q7, and the duty cycle of the tenth switch Q... 10 The duty cycle, the difference between the turn-on time of the seventh switch Q7 and the turn-on time of the third switch Q3 (within one switching cycle, the third switch Q3 turns on first, and the seventh switch Q7 turns on later, i.e., D). x >0) and switching period T s The ratio of the tenth switch Q 10 The difference between the turn-on time and the turn-on time of the third switch Q3 (within one switching cycle, the third switch Q3 turns on first, followed by the tenth switch Q...). 10 It was opened later, namely D. y >0) and switching period T s The ratio of D; where D a =(T1+T 2D ) / T s D b =(T 2D +T3+T c +T4) / T s D c =(T 2D +T3) / T s D x =T1 / T s D y =T1 / T s The converter operates sequentially in the following phases within one switching cycle:

[0158] (2k) Phase 1 of the work:

[0159] Before the start time t0 of the switching cycle, the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9 are kept on, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the fourth switch Q4 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the fourth switch Q4 and the seventh switch Q7 are charged, while the junction capacitances of the third switch Q3 and the eighth switch Q8 are discharged; at time t1, the junction capacitance voltage v of the fourth switch Q4 is... ds_Q4 Charged to -v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R The junction capacitance voltage v of the third switch Q3 ds_Q3 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 Discharged to 0;

[0160] (2l) Work Phase Two:

[0161] At time t1, the third switch Q3 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on for the third switch Q3 and the eighth switch Q8. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, and the ninth switch Q9, and also maintains the on-state of the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate;

[0162] (2m) Working Phase Three:

[0163] At time t2, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the second switch Q2, the third switch Q3, and the sixth switch Q6 are kept on, and the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t3, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 junction capacitance voltage v ds_Q10 Discharged to 0;

[0164] (2m) Working Phase Four:

[0165] At time t3, the seventh switch Q7 and the tenth switch Q are controlled. 10 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on maintains the on state of the first switch Q1, the second switch Q2, the third switch Q3, and the sixth switch Q6, and maintains the on state of the fourth switch Q4, the fifth switch Q5, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q6. 11 The shutdown state, during this working phase, if -v in >v R Primary current i p and excitation inductor current iM Equal and increasing linearly at the same rate, if -v in <v R Primary current i p and excitation inductor current i M They are equal and decrease linearly at the same rate;

[0166] (2n) Phase 5 of the work:

[0167] At time t4, the third switch Q3 is turned off, while the first switch Q1, the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q1 are kept on. 10 The fourth switch Q4, the fifth switch Q5, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q are kept in the ON state. 11 In the off state, the primary current i p The junction capacitance of the third switch Q3 is charged, while the junction capacitance of the fourth switch Q4 is discharged; at time t5, the junction capacitance voltage v of the third switch Q3 is... ds_Q3 Charged to -v in The junction capacitance voltage v of the fourth switch Q4 ds_Q4 Discharged to 0;

[0168] (2o) Work Phase Six:

[0169] At time t5, the fourth switch Q4 and the eleventh switch Q are controlled. 11 Turn on, enabling the fourth switch Q4 and the eleventh switch Q 11 Zero-voltage turn-on maintains the first switch Q1, the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8. 10 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase;

[0170] (2q) Work Phase Seven:

[0171] At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the eleventh switch Q8. 11 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q.10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 junction capacitance voltage v ds_Q10 Charged to v R ;

[0172] (2r) Work Phase Eight:

[0173] At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the first switch Q1, second switch Q2, fourth switch Q4, sixth switch Q6, seventh switch Q7, and eleventh switch Q8. 11 The third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease;

[0174] (2s) Work Phase Nine:

[0175] At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 Zero-current turn-off maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 The off state;

[0176] (2t) Work Phase Ten:

[0177] At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintaining the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged;

[0178] The theoretical waveform of the converter operating in mode two is as follows: Figures 5 to 8 As shown, where Figure 5 For v in >0 and v in <v R Theoretical waveform at time, Figure 6 For v in >0 and v in >v R Theoretical waveform at time, Figure 7 For v in <0 and -v in <v R Theoretical waveform at time, Figure 8 For v in <0 and -v in >v R The theoretical waveform at that time.

[0179] When the converter operates in this mode, for T1, T 2D T3, T c The derivation process for T4 is as follows:

[0180] T1, T 2D T3, T c T4 and T4 satisfy the following constraints:

[0181] (twenty four)

[0182] At t=T s At time i, add a constraint, letting the primary current i at this time be... p The value I7 is equal to the minimum primary current required to achieve zero-voltage turn-on of the switching transistor - I zvs :

[0183] (25)

[0184] In T1+T 2D +T3+T c ≤t≤T s At that time, the primary current i p Since it remains unchanged, t = T1 + T 2D +T3+T c Primary current i at time t p The value of I6 is:

[0185] (26)

[0186] When T1+T 2D +T3 <t<T1+T 2D +T3+T c At that time, the voltage across the inductor is nV oThe voltage across the magnetizing inductor is -nV o Therefore, t = T1 + T 2D The primary current i at time +T3 p The values ​​of I3 and magnetizing inductor current i M The value of I4 is:

[0187] (27)

[0188] (28)

[0189] When T1+T 2D <t<T1+T 2D At +T3, the voltage across the inductor is nV o -v R The voltage across the magnetizing inductor is -nV o Therefore, t = T1 + T 2D Primary current i at time t p The size I2 can be expressed as:

[0190] (29)

[0191] (30)

[0192] The ratio of the number of turns in the primary winding to the number of turns in the secondary winding of the transformer is n. At time t = T1 + T2 + T3, the secondary current i... s The value of I5 is:

[0193] (31)

[0194] Find the secondary current i s In a switching cycle T s Average value within :

[0195] (32)

[0196] By combining equations (26), (27), (28), (31), and (32), T3 and T can be obtained. c Relationship:

[0197] (33)

[0198] By combining equations (26), (27), (28), (29), (30), and (33), T can be obtained. c The expression:

[0199] (34)

[0200] t=Ts The current value of the primary side at the moment is the same as that at t = 0, both are I7. When 0 < t < T1, the voltages across the inductor and the exciting inductor are |v in | + v R , and at t = T1, the value I1 of the primary side current i p is:

[0201] (35)

[0202] When T1 < t < T1 + T 2D , the voltages across the inductor and the exciting inductor are |v in | - v R , and at t = T 2D moment, the value I2 of the primary side current i p is:

[0203] (36)

[0204] By combining equations (26), (28), (29), (33), (34), (35) and (36), the relationship between T​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​R The capacitance is 47μF, and the output filter capacitor C o The capacitance is 47μF, the ratio of the number of turns in the primary winding to the number of turns in the secondary winding of the transformer is 6:1, the switching frequency is 500kHz, and the junction capacitance C of all switching transistors is... oss The voltage is equal to 50pF, and the dead time is 1% of the switching cycle. To allow for adequate margin, the absolute value of the minimum primary current I required to achieve zero-voltage turn-on for all switches is defined. ZVS The value is 2A.

[0212] like Figure 2 As shown, if the clamping capacitor voltage remains constant, the output power includes second harmonic power, and the output filter capacitor and voltage ripple satisfy the following:

[0213]

[0214] If the output voltage ripple is required to be less than 5%, i.e., ΔV o <0.05V o Then the output filter capacitor needs to satisfy: C o >13.8mF. If the clamping capacitor voltage contains second harmonics, the clamping capacitor completely absorbs the second harmonic power on the input side, thereby suppressing the second harmonic voltage at the output. In this case, the output filter capacitor C... o With only 47μF, it can meet the requirement of output voltage ripple of less than 5%. Figure 9 Simulation results for the converter are presented, including the output voltage V. o Maintaining a voltage of 48V and with an output filter capacitor of only 47μF, this demonstrates that the converter of this invention can suppress the second harmonic voltage of the output using a clamping capacitor, significantly reducing the output filter capacitor. Simultaneously, the input current i... in It approximately exhibits a sine wave and is related to the input voltage v. in The fact that they are in phase proves that the converter of this invention can achieve power factor correction. Figure 10 In the middle, the input voltage |v in | Less than the threshold voltage V th The converter operates in mode one; Figure 11 In the middle, the input voltage |v in |Greater than the threshold voltage V th The converter operates in mode two.

[0215] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0216] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression, characterized in that, A soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression, characterized in that it includes switching transistors Q1~Q2. 11 Transformer, Inductor L R Clamping capacitor C R and output filter capacitor C o The source of the first switch Q1 is connected to the drain of the second switch Q2, the source of the third switch Q3 is connected to the drain of the fourth switch Q4, the source of the second switch Q2 is connected to the source of the fourth switch Q4, the drain of the fifth switch Q5 is connected to the drain of the sixth switch Q6, the source of the fifth switch Q5 is connected to the source of the first switch Q1 and the drain of the second switch Q2, and the source of the sixth switch Q6 is connected to the source of the third switch Q3 and the drain of the fourth switch Q4. The drain of the first switch Q1 is connected to one end of the AC power supply, defined as terminal a. The drain of the third switch Q3 is connected to the other end of the AC power supply, defined as terminal b. The source of the seventh switch Q7 is connected to the drain of the eighth switch Q8. The source of the ninth switch Q9 is connected to the drain of the tenth switch Q1. 10 The drains of the seventh switch Q7 and the ninth switch Q9 are connected to the clamping capacitor C. R The positive terminals are connected, the source of the eighth switch Q8, and the tenth switch Q... 10 The source and clamping capacitance C R Connect the negative ends; One end of the transformer primary side, defined as terminal c, is connected to the drain of the fifth switch Q5 and the drain of the sixth switch Q6 in the AC side bridge arm. The other end of the transformer primary side, defined as terminal d, is connected to the inductor L. R One end is connected, inductor L R The other end is connected to the source of the seventh switch Q7 and the drain of the eighth switch Q8 in the DC-side bridge arm, and the source of the ninth switch Q9 and the tenth switch Q8. 10 The drain of the eleventh switch Q is connected to the source of the second switch Q2 and the source of the fourth switch Q4. 11 The source and output filter capacitor C o The negative terminal is connected; one end of the transformer secondary side, defined as the e terminal, is connected to the output filter capacitor C. o The positive terminal is connected to the positive terminal, and the other end of the transformer secondary side is defined as terminal f, which is connected to the eleventh switch Q. 11 The drains are connected, and the C terminal and F terminal of the transformer are of the same name; When the absolute value of the AC power supply voltage is less than or equal to the set threshold, operating mode one is executed, as follows: The magnetizing inductance of the transformer is L M Clamping capacitor C R The voltage is v R Load R L The voltage across the terminals is V o The number of turns N in the primary winding of the transformer p With the number of turns N of the secondary winding s The ratio is n=N p / N s The switching period is T s The primary current of a transformer is defined as (|v_0.05) as a function of the transformer's primary current. in |+v R ) / (L M +L R The slope changes over time T1, and the primary current changes in v. R / (L M +L R The time for the slope to change is T. 2L Primary current (nV) o -v R ) / L R The slope changes over time T3, and the primary current changes in nV. o / L R The time for the slope to change is T. c The primary current remains constant for T4, and the dead time is t. dead The absolute value of the minimum primary-side current required to achieve zero-voltage turn-on of all switching transistors is defined as I. ZVS , where T4=T s -T1-T 2L -T3-T c ; Define the start time of a switching cycle as t0, and the time elapsed after t0 is... dead The time after the specified time length is t1, and time t1 is the time elapsed after (T1-t). dead The time after the specified time length is t2, and t2 is the time elapsed after t. dead The time after the specified time length is t3. Time t3 elapses (T 2L -t dead The time after the specified time length is t4, and t4 is the time elapsed after t. dead The time after the specified time length is t5. Time t5 is the time interval (T3-t). dead The time after the specified time length is t6, and t6 is the time elapsed after t. dead The time after the specified time length is t7. Time t7 elapses (T c -t dead The time after the specified time length is t8, and time t8 is t... dead The time after the specified duration is t9, and time t9 is the time interval (T4-t). dead The time after the duration is t. 10 ; (a) When v in When the value is >0, the converter includes the following operating phases within one switching cycle: (1a) Phase 1 of the work: Before the start time t0 of the switching cycle, the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9 are kept on, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the second switch Q2 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the first switch Q1 and the eighth switch Q8 are discharged, while the junction capacitances of the second switch Q2 and the seventh switch Q7 are charged; at time t1, the junction capacitance voltage v of the first switch Q1 is... ds_Q1 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 When discharged to 0, the junction capacitance voltage v of the second switch Q2... ds_Q2 Charged to v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R ; (1b) Phase Two of Work: At time t1, the first switch Q1 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on of the first switch Q1 and the eighth switch Q8. The third switch Q3, the fourth switch Q4, the fifth switch Q5, and the ninth switch Q9 are maintained on, while the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are maintained on. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (1c) Phase Three of Work: At time t2, the first switch Q1 is turned off, while the third, fourth, fifth, eighth, and ninth switches Q3, Q4, Q5, Q8, and Q9 remain on. The second, sixth, seventh, and tenth switches Q2, Q6, Q7, and Q9 remain on. 10 and the eleventh switch Q 11 In the off state, the primary current i p The junction capacitance of the first switching transistor Q1 is charged, while the junction capacitance of the second switching transistor Q2 is discharged; at time t3, the junction capacitance voltage v of the first switching transistor Q1 is... ds_Q1 Charged to v in The junction capacitance voltage v of the second switch Q2 ds_Q2 Discharged to 0; (1d) Phase Four of the Work: At time t3, the second switch Q2 is turned on, achieving zero-voltage turn-on of the second switch Q2. This maintains the on state of the third switch Q3, the fourth switch Q4, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9, while maintaining the on state of the first switch Q1, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (1e) Phase Five of the Work: At time t4, the eighth switch Q8 and the ninth switch Q9 are turned off, while the second switch Q2, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are kept on. The first switch Q1, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are also kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t5, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Discharged to 0; (1f) Work Phase Six: At time t5, the seventh switch Q7 and the tenth switch Q are controlled. 10 and the eleventh switch Q 11 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on and the eleventh switch Q 11 Zero-current turn-on maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, and the fifth switch Q5, while maintaining the off state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9. The primary current i p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase; (1g) Working Stage Seven: At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the eleventh switch Q1. 11 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Charged to v R ; (1h) Work Phase Eight: At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and eleventh switch Q1. 11 The first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease; (1i) Work Phase Nine: At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 The zero-current turn-off maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9. 10 The off state; (1j) Work Phase Ten: At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and ninth switch Q9, and maintaining the on state of the first switch Q1, sixth switch Q6, eighth switch Q8, and tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged; (ii) When v in When <0, the converter operates sequentially in the following stages within one switching cycle: (1k) Phase 1 of the work: Before the start time t0 of the switching cycle, the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9 are kept on, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the third switch Q3 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the fourth switch Q4 and the seventh switch Q7 are charged, while the junction capacitances of the third switch Q3 and the eighth switch Q8 are discharged; at time t1, the junction capacitance voltage v of the fourth switch Q4 is... ds_Q4 Charged to -v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R The junction capacitance voltage v of the third switch Q3 ds_Q3 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 Discharged to 0; (1l) Phase Two of Work: At time t1, the third switch Q3 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on for the third switch Q3 and the eighth switch Q8. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, and the ninth switch Q9, and also maintains the on-state of the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (1m) Working Phase Three: At time t2, the third switch Q3 is turned off, while the first, second, sixth, eighth, and ninth switches Q1, Q2, Q6, Q8, and Q9 remain on, and the fourth, fifth, seventh, and tenth switches Q4, Q5, Q7, and Q9 remain on. 10 and the eleventh switch Q 11 In the off state, the primary current i p The junction capacitance of the third switch Q3 is charged, while the junction capacitance of the fourth switch Q4 is discharged; at time t3, the junction capacitance voltage v of the third switch Q3 is... ds_Q3 Charged to -v in The junction capacitance voltage v of the fourth switch Q4 ds_Q4 Discharged to 0; (1n) Phase Four of Work: At time t3, the fourth switch Q4 is turned on, achieving zero-voltage turn-on of the fourth switch Q4. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9, and maintains the on-state of the third switch Q3, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (1o) Work Phase Five: At time t4, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the second switch Q2, the fourth switch Q4, and the sixth switch Q6 are kept on, and the third switch Q3, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t5, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Discharged to 0; (1p) Work Phase Six: At time t5, the seventh switch Q7 and the tenth switch Q are controlled. 10 and the eleventh switch Q 11 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on and the eleventh switch Q 11 Zero-current turn-on maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, and the sixth switch Q6, and maintains the off state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9. The primary current i p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase; (1q) Work Phase Seven: At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the eleventh switch Q8. 11 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Charged to v R ; (1r) Work Phase Eight: At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the first switch Q1, second switch Q2, fourth switch Q4, sixth switch Q6, seventh switch Q7, and eleventh switch Q8. 11 The third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease; (1s) Work Phase Nine: At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 Zero-current turn-off maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 The off state; (1t) Work Phase Ten: At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintaining the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged; Among them, T1, T 2L T3, T c The T4 circuit is modulated using a digital controller to achieve constant voltage output and power factor correction. The calculation formula is as follows: ； In the formula, v in For AC power supply voltage, i in For AC power supply current, L M For the magnetizing inductance of the transformer, L R V is the inductance value. R Clamping capacitor C R The voltage at both ends, secondary current i s In a switching cycle T s The average value within, I ZVS This is the absolute value of the minimum primary-side current required for all switching transistors to achieve soft switching.

2. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 1, characterized in that, When the absolute value of the AC power supply voltage exceeds the set threshold, operating mode two is executed, as follows: The magnetizing inductance of the transformer is L M Clamping capacitor C R The voltage is v R Load R L The voltage across the terminals is V o The ratio of the number of turns in the primary winding to the number of turns in the secondary winding of a transformer is n. The primary current of the transformer is defined as (|v... in |+v R ) / (L M +L R The slope changes over time T1, and the primary current changes at a rate of (|v) in |-v R ) / (L M +L R The time for the slope to change is T. 2D Primary current (nV) o -v R ) / L R The slope changes over time T3, and the primary current changes in nV. o / L R The time for the slope to change is T. c The primary current remains constant for T4, and the dead time is t. dead The absolute value of the minimum primary-side current required to achieve zero-voltage turn-on of all switching transistors is defined as I. ZVS , where T4=T s -T1-T 2D -T3-T c ; Define the start time of a switching cycle as t0, and the time elapsed after t0 is... dead The time after the specified time length is t1, and time t1 is the time elapsed after (T1-t). dead The time after the specified time length is t2, and t2 is the time elapsed after t. dead The time after the specified time length is t3. Time t3 elapses (T 2D -t dead The time after the specified time length is t4, and t4 is the time elapsed after t. dead The time after the specified time length is t5. Time t5 is the time interval (T3-t). dead The time after the specified time length is t6, and t6 is the time elapsed after t. dead The time after the specified time length is t7. Time t7 elapses (T c -t dead The time after the specified time length is t8, and time t8 is t... dead The time after the specified duration is t9, and time t9 is the time interval (T4-t). dead The time after the duration is t. 10 ; (a) When v in When the value is >0, the converter includes the following operating phases within one switching cycle: (2a) Phase 1 of the work: Before the start time t0 of the switching cycle, the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9 are kept on, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the second switch Q2 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the first switch Q1 and the eighth switch Q8 are discharged, while the junction capacitances of the second switch Q2 and the seventh switch Q7 are charged; at time t1, the junction capacitance voltage v of the first switch Q1 is... ds_Q1 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 When discharged to 0, the junction capacitance voltage v of the second switch Q2... ds_Q2 Charged to v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R ; (2b) Phase Two of Work: At time t1, the first switch Q1 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on of the first switch Q1 and the eighth switch Q8. The third switch Q3, the fourth switch Q4, the fifth switch Q5, and the ninth switch Q9 are maintained on, while the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are maintained on. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (2c) Phase Three of the Work: At time t2, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the third switch Q3, the fourth switch Q4, and the fifth switch Q5 are kept on, and the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t3, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Discharged to 0; (2d) Work Phase Four: At time t3, the control switches Q7 and Q10 are controlled. 10 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on maintains the on state of the first switch Q1, the third switch Q3, the fourth switch Q4, and the fifth switch Q5, and maintains the on state of the second switch Q2, the sixth switch Q6, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q1. 11 The off state, during this working phase, if v in >v R Primary current i p and excitation inductor current i M Equal and increasing linearly at the same rate, if v in <v R Primary current i p and excitation inductor current i M They are equal and decrease linearly at the same rate; (2e) Phase Five of the Work: At time t4, the first switch Q1 is turned off, while the third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and tenth switch Q1 are kept on. 10 The second switch Q2, the sixth switch Q6, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q are kept in the on state. 11 In the off state, the primary current i p The junction capacitance of the first switching transistor Q1 is charged, while the junction capacitance of the second switching transistor Q2 is discharged; at time t5, the junction capacitance voltage v of the first switching transistor Q1 is... ds_Q1 Charged to v in The junction capacitance voltage v of the second switch Q2 ds_Q2 Discharged to 0; (2f) Work Phase Six: At time t5, the second switch Q2 and the eleventh switch Q are controlled. 11 Turning on, achieving zero-voltage turn-on of the second switch Q2 and the eleventh switch Q 11 Zero-current turn-on, maintaining the operation of the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase; (2g) Working Stage Seven: At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the eleventh switch Q1. 11 The primary current i is in the on state, while the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Charged to v R ; (2h) Work Phase Eight: At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and eleventh switch Q1. 11 The first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease; (2i) Work Phase Nine: At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 The zero-current turn-off maintains the on state of the second switch Q2, the third switch Q3, the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the first switch Q1, the sixth switch Q6, the eighth switch Q8, and the tenth switch Q9. 10 The off state; (2j) Work Phase Ten: At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the second switch Q2, third switch Q3, fourth switch Q4, fifth switch Q5, seventh switch Q7, and ninth switch Q9, and maintaining the on state of the first switch Q1, sixth switch Q6, eighth switch Q8, and tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged; (ii) When v in When <0, the converter operates sequentially in the following stages within one switching cycle: (2k) Phase 1 of the work: Before the start time t0 of the switching cycle, the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9 are kept on, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9 are kept on. 10 and the eleventh switch Q 11 The off state; at time t0, the fourth switch Q4 and the seventh switch Q7 are turned off, and the primary current i p The junction capacitances of the fourth switch Q4 and the seventh switch Q7 are charged, while the junction capacitances of the third switch Q3 and the eighth switch Q8 are discharged; at time t1, the junction capacitance voltage v of the fourth switch Q4 is... ds_Q4 Charged to -v in The junction capacitance voltage v of the seventh switch Q7 ds_Q7 Charged to v R The junction capacitance voltage v of the third switch Q3 ds_Q3 and the junction capacitance voltage v of the eighth switch Q8 ds_Q8 Discharged to 0; (2l) Work Phase Two: At time t1, the third switch Q3 and the eighth switch Q8 are turned on, achieving zero-voltage turn-on for the third switch Q3 and the eighth switch Q8. This maintains the on-state of the first switch Q1, the second switch Q2, the sixth switch Q6, and the ninth switch Q9, and also maintains the on-state of the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8. 10 and the eleventh switch Q 11 In the off state, the primary current i p and excitation inductor current i M They are equal and increase linearly at the same rate; (2m) Working Phase Three: At time t2, the eighth switch Q8 and the ninth switch Q9 are turned off, while the first switch Q1, the second switch Q2, the third switch Q3, and the sixth switch Q6 are kept on, and the fourth switch Q4, the fifth switch Q5, the seventh switch Q7, and the tenth switch Q8 are kept on. 10 and the eleventh switch Q 11 In the off state, the primary current i p Charge the junction capacitance of the eighth switch Q8 and the ninth switch Q9, and simultaneously charge the junction capacitance of the seventh switch Q7 and the tenth switch Q8. 10 The junction capacitance discharges; at time t3, the junction capacitance voltage v of the eighth switch Q8 is... ds_Q8 and the junction capacitance voltage v of the ninth switch Q9 ds_Q9 Charged to v R The junction capacitance voltage v of the seventh switch Q7 ds_Q7 and the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Discharged to 0; (2m) Working Phase Four: At time t3, the control switches Q7 and Q10 are controlled. 10 Turn on, enabling the seventh switch Q7 and the tenth switch Q 10 Zero-voltage turn-on maintains the on state of the first switch Q1, the second switch Q2, the third switch Q3, and the sixth switch Q6, and maintains the on state of the fourth switch Q4, the fifth switch Q5, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q6. 11 The shutdown state, during this working phase, if -v in >v R Primary current i p and excitation inductor current i M Equal and increasing linearly at the same rate, if -v in <v R Primary current i p and excitation inductor current i M They are equal and decrease linearly at the same rate; (2n) Phase 5 of the work: At time t4, the third switch Q3 is turned off, while the first switch Q1, the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q1 are kept on. 10 The fourth switch Q4, the fifth switch Q5, the eighth switch Q8, the ninth switch Q9, and the eleventh switch Q are kept in the ON state. 11 In the off state, the primary current i p The junction capacitance of the third switch Q3 is charged, while the junction capacitance of the fourth switch Q4 is discharged; at time t5, the junction capacitance voltage v of the third switch Q3 is... ds_Q3 Charged to -v in The junction capacitance voltage v of the fourth switch Q4 ds_Q4 Discharged to 0; (2o) Work Phase Six: At time t5, the fourth switch Q4 and the eleventh switch Q are controlled. 11 Turn on, enabling the fourth switch Q4 and the eleventh switch Q 11 Zero-voltage turn-on maintains the first switch Q1, the second switch Q2, the sixth switch Q6, the seventh switch Q7, and the tenth switch Q8. 10 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p and excitation inductor current i M The secondary current i decreases linearly at different rates. s Linear increase; (2q) Work Phase Seven: At time t6, the tenth switch Q is controlled. 10 Turn off, and maintain the operation of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the eleventh switch Q8. 11 The primary current i is in the on state, while the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the ninth switch Q9 are in the off state. p Discharge the junction capacitance of the ninth switch Q9, and simultaneously discharge the junction capacitance of the tenth switch Q. 10 The junction capacitance of the ninth switch Q9 is charged; at time t7, the junction capacitance voltage v of the ninth switch Q9 is... ds_Q9 Discharged to 0, the tenth switch Q 10 Junction capacitance voltage v ds_Q10 Charged to v R ; (2r) Work Phase Eight: At time t7, the ninth switch Q9 is turned on, achieving zero-voltage turn-on of the ninth switch Q9, while maintaining the operation of the first switch Q1, second switch Q2, fourth switch Q4, sixth switch Q6, seventh switch Q7, and eleventh switch Q8. 11 The third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q are kept in the on state. 10 In the off state, the magnetizing inductor current i M The primary current i decreases linearly. p Linear increase, secondary current i s Linear decrease; (2s) Work Phase Nine: At time t8, the magnetizing inductor current i M Decrease to -I ZVS Primary current i p Rise to -I ZVS Secondary current i s Drop to zero, controlling the eleventh switch Q 11 Turn off, thus realizing the eleventh switch Q 11 Zero-current turn-off maintains the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintains the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 The off state; (2t) Work Phase Ten: At time t9, no current flows through the secondary side of the transformer, maintaining the on state of the first switch Q1, the second switch Q2, the fourth switch Q4, the sixth switch Q6, the seventh switch Q7, and the ninth switch Q9, and maintaining the on state of the third switch Q3, the fifth switch Q5, the eighth switch Q8, and the tenth switch Q9. 10 and the eleventh switch Q 11 In the off state, the magnetizing inductor current i M and primary current i p Remain unchanged; Among them, T1, T 2D T3, T c The T4 circuit is modulated using a digital controller to achieve constant voltage output and power factor correction. The calculation formula is as follows: 。 3. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 1 or 2, characterized in that, Set threshold V th The calculation formula is: ； In the formula, V in I is the effective value of the input voltage. o This represents the average output current.

4. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 3, characterized in that, By controlling the current flowing into the clamping capacitor, the voltage of the clamping capacitor is adjusted to a given reference value, enabling the clamping capacitor to completely absorb the second harmonic power on the input side, thereby completely suppressing the second harmonic voltage at the output. The reference value for the clamping capacitor voltage is: ； In the formula, ω in The input voltage angular frequency, v R_min The minimum value of the clamping capacitor voltage, v R_min The value is greater than nV o .

5. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 1, characterized in that, The modulation method is as follows: When the AC power supply voltage v in When the voltage at terminal a of the AC power supply is greater than the voltage at terminal b, the drive signals of the first switch Q1 and the second switch Q2 are complementary and have a dead time. The third switch Q3, the fourth switch Q4, and the fifth switch Q5 are always on, the sixth switch Q6 is always off, the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time, and the drive signals of the ninth switch Q9 and the tenth switch Q8 are also complementary. 10 The drive signals are complementary and have a dead time. The first switch Q1 and the eighth switch Q8 are turned on simultaneously, and the seventh switch Q7 and the tenth switch Q8 are turned on simultaneously. 10 Simultaneously activated, the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the secondary current drops to zero. 11 Turn off; When the AC power supply voltage v in When the voltage at terminal a of the AC power supply is less than the voltage at terminal b, the first switch Q1, the second switch Q2, and the sixth switch Q6 are always on; the drive signals of the third switch Q3 and the fourth switch Q4 are complementary and have a dead time; the fifth switch Q5 is always off; the drive signals of the seventh switch Q7 and the eighth switch Q8 are complementary and have a dead time; and the drive signals of the ninth switch Q9 and the tenth switch Q6 are also on. 10 The drive signals are complementary and have a dead time. The third switch Q3 and the eighth switch Q8 are turned on simultaneously, and the seventh switch Q7 and the tenth switch Q8 are turned on simultaneously. 10 Simultaneously activated, the eleventh switch Q... 11 It turns on when current flows through its anti-parallel diode, and turns on when the secondary current drops to zero. 11 Turn off.

6. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 1, characterized in that, Switching transistors Q1~Q 11 It consists of a unidirectional switching transistor and a diode connected in reverse parallel, with the cathode of the diode connected to the drain of the unidirectional switching transistor and the anode of the diode connected to the source of the unidirectional switching transistor; or switching transistors Q1~Q 10 It consists of a unidirectional switching transistor and a diode connected in reverse parallel. The cathode of the diode is connected to the drain of the unidirectional switching transistor, and the anode of the diode is connected to the source of the unidirectional switching transistor. The switching transistor Q... 11 It is a diode, with its anode connected to the output filter capacitor C. o The negative terminal is connected, and the cathode is connected to the f terminal.

7. The modulation method for a soft-switching isolated bridgeless Buck-Boost PFC converter with output second harmonic voltage suppression according to claim 6, characterized in that, The unidirectional switching transistor is a transistor, IGBT, or MOSFET. When the unidirectional switching transistor is a transistor or IGBT, the source of the unidirectional switching transistor corresponds to the emitter of the transistor or IGBT, and the drain of the unidirectional switching transistor corresponds to the collector of the transistor or IGBT. When the unidirectional switching transistor is a MOSFET, the source of the unidirectional switching transistor corresponds to the source of the MOSFET, and the drain of the unidirectional switching transistor corresponds to the drain of the MOSFET.

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