Pixel unit, dynamic vision sensor and electronic device
By using PMOS transistors to optimize the circuit design of pixel units in dynamic vision sensors, the problems of data undersampling and redundancy in high-speed real-time image acquisition and processing of traditional image sensors are solved, and the area of pixel units is reduced and the response speed is improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUAWEI TECH CO LTD
- Filing Date
- 2023-05-16
- Publication Date
- 2026-07-31
AI Technical Summary
Traditional image sensors are prone to problems such as undersampling, data redundancy, and data processing delays when facing the demands of high-speed real-time image acquisition and processing, and dynamic vision sensors are also relatively large in size.
By replacing NMOS transistors with PMOS transistors in the feedback circuit, and combining switched capacitor amplifiers and threshold comparators, the circuit design of the pixel unit is optimized, reducing the area and noise of the pixel unit, and improving the gain and light-sensing range of the photoreceptor.
This technology reduces the size of pixel units, decreases noise and latency, and improves the response speed and light sensitivity range of dynamic vision sensors, meeting the needs of high-speed real-time image acquisition and processing.
Smart Images
Figure CN119012035B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of image sensors, and more particularly to a pixel unit, a dynamic vision sensor, and an electronic device. Background Technology
[0002] In the realm of human-perceived environmental information, images are a crucial channel for acquiring external information, and image sensors are electronic devices used to acquire image information. Traditional image sensors typically acquire information based on "frames." When outputting a frame of image information, regardless of the degree of change in the light intensity information acquired by each pixel, the image sensor outputs information from all pixels. This leads to problems such as undersampling, data redundancy, and data processing delays when facing the demands of high-speed, real-time image acquisition and processing.
[0003] Dynamic vision sensors (DVS) draw inspiration from biological visual systems in nature. They employ asynchronous readout, outputting pixel addresses and information only when light intensity changes reach a threshold. This results in a response speed on the microsecond (μm) level, meeting the demands of high-speed, real-time image acquisition and processing. However, due to limitations in circuit structure, dynamic vision sensors are often larger than traditional image sensors. Summary of the Invention
[0004] This application provides a pixel unit, a dynamic vision sensor, and an electronic device for reducing the size of the pixel unit in the dynamic vision sensor.
[0005] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:
[0006] In a first aspect, a pixel unit is provided, comprising a photoreceptor, a switched-capacitor amplifier, and a threshold comparator. The photoreceptor includes a photosensitive circuit, a feedback circuit, and an amplification circuit, with the output terminal of the photosensitive circuit, the input terminal of the feedback circuit, and the input terminal of the amplification circuit coupled together. The output terminal of the feedback circuit is coupled to the output terminal of the amplification circuit. The photosensitive circuit is configured to receive light to form a photocurrent. The feedback circuit and the amplification circuit are configured to receive the photocurrent and output a corresponding voltage based on the photocurrent. The feedback circuit includes at least one transistor, wherein the at least one transistor is a PMOS transistor. The input terminal of the switched-capacitor amplifier is coupled to the output terminal of the feedback circuit; the switched-capacitor amplifier is configured to amplify the voltage output by the feedback circuit. The input terminal of the threshold comparator is coupled to the output terminal of the switched-capacitor amplifier, and the threshold comparator is configured to compare the voltage output by the switched-capacitor amplifier with a threshold voltage and output an event signal based on the comparison result.
[0007] In this embodiment, all transistors in the feedback circuit are PMOS transistors. The subthreshold slope factor of PMOS transistors is smaller than that of NMOS transistors. Therefore, in the pixel unit provided in this embodiment, the voltage output by the photoreceptor can be larger, the amplitude of the voltage output by the photoreceptor changing with the photocurrent can be larger, and the gain of the photoreceptor can be higher. This higher gain of the photoreceptor reduces the amplification load of the switched-capacitor amplifier, allowing for a smaller area of the capacitor coupled to the photoreceptor in the switched-capacitor amplifier, thereby reducing the area of the pixel unit.
[0008] Meanwhile, since the physical parameters (such as noise and capacitance) of PMOS transistors and NMOS transistors are different, the feedback circuit using PMOS transistors in this application embodiment can have a higher phase margin and lower noise compared to the feedback circuit using NMOS transistors.
[0009] It is understood that by setting the transistor in the feedback circuit as a PMOS transistor to improve the gain of the photoreceptor, the present application embodiment eliminates the need for a pre-amplification stage structure between the photoreceptor and the switched-capacitor amplifier. The fluctuation range of the photoreceptor's output voltage is not limited by the operating region of the pre-amplification stage structure, allowing for a larger fluctuation range. This, in turn, improves the photosensitive range of the photoreceptor and the dynamic range of the pixel unit. Furthermore, since the present application embodiment eliminates the need for a pre-amplification stage structure between the photoreceptor and the switched-capacitor amplifier, no additional noise or delay is introduced into the pixel unit circuit provided by the present application embodiment.
[0010] In some embodiments, the feedback circuit includes a first transistor, the source of which is coupled to the output of the photosensitive circuit, the drain of which is coupled to a first voltage terminal, and the gate of which is coupled to the output of the amplifier circuit.
[0011] In some embodiments, the first transistor is an intrinsic PMOS transistor.
[0012] In this embodiment, the first transistor is an intrinsic PMOS transistor, making its threshold voltage close to 0. With other parameters remaining constant, a smaller threshold voltage of the first transistor results in a larger DC operating point voltage at the output of the feedback circuit (the second node), thus allowing for a larger voltage swing at the output of the feedback circuit (i.e., the output of the photosensor), increasing the dynamic range of the pixel unit. Even with reduced process dimensions and a smaller voltage provided at the second voltage terminal, the voltage swing at the output of the feedback circuit can still be large, and the pixel unit can still have a large dynamic range.
[0013] In some embodiments, the feedback circuit further includes a second transistor, the source of which is coupled to the output terminal of the photosensitive circuit, and the drain and gate of the second transistor are both coupled to the source of the first transistor.
[0014] In some embodiments, the feedback circuit further includes a plurality of second transistors connected in series, the drain of each second transistor being coupled to its gate; wherein the plurality of second transistors includes a primary transistor and a final transistor, the source of the primary transistor being coupled to the output terminal of the photosensitive circuit, and the drain of the final transistor being coupled to the source of the first transistor.
[0015] In some embodiments, the second transistor is an intrinsic PMOS transistor.
[0016] In some embodiments, the amplification circuit includes a third transistor and a fourth transistor; the third transistor is a PMOS transistor, and the fourth transistor is an NMOS transistor. The gate of the third transistor is coupled to the output terminal of the photosensitive circuit, the source of the third transistor is coupled to a second voltage terminal, the drains of both the third and fourth transistors are coupled to the output terminal of the feedback circuit, the source of the fourth transistor is coupled to a first voltage terminal, and the gate of the fourth transistor is coupled to a first bias voltage terminal.
[0017] In some embodiments, the amplification circuit includes a fifth transistor, a sixth transistor, and a seventh transistor; the fifth transistor and the sixth transistor are both PMOS transistors, and the seventh transistor is an NMOS transistor; the gate of the fifth transistor is coupled to the output terminal of the photosensitive circuit, the source of the fifth transistor is coupled to a second voltage terminal, the drain of the fifth transistor is coupled to the source of the sixth transistor, the gate of the sixth transistor is connected to a second bias voltage terminal, the drains of the sixth transistor and the seventh transistor are both coupled to the output terminal of the feedback circuit, the source of the seventh transistor is coupled to a first voltage terminal, and the gate of the seventh transistor is coupled to a first bias voltage terminal.
[0018] In this embodiment, a sixth transistor (i.e., a common-source common-gate transistor) with a fixed bias is provided between the fifth transistor and the output terminal (second node) of the feedback circuit. The drain of the fifth transistor is isolated from the output terminal of the feedback circuit, which allows the Miller capacitance observed at the output terminal of the feedback circuit to be smaller, the dominant pole to be larger, and the dominant pole to be located relatively far back, thereby increasing the bandwidth of the photoreceptor and improving the delay problem.
[0019] In some embodiments, the photosensitive circuit includes a photodiode, the cathode of which is coupled to a second voltage terminal, and the anode of which is coupled to the input terminal of the feedback circuit, wherein the voltage at the second voltage terminal is higher than the voltage at the first voltage terminal.
[0020] In some embodiments, the switched-capacitor amplifier includes a first capacitor, a second capacitor, an amplifier, and a switch. A first terminal of the first capacitor is coupled to the output terminal of the feedback circuit, a second terminal of the first capacitor is coupled to the input terminal of the amplifier, and a first terminal of the second capacitor and a first terminal of the switch are coupled. The output terminal of the amplifier, the second terminal of the second capacitor, and the second terminal of the switch are coupled.
[0021] In some embodiments, the threshold voltage includes a first threshold voltage and a second threshold voltage; the first threshold voltage is greater than the second threshold voltage. The event signal includes a first event signal and a second event signal. The threshold comparator is configured to: output the first event signal when the voltage output by the switched-capacitor amplifier is greater than the first threshold voltage; and output the second event signal when the voltage output by the switched-capacitor amplifier is less than the second threshold voltage.
[0022] In some embodiments, the threshold comparator includes a first comparator, a second comparator, and a logic sub-circuit. The first input terminal of the first comparator and the second input terminal of the second comparator are both coupled to the output terminal of the switched-capacitor amplifier. The second input terminal of the first comparator is coupled to a third bias voltage terminal, and the first input terminal of the second comparator is coupled to a fourth bias voltage terminal.
[0023] The output terminals of the first comparator and the second comparator are respectively coupled to the first input terminal and the second input terminal of the logic sub-circuit; the logic sub-circuit also includes a first output terminal and a second output terminal, wherein the first output terminal is configured to output a first event signal and the second output terminal is configured to output a second event signal.
[0024] The third bias voltage terminal is configured to provide the first threshold voltage, and the fourth bias voltage terminal is configured to provide the second threshold voltage.
[0025] Secondly, a dynamic vision sensor is provided, which includes a plurality of pixel units as described in any of the above embodiments.
[0026] Thirdly, an electronic device is provided, comprising an image processor and an image sensor, wherein the image sensor includes the dynamic vision sensor described in the above embodiments; the image sensor is electrically connected to the image processor.
[0027] The technical effects of any of the design methods in the second and third aspects can be found in the technical effects of different design methods in the first aspect, and will not be repeated here. Attached Figure Description
[0028] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in some embodiments of this application will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this application.
[0029] Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;
[0030] Figure 2A This is a schematic diagram of the structure of a dynamic vision sensor provided in an embodiment of this application;
[0031] Figure 2B This is a schematic diagram of another dynamic vision sensor provided in an embodiment of this application;
[0032] Figure 3 This is a schematic diagram of the structure of a pixel unit provided in an embodiment of this application;
[0033] Figure 4 This is a schematic diagram of another pixel unit structure provided in an embodiment of this application;
[0034] Figure 5 This is a schematic diagram of the structure of a photoreceptor provided in an embodiment of this application;
[0035] Figure 6 This is a schematic diagram of another photoreceptor provided in an embodiment of this application;
[0036] Figure 7 This is a schematic diagram of another photoreceptor provided in an embodiment of this application;
[0037] Figure 8 This is a schematic diagram of the structure of another photoreceptor provided in an embodiment of this application. Detailed Implementation
[0038] The technical solutions of the embodiments of this application will now be described with reference to the accompanying drawings. In the description of this application, unless otherwise stated, " / " indicates that the objects before and after it are in an "or" relationship; for example, A / B can represent A or B.
[0039] In this application, "and / or" is merely a way of describing the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. A and B can be singular or plural.
[0040] In the description of this application, unless otherwise stated, "multiple" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.
[0041] To facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.
[0042] The use of “configured as” in this article implies an open and inclusive language that does not exclude the applicability to or configuration of devices to perform additional tasks or steps.
[0043] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the term "coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.
[0044] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.
[0045] This application provides an electronic device, which can be, for example, a camera, an internet protocol camera (IPC), a mobile phone with front and / or rear cameras, a tablet with front and / or rear cameras, a digital camera, a digital camcorder, a vehicle-mounted camera, or an industrial camera, or other devices with image acquisition capabilities. Furthermore, the electronic device can be applied in the fields of security, photography and videography, automotive electronics, or industrial machine vision.
[0046] Figure 1 This is a schematic diagram of the structure of an electronic device 100 provided in an embodiment of this application. Figure 1 As shown, the electronic device 100 may include an image sensor 110, a lens 120, and an image processor 130. The lens 120 is configured to focus light emitted or reflected from the object being photographed onto the image sensor 110. The image sensor 110 is configured to convert the received optical image into a digital signal. The image processor 130 is configured to process the digital signal and output an image of the object being photographed. The image sensor 110 is a crucial component of the electronic device and affects its performance.
[0047] It is understood that in some other embodiments, the electronic device 100 may not include the lens 120. The image sensor 110 directly receives light emitted or reflected from the object being photographed.
[0048] Traditional image sensors typically acquire information frame by frame, using the accumulation of photogenerated electrons in pixel units to obtain ambient light intensity information. While this method effectively records and reproduces ambient light intensity information, it requires a certain accumulation time. When outputting a frame of image information, regardless of the degree of change in the light intensity information acquired by each pixel unit, the image sensor outputs information from all pixels. These characteristics lead to problems such as undersampling, data redundancy, and data processing delays when facing the demands of high-speed real-time image acquisition and processing.
[0049] Dynamic vision sensors (DVS) draw inspiration from biological visual systems in nature. Employing asynchronous readout, they eliminate the concept of "frames," observing changes in light intensity and outputting pixel information only when the intensity change reaches a threshold. This reduces data processing load and fundamentally improves data redundancy. When the light intensity change reaches the threshold, the DVS can encode the change in light intensity over that time period into pulse events with different pixel addresses and polarities. The response speed of the DVS can reach the microsecond level, thus meeting the requirements for high-speed, real-time image acquisition and processing.
[0050] A pixel unit in a dynamic vision sensor typically includes a photosensor, a switched-capacitor amplifier, and a threshold comparator. The output of the photosensor is coupled to the input of the switched-capacitor amplifier, and the output of the switched-capacitor amplifier is coupled to the input of the threshold comparator. To achieve a high amplification factor, the capacitor coupled to the photosensor within the switched-capacitor amplifier usually needs to have a large capacitance value, resulting in a large pixel unit area in early DVS structures.
[0051] To reduce the area of pixel units, some embodiments provide a dynamic vision sensor. In addition to the aforementioned photosensor, switched-capacitor amplifier, and threshold comparator, the pixel unit of this dynamic vision sensor also includes a pre-amplifier structure located between the photosensor and the switched-capacitor amplifier. The pre-amplifier structure utilizes a series of common-source amplifiers to amplify the voltage output from the photosensor in multiple stages before outputting the amplified voltage to the switched-capacitor amplifier. This reduces the amplification load on the switched-capacitor amplifier, reduces the area of the capacitors in the switched-capacitor amplifier, thereby reducing the total area of the pixel unit and consequently the size of the dynamic vision sensor.
[0052] Because the pre-amplification stage operates in the subthreshold region, its power consumption is low. Therefore, compared to adding other amplifiers between the photosensor and the switched-capacitor amplifier, the above embodiment can further reduce the power consumption of the dynamic vision sensor. Furthermore, since the pre-amplification stage operates in the subthreshold region, its amplification factor is only related to the subthreshold coefficient; therefore, the pre-amplification stage is less affected by process mismatches.
[0053] However, in this dynamic vision sensor, to ensure that the pre-amplification stage structure can operate normally in the subthreshold region, the upper limit of the voltage output by the photoreceptor is constrained, thus affecting the normal operation of the dynamic vision sensor under strong light and reducing the global dynamic range. In addition, the introduction of the pre-amplification stage structure also introduces additional noise and delay into the dynamic vision sensor.
[0054] Based on this, such as Figure 2A and Figure 2B As shown, this application embodiment provides a dynamic vision sensor 101, which is applied in the image sensor 110 described above.
[0055] The dynamic vision sensor 101 includes a plurality of pixels 102, which are configured to sense light signals. In this embodiment, the number of pixels 102 in the dynamic vision sensor 101 is not limited and can be designed according to actual needs. Figure 2A and Figure 2B The dynamic vision sensor 101, which includes 7×7 pixels 102, is used as an example for illustration.
[0056] In some examples, such as Figure 2A and Figure 2B As shown, pixels 102 can be arranged into multiple rows along the first direction X and into multiple columns along the second direction Y.
[0057] The dynamic vision sensor 101 includes multiple pixel units 200. In some examples, such as... Figure 2A As shown, each pixel unit 200 includes one pixel 102. In other examples, such as Figure 2B As shown, each pixel unit 200 includes a plurality of pixels 102. When the pixel unit 200 includes a plurality of pixels 102, the present application embodiments do not limit the number of pixels 102 in the pixel unit 200. Figure 2B The following is an example of a pixel unit 200 comprising 4 pixels 102.
[0058] Wherein, "pixel unit 200 includes multiple pixels 102", can be as follows: Figure 2B As shown, pixel unit 200 includes a plurality of adjacent pixels 102. Alternatively, "pixel unit 200 includes a plurality of pixels 102" can also mean that pixel unit 200 includes a plurality of pixels 102 spaced apart from each other.
[0059] like Figure 3 As shown, this application embodiment provides a pixel unit 200, which includes a photosensor 10, a switched capacitor amplifier 20, and a threshold comparator 30.
[0060] When pixel unit 200 includes one pixel 102, pixel unit 200 may include one photoreceptor 10, one switched-capacitor amplifier 20, and one threshold comparator 30. When pixel unit 200 includes multiple pixels 102, pixel unit 200 may include multiple photoreceptors 10, one switched-capacitor amplifier 20, and one threshold comparator 30, with each pixel 102 corresponding to one photoreceptor 10, and multiple pixels 102 time-division multiplexing the same switched-capacitor amplifier 20 and the same threshold comparator 30. Taking pixel unit 200 including four pixels 102 as an example, pixel unit 200 may include four photoreceptors 10, one switched-capacitor amplifier 20, and one threshold comparator 30, and at different times, the switched-capacitor amplifier 20 and the threshold comparator 30 are connected to different photoreceptors 10. Figure 3 The following is an example of a pixel unit 200 including a photoreceptor 10, a switched-capacitor amplifier 20 and a threshold comparator 30.
[0061] The photoreceptor 10 includes a photosensitive circuit 11, a feedback circuit 12, and an amplifier circuit 13. The output terminal of the photosensitive circuit 11, the input terminal of the feedback circuit 12, and the input terminal of the amplifier circuit 13 are coupled together. The output terminal of the feedback circuit 12 and the output terminal of the amplifier circuit 13 are coupled together. The photosensitive circuit 11 is configured to receive light to form a photocurrent. The feedback circuit 12 and the amplifier circuit 13 are configured to receive the photocurrent and output a corresponding voltage based on the photocurrent. The feedback circuit 12 includes at least one transistor, which is a P-type metal-oxide-semiconductor (PMOS) transistor.
[0062] "Feedback circuit 12 includes at least one transistor", meaning that feedback circuit 12 may include one transistor or multiple transistors.
[0063] For example, the voltage output by the feedback circuit 12 and the amplifier circuit 13 can have a logarithmic relationship with the photocurrent.
[0064] The input terminal of the switched capacitor amplifier 20 is coupled to the output terminal of the feedback circuit 12, and the switched capacitor amplifier 20 is configured to amplify the voltage V output by the feedback circuit 12. pr .
[0065] The input of threshold comparator 30 is coupled to the output of switched-capacitor amplifier 20. Threshold comparator 30 is configured to convert the voltage V output by switched-capacitor amplifier 20 into a threshold value. diff It is compared with a threshold voltage, and an event signal is output based on the comparison result.
[0066] For example, the output of the photosensitive circuit 11, the input of the feedback circuit 12, and the input of the amplifier circuit 13 can be coupled to the first node N1, and the outputs of the feedback circuit 12 and the amplifier circuit 13 can be coupled to the second node N2. The output of the switched-capacitor amplifier 20 and the input of the threshold comparator 30 can be coupled to the third node N3.
[0067] It is understood that in the embodiments of this application, the first node N1, the second node N2 and the third node N3 do not represent actual existing components, but rather represent the junction points of related electrical connections in the circuit diagram. In other words, these nodes are equivalent to the junction points of related electrical connections in the circuit diagram.
[0068] In some examples, such as Figure 3 As shown, the threshold voltage may include a first threshold voltage V. refh Second threshold voltage V refl Among them, the first threshold voltage V refh It can be greater than the second threshold voltage V reflFirst threshold voltage V refh This corresponds to the voltage at the third node N3 when the light intensity increases to the first preset value. The second threshold voltage V refl This corresponds to the voltage of the third node N3 when the light intensity decreases to the second preset value.
[0069] The event signal may include a first event signal ev+ or a second event signal ev-. The first event signal ev+ can represent an increase in light intensity exceeding a first preset value, and the second event signal ev- can represent a decrease in light intensity falling below a second preset value. The first and second preset values can be designed according to the sensitivity requirements of the dynamic vision sensor.
[0070] Thus, the operation of the threshold comparator 30 is roughly as follows: it receives the voltage output from the switched capacitor amplifier 20 (that is, the voltage V of the third node N3). diff The voltage output from the switched capacitor amplifier 20 is compared with the first threshold voltage V. refh Compare the voltage output by the switched-capacitor amplifier 20 with the second threshold voltage V. refl Comparison. The voltage output of the switched-capacitor amplifier 20 is greater than the first threshold voltage V. refh In the event that the threshold comparator 30 outputs the first event signal ev+, the voltage output by the switched-capacitor amplifier 20 is less than the second threshold voltage V. refl In the event that the threshold comparator 30 outputs a second event signal ev-, the voltage output by the switched-capacitor amplifier 20 is less than or equal to the first threshold voltage V. refh And greater than or equal to the second threshold voltage V refl In this case, the threshold comparator 30 may not output an event signal.
[0071] By setting the first threshold voltage V refh Second threshold voltage V refl This allows for a buffer period in event judgment, thereby reducing the impact of circuit noise on the judgment result and improving the situation near the critical point where the event judgment result is unstable due to noise fluctuations in the signal.
[0072] In the pixel unit 200 provided in this embodiment, the photosensitive circuit 11 of the photoreceptor 10 receives light to form a photocurrent, and the feedback circuit 12 and the amplification circuit 13 convert the photocurrent into a voltage and transmit it to the second node N2. The switched-capacitor amplifier 20 receives and amplifies the voltage of the second node N2, making the voltage of the third node N3 higher than the voltage of the second node N2. The threshold comparator 30 receives the voltage of the third node N3, compares it with a threshold voltage, and outputs an event signal based on the comparison result.
[0073] The multiple transistors in feedback circuit 12 operate in the subthreshold region, and therefore, the multiple transistors in feedback circuit 12 can satisfy the subthreshold current formula: Among them, I ph I represents the photocurrent flowing through the first node N1. p0 U represents the reference current of the transistor. T Represents thermal voltage, V g V represents the gate voltage of a transistor. s k represents the source voltage of a transistor. p This represents the subthreshold slope factor of a transistor.
[0074] By transforming the above formula for subthreshold current, we can obtain: When the transistor's gate is coupled to the second node N2, the gate voltage V in the above formula... g It can be replaced by the voltage V of the second node N2. pr Thus, the formula is obtained. When photocurrent I ph Size is determined by I ph1 Change to I ph2 At that time, the change in voltage at the second node N2 is ΔV pr Satisfying the formula:
[0075] According to the above formula, the voltage V at the second node N2 is... pr It is affected not only by the current at the first node N1, but also by the parameters of the transistors in the feedback circuit 12. That is, the voltage V at the second node N2... pr The subthreshold slope factor k of the transistor in feedback circuit 12 p The impact.
[0076] In photocurrent I ph With all other parameters unchanged, the subthreshold slope factor k of the transistor in feedback circuit 12... p The larger the value, the higher the voltage V at the second node N2. pr The smaller the value, the better. (Regarding photocurrent I) ph With other parameters remaining constant, the subthreshold slope factor k of the transistor in feedback circuit 12 changes. p The larger the value, the higher the voltage V at the second node N2. pr The smaller the change in current with the first node N1.
[0077] Conversely, in photocurrent I ph Without changing the threshold slope factor k of the transistor in feedback circuit 12 p The smaller the value, the lower the voltage V at the second node N2. pr The larger the photocurrent I, the greater the potential benefit. phUnder varying conditions, the subthreshold slope factor k of the transistor in feedback circuit 12 p The smaller the value, the greater the change in voltage at the second node N2 with the change in current at the first node N1.
[0078] In this embodiment, all transistors in the feedback circuit 12 are PMOS transistors. The subthreshold slope factor of a PMOS transistor is smaller than that of an N-type metal-oxide-semiconductor (NMOS) transistor. Therefore, in the pixel unit 200 provided in this embodiment, the voltage output by the photoreceptor 10 can be larger, the amplitude of the voltage change with the photocurrent can be larger, and the gain of the photoreceptor 10 can be higher. Thus, with a higher gain for the photoreceptor 10, the amplification load of the switched-capacitor amplifier 20 can be lower, and the area of the capacitor coupled to the photoreceptor 10 in the switched-capacitor amplifier 20 can be smaller, thereby reducing the area of the pixel unit 200.
[0079] Meanwhile, since the physical parameters (such as noise and capacitance) of PMOS transistors and NMOS transistors are different, the feedback circuit 12 using PMOS transistors in this embodiment of the application can have a higher phase margin and lower noise compared to the feedback circuit using NMOS transistors.
[0080] It is understood that, in this embodiment of the application, by setting the transistor in the feedback circuit 12 as a PMOS transistor, the gain of the photoreceptor 10 is improved. Therefore, there is no need to set a pre-amplification stage structure between the photoreceptor and the switched capacitor amplifier. The output voltage of the photoreceptor 10 (that is, the voltage V of the second node N2) is... pr The fluctuation range of the photoreceptor 10 is not limited by the working area of the pre-amplification stage structure, and the fluctuation range of the output voltage of the photoreceptor 10 can be larger, thereby increasing the light-sensing range of the photoreceptor 10 and the pixel unit 200. Furthermore, since no pre-amplification stage structure is required between the photoreceptor and the switched-capacitor amplifier in this embodiment, no additional noise or delay is introduced into the circuit of the pixel unit 200 provided in this embodiment.
[0081] Below, in conjunction with Figure 4 , Figure 5 and Figure 6 The structure of the photoreceptor 10 provided in the embodiments of this application will be described in detail.
[0082] In some embodiments, such as Figure 4As shown, the feedback circuit 12 includes a first transistor T1. The source of the first transistor T1 is coupled to the output terminal of the photosensitive circuit 11, the drain of the first transistor T1 is coupled to the first voltage terminal GND, and the gate of the first transistor T1 is coupled to the output terminal of the amplifier circuit 13.
[0083] For example, the source of the first transistor T1, the output of the photosensitive circuit 11, and the input of the amplifier circuit can be coupled to the first node N1, and the gate of the first transistor T1 and the output of the amplifier circuit 13 can be coupled to the second node N2.
[0084] In some embodiments, such as Figure 4 As shown, the photosensitive circuit 11 may include a photodiode PD. The cathode of the photodiode PD is coupled to a second voltage terminal VDD, and the anode of the photodiode PD is coupled to the input terminal of the feedback circuit 12. The voltage at the second voltage terminal VDD is higher than the voltage at the first voltage terminal GND.
[0085] The voltage received at the anode of a photodiode (PD) is less than the voltage received at the cathode. The PD operates under reverse bias and is configured to convert received light into electrons (called "photogenerated electrons"), forming a photocurrent I. ph The number of photodiodes (PDs) in the photosensitive circuit 11 is not limited in this application embodiment, and can be designed according to actual needs. For example, when the photosensitive circuit 11 includes multiple photodiodes (PDs), the multiple photodiodes (PDs) can be connected in parallel. Figure 4 The following is an example of a photosensitive circuit 11 including a photodiode PD.
[0086] In some embodiments, the first transistor T1 may be an intrinsic PMOS transistor.
[0087] Since the first transistor T1 in the feedback circuit 12 operates in the subthreshold region, the voltage V at the DC operating point of the second node N2 can be derived. pr_dir Satisfies the formula: V pr_dir =V1-V th_PD -V th_T1 Where V1 is the voltage at the second voltage terminal VDD, V th_PD V is the threshold voltage of the photodiode PD. th_T1 The threshold voltage of the first transistor T1.
[0088] In this embodiment, the first transistor T1 is an intrinsic PMOS transistor, making its threshold voltage close to 0. According to the above formula, with other parameters remaining constant, the threshold voltage V of the first transistor T1... th_T1 The smaller the value, the lower the voltage V at the DC operating point of the second node N2. pr_dirThe larger the voltage, the larger the voltage swing of the second node N2, thus increasing the dynamic range of the pixel unit 200. Even with a reduction in process size and a decrease in the voltage provided by the second voltage terminal VDD, the voltage swing of the second node N2 can still be large, and the pixel unit 200 can still have a large dynamic range.
[0089] In some embodiments, such as Figure 5 As shown, the feedback circuit 12 also includes a second transistor T2. The source of the second transistor T2 is coupled to the output terminal of the photosensitive circuit 11, and the drain and gate of the second transistor T2 are both coupled to the source of the first transistor T1.
[0090] For example, the source of the second transistor T2, the output of the photosensitive circuit 11, and the input of the amplifier circuit 13 are coupled to the first node N1.
[0091] The photocurrent I generated by the photosensitive circuit 11 ph The current flows to the first voltage terminal GND through the feedback circuit 12. Since multiple transistors in the feedback circuit 12 operate in the subthreshold region, the formula for the subthreshold current can be derived: By transforming the above formula for subthreshold current, we can obtain:
[0092] Substituting the parameters of the first transistor T1 into the above formula, we can obtain: Where V g1 V is the gate voltage of the first transistor T1. s1 Let T1 be the source voltage of the first transistor. Substituting the parameters of the second transistor T2 into the above formula, we can obtain: Among them, V g2 V is the gate voltage of the second transistor T2. s2 This is the source voltage of the second transistor T2.
[0093] Since the gate and drain of the second transistor T2 are both coupled to the source of the first transistor T1, the gate voltage V of the second transistor T2 is... g2 With the source voltage V of the first transistor T1 s1 Equal, i.e., V s1 =V g2 Since the gate of the first transistor T1 is coupled to the second node N2, the gate voltage of the first transistor T1 is related to the voltage V of the second node N2. pr Equal, i.e., V g1 =V pr Since the source of the second transistor T2 is coupled to the first node N1, the source voltage V of the second transistor T2 is... s2 Voltage V at the first node N1 pd Equal, i.e., V s2 =Vpd .
[0094] By establishing a system of two relations using the above relationships, we can obtain... When photocurrent I ph Size is determined by I ph1 Become I ph2 At that time, the change in voltage at the second node N2 is ΔV pr Satisfy the formula
[0095] Thus, in photocurrent I ph With the other parameters remaining constant, the voltage V at the second node N2 changes. pr With photocurrent I ph The change is even greater. As a result, the gain of the photoreceptor 10 is further improved, the amplification pressure of the switched capacitor amplifier 20 is reduced, and the area of the capacitor coupled to the photoreceptor 10 in the switched capacitor amplifier 20 can be further reduced, thereby reducing the area of the pixel unit 200.
[0096] In some embodiments, the second transistor T2 may be an intrinsic PMOS transistor.
[0097] In feedback circuit 12, both the first transistor T1 and the second transistor T2 operate in the subthreshold region, so the DC operating point voltage V of the second node N2 can be derived. pr_dir Satisfies the formula: V pr_dir =V1-V th_PD -V th_T1 -V th_T2 Where V1 is the voltage at the second voltage terminal VDD, V th_PD V is the threshold voltage of the photodiode PD. th_T1 V is the threshold voltage of the first transistor T1. th_T2 This is the threshold voltage of the second transistor T2.
[0098] Thus, when the second transistor T2 in the feedback circuit 12 provided in this application embodiment is an intrinsic PMOS transistor, the threshold voltage V of the second transistor T2... th_T2 This makes the voltage V at the DC operating point of the second node N2 close to 0, thus allowing the voltage V to be close to 0. pr_dir The voltage V at the second node N2 is relatively large, thus increasing the voltage V. pr The output swing, that is, increasing the voltage V at the second node N2. pr The dynamic range.
[0099] In this embodiment, the second transistor T2 is an intrinsic PMOS transistor, making its threshold voltage close to 0. According to the above formula, with other parameters remaining constant, the threshold voltage V of the second transistor T2... th_T2The smaller the value, the lower the voltage V at the DC operating point of the second node N2. pr_dir The larger the voltage, the greater the voltage swing of the second node N2, thus increasing the dynamic range of the pixel unit 200. Even with a reduction in process size and a decrease in the voltage provided by the second voltage terminal VDD, the voltage swing of the second node N2 can still be large, giving the pixel unit 200 a large dynamic range.
[0100] In some embodiments, the second transistor T2 is an intrinsic PMOS transistor, and the first transistor T1 is also an intrinsic PMOS transistor. Thus, the threshold voltage V of the first transistor T1... th_T1 The threshold voltage V of the second transistor T2 is close to 0. th_T2 It is also close to 0, the voltage V at the DC operating point of the second node N2 pr_dir It can be further increased, thereby increasing the voltage V at the second node N2. pr The output swing further increases.
[0101] In other embodiments, such as Figure 6 As shown, the feedback circuit 12 also includes a plurality of second transistors T2 connected in series, with the drain of each second transistor T2 coupled to its gate. The plurality of second transistors T2 include a primary transistor T21 and a final-stage transistor T2n. The source of the primary transistor T21 is coupled to the output terminal of the photosensitive circuit 11, and the drain of the final-stage transistor T2n is coupled to the source of the first transistor T1.
[0102] It is understandable that, except for the primary transistor T21 and the final transistor T2n, the gate and drain of the remaining second transistor T2 are coupled to the source of the adjacent second transistor T2.
[0103] In this embodiment, the number of second transistors T2 in the feedback circuit 12 is not limited and can be designed according to actual needs.
[0104] Based on a derivation process similar to the previous example, when the feedback circuit 12 includes multiple second transistors T2 connected in series, the voltage change ΔV at the second node N2 is... pr It can satisfy the formula Where a and n are both positive integers, a≥2, a represents the number of second transistors T2 in the feedback circuit 12, and n is greater than 0 and less than or equal to a.
[0105] Thus, in this embodiment of the application, multiple second transistors T2 connected in series are arranged in the feedback circuit 12. When the photocurrent I... ph When the voltage at the second node N2 changes, it varies with the photocurrent I. phThe amount of change can be relatively large, which can further improve the gain of the photoreceptor 10, reduce the area of the capacitor coupled to the photoreceptor 10 in the switched capacitor amplifier, and thus reduce the area of the pixel unit 200.
[0106] In some examples, where the feedback circuit 12 includes multiple second transistors T2 connected in series, all of the second transistors T2 can be intrinsic PMOS transistors. This increases the voltage V at the second node N2. pr Increase the output swing amplitude and dynamic range.
[0107] Figure 4 , Figure 5 and Figure 6 The amplifier circuit 13 is only schematically shown in the diagram. The following section will discuss the details. Figure 7 and Figure 8 The structure of amplifier circuit 13 is described in detail.
[0108] like Figure 7 The amplifier circuit 13 includes a third transistor T3 and a fourth transistor T4. The third transistor T3 is a PMOS transistor, and the fourth transistor T4 is an NMOS transistor. The gate of the third transistor T3 is coupled to the output terminal of the photosensitive circuit 11, and the source of the third transistor T3 is coupled to the second voltage terminal VDD. The drains of both the third transistor T3 and the fourth transistor T4 are coupled to the output terminal of the feedback circuit 12, and the source of the fourth transistor T4 is coupled to the first voltage terminal GND. The gate of the fourth transistor T4 is coupled to the first bias voltage terminal Q1.
[0109] For example, the gate of the third transistor T3, the output of the photosensitive circuit 11, and the input of the feedback circuit 12 are coupled to the first node N1, and the drain of the third transistor T3, the drain of the fourth transistor T4, and the output of the feedback circuit 12 are coupled to the second node N2.
[0110] In this embodiment, the fourth transistor T4 is configured to provide a stable current to the third transistor T3. The voltage V at the first bias voltage terminal Q1 in this application embodiment... bpr There are no restrictions on the specific values; the design can be tailored to actual needs.
[0111] In some embodiments, the amplifier circuit 13 may include a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7. The fifth transistor T5 and the sixth transistor T6 are both PMOS transistors, and the seventh transistor T7 is an NMOS transistor. The gate of the fifth transistor T5 is coupled to the output terminal of the photosensitive circuit 11, the source of the fifth transistor T5 is coupled to the second voltage terminal VDD, the drain of the fifth transistor T5 is coupled to the source of the sixth transistor T6, the gate of the sixth transistor T6 is connected to the second bias voltage terminal Q2, the drains of the sixth transistor T6 and the seventh transistor T7 are both coupled to the output terminal of the feedback circuit 12, the source of the seventh transistor T7 is coupled to the first voltage terminal GND, and the gate of the seventh transistor T7 is coupled to the first bias voltage terminal Q1.
[0112] Among them, the voltage V at the first bias voltage terminal Q1 bpr The voltage V at the second bias voltage terminal Q2 b The specific values can be designed according to actual needs, and the embodiments of this application do not impose any restrictions on them.
[0113] For example, the gate of the fifth transistor T5, the output of the photosensitive circuit 11, and the input of the feedback circuit 12 can be coupled to the first node N1, and the drain of the sixth transistor T6, the drain of the seventh transistor T7, and the output of the feedback circuit 12 can be coupled to the second node N2.
[0114] A Miller capacitance exists between the gate and drain of the fifth transistor T5. If the drain of the fifth transistor is directly connected to the second node N2, the Miller capacitance is equivalent to being connected in parallel with the amplifier circuit. Observing at the second node N2, the Miller capacitance will be amplified many times by the amplifier circuit. When analyzing the transfer function of the photoreceptor 10 and determining its dominant pole location, it can be found that the Miller capacitance is located in the denominator of the dominant pole expression. The larger the Miller capacitance, the smaller the dominant pole and the earlier its position; the smaller the Miller capacitance, the larger the dominant pole and the later its position. The earlier the dominant pole is located, the smaller the bandwidth of the photoreceptor 10, making it more difficult to achieve high-frequency signal transmission and resulting in a greater signal transmission delay.
[0115] Based on this, in this embodiment of the application, a sixth transistor T6 (i.e., a common-source common-gate transistor) with a fixed bias is provided between the fifth transistor T5 and the second node N2. The drain of the fifth transistor T5 is isolated from the second node N2, which makes the Miller capacitance observed at the second node N2 smaller, the main pole larger, and the main pole position relatively rearward, thereby increasing the bandwidth of the photoreceptor 10 and improving the delay problem.
[0116] Continue reading Figure 4 In some embodiments, the switched capacitor amplifier 20 includes a first capacitor 21, a second capacitor 22, an amplifier 23, and a switch 24.
[0117] The first terminal of the first capacitor 21 is coupled to the output terminal of the feedback circuit 12. The second terminal of the first capacitor 21, the input terminal of the amplifier 23, the first terminal of the second capacitor 22, and the first terminal of the switch 24 are coupled together. The output terminal of the amplifier 23, the second terminal of the second capacitor 22, the second terminal of the switch 24, and the input terminal of the threshold comparator 30 are coupled together.
[0118] For example, the first terminal of the first capacitor 21, the output terminal of the feedback circuit 12, and the output terminal of the amplifier circuit 13 can be coupled to the second node N2. The second terminal of the first capacitor 21, the first terminal of the second capacitor 22, the input terminal of the amplifier 23, and the first terminal of the switch 24 can be coupled to the fourth node N4. The second terminal of the second capacitor 22, the output terminal of the amplifier 23, the second terminal of the switch 24, and the input terminal of the threshold comparator 30 can be coupled to the third node N3.
[0119] It is understood that in the embodiments of this application, the fourth node N4 does not represent an actual existing component, but rather represents the junction point of related electrical connections in the circuit diagram. In other words, these nodes are equivalent to the junction points of related electrical connections in the circuit diagram.
[0120] Among them, the voltage V of the fourth node N4 float Less than the first threshold voltage V refh And greater than the second threshold voltage V refl During the operation of pixel unit 200, regardless of how the light received by photoreceptor 10 changes (becomes stronger or weaker), the voltage V of the second node N2 remains constant. pr How to change the voltage V at the fourth node N4? float Basically unchanged.
[0121] The operation of the switched capacitor amplifier 20 provided in this embodiment can be, for example, as follows: when switch 24 is open, the switched capacitor amplifier 20 amplifies the voltage V of the second node N2. pr The voltage V at the third node N3 diff The change value ΔV diff The voltage V at the second node N2 pr The change value ΔV pr The changes are proportional and satisfy the formula: Wherein, C1 represents the capacitance value of the first capacitor 21, and C2 represents the capacitance value of the second capacitor 22.
[0122] When switch 24 is closed, the third node N3 and the fourth node N4 are short-circuited, and the voltage V at the third node N3 is... diff The voltage V at the fourth node N4 float The voltages are equal and unaffected by the voltage of the second node N2, so the third node N3 is reset.
[0123] See Figure 4 In some embodiments, the threshold comparator 30 includes a first comparator 31, a second comparator 32, and a logic sub-circuit 33.
[0124] The first input terminal of the first comparator 31 and the second input terminal of the second comparator 32 are both coupled to the output terminal of the switched-capacitor amplifier 20. The second input terminal of the first comparator 31 is coupled to the third bias voltage terminal Q3, and the first input terminal of the second comparator 32 is coupled to the fourth bias voltage terminal Q4. The output terminals of the first comparator 31 and the second comparator 32 are coupled to the first and second input terminals of the logic sub-circuit 33, respectively. The logic sub-circuit 33 also includes a first output terminal and a second output terminal. The first output terminal is configured to output a first event signal ev+, and the second output terminal is configured to output a second event signal ev-.
[0125] The third bias voltage terminal Q3 is configured to provide the first threshold voltage V. refh The fourth bias voltage terminal Q4 is configured to provide the second threshold voltage V. refl .
[0126] For example, the first input terminal of the first comparator 31 and the second input terminal of the second comparator 32 can both be coupled to the output terminal of the switched capacitor amplifier 20 to the third node N3.
[0127] The threshold comparator 30 provided in this embodiment can operate by receiving the voltage V of the third node N3. diff The voltage V at the third node N3 is converted using the first comparator 31. diff With the first threshold voltage V refh The voltage V at the third node N3 is compared using the second comparator 32. diff With the second threshold voltage V refl The comparison is performed, the comparison result is received by logic sub-circuit 33, and the first event signal ev+ or the second event signal ev- is output according to the comparison result.
[0128] In some examples, logic subcircuit 33 may also include a reset terminal, which is connected to the control terminal of switch 24. Based on this, after logic subcircuit 33 receives the comparison result, a reset signal V can be output from the reset terminal. rst The control switch 24 is closed, thereby resetting the third node N3. After the reset process is completed, a restart signal (or a stop output of the reset signal) is output from the reset terminal, and the control switch 24 is opened. In this way, the switched capacitor amplifier 20 can cooperate with the threshold comparator 30 to enable the pixel unit 200 to perform real-time or high-speed image acquisition.
[0129] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.
[0130] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A pixel unit, characterized in that, include: A photoreceptor includes a photosensitive circuit, a feedback circuit, and an amplification circuit. The output terminal of the photosensitive circuit, the input terminal of the feedback circuit, and the input terminal of the amplification circuit are coupled together. The output terminal of the feedback circuit and the output terminal of the amplification circuit are coupled together. The photosensitive circuit is configured to receive light to form a photocurrent. The feedback circuit and the amplification circuit are configured to receive the photocurrent and output a corresponding voltage according to the photocurrent. The feedback circuit includes at least one transistor, which is a PMOS transistor. The amplification circuit includes a fifth transistor, a sixth transistor, and a seventh transistor. The fifth transistor and the sixth transistor are both PMOS transistors, and the seventh transistor is an NMOS transistor. The gate of the fifth transistor is coupled to the output terminal of the photosensitive circuit, the source of the fifth transistor is coupled to a second voltage terminal, the drain of the fifth transistor is coupled to the source of the sixth transistor, the gate of the sixth transistor is connected to a second bias voltage terminal, the drains of the sixth transistor and the seventh transistor are both coupled to the output terminal of the feedback circuit, the source of the seventh transistor is coupled to a first voltage terminal, and the gate of the seventh transistor is coupled to a first bias voltage terminal. A switched-capacitor amplifier, wherein the input terminal of the switched-capacitor amplifier is coupled to the output terminal of the feedback circuit; the switched-capacitor amplifier is configured to amplify the voltage output by the feedback circuit; A threshold comparator, the input of which is coupled to the output of the switched-capacitor amplifier, is configured to compare the voltage output by the switched-capacitor amplifier with a threshold voltage and output an event signal based on the comparison result.
2. The pixel unit according to claim 1, characterized in that, The feedback circuit includes a first transistor, the source of which is coupled to the output terminal of the photosensitive circuit, the drain of which is coupled to a first voltage terminal, and the gate of which is coupled to the output terminal of the amplifier circuit.
3. The pixel unit according to claim 2, characterized in that, The first transistor is an intrinsic PMOS transistor.
4. The pixel unit according to claim 2 or 3, characterized in that, The feedback circuit further includes a second transistor, the source of which is coupled to the output terminal of the photosensitive circuit, and the drain and gate of the second transistor are both coupled to the source of the first transistor.
5. The pixel unit according to claim 2 or 3, characterized in that, The feedback circuit further includes a plurality of second transistors connected in series, the drain of each second transistor being coupled to its gate; wherein, the plurality of second transistors include a primary transistor and a final transistor, the source of the primary transistor being coupled to the output terminal of the photosensitive circuit, and the drain of the final transistor being coupled to the source of the first transistor.
6. The pixel unit according to claim 4, characterized in that, The second transistor is an intrinsic PMOS transistor.
7. The pixel unit according to claim 1 or 2, characterized in that, The photosensitive circuit includes a photodiode, the cathode of which is coupled to a second voltage terminal, and the anode of which is coupled to the input terminal of the feedback circuit. The voltage at the second voltage terminal is higher than the voltage at the first voltage terminal.
8. A dynamic vision sensor, characterized in that, include: Multiple pixel units as described in any one of claims 1 to 7.
9. An electronic device, characterized in that, include: Image processor; An image sensor, including the dynamic vision sensor of claim 8; the image sensor is electrically connected to the image processor.