A method and device for detecting a wafer edge collapse defect based on edge point angle

Abstract

The application discloses a kind of based on edge point angle silicon wafer edge collapse defect detection method and equipment, obtain the image of silicon wafer to be detected, using morphological operation extraction silicon wafer area in the silicon wafer image;Edge fitting is carried out to the silicon wafer area, obtain the fitting polygon, and obtain the edge point of the fitting polygon;For every three edge points, the included angle of the two lines formed by every two adjacent points is obtained, whether there is edge collapse is judged according to the included angle, if not edge collapse, then locate the corner point;According to the position of corner point, the horizontal angle of the line of corner point and horizontal line is calculated, whether the corner exists edge collapse is judged according to the horizontal angle;The present application carries out edge collapse judgment in the mode of edge point angle, can more accurately judge whether silicon wafer exists edge collapse, and can identify the edge collapse at corner, realize more effective silicon wafer edge collapse defect detection.

Description

Technical Field

[0001] This invention relates to the field of silicon wafer edge chipping detection technology, and in particular to a method and device for detecting silicon wafer edge chipping defects based on the angle of edge points. Background Technology

[0002] With the rapid development of the semiconductor and photovoltaic industries, the quality requirements for silicon wafers are becoming increasingly stringent, and edge chipping on the side of silicon wafers is one of the most significant quality defects. Currently, existing silicon wafer edge chipping detection systems are typically based on color deviation on the side of the silicon wafer and the spacing between edge points. For example, existing technology (publication number: CN104362111A) divides the side of the silicon wafer into several detection units; if the color deviation rate value of any detection unit exceeds a set silicon wafer color deviation rate value, then the silicon wafer is considered to have edge chipping. Another technology (publication number: CN117689606A) extracts the edge point set of each long side of the silicon wafer and determines that if the spacing between any two adjacent edge points exceeds a set threshold, then the silicon wafer is considered to have edge chipping.

[0003] However, existing methods for detecting edge chipping on silicon wafers based on color deviation suffer from numerous false detections due to the presence of chamfered edges on the wafers during actual inspection. Furthermore, color deviation-based detection can lead to misjudgments when encountering wafer image jitter.

[0004] However, the method of detecting defects by edge point spacing alone may produce false detections when there are chamfers on the silicon wafer, and cannot correctly identify defects such as edge chipping on the silicon wafer. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method and device for detecting silicon wafer edge chipping defects based on the edge point angle, so as to achieve more effective detection of silicon wafer edge chipping defects.

[0006] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0007] A method for detecting edge chipping defects in silicon wafers based on edge point angles, comprising the following steps:

[0008] S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image;

[0009] S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon;

[0010] S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex.

[0011] S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

[0012] To solve the above-mentioned technical problems, another technical solution adopted by the present invention is as follows:

[0013] A silicon wafer edge chipping defect detection device based on edge point angle includes a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it performs the following steps:

[0014] S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image;

[0015] S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon;

[0016] S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex.

[0017] S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

[0018] The beneficial effects of the present invention are as follows: The present invention provides a silicon wafer edge chipping defect detection method and device based on edge point angle, which acquires and extracts images of the silicon wafer area, performs edge fitting, determines edge points, determines whether edge chipping exists by the angle between the lines connecting the edge points, determines the chamfer vertices, connects the chamfer vertices according to their positions, and calculates the angle with the horizontal line to determine whether the chamfer has edge chipping. This method can more accurately determine whether there is edge chipping on the silicon wafer and can identify edge chipping at the chamfer, thus achieving more effective silicon wafer edge chipping defect detection. Attached Figure Description

[0019] Figure 1 This is a simplified flowchart of a silicon wafer edge chipping defect detection method based on edge point angle according to an embodiment of the present invention;

[0020] Figure 2 This is a structural diagram of a silicon wafer edge chipping defect detection device based on edge point angle according to an embodiment of the present invention;

[0021] Figure 3 This is a flowchart of a silicon wafer edge chipping defect detection method based on edge point angle according to an embodiment of the present invention;

[0022] Figure 4This is an example diagram of the chipped edge region in a silicon wafer chipping defect detection method based on edge point angle according to an embodiment of the present invention;

[0023] Figure 5 This is an example diagram of the chamfer vertex of a silicon wafer edge chipping defect detection method based on edge point angle according to an embodiment of the present invention;

[0024] Figure 6 This is an example diagram of the chamfering situation in a silicon wafer edge chipping defect detection method based on edge point angle according to an embodiment of the present invention;

[0025] Label Explanation:

[0026] 1. A silicon wafer edge chipping defect detection device based on edge point angle; 2. Processor; 3. Memory. Detailed Implementation

[0027] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0028] Please refer to Figure 1 A method for detecting edge chipping defects in silicon wafers based on edge point angles, comprising the following steps:

[0029] S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image;

[0030] S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon;

[0031] S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex.

[0032] S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

[0033] As can be seen from the above description, the beneficial effects of the present invention are as follows: The present invention provides a silicon wafer edge chipping defect detection method based on edge point angle, which acquires and extracts images of the silicon wafer area, performs edge fitting, determines edge points, determines whether edge chipping exists by the angle between the lines connecting the edge points, determines the chamfer vertices, connects the chamfer vertices according to their positions, and calculates the angle with the horizontal line to determine whether the chamfer is chipped. This method can more accurately determine whether the silicon wafer is chipped and can identify edge chipping at the chamfer, thus achieving more effective silicon wafer edge chipping defect detection.

[0034] Furthermore, in step S3, determining whether there is edge chipping based on the included angle of the connecting lines specifically involves:

[0035] Determine whether the included angle of the connecting lines is greater than a preset threshold angle. If the included angle of the connecting lines is greater than the threshold angle, it is determined that there is a broken edge; otherwise, there is no broken edge.

[0036] As can be seen from the above description, by judging the angle threshold, when the included angle of the line connecting any two consecutive points among three adjacent edge points is large, it can still be considered that there is a broken edge.

[0037] Furthermore, step S3 also includes the following steps:

[0038] Obtain the three edge points associated with the included angle of the line that is determined to have a broken edge, obtain the triangular region formed by the three edge points, and draw the circumscribed rectangle of the triangular region as the broken edge region prompt box.

[0039] As described above, by identifying the triangle formed by the three edge points that are considered to be broken edges, a bounding rectangle is constructed to select the broken edge area as a hint.

[0040] Furthermore, the positioning of the chamfer vertex in step S3 is specifically as follows:

[0041] The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. In each region, the two connecting angles with the largest angle values ​​are selected. The middle edge point among the three edge points associated with each connecting angle is obtained, resulting in eight chamfer vertices.

[0042] As described above, when edge chipping is not detected, the silicon wafer area is divided, and eight vertices are selected based on the angle between the connecting lines. These vertices are called chamfer vertices and correspond to four chamfers, which are used to determine whether the chamfers are chipped.

[0043] Furthermore, step S4 specifically includes:

[0044] Based on the eight chamfer vertices of the four regions (top left, bottom left, top right, and bottom right), calculate the horizontal angle between the chamfer line connecting the regions and the horizontal line.

[0045] Determine whether there is a horizontal angle smaller than a preset chamfer threshold. If so, determine that the chamfer in the area to which the horizontal angle belongs has chipped edges.

[0046] As described above, based on the position of the chamfer vertices, four chamfer regions are divided, with two chamfer vertices in each region. After connecting these vertices, the angle between the line and the horizontal is calculated. If this angle is less than the angle of a normal chamfer, it is considered that there is edge breakage.

[0047] Please refer to Figure 2A silicon wafer edge chipping defect detection device based on edge point angle includes a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it performs the following steps:

[0048] S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image;

[0049] S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon;

[0050] S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex.

[0051] S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

[0052] As can be seen from the above description, the beneficial effects of the present invention are as follows: The silicon wafer edge chipping defect detection device based on edge point angle of the present invention acquires and extracts images of the silicon wafer area, performs edge fitting, determines edge points, determines whether edge chipping exists by the angle between the lines connecting the edge points, determines the chamfer vertices, connects the chamfer vertices according to their positions, and calculates the angle with the horizontal line to determine whether the chamfer is chipped. It can more accurately determine whether the silicon wafer is chipped and can identify edge chipping at the chamfer, thus achieving more effective detection of silicon wafer edge chipping defects.

[0053] Furthermore, in step S3, determining whether there is edge chipping based on the included angle of the connecting lines specifically involves:

[0054] Determine whether the included angle of the connecting lines is greater than a preset threshold angle. If the included angle of the connecting lines is greater than the threshold angle, it is determined that there is a broken edge; otherwise, there is no broken edge.

[0055] As can be seen from the above description, by judging the angle threshold, when the included angle of the line connecting any two consecutive points among three adjacent edge points is large, it can still be considered that there is a broken edge.

[0056] Furthermore, step S3 also includes the following steps:

[0057] Obtain the three edge points associated with the included angle of the line that is determined to have a broken edge, obtain the triangular region formed by the three edge points, and draw the circumscribed rectangle of the triangular region as the broken edge region prompt box.

[0058] As described above, by identifying the triangle formed by the three edge points that are considered to be broken edges, a bounding rectangle is constructed to select the broken edge area as a hint.

[0059] Furthermore, the positioning of the chamfer vertex in step S3 is specifically as follows:

[0060] The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. In each region, the two connecting angles with the largest angle values ​​are selected. The middle edge point among the three edge points associated with each connecting angle is obtained, resulting in eight chamfer vertices.

[0061] As described above, when edge chipping is not detected, the silicon wafer area is divided, and eight vertices are selected based on the angle between the connecting lines. These vertices are called chamfer vertices and correspond to four chamfers, which are used to determine whether the chamfers are chipped.

[0062] Furthermore, step S4 specifically includes:

[0063] Based on the eight chamfer vertices of the four regions (top left, bottom left, top right, and bottom right), calculate the horizontal angle between the chamfer line connecting the regions and the horizontal line.

[0064] Determine whether there is a horizontal angle smaller than a preset chamfer threshold. If so, determine that the chamfer in the area to which the horizontal angle belongs has chipped edges.

[0065] As described above, based on the position of the chamfer vertices, four chamfer regions are divided, with two chamfer vertices in each region. After connecting these vertices, the angle between the line and the horizontal is calculated. If this angle is less than the angle of a normal chamfer, it is considered that there is edge breakage.

[0066] The present invention provides a silicon wafer edge chipping defect detection method and device based on edge point angle, which is applicable to silicon wafer edge chipping detection scenarios.

[0067] Please refer to Figure 1 as well as Figures 3 to 6 Embodiment 1 of the present invention is as follows:

[0068] A method for detecting edge chipping defects in silicon wafers based on edge point angles, comprising the following steps:

[0069] S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image.

[0070] In this embodiment, for the silicon wafer to be inspected, the area array light source and camera are aligned with the silicon wafer, and the camera is aimed at the area of ​​the silicon wafer to be photographed to obtain the corresponding image, i.e., the image of the silicon wafer to be inspected. In this embodiment, a 4K area array camera is used, and the acquired image has a horizontal resolution of 3872 and a vertical resolution of 3872. The acquired silicon wafer image is an image with a red background illuminated by a red light source, and the main body of the silicon wafer surface is blue.

[0071] In this embodiment, since the background of the silicon wafer image is different from the main body of the silicon wafer surface, the silicon wafer region in the silicon wafer image is extracted by morphological operations such as color thresholding and opening / closing. Then, some parts of the red backlight area are removed to obtain a silicon wafer region that only contains the silicon wafer body.

[0072] S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon.

[0073] In this embodiment, edge fitting is performed on the silicon wafer region, which can fit the obtained silicon wafer region into a polygon, and the edge points A of the fitted polygon are obtained. i (i∈1,2,…,X).

[0074] In this embodiment, after obtaining the edge points of the polygon, a quantity check is first performed. If the number of edge points is less than 3, it indicates that the silicon wafer is abnormal and does not conform to the shape of the silicon wafer in actual testing, and no further operations are performed. If the number of edge points of the silicon wafer is greater than 3, it indicates that it is normal.

[0075] S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex.

[0076] In step S3, determining whether there is edge chipping based on the included angle of the connecting lines specifically involves:

[0077] Determine whether the included angle of the connecting lines is greater than a preset threshold angle. If the included angle of the connecting lines is greater than the threshold angle, it is determined that there is a broken edge; otherwise, there is no broken edge.

[0078] In this embodiment, the angles of consecutive edge points are calculated. (Refer to...) Figure 4 That is, for any three consecutive edge points A1, A2, A3, calculate the line L connecting A1 and A2. 12 The line L connecting A2 and A3 23 The angle α2 between the two is compared with the set threshold angle α0. If α2 is greater than the threshold α0, it is determined that there is a chipped edge; otherwise, it is determined that there is no chipped edge.

[0079] according to Figure 4As shown, it can be clearly seen that angles with a positive value of α2 are significantly different from negative angles at other positions. By setting a threshold α0, they can be clearly filtered.

[0080] Step S3 also includes the following steps:

[0081] Obtain the three edge points associated with the included angle of the line that is determined to have a broken edge, obtain the triangular region formed by the three edge points, and draw the circumscribed rectangle of the triangular region as the broken edge region prompt box.

[0082] In this embodiment, when it is determined that there is a broken edge, the broken edge area is located based on the abnormal point A2 and the three points A1 and A3 before and after it. That is, a triangular area is first determined based on the coordinates of A1 (Row1, Column1), the coordinates of abnormal point A2 (Row2, Column2), and the coordinates of A3 (Row3, Column3). Then, the bounding rectangle of the triangular area is drawn. This rectangular area is the broken edge area containing the abnormal point. Then, the message "There is a broken edge" is displayed in the text.

[0083] The specific positioning of the chamfer vertex in step S3 is as follows:

[0084] The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. In each region, the two connecting angles with the largest angle values ​​are selected. The middle edge point among the three edge points associated with each connecting angle is obtained, resulting in eight chamfer vertices.

[0085] In this embodiment, if there is no chipping at the edge, the chamfered area is further inspected. (Refer to...) Figure 5 The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. Within each region, the two lines connecting them with the largest angle values ​​are selected, forming the four chamfer vertices. Because the chamfer radius is relatively large, and edge chipping is usually caused by impacts from sharp objects, the angle generally indents inwards towards the edge. Therefore, it can be concluded that the eight corners with the largest edge angles are chamfers.

[0086] S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

[0087] Step S4 is as follows:

[0088] Based on the eight chamfer vertices of the four regions (top left, bottom left, top right, and bottom right), calculate the horizontal angle between the chamfer line connecting the regions and the horizontal line.

[0089] Determine whether there is a horizontal angle smaller than a preset chamfer threshold. If so, determine that the chamfer in the area to which the horizontal angle belongs has chipped edges.

[0090] In this embodiment, the connection lines between each chamfer vertex are fitted based on the edge points, namely the four connection lines l: top right, bottom right, bottom left, and top left. rt l rb l lb l lt Among them, l rt like Figure 6 As shown. (See attached image.) Figure 6 As shown, based on the angle β between the connecting line and the horizontal plane... i (i∈rt,rb,lb,lt), if this angle is less than the normal chamfer angle β0, then it is determined that there is a chamfer edge chipping situation. Otherwise, the silicon wafer does not have the abnormal situation of chamfer edge chipping.

[0091] Meanwhile, in this embodiment, considering that when there is edge breakage in the chamfer, there is a small probability that the line connecting the chamfer vertices is parallel to the line connecting the normal chamfer vertices, after the above judgment, the angle between the lines corresponding to the chamfer vertices is further matched between each chamfer to determine whether there are abnormal chamfer vertices, that is, to identify the existence of edge breakage.

[0092] Furthermore, in this embodiment, when it is determined that there is chipping at the chamfer, the abnormal chamfer angle β is used as the basis for the determination. i (i∈rt,rb,lb,lt), locate the chamfer, then use a large rectangular area to select the abnormal chamfer and give a message such as "XX chamfer has chipped edges".

[0093] Please refer to Figure 2 Embodiment two of the present invention is as follows:

[0094] A silicon wafer edge chipping defect detection device 1 based on edge point angle includes a processor 2, a memory 3, and a computer program stored in the memory 3 and executable on the processor 2. When the processor 2 executes the computer program, it implements the steps in the silicon wafer edge chipping defect detection method based on edge point angle described in Embodiment 1 above.

[0095] In summary, the present invention provides a silicon wafer edge chipping defect detection method and device based on edge point angle. This method involves acquiring and extracting images of the silicon wafer region, performing edge fitting, determining edge points, judging the presence of edge chipping by the angle between the lines connecting these edge points, determining the chamfer vertices, connecting the chamfer vertices according to their positions, and calculating the angle with the horizontal line to determine whether the chamfer is chipped. This method can more accurately determine whether the silicon wafer has edge chipping and can identify edge chipping at the chamfer, achieving more effective silicon wafer edge chipping defect detection.

[0096] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for detecting edge chipping defects in silicon wafers based on edge point angles, characterized in that, Including the following steps: S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image; S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon; S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex. S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

2. The silicon wafer edge chipping defect detection method based on edge point angle according to claim 1, characterized in that, In step S3, determining whether there is edge chipping based on the included angle of the connecting lines specifically involves: Determine whether the included angle of the connecting lines is greater than a preset threshold angle. If the included angle of the connecting lines is greater than the threshold angle, it is determined that there is a broken edge; otherwise, there is no broken edge.

3. The silicon wafer edge chipping defect detection method based on edge point angle according to claim 1, characterized in that, Step S3 also includes the following steps: Obtain the three edge points associated with the included angle of the line that is determined to have a broken edge, obtain the triangular region formed by the three edge points, and draw the circumscribed rectangle of the triangular region as the broken edge region prompt box.

4. The silicon wafer edge chipping defect detection method based on edge point angle according to claim 1, characterized in that, The specific positioning of the chamfer vertex in step S3 is as follows: The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. In each region, the two connecting angles with the largest angle values ​​are selected. The middle edge point among the three edge points associated with each connecting angle is obtained, resulting in eight chamfer vertices.

5. The silicon wafer edge chipping defect detection method based on edge point angle according to claim 4, characterized in that, Step S4 is as follows: Based on the eight chamfer vertices of the four regions (top left, bottom left, top right, and bottom right), calculate the horizontal angle between the chamfer line connecting the regions and the horizontal line. Determine whether there is a horizontal angle smaller than a preset chamfer threshold. If so, determine that the chamfer in the area to which the horizontal angle belongs has chipped edges.

6. A silicon wafer edge chipping defect detection device based on edge point angle, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it performs the following steps: S1. Obtain an image of the silicon wafer to be inspected, and use morphological operations to extract the silicon wafer region from the image; S2. Perform edge fitting on the silicon wafer region to obtain a fitted polygon, and obtain the edge points of the fitted polygon; S3. For every three adjacent edge points, obtain the angle between the two lines formed by connecting each pair of adjacent points. Determine whether there is edge breakage based on the angle. If there is no edge breakage, locate the chamfer vertex. S4. Based on the position of the chamfer vertex, calculate the horizontal angle between the line connecting the chamfer vertex and the horizontal line, and determine whether there is edge chipping at the chamfer based on the horizontal angle.

7. The silicon wafer edge chipping defect detection device based on edge point angle according to claim 6, characterized in that, In step S3, determining whether there is edge chipping based on the included angle of the connecting lines specifically involves: Determine whether the included angle of the connecting lines is greater than a preset threshold angle. If the included angle of the connecting lines is greater than the threshold angle, it is determined that there is a broken edge; otherwise, there is no broken edge.

8. The silicon wafer edge chipping defect detection device based on edge point angle according to claim 6, characterized in that, Step S3 also includes the following steps: Obtain the three edge points associated with the included angle of the line that is determined to have a broken edge, obtain the triangular region formed by the three edge points, and draw the circumscribed rectangle of the triangular region as the broken edge region prompt box.

9. A silicon wafer edge chipping defect detection device based on edge point angle according to claim 6, characterized in that, The specific positioning of the chamfer vertex in step S3 is as follows: The silicon wafer area is divided into four regions: upper left, lower left, upper right, and lower right. In each region, the two connecting angles with the largest angle values ​​are selected. The middle edge point among the three edge points associated with each connecting angle is obtained, resulting in eight chamfer vertices.

10. The silicon wafer edge chipping defect detection device based on edge point angle according to claim 9, characterized in that, Step S4 is as follows: Based on the eight chamfer vertices of the four regions (top left, bottom left, top right, and bottom right), calculate the horizontal angle between the chamfer line connecting the regions and the horizontal line. Determine whether there is a horizontal angle smaller than a preset chamfer threshold. If so, determine that the chamfer in the area to which the horizontal angle belongs has chipped edges.

Images