Symmetric sparse matrix-vector multiplication shared memory parallel acceleration method, device and equipment
Through symmetric CSR format SSS storage and task dependency tree decomposition, the data competition problem in sparse matrix-vector multiplication is solved, the parallel computing performance and memory access efficiency of symmetric sparse matrices are improved, and storage requirements are reduced.
Patent Information
- Application Number
- CN202411227263.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-03
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2044-09-03
AI Technical Summary
Existing sparse matrix-vector multiplication algorithms have data contention problems in parallel computing, especially the parallel computing performance of symmetric sparse matrices is limited, and the parallel scalability of existing solutions is poor.
The symmetric CSR format SSS is used to store symmetric sparse matrices, a conflict graph is constructed and divided into subgraphs and isolation areas, task decomposition and calculation are performed through the task dependency tree, and the symmetric properties of the matrix are used to reduce storage space and optimize memory access performance.
It significantly improves the performance of symmetric sparse matrix-vector multiplication calculations, increases the computational access-to-memory ratio, reduces storage memory resource consumption, and achieves more efficient parallel computing.
Smart Images
Figure CN119089102B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of parallel computing technology, and in particular to a method, apparatus and device for parallel acceleration of symmetric sparse matrix-vector multiplication with shared memory. Background Art
[0002] Sparse matrix-vector multiplication is an important technique in computer science and a fundamental operator in scientific computing. It is widely used in fields such as machine learning, image processing, network analysis, and solving systems of equations. A sparse matrix is one in which most elements are zero, and vector multiplication involves multiplying a vector by a matrix. For sparse matrices, only nonzero elements are typically stored to conserve storage space and improve computational efficiency. Various sparse matrix storage formats have been developed, with three main ones being COO, CSR, and CSC. The COO format, also known as the coordinate format, stores the row and column coordinates and values of all nonzero elements in a matrix in three arrays. Its advantage is its simplicity, making it suitable for storing sparse matrices with a small number of nonzero elements. However, its disadvantage is that it does not support fast row or column access. The CSR format compresses sparse matrices row by row. The nonzero elements of the matrix are stored row by row in a one-dimensional array, and two one-dimensional arrays are used to store the position of the first nonzero element in each row in the compressed array and the column coordinates of the nonzero element. Its advantage is that it supports fast row access and is suitable for matrix-vector multiplication algorithms, but its disadvantage is that converting to CSR format requires additional space and computational complexity. The CSC format is similar to the CSR format, except that row compression is changed to column compression.
[0003] In addition to the mainstream formats mentioned above, many researchers have also proposed some special formats to cope with different types of sparse matrices and parallel computing requirements. There are different matrix-vector multiplication parallel algorithms for different storage formats. Currently, the most common algorithm is the row-by-row parallel algorithm based on the CSR format. Specifically, the sparse matrix in the CSR format is divided by rows and assigned to different threads for calculation. Each thread is responsible for calculating the product of the non-zero elements of certain rows with the vector and accumulating the results into the final result. This algorithm is suitable for situations where the non-zero elements in the sparse matrix are relatively evenly distributed, but it is less effective for matrices with uneven distribution. In addition, there are parallel algorithms based on the CSR5 format, parallel algorithms based on the CSB format, and block parallel algorithms.
[0004] Although research on parallel algorithms for sparse matrix-vector multiplication is mature and there are many algorithms with good performance, sparse matrix-vector multiplication is still a memory-constrained algorithm, and its performance is limited by memory access performance. In practical applications, the sparse matrices involved in many fields are symmetrical. Symmetric sparse matrices can reduce memory usage by storing only the upper (lower) triangular matrices, increasing the computational memory access ratio and thus improving computational performance. Although the symmetric properties of sparse matrices can be used to reduce storage space, the symmetric positions need to participate in the calculation simultaneously during parallel computing, which may cause data contention. Existing solutions such as atomic locks, copy reduction, and coloring can solve the problem of data contention in shared memory parallelism, but their parallel scalability is poor. Summary of the Invention
[0005] Based on this, it is necessary to provide a symmetric sparse matrix-vector multiplication shared memory parallel acceleration method, device and equipment to address the above technical problems.
[0006] A shared memory parallel acceleration method for symmetric sparse matrix-vector multiplication, applicable to a shared memory architecture computer, comprising:
[0007] The symmetric CSR format SSS (Sparse Symmetric Skyline) is used to store the symmetric sparse matrix to be vector multiplied.
[0008] Construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication.
[0009] The call graph partitioning tool logically divides the conflict graph into several subgraphs and isolation areas between adjacent subgraphs, and sorts the nodes in each subgraph.
[0010] The isolation area is recursively divided layer by layer and all subgraphs and nodes in the isolation area are reordered, organized and stored in the shared memory in the form of a tree until the number of matrix rows corresponding to the isolation area is less than the preset threshold, and the task dependency tree TDT (Task Dedependency Tree) is obtained.
[0011] The task of symmetric sparse matrix-vector multiplication is decomposed according to the task dependency tree, and the decomposed tasks are assigned to the corresponding processors.
[0012] All processors first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolated area.
[0013] In one embodiment, the symmetric CSR format SSS includes four arrays: row pointer position, column coordinates, non-zero element values, and diagonal value arrays; wherein the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of the non-zero elements; and the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
[0014] In one embodiment, a mesh partitioning tool is called to logically partition the conflict graph into a plurality of subgraphs and isolation zones between adjacent subgraphs, and nodes in each subgraph are sorted, including:
[0015] Call the METIS graph partitioning tool to divide the conflict graph into several subgraphs.
[0016] Traverse all nodes in the subgraph and check whether they have edges with nodes in other subgraphs.
[0017] For points that are connected to points in other subgraphs, the point is removed from the original subgraph and divided into an isolation area.
[0018] Points that do not have edges with points in other subgraphs are not processed.
[0019] Reorder the nodes in each subgraph and isolated area so that the node numbers in each area are continuous.
[0020] In one embodiment, the isolation area is recursively divided layer by layer and all subgraphs and nodes in the isolation area are reordered and organized and stored in a tree form until the number of matrix rows corresponding to the isolation area is less than a preset threshold, thereby obtaining a task dependency tree, including:
[0021] After merging all isolation areas, they are recursively divided layer by layer. After each division, the nodes in the subgraph and isolation area are reordered and organized and stored in the form of a tree until the number of rows in the final isolation area is less than the preset threshold, and the task dependency tree is obtained.
[0022] A symmetric sparse matrix-vector multiplication shared memory parallel acceleration device, the device comprising:
[0023] The symmetric sparse matrix storage module is used to store the symmetric sparse matrix to be vector multiplication operation in the symmetric CSR format SSS.
[0024] The conflict graph construction module is used to construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication.
[0025] The task dependency tree construction module is used to call the graph partitioning tool to logically divide the conflict graph into several subgraphs and isolation zones between adjacent subgraphs, and sort the nodes in each subgraph; the isolation zones are recursively partitioned layer by layer and the nodes in all subgraphs and isolation zones are reordered, organized and stored in shared memory in the form of a tree until the number of matrix rows corresponding to the isolation zones is less than a preset threshold, thus obtaining the task dependency tree.
[0026] The task dependency tree execution module is used to decompose the task of symmetric sparse matrix-vector multiplication according to the task dependency tree and assign the decomposed tasks to the corresponding processors; all processors use the symmetric CSR format SSS in a row-parallel manner to first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolation area.
[0027] In one embodiment, the symmetric CSR format SSS in the symmetric sparse matrix storage module includes four arrays: row pointer position, column coordinates, non-zero element values, and diagonal value arrays; wherein the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of the non-zero elements; and the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
[0028] In one embodiment, a task dependency tree construction module is used to call the METIS graph partitioning tool to divide the conflict graph into several subgraphs; traverse the nodes in all subgraphs and detect whether they have edges with nodes in other subgraphs; for points that have edges with points in other subgraphs, remove the points from the original subgraph and divide them into isolation areas; do not process points that do not have edges with points in other subgraphs; reorder the nodes in each subgraph and isolation area so that the node numbers in each area are continuous.
[0029] In one embodiment, a task dependency tree construction module is used to merge all isolation areas and then recursively partition them. After each partition, the nodes in the subgraph and isolation area are reordered and organized and stored in the form of a tree until the number of rows in the final isolation area is less than a set threshold.
[0030] A computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any of the above methods when executing the computer program.
[0031] The above-mentioned symmetric sparse matrix-vector multiplication shared memory parallel acceleration method, device and equipment include: constructing a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication; calling a graph partitioning tool to logically divide the conflict graph into several subgraphs and isolation zones between adjacent subgraphs, and sorting the nodes in each subgraph; recursively partitioning the isolation zones layer by layer and re-sorting all subgraphs and nodes in the isolation zones, and organizing and storing them in the form of a TDT tree until the number of matrix rows corresponding to the isolation zones is less than a specific threshold; using a symmetric CSR format SSS in a row-by-row parallel manner, first calculating all subgraphs in the TDT tree, and then calculating the isolation zones. This method utilizes the symmetric properties of the matrix and sets isolation zones to significantly improve the computational performance of the symmetric sparse matrix-vector multiplication processing, increase the computational access memory ratio, optimize the memory access performance, and significantly reduce the consumption of storage memory resources. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 Schematic diagram of a flow chart of a shared memory parallel acceleration method for symmetric sparse matrix-vector multiplication in one embodiment;
[0033] Figure 2 A non-zero element position distribution diagram of a symmetric sparse matrix and a corresponding conflict graph generated for the symmetric sparse matrix in one embodiment, wherein (a) is a non-zero element position distribution diagram of the symmetric sparse matrix, and (b) is a corresponding conflict graph generated for the symmetric sparse matrix;
[0034] Figure 3 In one embodiment, the sparse matrix corresponds to a conflict graph that has been partitioned once;
[0035] Figure 4 Schematic diagram of the TDT tree structure obtained after recursion twice in another embodiment;
[0036] Figure 5 A structural block diagram of a shared memory parallel acceleration device for symmetric sparse matrix-vector multiplication in one embodiment;
[0037] Figure 6 FIG. 1 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION
[0038] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0039] Sparse matrices are often very large, sometimes so large that the entire matrix (zero elements) takes up most of the memory. Using a two-dimensional array for storage wastes a lot of memory cells to store zero elements, and also wastes a lot of time performing ineffective operations on zero elements. Therefore, it is necessary to consider compressing the sparse matrix (storing only non-zero elements).
[0040] The CSR format stands for Compressed Sparse Row Matrix. It consists of three arrays: data, indices, and indptr. The data array stores the non-zero elements of each row, starting at the beginning of the row; the indices array indicates the column index of each non-zero element; and the indptr array indicates the index of the first non-zero element in each row within the data array (note: only the first non-zero element in each row is counted).
[0041] From the pseudocode of the serial algorithm for symmetric sparse matrix-vector multiplication in SSS format (a CSR format used to store symmetric sparse matrices), we can see that the calculation is performed row by row in order. Line 6 of the pseudocode, y[col]+=A.values[j].x[i], indicates that for each non-zero element, not only its position but also its symmetric position must be calculated. This means that when we parallelize by row, the i-th row will not only update the i-th position of the output vector, but may also update other positions of the output vector. This will cause two different rows to update the same row at the same time, which will cause data contention and lead to incorrect results. For this reason, we propose a shared storage parallel acceleration method for symmetric sparse matrix-vector multiplication to solve this data contention problem.
[0042] The pseudo code for the serial algorithm of symmetric sparse matrix-vector multiplication in SSS format is:
[0043] A∈R N×N : matrix in SSS format;
[0044] x∈R N : input vector;
[0045] y∈R N : output vector;
[0046]
[0047] In one embodiment, Figure 1 As shown, a shared memory parallel acceleration method for symmetric sparse matrix-vector multiplication is provided, which is applicable to a shared memory architecture computer and includes the following steps:
[0048] Step 100: Use the symmetric CSR format SSS to store the symmetric sparse matrix to be vector multiplied.
[0049] Specifically, the matrix symmetry property is utilized to reduce storage memory consumption, increase the computational access-to-memory ratio, and optimize memory access performance, so that the overall algorithm can break through memory limitations and achieve faster running speed.
[0050] Step 102: Construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication.
[0051] Specifically, if there is a non-zero element in row 1, column 2, then when computing that position, its symmetric position should also be computed. That is, the non-zero element in row 1 will modify both the first and second positions of the output vector. Consequently, row 1 will experience data contention with row 2 and all other rows that modify the first and second positions of the output vector. This method constructs a conflict graph based on contention relationships, where a point in the graph corresponds to a row of the matrix, and an edge corresponds to a set of data contention relationships.
[0052] Figure 2 (a) shows the distribution of non-zero elements of a symmetric sparse matrix, where a point indicates that there is a non-zero element at that position. Figure 2 Figure (b) shows the conflict graph generated by this matrix. The points in the conflict graph represent the rows of the matrix, with the point numbers corresponding to the row numbers. Edges represent conflicts. For example, if row 0 has three non-zero elements in columns 0, 1, and 8, there is data contention between row 0 and rows 1 and 8. Therefore, node 0 is connected to nodes 1 and 8 by edges, respectively.
[0053] Step 104: Calling a graph partitioning tool to logically partition the conflict graph into a number of subgraphs and isolation areas between adjacent subgraphs, and sorting the nodes in each subgraph.
[0054] Specifically, the constructed conflict graph is logically divided into several subgraphs (subgraphs) and isolators between these subgraphs by calling a mesh partitioning tool such as METIS. This ensures that after each partition, there is no data contention between all subgraphs except the isolators, allowing for parallel processing. A sorting algorithm is used to sort the nodes (rows of the sparse matrix) within each subgraph generated after the conflict graph partitioning, ensuring that the row numbers are continuous.
[0055] Figure 3 Shown Figure 2 The effect diagram after the conflict graph generated by the symmetric sparse matrix is divided once. Figure 3As can be seen in the figure, the original conflict graph has been divided into four subgraphs, each distinguished by four colors. Isolators exist between the four subgraphs. After the division, there are no direct edges connecting the four subgraphs, allowing them to be computed in parallel. However, data contention exists between the isolators and the four subgraphs (edges have been removed from the graph, but contention still exists). Therefore, the isolators should be computed after the subgraphs have been computed.
[0056] Compared to existing symmetric sparse matrix-vector multiplication methods, this method eliminates data contention between subgraphs by setting up isolation zones, achieving large-scale parallel acceleration of the code. Furthermore, the rows corresponding to nodes within each subgraph are physically close together, providing better memory locality.
[0057] Setting up isolation zones significantly improves the computational performance of symmetric sparse matrix-vector multiplication processing, while significantly reducing the consumption of storage memory resources.
[0058] Step 106: Recursively divide the isolation area layer by layer and reorder all subgraphs and nodes in the isolation area, organize and store them in the shared memory in the form of a tree until the number of matrix rows corresponding to the isolation area is less than a preset threshold, and obtain the task dependency tree.
[0059] Specifically, after merging the isolators, the partitioning in step 103 is recursively performed, continuously decomposing the graph layer by layer. This is organized and stored in a tree format until the number of matrix rows corresponding to the isolators falls below a certain threshold, ultimately constructing a task tree (TDT). The recursive process is organized and stored in a tree format.
[0060] Compared to existing symmetric sparse matrix-vector multiplication methods, this method eliminates data contention between subgraphs by setting up isolation zones, achieving large-scale parallel acceleration of the code. Furthermore, the rows corresponding to nodes within each subgraph are physically close together, providing better memory locality.
[0061] Step 108: Decompose the symmetric sparse matrix-vector multiplication task according to the task dependency tree, and assign the decomposed tasks to corresponding processors.
[0062] Step 110: All processors use the symmetric CSR format SSS in a row-by-row parallel manner to first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolation area.
[0063] In the above-mentioned symmetric sparse matrix-vector multiplication shared memory parallel acceleration method, the method includes: constructing a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication; calling a graph partitioning tool to logically divide the conflict graph into several subgraphs and isolation zones between adjacent subgraphs, and sorting the nodes in each subgraph; recursively partitioning the isolation zones layer by layer and re-sorting all subgraphs and nodes in the isolation zones, and organizing and storing them in the form of a TDT tree until the number of matrix rows corresponding to the isolation zones is less than a specific threshold; using a symmetric CSR format SSS row-by-row parallel method, first calculating all subgraphs in the TDT tree, and then calculating the isolation zones. This method utilizes the matrix symmetry and sets isolation zones to significantly improve the computational performance of the symmetric sparse matrix-vector multiplication processing, increase the computational access memory ratio, optimize the memory access performance, and significantly reduce the consumption of storage memory resources.
[0064] This method
[0065] In one embodiment, the symmetric CSR format SSS in step 100 includes four arrays: row pointer position, column coordinates, non-zero element values, and diagonal value arrays; wherein the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of the non-zero elements; and the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
[0066] Specifically, the SSS format compactly stores symmetric sparse matrices using four arrays: row pointer positions, column coordinates, nonzero element values, and diagonal values. This preserves the symmetric nature of the matrix, reducing storage space requirements while still providing fast access to matrix elements.
[0067] In one embodiment, step 104 includes: calling the METIS graph partitioning tool to divide the conflict graph into several subgraphs; traversing the nodes in all subgraphs and detecting whether they have edges with nodes in other subgraphs; for points that have edges with points in other subgraphs, removing the points from the original subgraph and dividing them into isolation areas; not processing points that have no edges with points in other subgraphs; and reordering the nodes in each subgraph and the isolation area so that the node numbers in each area are continuous.
[0068] In one embodiment, step 106 includes: merging all isolation areas and then recursively dividing them layer by layer, reordering the nodes in the subgraph and isolation area after each division, and organizing and storing them in the form of a tree until the number of rows in the final isolation area is less than a preset threshold, thereby obtaining a task dependency tree.
[0069] Specifically, Figure 4This is a diagram of the tree structure after two recursive TDT constructions. Figure 4 Each node in represents a subgraph, and the subgraph contains continuous row intervals. Figure 3 The four subgraphs in Figure 4 For the four nodes on the left of the second layer, several isolation zones can be merged into a subgraph corresponding to the last node of the second layer. After each partition, the rows in the subgraph and isolation zone are reordered so that each node corresponds to a continuous range of rows. The device will continue to recursively partition the isolation zones until the number of rows in the final isolation zone is less than the set threshold. The recursive process will be organized and saved in the form of a tree, which we call the Task Dependency Tree (TDT). Figure 4 Two recursions are performed, and finally the number of rows in the isolation area is less than the threshold.
[0070] In one embodiment, TDT construction is divided into the following steps:
[0071] 1) Use graph partitioning tools such as METIS to divide the current graph into several subgraphs;
[0072] 2) Traverse all nodes in the subgraph and check whether they have edges with nodes in other subgraphs (i.e., the two points on an edge belong to different subgraphs);
[0073] 3) For points that have edges connected to points in other subgraphs, remove the point from the original subgraph and divide it into an isolation area;
[0074] 4) Points that do not have edges with other subgraphs are not processed (they still belong to the atomic graph);
[0075] 5) Reorder the nodes in each subgraph and isolated area so that the node numbers in each area are continuous;
[0076] 6) Store the above information in the tree and continue to recursively perform operations 1 to 5 on the isolated area until the number of rows in the isolated area is less than a specific threshold.
[0077] Finally, it can be constructed as Figure 4 In the TDT shown, each node of the tree corresponds to a row of a continuous interval of the original matrix.
[0078] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. In addition, Figure 1At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.
[0079] In one embodiment, Figure 5 As shown, a symmetric sparse matrix-vector multiplication shared memory parallel acceleration device is provided, comprising: a symmetric sparse matrix storage module, a conflict graph construction module, a task dependency tree construction module and a task dependency tree execution module, wherein:
[0080] Symmetric sparse matrix storage module, used to store symmetric sparse matrices to be vector multiplication operations in symmetric CSR format SSS;
[0081] A conflict graph construction module is used to construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix vector multiplication;
[0082] The task dependency tree construction module is used to call the graph partitioning tool to logically divide the conflict graph into several subgraphs and isolation zones between adjacent subgraphs, and sort the nodes in each subgraph. The isolation zones are recursively partitioned layer by layer and the nodes in all subgraphs and isolation zones are reordered. The nodes are organized and stored in shared memory in the form of a tree until the number of matrix rows corresponding to the isolation zones is less than a preset threshold, resulting in a task dependency tree.
[0083] The task dependency tree execution module is used to decompose the task of symmetric sparse matrix-vector multiplication according to the task dependency tree and assign the decomposed tasks to the corresponding processors; all processors use the symmetric CSR format SSS in a row-parallel manner to first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolation area.
[0084] In one embodiment, the symmetric CSR format SSS in the symmetric sparse matrix storage module includes four arrays: row pointer position, column coordinates, non-zero element values, and diagonal value arrays; wherein the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of the non-zero elements; and the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
[0085] In one embodiment, the task dependency tree construction module is also used to call the METIS graph partitioning tool to divide the conflict graph into several subgraphs; traverse the nodes in all subgraphs and detect whether they have edges with nodes in other subgraphs; for points that have edges with points in other subgraphs, remove the points from the original subgraph and divide them into isolation areas; do not process points that do not have edges with points in other subgraphs; reorder the nodes in each subgraph and isolation area so that the node numbers in each area are continuous.
[0086] In one embodiment, the task dependency tree construction module is also used to merge all isolation areas and then recursively partition them. After each partition, the nodes in the subgraph and isolation area are reordered and organized and stored in the form of a tree until the number of rows in the final isolation area is less than a set threshold.
[0087] Regarding the specific limitations of the symmetric sparse matrix vector multiplication shared memory parallel acceleration device, please refer to the limitations of the symmetric sparse matrix vector multiplication shared memory parallel acceleration method above, which will not be repeated here. The various modules in the above-mentioned symmetric sparse matrix vector multiplication shared memory parallel acceleration device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.
[0088] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a symmetric sparse matrix-vector multiplication shared memory parallel acceleration method is implemented. The display screen of the computer device can be a liquid crystal display or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad provided on the computer device housing, or an external keyboard, touchpad or mouse.
[0089] Those skilled in the art will understand that Figure 6The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.
[0090] In one embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above method embodiment when executing the computer program.
[0091] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0092] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.
Claims
1. A symmetric sparse matrix-vector multiplication shared memory parallel acceleration method, characterized in that: The method is applicable to a shared storage architecture computer, and the method includes: Use symmetric CSR format SSS to store symmetric sparse matrices to be vector multiplied; Construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix-vector multiplication; A call graph partitioning tool is used to logically partition the conflict graph into a plurality of subgraphs and isolation zones between adjacent subgraphs, and to sort the nodes in each subgraph; Recursively partitioning the isolation area layer by layer and reordering all subgraphs and nodes in the isolation area, organizing and storing them in a shared memory in the form of a tree until the number of matrix rows corresponding to the isolation area is less than a preset threshold, thereby obtaining a task dependency tree; Decomposing the task of symmetric sparse matrix-vector multiplication according to the task dependency tree, and assigning the decomposed tasks to corresponding processors; All processors use the symmetric CSR format SSS in a row-parallel manner to first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolation area.
2. The method according to claim 1, characterized in that The symmetric CSR format SSS includes four arrays: row pointer position, column coordinates, non-zero element values, and diagonal value arrays; wherein, the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of non-zero elements; the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
3. The method according to claim 1, characterized in that Calling a mesh partitioning tool to logically partition the conflict graph into a plurality of subgraphs and isolation zones between adjacent subgraphs, and sorting the nodes in each subgraph, including: Calling the METIS graph partitioning tool to partition the conflict graph into several subgraphs; Traverse all nodes in the subgraph and check whether they have edges with nodes in other subgraphs; For points that are connected to points in other subgraphs, the points are removed from the original subgraph and divided into the isolation area; Points that do not have edges with other points in the subgraph are not processed; The nodes in each subgraph and the isolated area are reordered so that the node numbers in each area are continuous.
4. The method according to claim 1, wherein The isolation area is recursively divided layer by layer and all subgraphs and nodes in the isolation area are reordered and organized and stored in the form of a tree until the number of matrix rows corresponding to the isolation area is less than a preset threshold, thereby obtaining a task dependency tree, including: After merging all isolation areas, they are recursively divided layer by layer. After each division, the nodes in the subgraph and isolation area are reordered and organized and stored in the form of a tree until the number of rows in the final isolation area is less than the preset threshold, and the task dependency tree is obtained.
5. A symmetric sparse matrix-vector multiplication shared memory parallel acceleration device, characterized in that: The device comprises: Symmetric sparse matrix storage module, used to store symmetric sparse matrices to be vector multiplication operations in symmetric CSR format SSS; A conflict graph construction module is used to construct a conflict graph based on the data competition relationship between rows in the symmetric sparse matrix vector multiplication; A task dependency tree construction module is used to call a graph partitioning tool to logically partition the conflict graph into several subgraphs and isolation zones between adjacent subgraphs, and sort the nodes in each subgraph; recursively partition the isolation zones layer by layer and re-sort the nodes in all subgraphs and isolation zones, and organize and store them in a tree format in shared memory until the number of matrix rows corresponding to the isolation zones is less than a preset threshold, thereby obtaining a task dependency tree; The task dependency tree execution module is used to decompose the task of symmetric sparse matrix-vector multiplication according to the task dependency tree and assign the decomposed tasks to the corresponding processors; all processors use the symmetric CSR format SSS in a row-parallel manner to first calculate the tasks corresponding to all subgraphs in the task dependency tree, and then calculate the tasks corresponding to the isolation area.
6. The device according to claim 5, characterized in that The symmetric CSR format SSS in the symmetric sparse matrix storage module includes four arrays: row pointer position, column coordinates, non-zero element values and diagonal value arrays; wherein, the row pointer position array is used to record the index of the position of the first non-zero element in each row in the non-zero value array; the column coordinate array is used to store the column index of each non-zero element; the non-zero element value array is used to store the values of non-zero elements; the diagonal value array is used to store the values of the diagonal elements of the symmetric matrix.
7. The device according to claim 5, characterized in that The task dependency tree construction module is also used to call the METIS graph partitioning tool to divide the conflict graph into several subgraphs; traverse the nodes in all subgraphs and detect whether they have edges with the nodes of other subgraphs; for points that have edges with points in other subgraphs, remove the points from the original subgraph and divide them into isolation areas; do not process points that do not have edges with points in other subgraphs; reorder the nodes in each subgraph and the isolation area so that the node numbers in each area are continuous.
8. The device according to claim 5, characterized in that The task dependency tree construction module is also used to merge all isolation areas and then recursively partition them. After each partition, the nodes in the subgraph and isolation area are reordered and organized and stored in the form of a tree until the number of rows in the final isolation area is less than the set threshold.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 4 is implemented.