Access device and method for register in super-large-scale chip

Abstract

The invention relates to the field of switch chip design, in particular to an access device and method for a register in a super-large-scale chip. The system mainly comprises at least two ring buses, each ring bus is connected with at least one register node to be accessed, and the ring buses perform data interaction with corresponding register groups through the register nodes; wherein a ring bus where a clock domain main node is located is used as a main ring, and the main ring performs data interaction with equipment outside a chip through a direct memory access interface; a ring bus which does not contain a main node of a clock domain is used as a sub-ring, and each sub-ring performs data interaction with the main ring through a branch node of the clock domain. The method is suitable for a super-large-scale chip and a scene with a complex address space, and rapid and efficient register and table item access can be realized.

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