Systems and methods for power conversion using bipolar signaling

Abstract

The present technology relates to systems and methods for power conversion using bipolar signaling. In some embodiments, the present technology provides an apparatus comprising a first switch configured to receive a first signal and a second switch configured to receive a second signal. A voltage generator is coupled to the first switch. The apparatus further comprises a first resistor coupled to the first switch and a second resistor coupled to the first resistor. The first switch is further coupled to a first capacitor that acts as a charge pump to generate a negative voltage such that an output of the apparatus comprises both positive and negative voltages. Embodiments of the present technology enable bipolar signaling based on a unipolar design, effectively minimizing DC leakage and overall power consumption. Other embodiments exist as well.

Description

[0001] Cross-reference of related applications

[0002] This application is a non-provisional application of U.S. Patent Application No. 63 / 507,247, filed June 9, 2023, entitled “Bipolar Rectifier and Inverter,” which is incorporated herein by reference in its entirety for all purposes. Technical Field

[0003] This technology relates to power conversion systems and methods. Background Technology

[0004] Over the past few decades, the field of power transmission and conversion systems has witnessed considerable technological advancements, particularly in the design and development of rectifiers and inverters. A rectifier is an electrical device that converts alternating current (AC) signals into direct current (DC) signals, while an inverter is an electrical device that converts direct current (DC) signals back into alternating current (AC) signals.

[0005] Various approaches involve designs based on unipolar IPs, where both the input and output operate across a voltage spectrum ranging from near ground to positive voltage. The popularity of unipolar designs can be attributed to their simplicity in both design and operation. However, they have several limitations, including high DC leakage. DC leakage is current flowing through unintended paths in the circuit, which can impair system efficiency and reliability.

[0006] Various methods have been explored for enhancing power conversion systems, but they have proven insufficient. It is important to recognize the need for new and improved power conversion systems and methods. Summary of the Invention

[0007] In one aspect, this disclosure provides an apparatus comprising: a first switch including a first input configured to receive a first signal; a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; a first ground terminal coupled to the second switch; a first resistor coupled to the first switch and the voltage generator, the first resistor being characterized by a first resistance; a second resistor coupled to the first resistor, the second resistor being characterized by a second resistance; a buffer including a third input and a first output, the third input being coupled to the first resistor and the second resistor, the first output being characterized by a second voltage; a third switch coupled to the first output; a first capacitor coupled to the first switch and the third switch; and a second output coupled to the third switch and the first capacitor.

[0008] In another aspect, this disclosure provides an apparatus comprising: a first switch including a first input configured to receive a first signal; a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; a first ground terminal coupled to the second switch; a first resistor coupled to the first switch and the voltage generator; a second resistor coupled to the first resistor; a buffer including a third input and a first output, the third input being coupled to the first resistor and the second resistor, the first output being characterized by a second voltage; a third switch coupled to the first output; a first capacitor coupled to the first switch and the third switch; and a second output coupled to the third switch and the first capacitor.

[0009] In another aspect, this disclosure provides an apparatus comprising: a first switch including a first input configured to receive a first signal; a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; a first ground terminal coupled to the second switch; a first resistor coupled to the first switch and the voltage generator, the first resistor being characterized by a first resistance; a second resistor coupled to the first resistor, the second resistor being characterized by a second resistance; a second ground terminal coupled to the second resistor; a buffer including a third input and a first output, the third input being coupled to the first resistor and the second resistor, the first output being characterized by a second voltage; a third switch coupled to the first output; a first capacitor coupled to the first switch and the third switch; and a second output coupled to the third switch and the first capacitor. Attached Figure Description

[0010] A further understanding of the nature and advantages of the particular embodiments can be achieved by referring to the remainder of the specification and the accompanying drawings, wherein similar reference numerals are used to refer to similar components. In some instances, sub-labels are associated with reference numerals to identify one of a plurality of similar components. When reference numerals are mentioned without specifying an existing sub-label, it is intended to refer to all such plurality of similar components.

[0011] Figure 1 This is a block diagram illustrating a power conversion system according to an embodiment of the present technology.

[0012] Figure 2 This is a circuit diagram illustrating a power conversion system according to an embodiment of the present technology.

[0013] Figure 3 It is a graph illustrating the voltage / time diagram of components within a power conversion system according to an embodiment of the present technology.

[0014] Figure 4 This is a circuit diagram illustrating a power conversion system according to an embodiment of the present technology.

[0015] Figure 5 This is a circuit diagram illustrating a power conversion system according to an embodiment of the present technology. Detailed Implementation

[0016] This technology relates to power conversion systems and methods. In some embodiments, this technology provides an apparatus including a first switch configured to receive a first signal and a second switch configured to receive a second signal. A voltage generator is coupled to the first switch. The apparatus further includes a first resistor coupled to the first switch and a second resistor coupled to the first resistor. The first switch is further coupled to a first capacitor, which acts as a charge pump to generate a negative voltage, such that the output of the apparatus includes both positive and negative voltages. Embodiments of this technology implement bipolar signaling based on a unipolar design, effectively minimizing DC leakage and overall power consumption. Other embodiments also exist.

[0017] Some approaches to implementing power conversion systems are primarily based on unipolar designs, where both the input and output operate across a voltage spectrum ranging from near ground to positive voltage. While this design approach may seem simple in its application, it often introduces the undesirable effects of high DC leakage—the phenomenon where current deviates from its intended path—leading to system inefficiency. This inefficiency, when considered in the context of power conversion, can jeopardize system reliability and operational effectiveness. To address the inherent drawbacks of unipolar systems, bipolar designs offer an attractive alternative, allowing the DC signal at the inverter output or rectifier input to remain close to ground. However, implementing a bipolar design presents its own set of challenges. One challenge is managing negative voltages. Bipolar systems must be able to handle both positive and negative voltages, which can introduce complexity in terms of circuit design and overall power consumption. Furthermore, the integration complexity of bipolar designs makes component selection difficult and requires rigorous optimization at the system-wide level.

[0018] In various embodiments, this technology enables bipolar signaling for a unipolar design based on a power conversion system. By integrating the inherent simplicity of unipolar systems with the advanced efficiency of bipolar signaling, this invention addresses common challenges—such as high DC leakage—while maintaining ease of design and operation. The flexibility it provides in voltage control—such as effectively handling both positive and negative voltage states—significantly reduces the complexity typically associated with bipolar systems. In various embodiments, fast bipolar signaling is seamlessly implemented, enhancing the dynamic response of the power conversion system. For example, in fast switching scenarios (e.g., burst signaling), embodiments of this technology ensure immediate DC offset adjustment within a minimum duration (e.g., a single cycle), enabling reliable data transmission with minimized power consumption and reduced interference. Embodiments of this technology enhance overall system reliability, ensuring reduced outages and extended operational life. It should be understood that this technology is suitable for any power conversion or transmission system, and is not limited to rectifiers and inverters.

[0019] The following description is presented to enable those skilled in the art to make and use the invention, and is incorporated into the context of a particular application. Various modifications and uses in different applications will be readily apparent to those skilled in the art, and the general principles defined herein apply to a wide range of embodiments. Therefore, the invention is not intended to be limited to the presented embodiments, but should be accorded the broadest scope consistent with the principles and novel features disclosed herein.

[0020] In the following detailed description, many specific details are set forth in order to provide a more thorough understanding of the present technology. However, those skilled in the art will understand that the present technology can be practiced without being limited to these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail in order to avoid obscuring the present technology.

[0021] This directs the reader's attention to all papers and documents filed concurrently with and publicly available for consultation with this specification, the contents of which are incorporated herein by reference. Unless otherwise expressly stated, all features disclosed in this specification (including any appended claims, abstracts, and figures) may be replaced by alternative features used for the same, equivalent, or similar purposes. Therefore, unless otherwise expressly stated, each disclosed feature is merely one example of a general series of equivalent or similar features.

[0022] Furthermore, any element in the claims that is not expressly described as "means" for performing the specified function or "step" for performing a particular function shall not be construed as a "means" or "step" as specified in paragraph 6 of Chapter 112 of 35 U.S.SC. Specifically, the use of "step" or "action" in the claims herein is not intended to invoke the provisions of paragraph 6 of Chapter 112 of 35 U.S.SC.

[0023] When an element is referred to herein as “connected” or “coupled” to another element, it should be understood that the element may be directly connected to the other element or that there may be an intermediary element between the elements. Conversely, when an element is referred to as “directly connected” or “directly coupled” to another element, it should be understood that there is no intermediary element in the “direct” connection between the elements. However, the presence of a direct connection does not preclude the existence of other connections in which intermediary elements may be present.

[0024] When an element is referred to herein as being "placed" relative to another element in a certain way (e.g., placed on it, between it, below it, adjacent to it, or placed in some other relative manner), it should be understood that the element may be placed directly relative to the other element (e.g., placed directly on the other element), or that there may be an intervening element between these elements. Conversely, when an element is referred to as being "placed directly" relative to another element, it should be understood that there is no intervening element in the "direct" instance. However, the presence of direct placement does not preclude other instances in which intervening elements may be present.

[0025] Similarly, when an element is referred to herein as being “joined” to another element, it should be understood that the element may be directly joined to the other element (without any intermediary element), or that there may be an intermediary element between the joined elements. Conversely, when an element is referred to as being “directly joined” to another element, it should be understood that there is no intermediary element in the “direct” joint between the elements. However, the presence of a direct joint does not preclude other forms of joint in which an intermediary element may be present.

[0026] Similarly, when an element is referred to herein as a “layer,” it should be understood that the layer may be a single layer or comprise multiple layers. For example, a conductive layer may comprise multiple different conductive materials or multiple layers of different conductive materials, and a dielectric layer may comprise multiple dielectric materials or multiple layers of dielectric materials. When a layer is described as coupled or connected to another layer, it should be understood that the coupled or connected layer may contain intermediary elements present between the coupled or connected layers. Conversely, when a layer is referred to as being “directly” connected or coupled to another layer, it should be understood that there are no intermediary elements between the layers. However, the presence of directly coupled or connected layers does not preclude the possibility of other connections where intermediary elements may exist.

[0027] Furthermore, the terms left, right, front, back, top, bottom, forward, reverse, clockwise, and counterclockwise are used for interpretive purposes only and are not limited to any fixed direction or orientation. Rather, they are used only to indicate the relative position and / or orientation between the various parts of an object and / or component.

[0028] Furthermore, for ease of description, the methods and processes described herein may be described in a specific order. However, it should be understood that unless the context otherwise indicates, intermediate processes may occur before and / or after any part of the described process, and other procedures may be reordered, added, and / or omitted according to various embodiments.

[0029] Unless otherwise indicated, all figures used herein to express quantity, size, etc., should be understood to be modified by the term “about” in all instances. In this application, unless expressly stated otherwise, the use of the singular includes the plural, and unless otherwise indicated, the use of the terms “and” and “or” means “and / or”. Furthermore, the use of the terms “comprising” and “having,” as well as other forms such as “includes” and “has” and “have”, should be considered non-exclusive. Moreover, unless expressly stated otherwise, terms such as “element” or “component” cover both elements and components that constitute a single unit and elements and components that constitute more than one unit.

[0030] As used herein, the phrase “at least one of…” preceding a series of items separated by the terms “and” or “or” modifies the list as a whole, not each member of the list (i.e., each item). The phrase “at least one of…” does not require selection of at least one of every listed item; rather, the phrase allows for the inclusion of at least one of any one item and / or at least one of any combination of items. For example, the phrases “at least one of A, B, and C” or “at least one of A, B, or C” each refer only to A, only to B, or only to C; and / or any combination of A, B, and C. This is explicitly stated in examples where selection of “at least one of each of A, B, and C”, or alternatively, “at least one of A, at least one of B, and at least one of C”, is desired.

[0031] One general aspect includes an apparatus comprising a first switch including a first input configured to receive a first signal. The apparatus further includes a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage. The apparatus further includes a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal. The apparatus further includes a first ground terminal coupled to the second switch. The apparatus further includes a first resistor coupled to the first switch and the voltage generator, the first resistor being characterized by a first resistance. The apparatus further includes a second resistor coupled to the first resistor, the second resistor being characterized by a second resistance. The apparatus further includes a buffer including a third input and a first output, the third input being coupled to the first and second resistors, the first output being characterized by a second voltage; and a third switch coupled to the first output. The apparatus further includes a first capacitor coupled to the first and third switches. The apparatus further includes a second output coupled to the third switch and the first capacitor.

[0032] The implementation may include one or more of the following features. The device further includes a first circuit coupled to a first switch and a second switch, the first circuit being configured to send a first signal to a first input and a second signal to a second input. A second output is configured to output a first output signal. The buffer further includes a fourth input coupled to the first output. The first output signal includes a positive signal and a negative signal. The device further includes a fourth switch coupled to a third switch and a first capacitor. The first switch includes a complementary metal-oxide-semiconductor (CMOS) or a bipolar junction transistor (BJT). The first switch includes a gate coupled to the first input. The ratio of a first resistance to a second resistance is less than 1.1:1. The second voltage is less than or equal to half of the first voltage. The third switch includes a p-channel metal-oxide-semiconductor (PMOS) or a laterally diffused metal-oxide-semiconductor (LDMOS).

[0033] According to another embodiment, the present technology provides an apparatus including a first switch comprising a first input configured to receive a first signal. The apparatus further includes a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage. The apparatus further includes a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal. The apparatus further includes a first ground terminal coupled to the second switch. The apparatus further includes a first resistor coupled to the first switch and the voltage generator. The apparatus further includes a second resistor coupled to the first resistor. The apparatus further includes a buffer comprising a third input and a first output, the third input being coupled to the first resistor and the second resistor, the first output being characterized by a second voltage. The apparatus further includes a third switch coupled to the first output. The apparatus further includes a first capacitor coupled to the first switch and the third switch. The apparatus further includes a second output coupled to the third switch and the first capacitor.

[0034] The implementation may include one or more of the following features. The device further includes a first circuit coupled to a first switch and a second switch, the first circuit being configured to send a first signal to a first input and a second signal to a second input to control the switching of the first switch and the second switch. A second output is configured to output a first output signal. The device further includes a fourth switch coupled to a third switch and a first capacitor. A second voltage is less than or equal to half of the first voltage. The device further includes a second ground terminal coupled to a second resistor.

[0035] According to another embodiment, the present technology provides an apparatus including a first switch comprising a first input configured to receive a first signal. The apparatus further includes a voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage. The apparatus further includes a second switch coupled to the first switch, the second switch including a second input configured to receive a second signal. The apparatus further includes a first ground terminal coupled to the second switch. The apparatus further includes a first resistor coupled to the first switch and the voltage generator, the first resistor being characterized by a first resistance. The apparatus further includes a second resistor coupled to the first resistor, the second resistor being characterized by a second resistance. The apparatus further includes a second ground terminal coupled to the second resistor. The apparatus further includes a buffer comprising a third input and a first output, the third input being coupled to the first resistor and the second resistor, the first output being characterized by a second voltage. The apparatus further includes a third switch coupled to the first output. The apparatus further includes a first capacitor coupled to the first switch and the third switch. The apparatus further includes a second output coupled to the third switch and the first capacitor.

[0036] The implementation may include one or more of the following features. The device further includes a first circuit coupled to a first switch, the first circuit being configured to send a first signal to a first input. The ratio of the first resistor to the second resistor is less than 1.1:1. The device further includes a fourth switch coupled to a third switch and a first capacitor.

[0037] Figure 1 This is a block diagram illustrating a power conversion system 100 according to an embodiment of the present technology. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, substitutions, and modifications will be recognized by those skilled in the art. System 100 can be implemented as any type of power conversion system and can be part of a larger device, such as a wireless charger. For example, system 100 can be implemented as a rectifier, referring to an electrical device that converts alternating current (AC) signals into direct current (DC) signals. In another example, system 100 can be implemented as an inverter, referring to an electrical device that converts direct current (DC) signals into alternating current (AC) signals. System 100 can be a power supply, battery charger, battery operating device, and / or the like. Depending on the implementation, system 100 can be wholly or partially integrated into an integrated circuit chip.

[0038] As shown, system 100 may include at least one of a first circuit 101, a first switch 104, a second switch 105, a voltage generator 106, a first resistor 107, a second resistor 108, a first ground terminal 110, a second ground terminal 109, a buffer 111, a third switch 112, a first capacitor 114, a fourth switch 113, and a second output 115. As an example, system 100 is configured to receive an AC signal and rectify it into a DC signal. Voltage generator 106 may output a DC voltage to power any subsequent processing circuitry. In this example, system 100 is configured to receive a DC signal and output an AC signal at the second output 115. For example, the term "conversion" (e.g., from AC to DC or vice versa) includes the conversion of a non-ideal signal that can be implemented in real-world applications. Therefore, an AC signal may include a non-ideal AC signal (e.g., an imperfect sine wave). Similarly, a DC signal may include a non-ideal DC signal (e.g., an imperfect constant).

[0039] In various embodiments, system 100 includes a first switch 104 and a second switch 105. As an example, the term "switch" may refer to an electronic component capable of controlling, directing, or modulating current within a circuit. The first switch 104 and / or the second switch 105 may include, but are not limited to, field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), laterally diffused metal-oxide-semiconductor (LDMOS), bipolar junction transistors (BJTs), thyristors, or other types of transistors or other types of switches. In some cases, the first switch 104 includes complementary metal-oxide-semiconductor (CMOS) or bipolar junction transistors (BJTs). In some embodiments, the first switch 104 and the second switch 105 may be coupled to a first circuit 101 configured to control the operation of the first switch 104 and the second switch 105. Circuit 101 may include circuitry and / or other components, such as programmable logic, a microcontroller, and / or software, and may send control signals to the first switch 104 and the second switch 105 to regulate their operation.

[0040] According to various embodiments, a first switch 104 includes a first input 102, and a second switch includes a second input 103. The term "input" can refer to a point or node in a circuit where a signal (e.g., voltage or current) is fed into a device or component. The first input 102 and / or the second input 103 may include, but are not limited to, terminals, leads, or pins on a semiconductor device or connection points on a printed circuit board (PCB). For example, the first switch 104 includes a gate coupled to the first input 102. In an example, the first switch 104 includes a bipolar junction transistor (BJT), which may include a base coupled to the first input 102. Depending on the embodiment, the first circuit 101 may be configured to send one or more signals to the first switch 104 and the second switch 105 to change their on / off states. For example, the first input 102 is configured to receive a first signal from the first circuit 101. The first switch 104 may change its on / off state in response to the first signal. In some cases, the first switch 104 can switch from an off state to an on state after receiving a first signal. Similarly, the first switch 104 can switch from an on state to an off state after receiving a first signal. The second input 103 can be configured to receive a second signal from the first circuit 101. The second switch 105 can change its on / off state in response to the second signal. For example, the second switch 105 can switch from an off state to an on state after receiving a second signal. Similarly, the second switch 105 can switch from an on state to an off state after receiving a second signal.

[0041] In some embodiments, system 100 further includes a voltage generator 106 coupled to a first switch 104. The voltage generator 106 may be characterized by a first voltage. The term "voltage generator" can refer to a means of generating, regulating, or maintaining a specific voltage level within an electrical system by providing or absorbing energy. Depending on the implementation of the art, the voltage generator may be configured as a voltage source or a voltage absorber. For example, voltage generator 106 may be configured as a voltage source that supplies energy to the system, converting DC to AC to generate a desired voltage level. In some instances, voltage generator 106 may be configured as a voltage absorber that absorbs energy during AC to DC conversion, establishing a necessary voltage level by drawing or absorbing current as needed. Depending on the implementation, the power supplied by voltage generator 106 may include positive and / or negative signals. The term "positive signal" can refer to a portion of a voltage or current waveform that remains above ground in the electrical system. The term "negative signal" can refer to a portion of a voltage or current waveform that drops below ground.

[0042] In some embodiments, the first resistor 107 may be coupled to the first switch 104 and / or the voltage generator 106. The first resistor 107 may be characterized as a first resistance. For example, the term "resistance" refers to the resistance provided by a material to the flow of electric current. Resistance can be determined or calculated using Ohm's law R = V / I, where V is the voltage across the resistor and I is the current flowing through it. Resistance can be measured in ohms (Ω). System 100 may further include a second resistor 108 coupled to the first resistor 107. The second resistor 108 may be characterized as a second resistance. Depending on the embodiment, the ratio of the first resistance to the second resistance may be less than 1.1:1. For example, the ratio of the first resistance to the second resistance may be 1:1.

[0043] In various embodiments, a second switch 105 is coupled to a first ground terminal 110. A second resistor may be coupled to a second ground terminal 109. For example, the term "ground terminal" or "ground" may refer to a connection point used to reference the potential of a circuit to a ground plane. A ground plane is a conductive surface used to dissipate electrical noise and provide a common reference point for all components in the circuit. In some embodiments, system 100 further includes a buffer 111 that includes a third input and a first output. For example, the term "buffer" or "voltage buffer" may refer to an electronic component that isolates the input from the output, ensures voltage consistency, and prevents interference from downstream components. Buffer 111 may include, but is not limited to, operational amplifier (op-amp) voltage buffers, digital buffers, current buffers, voltage dividers, and / or the like. The term "output" may refer to a terminal or connection point that provides a signal to another device or circuit element. In an example, buffer 111 includes an operational amplifier, which refers to a high-gain electronic voltage amplifier with differential inputs and single-ended outputs. In various instances, the third input of buffer 111 is coupled to the first resistor 107 and the second resistor 108. The first output of the buffer is characterized by a second voltage. For example, due to the voltage divider action of the first resistor 107 and the second resistor 108, the second voltage at the first output may be a fraction of the first voltage at voltage generator 106. In some cases, the second voltage may be less than or equal to half of the first voltage.

[0044] In various embodiments, system 100 further includes a third switch 112 that can be coupled to the first output of buffer 111. As an example, the third switch 112 may include, but is not limited to, a field-effect transistor (FET), such as a metal-oxide-semiconductor FET (MOSFET), a bipolar junction transistor (BJT), a thyristor, or other types of transistors or other types of switches. In some cases, the third switch 112 may include a p-channel metal-oxide-semiconductor (PMOS) and / or a laterally diffused metal-oxide-semiconductor (LDPMOS). In some embodiments, a first capacitor 114 may be coupled to the first switch 104 and / or the third switch 112. The term "capacitor" can refer to an electronic component that stores energy in an electric field. The first capacitor 114 may include, but is not limited to, a ceramic capacitor, a film capacitor, an electrolytic capacitor, and / or the like. In some embodiments, a fourth switch 113 is coupled to the third switch 112 and the first capacitor 114. The fourth switch 113 may include, but is not limited to, a field-effect transistor (FET), such as a metal-oxide-semiconductor FET (MOSFET), a bipolar junction transistor (BJT), a thyristor, or other types of transistors or other types of switches.

[0045] In various instances, system 100 includes a second output configured to provide an output signal of system 100 to a subsequent circuit system for further processing. The second output 115 may be coupled to a third switch 112 and a first capacitor 114. As an example, the second output 115 is configured to output a first output signal. Depending on the embodiment, the first output signal may include an AC signal and / or a DC signal. The term "AC signal" or "alternating current signal" may refer to a sequence of currents, voltages, or values ​​that periodically reverse direction. In an AC signal, the current or voltage alternates between positive and negative polarities. An AC signal may include, but is not limited to, sinusoidal, square, triangular, and / or similar waveforms. The term "DC signal" or "direct current signal" may refer to a sequence of currents, voltages, or values ​​exhibiting only positive or only negative values. The current flows in a constant direction without changing polarity. A DC signal may include, but is not limited to, a constant voltage signal, a constant current signal, and / or similar signals.

[0046] Figure 2 This is a circuit diagram illustrating a power conversion system 200 according to an embodiment of the present technology. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, alternatives, and modifications will be recognized by those skilled in the art. As previously mentioned, system 200 can be implemented as any type of power conversion system, such as a rectifier, inverter, or other bidirectional converter.

[0047] As shown, system 200 may include at least one of a first circuit 201, a first switch 204, a second switch 205, a voltage generator 206, a first resistor 207, a second resistor 208, a first ground terminal 210, a second ground terminal 209, a buffer 211, a third switch 212, a first capacitor 214, a fourth switch 213, and a second output 215. For example, system 200 may be implemented as an inverter configured to receive an input signal (e.g., a DC signal provided by voltage generator 206) and generate an output signal (e.g., an AC signal output at second output 215). For example, voltage generator 206 may be characterized by a first voltage, denoted as VRECT. Second output 215 may be configured to output a first output signal, which, depending on the application, may be characterized by a target voltage. In various embodiments, the first voltage of voltage generator 206 may be determined or adjusted based on the target voltage.

[0048] In some embodiments, the operation of system 200 depends on the systematic and coordinated switching of first switch 204 and second switch 205 according to specific conditions. For example, first switch 204—labeled TOPx—includes a first input 202. Second switch 205—labeled BOTx—includes a second input 203. First switch 204 and second switch 205 may be controlled by first circuit 201. For example, first circuit 201 is configured to send one or more signals to first switch 204 and second switch 205 to change their on / off states. First resistor 207 may be coupled to first switch 204 and / or voltage generator 206. First resistor 207 may be characterized as a first resistor. Second resistor 208 may be coupled to first resistor 207. Second resistor 208 may be characterized as a second resistor. Depending on the embodiment, the first resistor and second resistor may be closely matched. For example, the ratio of the first resistor to the second resistor may be less than 1.1:1. In some cases, the ratio of the first resistor to the second resistor may be 1:1. The second switch 205 can be coupled to the first ground terminal 210 – labeled RGND. The second resistor 208 can be coupled to the second ground terminal 209.

[0049] In some embodiments, system 200 further includes a buffer 211, which includes a third input and a first output. The first output may be characterized by a second voltage—denoted as ACx_BIAS. Buffer 211 may further include a fourth input coupled to the first output. A third switch 212—denoted as CMx—may be coupled to the first output of buffer 211. In various instances, a resistor may be integrated from the CMx pin to ground, acting as an effective component to maintain the bipolar signal after DC stabilization has occurred. The resistance value of the resistor can be dynamically adjusted to adapt to operating conditions and required ranges, enhancing the system's adaptability and efficiency. A first capacitor 214—denoted as C...NCPx —It may be coupled to the first switch 204 and / or the third switch 212. For example, the first capacitor 214 includes a first side coupled to the first switch 204 and a second side coupled to the third switch 212. In some cases, the system 200 further includes a fourth switch 213—denoted as CMx_AC—coupled to the third switch 212 and the first capacitor 214.

[0050] During operation, the first voltage is set to twice the target voltage (e.g., 5V, 10V, etc.). This means that if the first voltage is VRECT, then the target voltage will be VRECT / 2. After startup, the first circuit 201 can send a first signal to the first input 202 to activate and switch the first switch 204 to its ON state. Simultaneously, the first circuit 201 can send a second signal to the second input 203 to keep the second switch 205 in its OFF state, while the first switch actively turns on. In a closely coordinated sequence, the third switch 212 can turn on after the first switch 204 turns on. For example, the first circuit 201 can send a third signal to coordinate with the turning on of the first switch 204 to turn on the third switch 212. In some cases, a time delay can be imposed on the activation of the third switch 212 to ensure that it switches to its ON state only after the first switch 204 has been fully activated. It should be understood that the states of the first switch 204 and the second switch 205 controlled by the first circuit 201 should remain opposite to each other during operation to eliminate the risk of short circuits.

[0051] Due to the voltage divider action of the first resistor 207 and the second resistor 208, the second voltage at the first output can be a fraction of the first voltage at the voltage generator 106. For example, the second voltage ACx_BIAS can be less than or equal to half of the first voltage VRECT. In this example, ACx_BIAS is half the VRECT value (e.g., VRECT / 2). The first side of the first capacitor 214 can be coupled to the pin output ACx.

[0052] During the operating cycle in which the first switch 204 and the third switch 212 are on and the second switch 205 is off, the first side of the first capacitor 214 is charged to the value of VRECT. Simultaneously, the second side of the first capacitor 214, connected to the first output of the buffer 211 via the third switch 212, is charged to half the VRECT value (e.g., VRECT / 2). This systematic charge distribution ensures that the DC bias across the first capacitor 214 remains at VRECT / 2. Subtracting the DC bias at the first capacitor 214 is a crucial step in generating the bipolar signal. When the first switch 204 and the third switch 212 are off and the second switch 205 is on, the first side of the first capacitor 214 is discharged to ground. Because the second side of the first capacitor 214 is VRECT / 2 lower than the first side, this causes the second side of the first capacitor 214 to drop to a voltage of -VRECT / 2 relative to ground. This process effectively removes the DC component from the input signal to generate the first output signal and the second output 215. By using the first capacitor 214 to perform DC subtraction, DC leakage is effectively minimized, resulting in a bipolar signal with a reduced DC component. In real-world applications, VRECT can experience occasional fluctuations, and the operating frequency of the first capacitor 214 can therefore be optimized for an immediate response. Timely subtraction of the DC bias allows the system 200 to consistently output the desired bipolar signal even in the presence of voltage fluctuations.

[0053] In various implementations, when system 200 is idle (e.g., both first switch 204 and second switch 205 are off), the first output signal at the second output 215 can be approximately ±VRECT / 2. This is because the first capacitor 214 acts as a negative charge pump. When first switch 204 and third switch 212 are off, the first capacitor 214 can be charged to a voltage equal to VRECT / 2. To normalize the first output signal to 0 volts, the fourth switch 213 can be activated to charge the first capacitor 214 up to a voltage equal to VRECT / 2, thus stabilizing the first output signal at 0 volts. It should be understood that system 200 generates a bipolar output signal based on a unipolar-based design strategy by configuring the first capacitor 214 to act as a negative charge pump. By fully utilizing this configuration, system 200 effectively subtracts voltage, facilitating the conversion of a unipolar input into a bipolar signal. This approach not only maintains signal integrity but also substantially minimizes potential DC leakage, resulting in more efficient and reliable operation.

[0054] Figure 3 This describes a power conversion system (e.g., according to embodiments of the present technology) Figure 2This is a diagram of the voltage / time of components within system 200. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, substitutions, and modifications will be recognized by those skilled in the art. In various embodiments, waveform 302 represents the waveform of a first voltage measured at pin output ACx. Waveform 304 represents the waveform of a second voltage measured at pin output ACx_BIAS. Waveform 306 represents the waveform of a first signal measured at first switch 204. Waveform 308 represents the waveform of a third signal measured at third switch 212. Waveform 310 represents the waveform of a second signal measured at second switch 205. The closing of first switch 204, second switch 205, and third switch 212 is indicated by a rise in the measured voltage; the closing of first switch 204, second switch 205, and third switch 212 is indicated by a corresponding voltage drop.

[0055] In some embodiments, the first voltage is set to twice the target voltage (e.g., 5V, 10V, etc.). For example, if the target voltage (e.g., the desired output signal) is ±5V, then the first voltage may be set to 10V. The operation of system 200 may be performed via one or more specific sequences. For example, after startup, the first switch 204 is turned on at a first time t1—as indicated by a voltage rise. Simultaneously, the second switch 205 is turned off at the first time t1—as indicated by a voltage drop. In a closely coordinated sequence, the third switch 212 is turned on at a second time t2 after the first switch 204 has turned on. The sequence of switch activation and deactivation is an important aspect of this technology for achieving the desired bipolar signal while simultaneously maintaining minimal DC leakage. The relationship between the duty cycles of the first, second, and third signals is important in coordinating the operation of the first switch 204, the second switch 205, and the third switch 212. In a particular embodiment, the third switch 212 is activated after the first switch 204 has been fully activated. In other words, the third signal may be characterized by a duty cycle that lags behind the duty cycle of the first signal by a certain fraction. This interleaving operation ensures that each component is given sufficient response time, promoting coordinated operation and mitigating the risk of signal interference or overlap. Furthermore, it should be understood that the duty cycle of the first switch 204 can be the same as, but opposite to, the duty cycle of the second switch 205, ensuring that their operating states remain inversely correlated, thereby preventing potential short circuits.

[0056] It should be understood that the switching circuitry (e.g., first switch 204, second switch 205, or third switch 212) may operate at variable frequencies depending on the application. By monitoring the characteristics of the input signal, the system dynamically modulates its switching mode. For example, during the initiation of a signal burst, the system may actively switch several consecutive cycles to quickly establish the desired bipolar state. Once the state stabilizes, the system can optimize its operation by reducing the switching frequency, possibly every 10, 50, or 100 cycles. This intermittent switching can be used for maintenance or calibration purposes. In some cases, the system may determine the need for bipolar adjustment cycles based on the voltage level measured at the CMx pin. By dynamically adjusting its operating frequency based on real-time feedback, the system not only saves energy but also extends the durability of its components.

[0057] Due to the voltage divider action of the first resistor 207 and the second resistor 208, the second voltage at the first output can be a fraction of the first voltage at the voltage generator 106. For example, when the first switch 204 and the third switch 212 are on and the second switch 205 is off (e.g., immediately after the first time t1), the first voltage is approximately 10V and the second voltage is approximately 5V. When the first switch 204 and the third switch 212 are off and the second switch 205 is on at the third time t3, the first capacitor 214 (e.g., the second side of the first capacitor 214) discharges to a negative voltage (e.g., -5V), which is then used to offset the positive voltage from the unipolar input signal. This process effectively removes the DC component from the input signal to generate the first output signal. These switching operations, indicating the activation and deactivation sequence, can be repeated multiple times, allowing for adaptability and responsiveness based on specific system requirements or environmental conditions.

[0058] Figure 4 This is a circuit diagram illustrating a power conversion system according to an embodiment of the present technology. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, substitutions, and modifications will be recognized by those skilled in the art. As previously mentioned, system 400 can be implemented as any type of power conversion system, such as a rectifier, inverter, or other bidirectional converter. As shown, system 400 may include at least one of a first circuit 401, a first switch 404, a second switch 405, a voltage generator 406, a first resistor 407, a second resistor 408, a first ground terminal 410, a second ground terminal 409, a buffer 411, a third switch 412, a first capacitor 414, a fourth switch 413, and a second output 415. For example, system 400 can be implemented as an inverter configured to receive an input signal (e.g., a DC signal) and generate an output signal (e.g., an AC signal output). In other instances, system 400 can be implemented as a rectifier configured to receive an input signal (e.g., an AC signal) and generate an output signal (e.g., a DC signal output).

[0059] In various implementations, voltage generator 406 may be characterized by a first voltage, denoted as VRECT. For example, the first voltage may be set to twice the target voltage (e.g., 5V, 10V, etc.). This means that if the first voltage is VRECT, then the target voltage will be VRECT / 2. A second output 415 may be configured to output a first output signal, depending on the application, and may be characterized by the target voltage. In various implementations, the first voltage of voltage generator 406 may be determined or adjusted based on the target voltage.

[0060] In some embodiments, the operation of system 400 depends on the systematic and coordinated switching of first switch 404 and second switch 405 according to specific conditions. For example, circuit 401 is configured to control the operation of first switch 404, second switch 405, and third switch 412. Circuit 410, designated ACx_DIN, may include circuitry and / or other components, such as programmable logic, microcontrollers, and / or software, and may send control signals to first switch 404 and second switch 405 to regulate their operation. In some cases, level shifter circuits (e.g., designated ACx_DIN) are used. Figure 4 The first switch 404 (LS) can be coupled to the first switch 404. A level shifter circuit is configured to translate voltage levels, ensuring that the first switch 404 is driven with an appropriate voltage level to optimize its operation. Upon startup, the first circuit 401 can send a first signal to the first input 402 to activate and transition the first switch 404 to its ON state. Simultaneously, the first circuit 401 can send a second signal to the second input 403 to keep the second switch 405 in its OFF state, while the first switch actively turns on. In a closely coordinated sequence, a third switch 412 can turn on after the first switch 404 has turned on. For example, the first circuit 401 can send a third signal to coordinate with the turn-on transition of the first switch 404 to turn on the third switch 412. In some cases, a time delay can be imposed on the activation of the third switch 412 to ensure that it only switches to its ON state after the first switch 404 has been fully activated. In some embodiments, the third switch 412 may include, but is not limited to, field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), thyristors, or other types of transistors or other types of switches. For example, the third switch 412 may be implemented as a PMOS (e.g., a back-to-back PMOS), an LDPMOS, and / or the like. In some cases, a level shifter circuit may be coupled to the third switch 412. The level shifter circuit is configured to translate voltage levels to ensure that the third switch 412 is driven with an appropriate voltage level to optimize its operation.

[0061] Due to the voltage divider action of the first resistor 407 and the second resistor 408, the second voltage at the first output can be a fraction of the first voltage at the voltage generator 106. For example, the second voltage ACx_BIAS can be less than or equal to half of the first voltage VRECT. In this example, ACx_BIAS is half the VRECT value (e.g., VRECT / 2). The first side of the first capacitor 414 can be coupled to the pin output ACx.

[0062] During an operating cycle in which the first switch 404 and the third switch 412 are on and the second switch 405 is off, the first side of the first capacitor 414 is charged to the value of VRECT. Simultaneously, the second side of the first capacitor 414, connected to the first output of the buffer 411 via the third switch 412, is charged to half the VRECT value (e.g., VRECT / 2). This systematic charge distribution ensures that the DC bias across the first capacitor 414 remains at VRECT / 2. Subtracting the DC bias at the first capacitor 414 is a crucial step in generating the bipolar signal. When the first switch 404 and the third switch 412 are off and the second switch 405 is on, the first capacitor 414 (e.g., the second side of the first capacitor 414) discharges to a negative voltage (e.g., -VRECT / 2), which is then used to offset the positive voltage from the unipolar input signal. This process effectively removes the DC component from the input signal to generate the first output signal and the second output 415. By using the first capacitor 414 to perform DC subtraction, DC leakage is effectively minimized, resulting in a bipolar signal with a reduced DC component.

[0063] In various embodiments, when system 400 is idle (e.g., both first switch 404 and second switch 405 are off), fourth switch 413 can be turned on to normalize the first output signal to 0 volts. In some embodiments, fourth switch 413 may include, but is not limited to, field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), thyristors, or other types of transistors or other types of switches. For example, fourth switch 413 may be implemented as a PMOS (e.g., back-to-back PMOS), LDPMOS, and / or the like. In some cases, level shifter circuitry may be coupled to fourth switch 413. The level shifter circuitry is configured to translate voltage levels to ensure that fourth switch 413 is driven with an appropriate voltage level to optimize its operation.

[0064] Figure 5This is a circuit diagram illustrating a power conversion system 500 according to an embodiment of the present technology. This diagram is merely illustrative and should not unduly limit the scope of the claims. Many variations, substitutions, and modifications will be recognized by those skilled in the art. As previously mentioned, system 500 can be implemented as any type of power conversion system, such as a rectifier, inverter, or other bidirectional converter. Like system 400, system 500 may include at least one of a first circuit 501, a first switch 504, a second switch 505, a voltage generator 506, a first resistor 507, a second resistor 508, a first ground terminal 510, a second ground terminal 509, a buffer 511, a third switch 512, a first capacitor 514, a fourth switch 513, and a second output 515. For example, system 500 can be implemented as an inverter configured to receive an input signal (e.g., a DC signal) and generate an output signal (e.g., an AC signal output). In other instances, system 500 may be implemented as a rectifier configured to receive an input signal (e.g., an AC signal) and generate an output signal (e.g., a DC signal output).

[0065] In various implementations, voltage generator 506 may be characterized by a first voltage, denoted as VRECT. For example, the first voltage may be set to twice the target voltage (e.g., 5V, 10V, etc.). This means that if the first voltage is VRECT, then the target voltage will be VRECT / 2. A second output 515 may be configured to output a first output signal, depending on the application, and may be characterized by the target voltage. In various implementations, the first voltage of voltage generator 506 may be determined or adjusted based on the target voltage.

[0066] In some embodiments, the operation of system 500 depends on the systematic and coordinated switching of first switch 504 and second switch 505 according to specific conditions. For example, circuit 501 is configured to control the operation of first switch 504, second switch 505, and third switch 512. Circuit 510, designated ACx_DIN, may include circuitry and / or other components, such as programmable logic, a microcontroller, and / or software, and may send control signals to first switch 504 and second switch 505 to regulate their operation. Upon startup, first circuit 501 may send a first signal to first input 502 to activate the switching of first switch 504 to its on state. Simultaneously, first circuit 501 may send a second signal to second input 503 to keep second switch 505 in its off state while first switch 505 is actively turned on. In a closely coordinated sequence, third switch 512 may be turned on after the on transition of first switch 504. For example, first circuit 501 may send a third signal to coordinately turn on third switch 512 in conjunction with the on transition of first switch 504. In some cases, a time delay may be imposed on the activation of the third switch 512 to ensure that it switches to its on state only after the first switch 504 has been fully activated. In some embodiments, the third switch 512 may include, but is not limited to, field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), thyristors, or other types of transistors or other types of switches. For example, the third switch 512 may be implemented as a PMOS (e.g., a back-to-back PMOS), an LDPMOS, and / or the like.

[0067] Due to the voltage divider action of the first resistor 507 and the second resistor 508, the second voltage at the first output can be a fraction of the first voltage at the voltage generator 106. For example, the second voltage ACx_BIAS can be less than or equal to half of the first voltage VRECT. In this example, ACx_BIAS is half the VRECT value (e.g., VRECT / 2). The first side of the first capacitor 514 can be coupled to the pin output ACx.

[0068] During an operating cycle in which the first switch 504 and the third switch 512 are on and the second switch 505 is off, the first side of the first capacitor 514 is charged to the value of VRECT. Simultaneously, the second side of the first capacitor 514, connected to the first output of the buffer 511 via the third switch 512, is charged to half the VRECT value (e.g., VRECT / 2). This systematic charge distribution ensures that the DC bias across the first capacitor 514 remains at VRECT / 2. Subtracting the DC bias at the first capacitor 514 is a crucial step in generating the bipolar signal. When the first switch 504 and the third switch 512 are off and the second switch 505 is on, the first capacitor 514 (e.g., the second side of the first capacitor 514) discharges to a negative voltage (e.g., -VRECT / 2), which is then used to offset the positive voltage from the unipolar input signal. This process effectively removes the DC component from the input signal to generate the first output signal, the second output 515. By using the first capacitor 514 to perform DC subtraction, DC leakage is effectively minimized, resulting in a bipolar signal with a reduced DC component.

[0069] In various embodiments, when system 500 is idle (e.g., both first switch 504 and second switch 505 are off), fourth switch 513 may be turned on to normalize the first output signal to 0 volts. In some embodiments, fourth switch 513 may include, but is not limited to, field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), thyristors, or other types of transistors or other types of switches. For example, fourth switch 513 may be implemented as a PMOS (e.g., back-to-back PMOS), LDPMOS, and / or the like.

[0070] While the foregoing is a complete description of specific embodiments, various modifications, alternative constructions, and equivalents may be used. Therefore, the foregoing description and illustrations should not be construed as limiting the scope of the technology as defined by the appended claims.

Claims

1. A power conversion device, comprising: A first switch includes a first input configured to receive a first signal; A voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; A second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; The first grounding terminal is coupled to the second switch; A first resistor, coupled to the first switch and the voltage generator, is characterized by a first resistance. A second resistor coupled to the first resistor, the second resistor being characterized in that the ratio of the first resistor to the second resistor is less than 1.1:1; A buffer includes a third input and a first output, the third input being coupled to a first resistor and a second resistor, and the first output being characterized by a second voltage. A third switch, which is coupled to the first output; A first capacitor is coupled to the first switch and the third switch; and The second output is coupled to the third switch and the first capacitor.

2. The power conversion device of claim 1, further comprising a first circuit coupled to the first switch and the second switch, the first circuit being configured to send the first signal to the first input and send the second signal to the second input.

3. The power conversion device according to claim 1, wherein: The second output is configured to output the first output signal; and The buffer further includes a fourth input coupled to the first output.

4. The power conversion device according to claim 3, wherein the first output signal includes a positive signal and a negative signal.

5. The power conversion device according to claim 1, further comprising a fourth switch coupled to the third switch and the first capacitor.

6. The power conversion device of claim 1, wherein the first switch comprises a complementary metal-oxide-semiconductor (CMOS) or bipolar junction transistor (BJT).

7. The power conversion device of claim 1, wherein the first switch includes a gate coupled to the first input.

8. The power conversion device according to claim 1, wherein the second voltage is less than or equal to half of the first voltage.

9. The power conversion device according to claim 1, wherein the third switch comprises a p-channel metal-oxide-semiconductor (PMOS) or a laterally diffused metal-oxide-semiconductor (LDMOS).

10. A power conversion device, comprising: A first switch includes a first input configured to receive a first signal; A voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; A second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; The first grounding terminal is coupled to the second switch; A first resistor is coupled to the first switch and the voltage generator; A second resistor is coupled to the first resistor; A buffer includes a third input and a first output, the third input being coupled to a first resistor and a second resistor, and the first output being characterized by a second voltage. A third switch, which is coupled to the first output; A first capacitor is coupled to the first switch and the third switch; and The second output is coupled to the third switch and the first capacitor.

11. The power conversion device of claim 10, further comprising a first circuit coupled to the first switch and the second switch, the first circuit being configured to send the first signal to the first input and send the second signal to the second input to control the switching of the first switch and the second switch.

12. The power conversion device of claim 10, wherein the second output is configured to output the first output signal.

13. The power conversion device of claim 10, further comprising a fourth switch coupled to the third switch and the first capacitor.

14. The power conversion device according to claim 10, wherein the second voltage is less than or equal to half of the first voltage.

15. A power conversion device, comprising: A first switch includes a first input configured to receive a first signal; A voltage generator coupled to the first switch, the voltage generator being characterized by a first voltage; A second switch coupled to the first switch, the second switch including a second input configured to receive a second signal; The first grounding terminal is coupled to the second switch; A first resistor, coupled to the first switch and the voltage generator, is characterized by a first resistance. A second resistor is coupled to the first resistor, and the second resistor is characterized by the second resistance. The second grounding terminal is coupled to the second resistor; A buffer includes a third input and a first output, the third input being coupled to a first resistor and a second resistor, and the first output being characterized by a second voltage. A third switch, which is coupled to the first output; A first capacitor is coupled to the first switch and the third switch; and The second output is coupled to the third switch and the first capacitor.

16. The power conversion device of claim 15, further comprising a first circuit coupled to the first switch, the first circuit being configured to send the first signal to the first input.

17. The power conversion device according to claim 15, wherein the ratio of the first resistor to the second resistor is less than 1.1:

1.

18. The power conversion device of claim 15, further comprising a fourth switch coupled to the third switch and the first capacitor.

Images