Server memory CE fault processing method and server
Patent Information
- Application Number
- CN202410853868.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-27
- Publication Date
- 2024-12-13
AI Technical Summary
In the prior art, when handling memory CE failures of the server, system management interrupts are frequently triggered, resulting in business interruptions, and more serious memory failure information cannot be collected in time during the SMI blocking period, resulting in difficulty in fault location.
By connecting the fault detection signal of the first processor to the substrate management controller, blocking system management interrupts, and using the PECI bus to perform out-of-band CE fault processing, ensuring that failure information is fully collected without affecting the service and stored in the fault register middle.
It realizes the precise and complete processing of memory CE fault information without affecting user services, reducing the impact on user services, and improving the ability to locate faults.
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Figure CN119127540A_ABST
Abstract
Citation Information
Cited By
Fault detection method, chip, storage medium and electronic equipment
CN120832261A
