Fault processing method, device and equipment

CN119127545AActive Publication Date: 2024-12-13NINGCHANG INFORMATION TECH (HANGZHOU) CO LTD +1
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Patent Information

Application Number
CN202411171146.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-23
Publication Date
2024-12-13
Estimated Expiration
2044-08-23

AI Technical Summary

Technical Problem

In the prior art, when a server has a RAS failure, it is impossible to perform accurate fault detection without restarting, resulting in insufficient comprehensiveness and accuracy of fault detection. The BMC cannot directly access the original register information, which affects the accuracy and reliability of fault resolution. sex.

Method used

By using APML to trigger interrupt messages when a RAS failure occurs on the server, the BMC receives and processes interrupt messages, obtains the number of target bank and register data, generates fault logs based on these data, realizes fault detection and parsing, and when the interrupt message cannot be triggered, it cannot be triggered. , obtain register information through BIOS to ensure full detection.

Benefits of technology

It improves the comprehensiveness and accuracy of server fault detection, enhances the reliability and maintenance efficiency of the system, and ensures comprehensive response and accurate handling of server faults.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a fault processing method, device and equipment, which are applied to a baseboard management controller BMC, and the method comprises the following steps: receiving an interrupt message triggered when a target server has a fault, and obtaining a target number of target memory banks corresponding to the fault; taking a preset position as a starting point, reading storage data of a target number of first registers from the fault file, and determining a target Bank comprising the first registers based on the storage data of the first registers; the fault file is generated when the target server breaks down and is used for storing information related to the current fault of the target server; the preset position is an initial position of the storage data of the first register related to the fault in the fault file; and for each target Bank, the fault information corresponding to the target Bank is inquired from the fault file, and the fault log is generated based on the fault information corresponding to the target Bank, so that the comprehensiveness and accuracy of RAS fault detection are improved.
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Citation Information

Patent Citations

  • Fault memory positioning method and device

    CN113010341A

  • Memory bank fault detection device and detection method

    CN115480947A

  • Fault-recoverable firmware detection system and method, storage medium and server

    CN117389790A

  • Method and Device for Detecting Memory Downgrade Error

    US20220342740A1

  • Apparatus, computer-readable medium, and method for increasing memory error handling accuracy

    US20240241805A1

Cited By

  • Fault analysis method and device, electronic equipment and storage medium

    CN119902921A