A driving method and device for outputting sinusoidal signals by a Josephson array

Abstract

The present invention discloses a driving method and device for a Josephson junction array to output a sinusoidal signal. The method comprises: obtaining a Josephson junction array, determining a sinusoidal signal to be output; discretizing the sinusoidal signal to be output, and determining the number of Josephson junctions corresponding to the discrete sinusoidal signal; analyzing the magnetic flux state of the Josephson junction array, selecting a bias state determination model, and providing a bias state matrix corresponding to the Josephson junction array; determining the bias parameters of the Josephson junction array based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, and driving the Josephson junction array to output a sinusoidal signal. The present invention can quickly determine the bias parameters of the Josephson junction array, accurately synthesize the step voltage value of the step wave AC quantum voltage, and generate a corresponding sinusoidal signal.

Description

Technical Field

[0001] The invention belongs to the technical field of quantum voltage measurement, and in particular relates to a driving method and a device for outputting sinusoidal signals by a Josephson array. Background Art

[0002] The Josephson junction is a superconductor quantum device based on the Josephson effect, which has important applications in the field of superconducting electronics. This device integrates several to tens of thousands of Josephson junctions on a single chip to form a Josephson junction array. Under specific microwave radiation conditions, these junction arrays can generate stable voltage signals under the action of DC bias current. Due to its extremely high voltage stability and accuracy, the Josephson junction array has become a key technical component for building a quantum voltage reference. Furthermore, through clever layout on the chip, the Josephson junction can be divided into multiple sub-junction arrays or junction segments, each of which can be independently current biased. This design not only improves the flexibility of the device, but also expands its application range. The independent bias capability of each sub-junction array enables the entire device to achieve programmable voltage output, thereby providing a highly adjustable voltage reference for precision measurement and calibration.

[0003] In addition, this programmable feature also makes it possible to dynamically adjust the voltage reference, so that the voltage reference can adapt to different measurement environments and requirements. In the fields of high-precision measurement, quantum computing, and precision instrument calibration, the application prospects of the Josephson junction array are very broad. However, in actual scenarios, when the programmable voltage output is achieved by controlling the bias parameters, the Josephson junction array is susceptible to external interference, which may cause the freezing of the magnetic flux, causing the positive and negative zero step widths of some junction segments of the array to become narrower or disappear. In the state of frozen magnetic flux, if the bias parameters in the normal state are used for driving, the voltage output of the Josephson junction array will be relatively large. For example, patent CN112632894A discloses a Josephson junction array voltage output method, device, equipment and storage medium. The method comprises: obtaining the number of Josephson junctions corresponding to the target voltage value at the target working frequency to obtain the target number of junctions; obtaining at least one binary or ternary numerical sequence, and performing interpolation processing on at least one numerical sequence to obtain a junction combination value set; subtracting each junction combination value in the junction combination value set from the target number of junctions to obtain a junction difference value set, and determining the junction combination value corresponding to the minimum difference value in the junction difference value set as the target combination value; replacing the target number of junctions with the minimum difference value, returning to execute until the minimum difference value is less than or equal to the minimum junction combination value in the junction combination value set, and obtaining at least one determined target combination value; adjusting the target working frequency within a preset frequency range so that the Josephson junction outputs the target voltage value.

[0004] Therefore, how to provide a method for improving the voltage output accuracy of the Josephson junction array is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0005] In view of the defects in the above-mentioned prior art, the present invention provides a driving method and device for a Josephson junction array to output a sinusoidal signal, which can quickly determine the bias parameters of the Josephson junction array, accurately synthesize the step voltage value of the step wave AC quantum voltage and generate a corresponding sinusoidal signal.

[0006] In a first aspect, the present invention provides a driving method for a Josephson array to output a sinusoidal signal, characterized by comprising:

[0007] Obtain the Josephson array and determine the sinusoidal signal to be output;

[0008] Discretize the sinusoidal signal to be output, and determine the number of Josephson junctions corresponding to the discrete sinusoidal signal;

[0009] Analyze the magnetic flux state of the Josephson array, select the bias state to determine the model, and give the bias state matrix corresponding to the Josephson array;

[0010] Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias parameters of the Josephson junction array are determined, and the Josephson junction array is driven to output the sinusoidal signal.

[0011] Furthermore, the sinusoidal signal to be output is discretized, and the number of Josephson junctions corresponding to the discrete sinusoidal signal is determined, including:

[0012] Based on the sinusoidal signal to be output, the corresponding amplitude and initial phase are given;

[0013] Based on the preset number of steps, the amplitude and initial phase of the sine signal, the sine signal is discretized by a discrete function to give a step wave signal corresponding to each preset number of steps;

[0014] Performing a fast Fourier transform on the step wave signal corresponding to each preset number of steps to give the corresponding fundamental wave amplitude;

[0015] Compare the difference between the fundamental wave amplitude corresponding to each preset number of steps and the amplitude of the sinusoidal signal to be output with the preset error threshold, and give the preset number of steps with the difference less than the preset error threshold and the minimum number;

[0016] Based on the step wave signal corresponding to the preset number of steps and the microwave frequency of the Josephson junction array, the number of Josephson junctions corresponding to each step is given.

[0017] Furthermore, the magnetic flux state of the Josephson array is analyzed, the bias state is selected to determine the model, and the bias state matrix corresponding to the Josephson array is given, including:

[0018] Perform step scanning on all groups of Josephson sub-arrays of the Josephson array, and provide the corresponding bias current of each group of Josephson sub-arrays;

[0019] Based on the analysis of each group of bias currents, the magnetic flux state of the Josephson array is determined as an unfrozen magnetic flux state or a frozen magnetic flux state, and a corresponding first bias state determination model and a second bias state determination model are given;

[0020] According to the unfrozen magnetic flux state, the frozen magnetic flux state, the first bias state determination model and the second bias state determination model, the bias state matrix corresponding to the Josephson array is given.

[0021] Furthermore, the Josephson array includes several groups of Josephson sub-arrays and multiple driving bias circuits, each group of Josephson sub-arrays includes multiple Josephson junctions, and multiple groups of Josephson sub-arrays are connected in series in sequence to form a series array line. A driving bias circuit is connected to both ends of the series array line and between two adjacent groups of Josephson sub-arrays. The series array line is connected to two output ends and a zero potential end located between the two output ends.

[0022] Furthermore, the Josephson array is an SNS type two-way Josephson array, including twenty groups of Josephson sub-arrays connected in series, the zero potential end is located between the eleventh group of Josephson sub-arrays and the twelfth group of Josephson sub-arrays, and the number of Josephson junctions of the first group of Josephson sub-arrays to the tenth group of Josephson sub-arrays matches the number of Josephson junctions of the twentieth group of Josephson sub-arrays to the eleventh group of Josephson sub-arrays, respectively.

[0023] Furthermore, the numbers of Josephson knots from the first group of Josephson sub-arrays to the tenth group of Josephson sub-arrays are 2916, 108, 36, 972, 12, 4, 324, 8742, 8744, and 8744 respectively.

[0024] Further, the series junction array line includes a first line and a second line connected to the first line, the number of Josephson junctions in each group of Josephson sub-junction arrays on the first line is less than or equal to a first threshold, and the Josephson sub-junction arrays on the second line include multiple groups of Josephson sub-junction arrays greater than the first threshold and Josephson sub-junction arrays identical to each group on the first line;

[0025] The model is determined according to the unfrozen flux state and the first bias state, and the bias state matrix corresponding to the Josephson array is given, including:

[0026] Performing scalar processing on the number of Josephson junctions corresponding to the discrete sinusoidal signal and comparing it with a second threshold;

[0027] When the scalar processing result is greater than the second threshold, based on the number of Josephson nodes corresponding to the discrete sine signal, the first processing is performed on some groups of Josephson sub-arrays on the second line and the second processing is performed on the remaining groups of Josephson sub-arrays on the second line in sequence, so as to complete the setting of the paranoid state of all groups of Josephson sub-arrays on the second line;

[0028] When the scalar processing result is less than or equal to the second threshold, the second processing is performed on the Josephson sub-array on the first line based on the Josephson node number corresponding to the discrete sine signal to complete the paranoid state setting of all groups of Josephson sub-arrays on the first line.

[0029] Furthermore, the first process includes:

[0030] The number of Josephson nodes corresponding to the discrete sinusoidal signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-junction arrays on the second line that is greater than the first threshold value to obtain the number of intermediate state Josephson nodes, and the bias state of the group of Josephson sub-junction arrays on the second line is set to a positive bias state;

[0031] The intermediate state Josephson junction number is subjected to scalar processing and then compared with the second threshold. When the comparison result is greater than the second threshold, the difference processing and the setting of the bias state are repeated until the scalar processing result is less than or equal to the second threshold.

[0032] Further, all the groups of Josephson sub-arrays on the first line and all the groups of Josephson sub-arrays on the second line that are less than or equal to the first threshold are sorted in ascending order according to the number of Josephson nodes corresponding to them;

[0033] The second treatment includes:

[0034] Performing a ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate-state Josephson junctions corresponding to the discrete sinusoidal signal, and comparing the absolute value thereof with a remainder threshold;

[0035] When the absolute value of the ternary modular operation result is not equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then the scalar processing result is updated, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the ternary modular operation result; when the absolute value of the ternary modular operation result is equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then superimposed with the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal to update the scalar processing result, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal;

[0036] The updated scalar processing result is repeatedly subjected to ternary modular operation, comparison processing and updating operation until all groups of Josephson subarrays on the first line and / or the second line are set to a bias state.

[0037] Furthermore, a model is determined according to the frozen flux state and the second bias state, and a bias state matrix corresponding to the Josephson array is given, including:

[0038] The Josephson sub-arrays in the frozen flux state are eliminated from the Josephson array, and by traversing all possible situations of the corresponding bias state matrices of the remaining Josephson sub-arrays, the bias state matrix corresponding to the sinusoidal signal closest to the sinusoidal signal to be output among all possible situations is given.

[0039] Furthermore, the frozen flux state of the Josephson array is determined by:

[0040] All groups of Josephson subarrays of the Josephson array are step-scanned to give the corresponding bias current of each group of Josephson subarrays; when the bias current of at least one group of Josephson subarrays is zero, the corresponding group of Josephson subarrays and the Josephson array are determined to be in a frozen flux state; when the bias currents of all groups of Josephson subarrays are not zero, the Josephson array is determined to be in an unfrozen flux state.

[0041] Furthermore, based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias parameters of the Josephson junction array are determined, including:

[0042] Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias voltage and bias current of all driving bias circuits are obtained by recursive calculation combined with the bias parameter function.

[0043] Furthermore, the bias parameter function satisfies the following relationship:

[0044]

[0045] Where V DAC(i) is the bias voltage of the i-th driving bias circuit, I DAC(i) is the bias current of the i-th driving bias circuit, I DAC(0) is the bias current of the 0th driving bias circuit, that is, the bias current of the driving bias circuit corresponding to one end of the series array line, I DAC(20) is the bias current of the 20th drive bias circuit, that is, the bias current of the drive bias circuit corresponding to the other end of the series array line, R is the bias resistance value in the drive bias circuit, r is the sum of the wiring resistance and the ground resistance in the drive bias circuit, V bias(i) is the bias voltage required for the corresponding group of Josephson subarrays between the i-th driving bias circuit and the i-1-th driving bias circuit, I bias(i) is the bias current required for the corresponding group of Josephson subarrays between the i-th driving bias circuit and the i-1-th driving bias circuit, B i is the bias state of the corresponding group of Josephson arrays between the i-th driving bias circuit and the i-1-th driving bias circuit, M i is the number of Josephson junctions contained in the corresponding group of Josephson sub-junction arrays between the i-th driving bias circuit and the i-1-th driving bias circuit, f 0 is the microwave frequency, K J-90 is the Josephson constant.

[0046] Furthermore, the Josephson array is driven to output a sinusoidal signal, including:

[0047] The determined bias parameters are output to the Josephson array, and the Josephson array outputs the corresponding quantum voltage, and generates the required sinusoidal signal based on the quantum voltage output within a predetermined period.

[0048] Furthermore, the quantum voltage corresponding to the output of the Josephson array satisfies the following relationship:

[0049]

[0050] Where U J1 is the sinusoidal voltage output by the first line, U J2 is the sinusoidal voltage output by the second circuit, B(t,i) is the paranoid state matrix of the Josephson array, that is, the paranoid state of the corresponding group of Josephson sub-arrays between the i-th driving bias circuit and the i-1-th driving bias circuit at time t, V(i) (n=1) It is the voltage across the corresponding group of Josephson arrays between the i-th driving bias circuit and the i-1-th driving bias circuit when the bias state is in a positive bias state.

[0051] In a second aspect, the present invention further provides a driving device for a Josephson array to output a sinusoidal signal, using the driving method for a Josephson array to output a sinusoidal signal, the device comprises:

[0052] A signal acquisition module, which is used to acquire the Josephson array and determine the sinusoidal signal to be output;

[0053] A discrete processing module, which is used to discretize the sinusoidal signal to be output and determine the number of Josephson nodes corresponding to the discrete sinusoidal signal;

[0054] A bias determination module is used to analyze the magnetic flux state of the Josephson junction array, select a bias state determination model, and provide a bias state matrix corresponding to the Josephson junction array;

[0055] The signal output module is used to determine the bias parameters of the Josephson junction array based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, and drive the Josephson junction array to output the sinusoidal signal.

[0056] Furthermore, the discrete processing module includes:

[0057] Based on the sinusoidal signal to be output, the corresponding amplitude and initial phase are given;

[0058] Based on the preset number of steps, the amplitude and initial phase of the sine signal, the sine signal is discretized by a discrete function to give a step wave signal corresponding to each preset number of steps;

[0059] Performing a fast Fourier transform on the step wave signal corresponding to each preset number of steps to give the corresponding fundamental wave amplitude;

[0060] Compare the difference between the fundamental wave amplitude corresponding to each preset number of steps and the amplitude of the sinusoidal signal to be output with the preset error threshold, and give the preset number of steps with the difference less than the preset error threshold and the minimum number;

[0061] Based on the step wave signal corresponding to the preset number of steps and the microwave frequency of the Josephson junction array, the number of Josephson junctions corresponding to each step is given.

[0062] Furthermore, the bias determination module includes:

[0063] Perform step scanning on all groups of Josephson sub-arrays of the Josephson array, and provide the corresponding bias current of each group of Josephson sub-arrays;

[0064] Based on the analysis of each group of bias currents, the magnetic flux state of the Josephson array is determined as an unfrozen magnetic flux state or a frozen magnetic flux state, and a corresponding first bias state determination model and a second bias state determination model are given;

[0065] According to the unfrozen magnetic flux state, the frozen magnetic flux state, the first bias state determination model and the second bias state determination model, the bias state matrix corresponding to the Josephson array is given.

[0066] Furthermore, the bias determination module includes:

[0067] Performing scalar processing on the number of Josephson junctions corresponding to the discrete sinusoidal signal and comparing it with a second threshold;

[0068] When the scalar processing result is greater than the second threshold, based on the number of Josephson nodes corresponding to the discrete sine signal, the first processing is performed on some groups of Josephson sub-arrays on the second line and the second processing is performed on the remaining groups of Josephson sub-arrays on the second line in sequence, so as to complete the setting of the paranoid state of all groups of Josephson sub-arrays on the second line;

[0069] When the scalar processing result is less than or equal to the second threshold, the second processing is performed on the Josephson sub-array on the first line based on the Josephson node number corresponding to the discrete sine signal to complete the paranoid state setting of all groups of Josephson sub-arrays on the first line.

[0070] Furthermore, the bias determination module includes:

[0071] The number of Josephson nodes corresponding to the discrete sinusoidal signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-junction arrays on the second line that is greater than the first threshold value to obtain the number of intermediate state Josephson nodes, and the bias state of the group of Josephson sub-junction arrays on the second line is set to a positive bias state;

[0072] The intermediate state Josephson junction number is subjected to scalar processing and then compared with the second threshold. When the comparison result is greater than the second threshold, the difference processing and the setting of the bias state are repeated until the scalar processing result is less than or equal to the second threshold.

[0073] Furthermore, the bias determination module includes:

[0074] Performing a ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate-state Josephson junctions corresponding to the discrete sinusoidal signal, and comparing the absolute value thereof with a remainder threshold;

[0075] When the absolute value of the ternary modular operation result is not equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then the scalar processing result is updated, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the ternary modular operation result; when the absolute value of the ternary modular operation result is equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then superimposed with the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal to update the scalar processing result, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal;

[0076] The updated scalar processing result is repeatedly subjected to ternary modular operation, comparison processing and updating operation until all groups of Josephson subarrays on the first line and / or the second line are set to a bias state.

[0077] Furthermore, the bias determination module further includes:

[0078] The Josephson sub-arrays in the frozen flux state are eliminated, and by traversing all possible situations of the corresponding bias state matrices of the remaining Josephson sub-arrays, the bias state matrix corresponding to the sinusoidal signal closest to the sinusoidal signal to be output among all possible situations is given.

[0079] The present invention provides a driving method and device for outputting a sinusoidal signal from a Josephson array, which at least has the following beneficial effects:

[0080] (1) The bias state matrix of the Josephson array can be quickly calculated, and the step voltage value of the step wave AC quantum voltage can be accurately synthesized according to the bias state and combination mode of the Josephson array. In addition, the present invention takes into account the phenomenon of frozen magnetic flux in the Josephson array, and adopts different bias state determination models to enable the determined bias state to output accurate quantum voltage, thereby avoiding errors caused by the frozen magnetic flux phenomenon.

[0081] (2) When the Josephson array is not in a frozen flux state, the present invention can realize rapid calculation of the Josephson array bias state matrix through the first processing and the second processing, thereby ensuring that it has a faster calculation speed while satisfying the accuracy of determining the Josephson array bias state matrix. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] Figure 1 A flowchart of a driving method for a Josephson array to output a sinusoidal signal provided by the present invention;

[0083] Figure 2 A flowchart for determining the number of Josephson junctions provided for an embodiment of the present invention;

[0084] Figure 3 A flowchart of providing a bias state matrix provided for an embodiment of the present invention;

[0085] Figure 4 A flowchart of providing a bias state matrix is ​​provided in one embodiment of the present invention;

[0086] Figure 5 A schematic diagram of a driving device for outputting sinusoidal signals using a Josephson array provided by the present invention. DETAILED DESCRIPTION

[0087] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0088] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings, and "multiple" generally includes at least two.

[0089] It should also be noted that the term "includes", "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, so that a commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the commodity or device including the elements.

[0090] like Figure 1 As shown, the present invention provides a driving method for a Josephson array to output a sinusoidal signal, comprising:

[0091] Obtain the Josephson array and determine the sinusoidal signal to be output;

[0092] Discretize the sinusoidal signal to be output, and determine the number of Josephson junctions corresponding to the discrete sinusoidal signal;

[0093] Analyze the magnetic flux state of the Josephson array, select the bias state to determine the model, and give the bias state matrix corresponding to the Josephson array;

[0094] Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias parameters of the Josephson junction array are determined, and the Josephson junction array is driven to output the sinusoidal signal.

[0095] The present invention can realize the rapid calculation of the bias state matrix of the Josephson junction array, and accurately synthesize the step voltage value of the step wave AC quantum voltage according to the bias state and combination mode of the Josephson junction array. In addition, the present invention takes into account the phenomenon of frozen magnetic flux in the Josephson junction array, and adopts different bias state determination models so that the determined bias state can output accurate quantum voltage, avoiding the error caused by the influence of the frozen magnetic flux phenomenon.

[0096] like Figure 2 As shown, after obtaining the sinusoidal signal to be output, the present invention discretizes the sinusoidal signal to be output and determines the number of Josephson nodes corresponding to the discrete sinusoidal signal, which may include:

[0097] Based on the sinusoidal signal to be output, the corresponding amplitude and initial phase are given;

[0098] Based on the preset number of steps, the amplitude and initial phase of the sine signal, the sine signal is discretized by a discrete function to give a step wave signal corresponding to each preset number of steps;

[0099] Performing a fast Fourier transform on the step wave signal corresponding to each preset number of steps to give the corresponding fundamental wave amplitude;

[0100] Compare the difference between the fundamental wave amplitude corresponding to each preset number of steps and the amplitude of the sinusoidal signal to be output with the preset error threshold, and give the preset number of steps with the difference less than the preset error threshold and the minimum number;

[0101] Based on the step wave signal corresponding to the preset number of steps and the microwave frequency of the Josephson junction array, the number of Josephson junctions corresponding to each step is given.

[0102] According to the Josephson effect, when the Josephson junction is in a low-temperature superconducting state, when microwaves of a certain frequency are radiated on the junction, the microwaves n Subharmonics resonate with the electromagnetic waves radiated by the Josephson junction, and the voltage generated by each Josephson junction is only related to the bias current of the Josephson junction. When the bias current changes within a specific range, the output voltage of the Josephson junction does not change with the current. It is a quantum voltage with a precise size and direction, and changes with the nThe change is in a step-like shape. The programmable Josephson quantum voltage reference uses a non-hysteresis Josephson array, that is, the bias state and the bias current are independent of each other, and there are differences in the IV characteristics between the twenty Josephson arrays. The center current of the first-level Shapiro step corresponding to the positive, zero, and negative bias states of the array is + I 0 , 0, and - I 0 When the frequency is f 0 The microwave radiation is applied to the Josephson array, and the corresponding step center bias current is applied to each segment of the array. The output end can generate the corresponding quantum voltage value. The quantum voltage value output by the i-th segment of the array is V i The following relations are satisfied:

[0103]

[0104] in, M (i) It is i The number of Josephson knots contained in the Josephson sub-knot array, f 0 is the microwave frequency, K J-90 is the Josephson constant ( K J-90 =483597.9 GHz / V).

[0105] For a sinusoidal signal Y(t) , use the step wave signal to discretize the sine signal, when taking N When there are steps, the following relationship is satisfied:

[0106]

[0107] In the formula, Amp is the amplitude of the sinusoidal signal, is the initial phase of the sinusoidal signal, N is the number of steps, k is the sampling point number. When the microwave frequency remains unchanged, the output voltage of each Josephson junction is a fixed value. N The voltage value of the discrete points of the step can be quantified by the following formula to calculate the quantum voltage value to be synthesized at each step moment V t Corresponding to the number of Josephson junctions required M t :

[0108]

[0109] In the formula, Int is the rounding operation. For any time Mt Since the number of Josephson junctions is an even number and is limited by the segmentation of the junction array, the calculated discrete value of the AC voltage cannot be accurately converted into the exact number of Josephson junctions. This requires that the output quantum voltage value can be closest to the discrete value of the AC voltage. After rounding, the even value closest to the rounding result is selected as the required number of Josephson junctions.

[0110] The present invention determines the frozen flux state of the Josephson array by: performing step scanning on all groups of Josephson sub-arrays of the Josephson array to provide a bias current corresponding to each group of Josephson sub-arrays; when the bias current of at least one group of Josephson sub-arrays is zero, determining the corresponding group of Josephson sub-arrays and the Josephson array as being in a frozen flux state; and when the bias currents of all groups of Josephson sub-arrays are not zero, determining the Josephson array as being in an unfrozen flux state.

[0111] After determining the number of Josephson junctions corresponding to the discrete sinusoidal signal, it is necessary to consider the frozen flux state of the Josephson junction array so as to achieve a higher determination speed while satisfying the accuracy of the paranoid state matrix determination. Specifically, Figure 3 As shown, the magnetic flux state of the Josephson array is analyzed, the bias state is selected to determine the model, and the bias state matrix corresponding to the Josephson array is given, which may include:

[0112] Perform step scanning on all groups of Josephson sub-arrays of the Josephson array, and provide the corresponding bias current of each group of Josephson sub-arrays;

[0113] Based on the analysis of each group of bias currents, the magnetic flux state of the Josephson array is determined as an unfrozen magnetic flux state or a frozen magnetic flux state, and a corresponding first bias state determination model and a second bias state determination model are given;

[0114] According to the unfrozen magnetic flux state, the frozen magnetic flux state, the first bias state determination model and the second bias state determination model, the bias state matrix corresponding to the Josephson array is given.

[0115] The Josephson array may include several groups of Josephson sub-arrays and multiple driving bias circuits, each group of Josephson sub-arrays includes multiple Josephson junctions, and multiple groups of Josephson sub-arrays are connected in series in sequence to form a series array line, and a driving bias circuit is connected at both ends of the series array line and between two adjacent groups of Josephson sub-arrays, and the series array line is connected to two output ends and a zero potential end located between the two output ends. In the actual application scenario, the Josephson array is an SNS type two-way Josephson array, including twenty groups of Josephson sub-arrays connected in series, the zero potential end is located between the eleventh group of Josephson sub-arrays and the twelfth group of Josephson sub-arrays, and the number of Josephson junctions of the first group of Josephson sub-arrays to the tenth group of Josephson sub-arrays matches the number of Josephson junctions of the twentieth group of Josephson sub-arrays to the eleventh group of Josephson sub-arrays. The numbers of Josephson knots from the first group of Josephson sub-arrays to the tenth group of Josephson sub-arrays are 2916, 108, 36, 972, 12, 4, 324, 8742, 8744, and 8744 respectively.

[0116] The series array line includes a first line and a second line connected to the first line, the number of Josephson nodes in each group of Josephson sub-arrays on the first line is less than or equal to a first threshold, and the Josephson sub-arrays on the second line include multiple groups of Josephson sub-arrays greater than the first threshold and Josephson sub-arrays that are the same as each group on the first line; wherein the first threshold is 4372. In actual application scenarios, the first group of Josephson sub-arrays to the seventh group of Josephson sub-arrays can be divided into the first line, and the eighth group of Josephson sub-arrays to the twentieth group of Josephson sub-arrays can be divided into the second line.

[0117] like Figure 4 As shown, the model is determined according to the unfrozen flux state and the first bias state, and the bias state matrix corresponding to the Josephson array is given, including:

[0118] Performing scalar processing on the number of Josephson junctions corresponding to the discrete sinusoidal signal and comparing it with a second threshold;

[0119] When the scalar processing result is greater than the second threshold, based on the number of Josephson nodes corresponding to the discrete sine signal, the first processing is performed on some groups of Josephson sub-arrays on the second line and the second processing is performed on the remaining groups of Josephson sub-arrays on the second line in sequence, so as to complete the setting of the paranoid state of all groups of Josephson sub-arrays on the second line;

[0120] When the scalar processing result is less than or equal to the second threshold, the second processing is performed on the Josephson sub-array on the first line based on the Josephson node number corresponding to the discrete sine signal to complete the paranoid state setting of all groups of Josephson sub-arrays on the first line.

[0121] The scalar processing of the number of Josephson junctions corresponding to the discrete sinusoidal signal includes: dividing the number of Josephson junctions corresponding to the discrete sinusoidal signal by four to obtain a scalar processing result. In addition, the present invention can select the first circuit and / or the second circuit according to the required number of Josephson junctions by comparing the scalar processing result with the second threshold value, and finally output the corresponding step voltage. Specifically, the second threshold value is 1093.

[0122] The first process may include:

[0123] The number of Josephson nodes corresponding to the discrete sine signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-arrays on the second line that is greater than the first threshold value to obtain the number of intermediate state Josephson nodes, and the bias state of the group of Josephson sub-arrays on the second line is set to a positive bias state; preferably, the number of Josephson nodes corresponding to the discrete sine signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-arrays on the second line that is greater than the first threshold value, has the smallest sequence number and has not been subjected to difference processing;

[0124] The intermediate state Josephson junction number is subjected to scalar processing and then compared with the second threshold. When the comparison result is greater than the second threshold, the difference processing and the setting of the bias state are repeated until the scalar processing result is less than or equal to the second threshold.

[0125] All groups of Josephson sub-arrays on the first line and all groups of Josephson sub-arrays on the second line that are less than or equal to the first threshold are sorted in ascending order according to the number of Josephson nodes corresponding to them;

[0126] The second treatment includes:

[0127] Performing a ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate-state Josephson junctions corresponding to the discrete sine signal, and comparing the absolute value thereof with a remainder threshold; wherein the remainder threshold is 2;

[0128] When the absolute value of the ternary modular operation result is not equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then the scalar processing result is updated, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the ternary modular operation result; when the absolute value of the ternary modular operation result is equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then superimposed with the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal to update the scalar processing result, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal;

[0129] The updated scalar processing result is repeatedly subjected to ternary modular operation, comparison processing and updating operation until all groups of Josephson subarrays on the first line and / or the second line are set to a bias state.

[0130] Wherein, performing ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal includes: dividing the scalar processing result of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal by three and taking the remainder. Performing ternary processing on the difference between the scalar processing result and the ternary modular operation result includes: dividing the difference between the scalar processing result and the ternary modular operation result by three.

[0131] According to the result of the ternary modular operation, a bias state is set for a group of Josephson sub-arrays with the smallest sequence number and no bias state set on the first line and / or the second line, including: when the result of the ternary modular operation is -1, the bias state of the Josephson sub-array is set to a negative bias state, and its current direction is opposite to the direction from the output end to the zero potential end in the corresponding series array line; when the result of the ternary modular operation is 0, the bias state of the Josephson sub-array is set to a zero bias state, and it has no voltage output; when the result of the ternary modular operation is 1, the bias state of the Josephson sub-array is set to a positive bias state, and its current direction is the same as the direction from the output end to the zero potential end in the corresponding series array line.

[0132] The bias state is set for a group of Josephson sub-junction arrays with the smallest sequence number and no bias state set on the first line and / or the second line according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sinusoidal signal, including: when the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sinusoidal signal is a positive number, the bias state of the Josephson sub-junction array is set to a positive bias state; when the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sinusoidal signal is zero, the bias state of the Josephson sub-junction array is set to a zero bias state; when the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sinusoidal signal is a negative number, the bias state of the Josephson sub-junction array is set to a negative bias state.

[0133] According to the frozen flux state and the second bias state, the model is determined, and the bias state matrix corresponding to the Josephson array is given, including:

[0134] The Josephson sub-arrays in the frozen flux state are eliminated, and by traversing all possible situations of the corresponding bias state matrix of the remaining Josephson sub-arrays, the bias state matrix of the corresponding sinusoidal signal closest to the output sinusoidal signal in all possible situations is given. Specifically, for the SNS type two-way Josephson array, all situations of the bias state of the two-way Josephson sub-array are exhaustively enumerated, and the corresponding number of Josephson nodes used and the bias vector are stored in the bias state search matrix Search _1 and Search _2 The two formations have 177147 (3 11 ) and 19683(3 9 ) bias state. V bottom Taking the matrix as an example, convert all numbers from 0 to 177146 from decimal to ordinary ternary, and subtract 1 from all elements of the matrix. This method can obtain 177147 bias state vectors from the vector [-1 -1 -1 -1 -1 -1 -1 -1 -1 -1] to the vector [11 1 1 1 1 1 1 1 1], which are combined to form the total bias state matrix B 1_all , after multiplying the matrix by the segmented junction array number vector [2916 108 36 972 12 4 324 8742 8744 8744 8744], the number of used Josephson junctions corresponding to all bias state vectors can be obtained. When the number of Josephson junctions required for synthesis is input, the bias matrix is ​​output by finding the best match in the search matrix. B 1 Through the same process, the bias matrix can be output B 2 .

[0135] The present invention determines the bias parameters of the Josephson junction array based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, including:

[0136] Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias voltage and bias current of all driving bias circuits are obtained by recursive calculation combined with the bias parameter function. Among them, the bias parameter function satisfies the following relationship:

[0137]

[0138] Where V DAC(i) is the bias voltage of the i-th driving bias circuit, I DAC(i) is the bias current of the i-th driving bias circuit, I DAC(0)is the bias current of the 0th driving bias circuit, that is, the bias current of the driving bias circuit corresponding to one end of the series array line, I DAC(20) is the bias current of the 20th drive bias circuit, that is, the bias current of the drive bias circuit corresponding to the other end of the series array line, R is the bias resistance value in the drive bias circuit, r is the sum of the wiring resistance and the ground resistance in the drive bias circuit, V bias(i) is the bias voltage required for the corresponding group of Josephson subarrays between the i-th driving bias circuit and the i-1-th driving bias circuit, I bias(i) is the bias current required for the corresponding group of Josephson subarrays between the i-th driving bias circuit and the i-1-th driving bias circuit, B i is the bias state of the corresponding group of Josephson arrays between the i-th driving bias circuit and the i-1-th driving bias circuit, M i is the number of Josephson junctions contained in the corresponding group of Josephson sub-junction arrays between the i-th driving bias circuit and the i-1-th driving bias circuit, f 0 is the microwave frequency radiated on the Josephson array, K J-90 is the Josephson constant.

[0139] The driving bias circuit includes a data acquisition module, a digital-to-analog converter, a current amplifier, and a bias resistor connected in sequence through a line, and the bias resistor is connected to the series junction array line. In the actual application scenario, the bias resistor of each section of the driving bias circuit is 112Ω, and a common voltage tap zero potential terminal is set at the eleventh and driving bias circuit output nodes. In this way, the top and bottom array segments can generate independent voltage outputs, and the two ends contain 39346 and 21858 junctions respectively. The microwave frequency for normal operation of the junction array is 15 GHZ to 21 GHZ. When the microwave frequency is 20.86 GHZ, the maximum output voltages at the top and bottom are V top = 0.943 V and V bottom =1.697 V.

[0140] When driving the Josephson array to output a sinusoidal signal, the Josephson array can be made to output a corresponding quantum voltage by outputting a determined bias parameter to the Josephson array, and the desired sinusoidal signal is synthesized based on the output corresponding quantum voltage. Specifically, the quantum voltage corresponding to the output of the Josephson array satisfies the following relationship:

[0141]

[0142] Where U J1 is the sinusoidal voltage output by the first line, U J2is the sinusoidal voltage output by the second circuit, B(t,i) is the paranoid state matrix of the Josephson array, that is, the paranoid state of the corresponding group of Josephson sub-arrays between the i-th driving bias circuit and the i-1-th driving bias circuit at time t, V(i) (n=1) It is the voltage across the corresponding group of Josephson arrays between the i-th driving bias circuit and the i-1-th driving bias circuit when the bias state is in a positive bias state.

[0143] Output sinusoidal signal in Josephson array V bottom (t) and V top (t) When the cycle of the two AC voltages T Divide N The synthesized AC quantum voltage signal is composed of a series of step voltages. According to the bias state matrix and the central current corresponding to each section of the Josephson array, as well as the voltage value of each driving bias circuit, the drive system outputs bias parameters to provide segmented driving currents, thereby synthesizing two quantum voltage step signals that are approximately sinusoidal waves, which specifically satisfy the following relationship:

[0144] .

[0145] According to the driving principle of the Josephson array and the segmentation characteristics of the array, the present invention analyzes the magnetic flux state of the Josephson array, selects the bias state determination model, and realizes the rapid calculation of the bias state matrix of the Josephson array. According to the bias state and combination mode of the Josephson array, Kirchhoff's law and node voltage method are used to calculate the bias parameters of the driving bias circuit, and the step voltage value of the step wave AC quantum voltage is accurately synthesized. Finally, the minimum resolution is 2 junctions, and the effective bit is 15 bits with fast transient response AC quantum voltage output.

[0146] like Figure 5 As shown, the present invention also provides a driving device for outputting a sinusoidal signal by a Josephson junction array, and adopts the driving method for outputting a sinusoidal signal by the above-mentioned Josephson junction array, and the device comprises:

[0147] A signal acquisition module, which is used to acquire the Josephson array and determine the sinusoidal signal to be output;

[0148] A discrete processing module, which is used to discretize the sinusoidal signal to be output and determine the number of Josephson nodes corresponding to the discrete sinusoidal signal;

[0149] A bias determination module is used to analyze the magnetic flux state of the Josephson junction array, select a bias state determination model, and provide a bias state matrix corresponding to the Josephson junction array;

[0150] The signal output module is used to determine the bias parameters of the Josephson junction array based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, and drive the Josephson junction array to output the sinusoidal signal.

[0151] Furthermore, the discrete processing module includes:

[0152] Based on the sinusoidal signal to be output, the corresponding amplitude and initial phase are given;

[0153] Based on the preset number of steps, the amplitude and initial phase of the sine signal, the sine signal is discretized by a discrete function to give a step wave signal corresponding to each preset number of steps;

[0154] Performing a fast Fourier transform on the step wave signal corresponding to each preset number of steps to give the corresponding fundamental wave amplitude;

[0155] Compare the difference between the fundamental wave amplitude corresponding to each preset number of steps and the amplitude of the sinusoidal signal to be output with the preset error threshold, and give the preset number of steps with the difference less than the preset error threshold and the minimum number;

[0156] Based on the step wave signal corresponding to the preset number of steps and the microwave frequency of the Josephson junction array, the number of Josephson junctions corresponding to each step is given.

[0157] Furthermore, the bias determination module includes:

[0158] Perform step scanning on all groups of Josephson sub-arrays of the Josephson array, and provide the corresponding bias current of each group of Josephson sub-arrays;

[0159] Based on the analysis of each group of bias currents, the magnetic flux state of the Josephson array is determined as an unfrozen magnetic flux state or a frozen magnetic flux state, and a corresponding first bias state determination model and a second bias state determination model are given;

[0160] According to the unfrozen magnetic flux state, the frozen magnetic flux state, the first bias state determination model and the second bias state determination model, the bias state matrix corresponding to the Josephson array is given.

[0161] Furthermore, the bias determination module includes:

[0162] Performing scalar processing on the number of Josephson junctions corresponding to the discrete sinusoidal signal and comparing it with a second threshold;

[0163] When the scalar processing result is greater than the second threshold, based on the number of Josephson nodes corresponding to the discrete sine signal, the first processing is performed on some groups of Josephson sub-arrays on the second line and the second processing is performed on the remaining groups of Josephson sub-arrays on the second line in sequence, so as to complete the setting of the paranoid state of all groups of Josephson sub-arrays on the second line;

[0164] When the scalar processing result is less than or equal to the second threshold, the second processing is performed on the Josephson sub-array on the first line based on the Josephson node number corresponding to the discrete sine signal to complete the paranoid state setting of all groups of Josephson sub-arrays on the first line.

[0165] Furthermore, the bias determination module includes:

[0166] The number of Josephson nodes corresponding to the discrete sinusoidal signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-junction arrays on the second line that is greater than the first threshold value to obtain the number of intermediate state Josephson nodes, and the bias state of the group of Josephson sub-junction arrays on the second line is set to a positive bias state;

[0167] The intermediate state Josephson junction number is subjected to scalar processing and then compared with the second threshold. When the comparison result is greater than the second threshold, the difference processing and the setting of the bias state are repeated until the scalar processing result is less than or equal to the second threshold.

[0168] Furthermore, the bias determination module includes:

[0169] Performing a ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate-state Josephson junctions corresponding to the discrete sinusoidal signal, and comparing the absolute value thereof with a remainder threshold;

[0170] When the absolute value of the ternary modular operation result is not equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then the scalar processing result is updated, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the ternary modular operation result; when the absolute value of the ternary modular operation result is equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then superimposed with the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal to update the scalar processing result, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal;

[0171] The updated scalar processing result is repeatedly subjected to ternary modular operation, comparison processing and updating operation until all groups of Josephson subarrays on the first line and / or the second line are set to a bias state.

[0172] Furthermore, the bias determination module further includes:

[0173] The Josephson sub-arrays in the frozen flux state are eliminated, and by traversing all possible situations of the corresponding bias state matrices of the remaining Josephson sub-arrays, the bias state matrix corresponding to the sinusoidal signal closest to the sinusoidal signal to be output among all possible situations is given.

[0174] Although preferred embodiments of the present invention have been described, additional changes and modifications may be made to these embodiments by those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention. Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A driving method for a Josephson array to output a sinusoidal signal, characterized in that: include: Obtain the Josephson array and determine the sinusoidal signal to be output; Discretize the sinusoidal signal to be output, and determine the number of Josephson junctions corresponding to the discrete sinusoidal signal; Analyze the magnetic flux state of the Josephson array, select a bias state determination model, and provide a bias state matrix corresponding to the Josephson array, including: performing step scanning on all groups of Josephson sub-arrays of the Josephson array, and providing a bias current corresponding to each group of Josephson sub-arrays; based on the analysis of each group of bias currents, determine the magnetic flux state of the Josephson array as an unfrozen magnetic flux state or a frozen magnetic flux state, and provide a corresponding first bias state determination model and a second bias state determination model; provide a bias state matrix corresponding to the Josephson array according to the unfrozen magnetic flux state, the frozen magnetic flux state, the first bias state determination model, and the second bias state determination model; Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias parameters of the Josephson junction array are determined, and the Josephson junction array is driven to output the sinusoidal signal; The Josephson array includes a plurality of groups of Josephson sub-arrays and a plurality of driving bias circuits, each group of Josephson sub-arrays includes a plurality of Josephson junctions, the plurality of groups of Josephson sub-arrays are sequentially connected in series to form a series array line, a driving bias circuit is connected at both ends of the series array line and between two adjacent groups of Josephson sub-arrays, and the series array line is connected to two output ends and a zero potential end located between the two output ends; According to the frozen flux state and the second bias state determination model, a bias state matrix corresponding to the Josephson array is given, including: eliminating the Josephson sub-array in the frozen flux state in the Josephson array, and traversing all possible situations of the bias state matrix corresponding to the remaining Josephson sub-arrays, and giving the bias state matrix corresponding to the sinusoidal signal closest to the sinusoidal signal to be output in all possible situations.

2. The driving method according to claim 1, characterized in that: Discretize the sinusoidal signal to be output, and determine the number of Josephson junctions corresponding to the discrete sinusoidal signal, including: Based on the sinusoidal signal to be output, the corresponding amplitude and initial phase are given; Based on the preset number of steps, the amplitude and initial phase of the sine signal, the sine signal is discretized by a discrete function to give a step wave signal corresponding to each preset number of steps; Performing a fast Fourier transform on the step wave signal corresponding to each preset number of steps to give the corresponding fundamental wave amplitude; Compare the difference between the fundamental wave amplitude corresponding to each preset number of steps and the amplitude of the sinusoidal signal to be output with the preset error threshold, and give the preset number of steps with the difference less than the preset error threshold and the minimum number; Based on the step wave signal corresponding to the preset number of steps and the microwave frequency of the Josephson junction array, the number of Josephson junctions corresponding to each step is given.

3. The driving method according to claim 1, characterized in that: The series array line includes a first line and a second line connected to the first line, the number of Josephson nodes in each group of Josephson sub-arrays on the first line is less than or equal to a first threshold, and the Josephson sub-arrays on the second line include multiple groups of Josephson sub-arrays greater than the first threshold and Josephson sub-arrays identical to each group on the first line; The model is determined according to the unfrozen flux state and the first bias state, and the bias state matrix corresponding to the Josephson array is given, including: Performing scalar processing on the number of Josephson junctions corresponding to the discrete sinusoidal signal and comparing it with a second threshold; When the scalar processing result is greater than the second threshold, based on the number of Josephson nodes corresponding to the discrete sine signal, the first processing is performed on some groups of Josephson sub-arrays on the second line and the second processing is performed on the remaining groups of Josephson sub-arrays on the second line in sequence, so as to complete the setting of the paranoid state of all groups of Josephson sub-arrays on the second line; When the scalar processing result is less than or equal to the second threshold, the second processing is performed on the Josephson sub-array on the first line based on the Josephson node number corresponding to the discrete sine signal to complete the paranoid state setting of all groups of Josephson sub-arrays on the first line.

4. The driving method according to claim 3, characterized in that: The first treatment includes: The number of Josephson nodes corresponding to the discrete sinusoidal signal is subjected to difference processing with the number of Josephson nodes of a group of Josephson sub-junction arrays on the second line that is greater than the first threshold value to obtain the number of intermediate state Josephson nodes, and the bias state of the group of Josephson sub-junction arrays on the second line is set to a positive bias state; The intermediate state Josephson junction number is subjected to scalar processing and then compared with the second threshold. When the comparison result is greater than the second threshold, the difference processing and the setting of the bias state are repeated until the scalar processing result is less than or equal to the second threshold.

5. The driving method according to claim 3 or 4, characterized in that: All groups of Josephson sub-arrays on the first line and all groups of Josephson sub-arrays on the second line that are less than or equal to the first threshold are sorted in ascending order according to the number of Josephson nodes corresponding to them; The second treatment includes: Performing a ternary modular operation on the scalar processing result of the number of Josephson junctions and / or the number of intermediate-state Josephson junctions corresponding to the discrete sinusoidal signal, and comparing the absolute value thereof with a remainder threshold; When the absolute value of the ternary modular operation result is not equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then the scalar processing result is updated, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the ternary modular operation result; when the absolute value of the ternary modular operation result is equal to the remainder threshold, the difference between the scalar processing result and the ternary modular operation result is ternary processed and then superimposed with the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal to update the scalar processing result, and at the same time, a bias state is set for a group of Josephson sub-junction arrays on the first line and / or the second line with the smallest sequence number and no bias state set according to the sign function of the number of Josephson junctions and / or the number of intermediate state Josephson junctions corresponding to the discrete sine signal; The updated scalar processing result is repeatedly subjected to ternary modular operation, comparison processing and updating operation until all groups of Josephson subarrays on the first line and / or the second line are set to a bias state.

6. The driving method according to claim 1, characterized in that: Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias parameters of the Josephson junction array are determined, including: Based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, the bias voltage and bias current of all driving bias circuits are obtained by recursive calculation combined with the bias parameter function.

7. A driving device for outputting sinusoidal signals from a Josephson array, characterized in that: A driving method for outputting a sinusoidal signal using a Josephson array as claimed in any one of claims 1 to 6, the device comprising: A signal acquisition module, which is used to acquire the Josephson array and determine the sinusoidal signal to be output; A discrete processing module, which is used to discretize the sinusoidal signal to be output and determine the number of Josephson nodes corresponding to the discrete sinusoidal signal; A bias determination module is used to analyze the magnetic flux state of the Josephson junction array, select a bias state determination model, and provide a bias state matrix corresponding to the Josephson junction array; The signal output module is used to determine the bias parameters of the Josephson junction array based on the bias state matrix and the number of Josephson junctions corresponding to the discrete sinusoidal signal, and drive the Josephson junction array to output the sinusoidal signal.

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