Wafer bearing structure for wafer test

Abstract

The invention provides a wafer bearing structure for wafer testing. The wafer bearing structure comprises a bearing disc, ejector pins and conductive blocks, at least one stepped hole penetrating through the bearing disc is formed in the bearing disc, the stepped hole comprises a first groove and a second groove, and the aperture of the first groove is larger than that of the second groove; the ejector pin is fixedly connected with the conductive block and is accommodated in the stepped hole; the ejector pin and the conductive block can move up and down in the stepped hole, and the shape of the conductive block is matched with that of the first groove; when the ejector pin drives the conductive block to move upwards to jack up the wafer to leave the bearing disc, the conductive block moves out of the first groove; when the ejector pin drives the conductive block to move downwards to enable the wafer to be placed on the bearing disc, the conductive block is contained in the first groove and makes contact with the wafer, and the ejector pin is contained in the second groove. According to the structure, the current loop of the core particles in the area where the stepped holes are located is consistent with the current loop of the core particles outside the area where the stepped holes are located, the source-drain on-resistance of the core particles in the area is reduced, it is guaranteed that the resistance paths of all the core particles on the whole wafer are consistent, and the measurement error is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuit manufacturing and testing, and in particular to a wafer bearing structure for wafer testing. Background Art

[0002] On the wafer, after the semiconductor device is manufactured, the wafer will be tested before dicing and packaging. Since it has not been packaged at this time, the device to be tested on the wafer is tested by contacting the probe on the probe card with the reserved test pad on the surface of the wafer, and then the corresponding test electrical signal is loaded on the probe through the test program to test, and obtain some performance information of the die on the entire wafer, including whether there is a short circuit, whether the function is normal, and the performance level. In this way, multiple dies on the wafer are screened and binned. This process is called CP testing (chip probing). CP testing is to pick out bad dies, which can reduce the cost of packaging and testing, and can know the yield of the wafer more directly. Only chips that pass the CP test will be packaged.

[0003] In wafer testing, the ejector pin is a device that temporarily lifts the wafer when it is placed on the carrier. During the process of loading or unloading the wafer, the ejector pin is required to lift the wafer so that the robot arm can reach under the wafer and grab the wafer to complete the transfer work. Figure 1 As shown, the wafer 20 is lifted by the ejector pin 23. At present, for the CP test of vertical power products, when testing the on-resistance rdson of the source and drain, the probe card is connected to the source terminal, and the drain terminal is contact-connected by the carrier plate 21, such as Figure 2 As shown, the source of the die is set on the upper surface of the wafer 20, and the drain of the die is set on the lower surface of the wafer 20. One end of the electrode directly contacts the source of the die on the upper surface of the wafer 20 through the probe card, and the other end of the electrode contacts the drain of the die on the lower surface of the wafer 20 through the carrier plate 21. The current loop is as shown in FIG. Figure 1 As shown by the arrow path in the middle, the on-resistance rdson between the source and the drain is obtained by measuring the voltage between the source and the carrier plate 21. Since the carrier plate 21 has a hole 22 at the location of the ejector pin 23, the hole 22 causes the wafer 20 in the area where the ejector pin 23 is located to be unable to form a good contact with the carrier plate 21, as shown in FIG. Figure 3 As shown, the size of the core particle is generally much smaller than the opening 22. When the core particle is on the wafer 20 in the area where the opening 22 is located, since there is no metal material of the carrier plate 21 below the area of ​​the opening 22, the conduction current cannot directly form a conduction loop from the source through the carrier plate 21. The current needs to pass through the wafer 20 in the area where the opening 22 is located as a current transmission bridge, and then connect with the carrier plate 21 to complete the conduction loop. Figure 3The current loop of the arrow path is extended, thereby lengthening the current loop and increasing the measurement resistance path, making the measured on-resistance rdson higher, resulting in measurement errors. Summary of the invention

[0004] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a wafer supporting structure for wafer testing, which is used to solve the problem that the wafer supporting structure for wafer testing in the prior art causes high test results when testing the source-drain on-resistance of vertical structure chips in the wafer, resulting in measurement errors, etc.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides a wafer supporting structure for wafer testing, the wafer supporting structure comprising: a supporting plate, a top pin and a conductive block; wherein,

[0006] The carrier plate is provided with at least one stepped hole penetrating the carrier plate, the stepped hole comprising a first groove at an upper portion and a second groove at a lower portion, and a cross-sectional area of ​​the first groove is greater than a cross-sectional area of ​​the second groove;

[0007] The ejector pin and the conductive block are accommodated in the step hole; the shape of the conductive block matches the shape of the first groove; the ejector pin and the conductive block can move up and down in the step hole;

[0008] When the ejector pin drives the conductive block to move upward to a first position, the conductive block is at least partially higher than the upper surface of the carrying plate; when the ejector pin drives the conductive block to move downward to a second position, the conductive block is accommodated in the first groove, the upper surface of the conductive block is flush with the upper surface of the carrying plate, and the conductive block forms a conductive connection with the carrying plate.

[0009] Optionally, the ejector pin and the conductive block are separated or are fixedly connected or slidably connected.

[0010] Further, when the ejector pin and the conductive block are in a fixed connection mode, the fixed connection mode is a detachable or non-detachable connection mode;

[0011] When the ejector pin and the conductive block are connected in a slidable manner, the slidable connection adopts a first slidable connection or a second slidable connection: wherein,

[0012] The first slidable connection mode is: the ejector pin is provided with a first accommodating cavity from the top surface inward, and the ejector pin top surface has a closing portion facing the first accommodating cavity, a support column is fixed to the lower side of the conductive block, an expansion portion is provided at the lower end of the support column, and the expansion portion of the support column is slidably accommodated in the first accommodating cavity;

[0013] The second slidable connection method is: a support column is fixed on the lower side of the conductive block, a second accommodating cavity is opened inward from the bottom surface of the support column, and the bottom surface of the support column has a closing portion facing the second accommodating cavity, and an expansion portion is provided at the upper end of the ejector pin, and the expansion portion of the ejector pin can be slidably accommodated in the second accommodating cavity.

[0014] Further, when the slidable connection method adopts the first slidable connection method, it also includes a first spring and / or a second spring, wherein the first spring is arranged at the outer periphery of the support column between the closing portion and the expansion portion, and is limited to the first accommodating cavity, and the second spring is arranged between the expansion portion and the bottom of the first accommodating cavity, and is limited to the first accommodating cavity; when the slidable connection method adopts the second slidable connection method, it also includes a third spring and / or a fourth spring, wherein the third spring is arranged at the outer periphery of the ejector pin between the closing portion and the expansion portion, and is limited to the second accommodating cavity, and the fourth spring is arranged between the expansion portion and the top of the second accommodating cavity, and is limited to the second accommodating cavity.

[0015] Optionally, the conductive block is a metal disk, and the ejector pin is an insulating ejector pin.

[0016] Furthermore, the ejector pin is a ceramic ejector pin, and the conductive block is a copper disk.

[0017] Furthermore, the interior of the conductive block is made of metal material, semiconductor material or insulator material, and the surface of the conductive block is coated or plated with a conductive metal coating.

[0018] Furthermore, the surface of the conductive block is plated with a gold material layer, a nickel material layer, a platinum material layer, or a silver material layer.

[0019] Optionally, the first groove has a shape of one of a cylindrical shape, a square cylindrical shape, a rectangular cylindrical shape, a rhombus cylindrical shape, a truncated cone shape, a square cone shape and a stepped cone shape, the second groove has a cylindrical shape, and the first groove and the second groove are coaxially arranged.

[0020] Optionally, a plurality of pinholes are provided on the carrier plate for creating a vacuum between the wafer and the carrier plate.

[0021] As described above, the wafer supporting structure for wafer testing of the present invention, when testing the source-drain on-resistance rdson in the CP test of a vertical product, is provided with a step hole having a first groove and a second groove, and the conductive block is adapted to be accommodated in the first groove. Due to the presence of the conductive block, the upper surface of the supporting disk is formed into a surface disk without holes. When the core particle is on the wafer in the area where the step hole is located, since the conductive block is provided below the step hole area, the on-current can directly pass through the conductive block into the supporting disk to form a current conduction loop, without passing through the wafer in the area where the step hole is located as a current transmission bridge, so that the current loop of the core particle in the area is shortened and consistent with the current loop of the core particle outside the area where the step hole is located, thereby reducing the source-drain on-resistance rdson of the core particle in the area, thereby ensuring that the resistance paths of all the core particles on the entire wafer are consistent, thereby reducing measurement errors. In addition, the conductive block and the ejector pin can be slidably connected. Since the ejector pin can have a certain degree of freedom to descend, the requirements for the stopping position of the ejector pin when it descends can be effectively reduced. At the same time, the pressure of the spring makes the conductive block tightly pressed against the surface of the first groove, thereby increasing the contact force between the two, reducing the contact resistance, improving the conductivity, and improving the detection accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It shows a schematic diagram of the cross-sectional structure of a wafer supporting structure for wafer testing in the prior art, wherein the wafer is in a state of being lifted up by a ejector pin.

[0023] Figure 2 It is a schematic diagram of the current loop between the core source and drain in the non-opening area of ​​the ejector pin in the wafer supporting structure for wafer testing in the prior art.

[0024] Figure 3 It shows a schematic diagram of the current loop between the core source and drain in the ejector pin opening area in the wafer supporting structure for wafer testing in the prior art.

[0025] Figure 4 Shown is a schematic cross-sectional structure diagram of ejector pins and conductive blocks in a wafer supporting structure for wafer testing according to an example of the present invention.

[0026] Figure 5 Shown is a schematic cross-sectional structure diagram of a wafer supporting plate in a wafer supporting structure for wafer testing according to an example of the present invention.

[0027] Figure 6 Shown is a schematic cross-sectional structure diagram of a carrier plate in a wafer carrier structure for wafer testing according to another example of the present invention.

[0028] Figure 7The cross-sectional structure schematic diagram of a wafer supporting structure for wafer testing according to an example of the present invention is shown, wherein the wafer is in a state of being lifted up by a ejector pin.

[0029] Figure 8 Shown is a schematic diagram of the cross-sectional structure of a wafer supporting structure for wafer testing according to an example of the present invention, wherein the wafer is in contact with the supporting plate, and illustrates the current loop between the core particle source and drain in the ejector pin opening area.

[0030] Fig. 9 and Fig.10 The schematic diagram of the cross-sectional structure of the ejector pins and the conductive blocks in the wafer supporting structure for wafer testing of another example of the present invention is shown, wherein: Fig. 9 It shows the state where the ejector pin lifts up the conductive block. Fig.10 It shows the state where the ejector pin is separated from the conductive block.

[0031] Fig.11 and Fig.12 A schematic diagram of the cross-sectional structure of the ejector pins and the conductive blocks in a wafer supporting structure for wafer testing of another example of the present invention is shown, wherein: Fig.11 It shows the state where the ejector pin lifts up the conductive block. Fig.12 It shows the state where the ejector pin is separated from the conductive block.

[0032] Fig.13 and Fig.14 A schematic diagram of the cross-sectional structure of the ejector pins and the conductive blocks in a wafer supporting structure for wafer testing of another example of the present invention is shown, wherein: Fig.13 It shows the state where the ejector pin lifts up the conductive block. Fig.14 It shows the state where the ejector pin is separated from the conductive block.

[0033] Fig.15 and Fig.16 A schematic diagram of the cross-sectional structure of the ejector pins and the conductive blocks in a wafer supporting structure for wafer testing of another example of the present invention is shown, wherein: Fig.15 It shows the state where the ejector pin lifts up the conductive block. Fig.16 It shows the state where the ejector pin is separated from the conductive block.

[0034] Component number description

[0035] 10 Carrying tray

[0036] 100 Step hole

[0037] 101 First Groove

[0038] 102 Second groove

[0039] 11. Ejector

[0040] 12 Conductive block

[0041] 13 Wafer

[0042] 20 Wafer

[0043] 21 Carrying tray

[0044] 22 Opening

[0045] 23 Ejector

[0046] 24 first accommodating chamber

[0047] 25 Closing

[0048] 26 Support Column

[0049] 27 Expansion

[0050] 28 First Spring

[0051] 29 Second Spring

[0052] 30 Second accommodating chamber

[0053] 31 Third Spring

[0054] 32 Fourth Spring DETAILED DESCRIPTION

[0055] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0056] See also Figures 4 to 16 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0057] like Figures 4 to 8 As shown, this embodiment provides a wafer carrying structure for wafer testing, the wafer carrying structure includes: a carrying plate 10, a top pin 11 and a conductive block 12; wherein,

[0058] like Figure 5 As shown, the carrier plate 10 is provided with at least one stepped hole 100 penetrating the carrier plate 10, the stepped hole 100 comprises a first groove 101 at the upper part and a second groove 102 at the lower part, and the cross-sectional area of ​​the first groove 101 is greater than the cross-sectional area of ​​the second groove 102;

[0059] like Figures 4 to 6 As shown, the ejector pin 11 and the conductive block 12 are accommodated in the step hole 100;

[0060] like Figure 7 and Figure 8 As shown, the ejector pin 11 and the conductive block 12 can move up and down in the step hole 100, and the shape of the conductive block 12 is adapted to the shape of the first groove 101;

[0061] like Figure 7 As shown, when the ejector pin 11 drives the conductive block 12 to move upward to the first position, the conductive block 12 is at least partially higher than the upper surface of the carrier plate 10; Figure 8 As shown, when the ejector pin 11 drives the conductive block 12 to move downward to the second position, the conductive block 12 is accommodated in the first groove 101, the upper surface of the conductive block 12 is flush with the upper surface of the supporting plate 10, and the conductive block 12 forms a conductive connection with the supporting plate 10.

[0062] It should be noted here that the shape of the conductive block 12 is adapted to the shape of the first groove 101 , which means that when the conductive block 12 is accommodated in the first groove 101 , the two are matched with each other, and the conductive block 12 basically completely fills the first groove 101 .

[0063] The wafer support structure for wafer testing of the present embodiment, when the source-drain on-resistance rdson in the CP test is performed on a vertical product, the step hole 100 having the first groove 101 and the second groove 102 is provided, and the conductive block 12 is accommodated in the first groove 101 in a shape-fitting manner. Due to the presence of the conductive block 12, the upper surface of the support plate 10 is formed into a surface plate without holes, such as Figure 8 As shown, when the core particle is on the wafer 13 in the area where the step hole 100 is located, since a conductive block 12 is provided below the step hole 100 area, the conduction current can directly pass through the conductive block 12 into the carrier plate 10 to form a current conduction loop, as shown in FIG. Figure 8 As shown in the arrow path in FIG, the wafer 13 in the area where the step hole 100 is located does not need to be used as a current transmission bridge, so that the current loop of the core particles in this area is shortened and consistent with the current loop of the core particles outside the area where the step hole is located, thereby reducing the source-drain on-resistance rdson of the core particles in this area, thereby ensuring that the resistance paths of all core particles on the entire wafer 13 are consistent and reducing measurement errors.

[0064] like Figure 4As shown, as an example, the ejector pin 11 and the conductive block 12 can be completely separated, that is, they are not connected together; they can also be fixedly connected, for example, they can be detachably fixedly connected or non-detachably fixedly connected. Preferably, the ejector pin 11 and the conductive block 12 are detachably fixedly connected, and when one of them is damaged, it can be replaced by disassembly, which effectively reduces the cost.

[0065] like Figures 9 to 16 As shown, as an example, the ejector pin 11 and the conductive block 12 may also be arranged in a slidable connection manner.

[0066] As a specific example, Fig. 9 and Fig.10 As shown, it is a specific connection method of slidable connection, wherein the ejector pin 11 is provided with a first accommodating cavity 24 from the top surface inward, and the top surface of the ejector pin 11 has a closing portion 25 facing the first accommodating cavity 24, and a support column 26 is fixed to the lower side of the conductive block 12, and an expansion portion 27 is fixed to the lower end of the support column 26, and the expansion portion 27 of the support column 26 can be slidably accommodated in the first accommodating cavity 24. Fig. 9 As shown in FIG. 1 , when the ejector pin 11 moves upward, the expansion portion 27 abuts against the bottom of the first accommodating cavity 24 and drives the conductive block 12 to move upward to a desired first position through the support column 26; when the ejector pin 11 moves downward, the expansion portion 27 abuts against the bottom of the first accommodating cavity 24 and drives the conductive block 12 to move downward through the support column 26 until the conductive block 12 is accommodated in the first groove 101, and then the expansion portion 27 is separated from the bottom of the first accommodating cavity 24. Fig.10 As shown, the ejector pin 11 can continue to move down until the expansion part 27 and the closing part 25 are interlocked. This connection method can effectively reduce the requirements for the stop position of the ejector pin when it is descending because the ejector pin has a certain degree of freedom to descend; and the conductive block can be tightly pressed against the surface of the first groove 101 by the pressure of the spring, thereby increasing the contact force between the two, reducing the contact resistance, improving the conductivity, and improving the detection accuracy. On this basis, Figures 9 to 12 As shown, a first spring 28 and / or a second spring 29 may also be provided; Fig. 9 and Fig.10 As shown, only the first spring 28 is provided. The first spring 28 is provided on the periphery of the support column 26 between the closing portion 25 and the expansion portion 27 and is limited in the first accommodating cavity 24. The first spring 28 is provided. Fig.10As shown, when the ejector pin 11 is separated from the expansion portion 27, the ejector pin 11 will gradually compress the first spring 28, and the first spring 28 will transmit the compression force to the conductive block 12 through the support column 26, so that the conductive block 12 and the carrier plate 10 are more closely contacted, and the resistance of the carrier plate 10 is effectively reduced; Fig.11 and Fig.12 As shown, a second spring 29 is provided. The second spring 29 is provided between the expansion portion 27 and the bottom of the first accommodating cavity 24 and is limited in the first accommodating cavity 24. The second spring 29 is provided. Fig.11 As shown in FIG. 1 , when the ejector pin 11 moves upward, the second spring 29 is compressed, so that the conductive block 12 starts to rise slowly, reducing the impact force on the wafer when it is lifted. Fig.11 and Fig.12 As shown, the first spring 28 and the second spring 29 are provided simultaneously, so as to simultaneously achieve a closer contact between the conductive block 12 and the carrier plate 10 when the ejector pin 11 descends, thereby effectively reducing the resistance of the carrier plate 10 and a slow rise of the conductive block 12 when the ejector pin 11 rises, thereby reducing the impact force on the wafer when it is lifted.

[0067] As another specific example, Fig.13 and Fig.16 As shown, another specific connection method of slidable connection is shown, wherein a support column 26 is fixed to the lower side of the conductive block 12, and the support column 26 has a second accommodating cavity 30 formed inward from the bottom surface, and the bottom surface of the support column 26 has a closing portion 25 facing the second accommodating cavity 30, and an expansion portion 27 is fixed to the upper end of the ejector pin 11, and the expansion portion 27 of the ejector pin 11 can be slidably accommodated in the second accommodating cavity 30. Fig.13 As shown in FIG. 1 , when the ejector pin 11 moves upward, the expansion portion 27 abuts against the bottom of the second accommodating cavity 30 and drives the conductive block 12 to move upward to the desired first position through the support column 26; when the ejector pin 11 moves downward, the expansion portion 27 abuts against the bottom of the second accommodating cavity 30 and drives the conductive block 12 to move downward through the support column 26 until the conductive block 12 is accommodated in the first groove 101, and then the expansion portion 27 is separated from the bottom of the second accommodating cavity 30. Fig.14 As shown, the ejector pin 11 can continue to move down until the expansion portion 27 and the closing portion 25 are interlocked. Similarly, since the ejector pin 11 can have a certain degree of freedom to fall, this connection method can effectively reduce the requirements for the stop position of the ejector pin when it falls; and the conductive block 12 can be tightly pressed against the surface of the first groove 101 by the pressure of the spring, thereby increasing the contact force between the two, reducing the contact resistance, improving the conductivity, and improving the detection accuracy. On this basis, Figures 13 to 16As shown, a third spring 31 and / or a fourth spring 32 may also be provided; Fig.13 and Fig.14 As shown, only the third spring 31 is provided, and the third spring 31 is provided on the outer periphery of the ejector pin 11 between the closing portion 25 and the expansion portion 27, and is limited to the second accommodating cavity 30. The third spring 31 is provided, as shown Fig.13 As shown, when the expansion portion 27 is separated from the support column 26, the ejector pin 11 will gradually compress the third spring 31, and the third spring 31 will transmit the compression force to the conductive block 12 through the support column 26, so that the conductive block 12 and the carrier plate 10 are more closely contacted, and the resistance of the carrier plate 10 is effectively reduced; Fig.15 and Fig.16 As shown, a fourth spring 32 is provided, the fourth spring 32 is provided between the expansion portion 27 and the top of the second accommodating cavity 30, and is limited in the second accommodating cavity 30. The fourth spring 32 is provided, as shown Fig.15 As shown in FIG. 1 , when the ejector pin 11 moves upward, the fourth spring 32 is compressed, so that the conductive block 12 starts to rise slowly, reducing the impact force on the wafer when it is lifted. Fig.15 and Fig.16 As shown, the third spring 31 and the fourth spring 32 are provided at the same time, so as to achieve a closer contact between the conductive block 12 and the carrier plate 10 when the ejector pin 11 descends, effectively reducing the resistance of the carrier plate 10 and making the conductive block 12 slowly rise when the ejector pin 11 rises, reducing the impact force when the wafer is lifted. In this embodiment, there is no excessive restriction on the shape of the first groove 101 in the step hole 100, as long as it can be fully adapted to the shape of the conductive block 12, that is, when the ejector pin 11 drives the conductive block 12 to move downward to place the wafer 13 on the carrier plate 10, the conductive block 12 forms a filling medium on the surface of the carrier plate 10, so that the surface of the carrier plate 10 forms a conductive whole without holes. For example, the size and shape of the cross section of the first groove 101 from bottom to top can remain unchanged, such as a cylindrical shape, a square column shape, a rectangular column shape, a diamond column shape, etc.; the size of the cross section can also gradually increase from bottom to top, such as a truncated cone shape, a square cone shape, a stepped cone shape, etc.; the size of the cross section can also be changed to any size from bottom to top, that is, there is no limit on the size change of the cross section, as long as the smallest cross section size is greater than the largest cross section size of the second groove 102; the shape of the cross section can also be inconsistent from bottom to top. Preferably, the size and shape of the cross section of the first groove 101 from bottom to top are selected to remain unchanged, while achieving the same effect, the difficulty of process preparation and manufacturing cost can also be reduced.

[0068] It should be noted that there is no excessive restriction on the size and shape of the cross section of the second groove 102, as long as the ejector pin 11 can move freely up and down therein. Also, considering the difficulty of process preparation and manufacturing cost, it is preferred to keep the size and shape of the cross section of the second groove 102 from bottom to top unchanged.

[0069] More preferably, the shape of the first groove 101 is cylindrical, the shape of the second groove 102 is cylindrical, and the first groove 101 is coaxially arranged with the second groove 102. As an example, the conductive block 12 is selected as a metal disk, and the ejector pin 11 is selected as an insulating ejector pin. For example, the ejector pin 11 may be made of ceramic, plastic, rubber, etc., which has a certain hardness and does not cause electrical damage to the wafer 13. The material of the metal disk is selected as a metal material or alloy material with good electrical conductivity. For example, the material of the metal disk may be selected as: one or an alloy of at least two of platinum, gold, silver, copper, aluminum, titanium, etc.; or the conductive block 12 is only a metal coating with good electrical conductivity on the surface, and the inside thereof may be a conductor (such as metal) or a semiconductor or an insulator.

[0070] As an example, a metal material coating with high chemical stability, such as a gold material layer, a platinum material layer, a silver material layer or a nickel material layer, can be provided on the surface of the conductive block 12, which can effectively prevent the surface of the conductive block 12 from being oxidized while having conductive properties.

[0071] As an example, the carrier plate 10 is also provided with a plurality of pinholes for vacuuming the space between the wafer 13 and the carrier plate 10, so that the wafer 13 is fixed on the carrier plate 10 and does not fall off. Generally, the pinholes are arranged on the entire surface of the carrier plate 10, distributed in a circular array in the middle of the carrier plate 10, and distributed in a circular array on the outside of the carrier plate 10.

[0072] As an example, the chip to be tested in the wafer 13 is a chip to be tested with a source and a drain having a vertical structure, such as a power chip VDMOS, IGBT, SGTMOS, super junction structure MOS, etc.

[0073] In summary, the present invention provides a wafer supporting structure for wafer testing. When the source-drain on-resistance rdson in the CP test of a vertical product is tested, a step hole having a first groove and a second groove is provided, and the conductive block is adapted to be accommodated in the first groove. Due to the presence of the conductive block, the upper surface of the supporting disk is formed into a surface disk without holes. When the core particle is on the wafer in the area where the step hole is located, since the conductive block is provided below the step hole area, the on-current can directly pass through the conductive block into the supporting disk to form a current conduction loop without passing through the wafer in the area where the step hole is located as a current transmission bridge, so that the current loop of the core particle in the area is shortened and consistent with the current loop of the core particle outside the area where the step hole is located, thereby reducing the source-drain on-resistance rdson of the core particle in the area, thereby ensuring that the resistance paths of all the core particles on the entire wafer are consistent, thereby reducing measurement errors. In addition, the conductive block and the ejector pin can be connected in a slidable manner. Since the ejector pin can have a certain degree of freedom to fall, the requirements for the stop position of the ejector pin when it falls can be effectively reduced. At the same time, the conductive block is tightly pressed against the surface of the first groove by the pressure of the spring, increasing the contact force between the two, reducing the contact resistance, improving the conductivity, and improving the detection accuracy. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0074] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A wafer supporting structure for wafer testing, characterized in that: The wafer supporting structure includes: a supporting plate, a top pin and a conductive block; wherein, The carrier plate is provided with at least one stepped hole penetrating the carrier plate, the stepped hole comprising a first groove at an upper portion and a second groove at a lower portion, and a cross-sectional area of ​​the first groove is greater than a cross-sectional area of ​​the second groove; The ejector pin and the conductive block can be accommodated in the step hole, and the shape of the conductive block is adapted to the shape of the first groove; the ejector pin and the conductive block can move up and down in the step hole; When the ejector pin drives the conductive block to move upward to a first position, the conductive block is at least partially higher than the upper surface of the carrying plate; when the ejector pin drives the conductive block to move downward to a second position, the conductive block is accommodated in the first groove, the upper surface of the conductive block is flush with the upper surface of the carrying plate, and the conductive block forms a conductive connection with the carrying plate.

2. The wafer supporting structure for wafer testing according to claim 1, characterized in that: The ejector pin and the conductive block are separated or fixedly connected or slidably connected.

3. The wafer supporting structure for wafer testing according to claim 2, characterized in that: When the ejector pin and the conductive block are in a fixed connection mode, the fixed connection mode is a detachable or non-detachable connection mode; When the ejector pin and the conductive block are connected in a slidable manner, the slidable connection adopts a first slidable connection or a second slidable connection: wherein, The first slidable connection mode is: the ejector pin is provided with a first accommodating cavity from the top surface inward, and the ejector pin top surface has a closing portion facing the first accommodating cavity, a support column is fixed to the lower side of the conductive block, an expansion portion is provided at the lower end of the support column, and the expansion portion of the support column is slidably accommodated in the first accommodating cavity; The second slidable connection method is: a support column is fixed on the lower side of the conductive block, a second accommodating cavity is opened inward from the bottom surface of the support column, and the bottom surface of the support column has a closing portion facing the second accommodating cavity, and an expansion portion is provided at the upper end of the ejector pin, and the expansion portion of the ejector pin can be slidably accommodated in the second accommodating cavity.

4. The wafer supporting structure for wafer testing according to claim 3, characterized in that: When the slidable connection method adopts the first slidable connection method, it also includes a first spring and / or a second spring, wherein the first spring is arranged at the outer periphery of the support column between the closing portion and the expansion portion, and is limited in the first accommodating cavity, and the second spring is arranged between the expansion portion and the bottom of the first accommodating cavity, and is limited in the first accommodating cavity; when the slidable connection method adopts the second slidable connection method, it also includes a third spring and / or a fourth spring, wherein the third spring is arranged at the outer periphery of the ejector pin between the closing portion and the expansion portion, and is limited in the second accommodating cavity, and the fourth spring is arranged between the expansion portion and the top of the second accommodating cavity, and is limited in the second accommodating cavity.

5. The wafer supporting structure for wafer testing according to any one of claims 1 to 4, characterized in that: The conductive block is a metal disk, and the ejector pin is an insulating ejector pin.

6. The wafer supporting structure for wafer testing according to claim 5, characterized in that: The ejector pin is a ceramic ejector pin, and the conductive block is a copper disk.

7. The wafer supporting structure for wafer testing according to any one of claims 1 to 4, characterized in that: The conductive block is made of metal material, semiconductor material or insulator material, and its surface is coated or plated with a conductive metal coating.

8. The wafer supporting structure for wafer testing according to claim 7, characterized in that: The surface of the conductive block is plated with a gold material layer, a nickel material layer, a platinum material layer, or a silver material layer.

9. The wafer supporting structure for wafer testing according to any one of claims 1 to 3, characterized in that: The shape of the first groove is one of a cylindrical shape, a square cylindrical shape, a rectangular cylindrical shape, a rhombus cylindrical shape, a truncated cone shape, a square cone shape and a stepped cone shape, the shape of the second groove is a cylindrical shape, and the first groove and the second groove are coaxially arranged.

10. The wafer supporting structure for wafer testing according to any one of claims 1 to 3, characterized in that: The carrier plate is also provided with a plurality of pinholes for drawing a vacuum between the wafer and the carrier plate.

Images