Phase-locked loop and charge pump circuit thereof

By using the shunt of channel current in the charge pump to reduce the conduction current, the voltage fluctuation problem during the charging and discharge periods in the charge pump is solved, and the controllability and reliability of the charge pump are improved.

CN119182403APending Publication Date: 2024-12-24SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202411290104.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-14
Publication Date
2024-12-24

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Abstract

The invention discloses a phase-locked loop and a charge pump circuit thereof, and belongs to the field of electronic engineering, the on-off of a positive current circuit is controlled through a first controllable switch (MOS tube), the on-off of a negative current circuit is controlled through a second controllable switch (MOS tube), and the channels of the first controllable switch and the second controllable switch are connected; therefore, during the simultaneous conduction period of the two controllable switches, channel current is generated between channels of the two controllable switches and does not act on the energy storage module, even if net current (the sum of conduction current of the first controllable switch and conduction current of the second controllable switch) output by the charge pump at the moment is not zero, the energy storage module does not act on the channel current. The conduction current of the first controllable switch and the second controllable switch can be reduced due to the shunting effect of the channel current, so that the net current output by the charge pump is reduced, namely, the voltage fluctuation generated by the energy storage module during the simultaneous conduction of the two controllable switches is weakened, and the reliability of the charge pump is improved.
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Description

Technical Field

[0001] The present invention relates to the field of electronic engineering, and in particular to a phase-locked loop and a charge pump circuit thereof. Background Art

[0002] The output end of the charge pump can be connected to the energy storage module. The charge pump usually includes a charging switch and a discharging switch. The charging switch can be closed under the control of a first control signal to charge the energy storage module, and the discharging switch can be closed under the control of a second control signal to discharge the energy storage module, thereby finally adjusting the voltage of the energy storage module. Although theoretically the first control signal and the second control signal do not exist at the same time, there is a period when the charging switch and the discharging switch are turned on at the same time. During this period, since the net current output by the charge pump is difficult to ensure to be zero, the existence of this period will cause the voltage of the energy storage module to produce uncontrollable fluctuations (increase or decrease), thereby reducing the controllability of the charge pump.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. Summary of the invention

[0004] The object of the present invention is to provide a phase-locked loop and a charge pump circuit thereof, wherein the channels of a first controllable switch and a second controllable switch are connected, so that during the period when the two controllable switches are simultaneously turned on, a channel current is generated between the channels of the two controllable switches and the channel current does not act on an energy storage module, even if the net current output by the charge pump (the sum of the on-currents of the first controllable switch and the second controllable switch) is not zero at this time, the on-currents of the first controllable switch and the second controllable switch can be reduced due to the shunting effect of the channel current, thereby reducing the net current output by the charge pump, that is, weakening the voltage fluctuation generated by the energy storage module during the period when the two controllable switches are simultaneously turned on, thereby improving the reliability of the charge pump.

[0005] In order to solve the above technical problems, the present invention provides a charge pump circuit, comprising:

[0006] A positive current circuit for generating a positive current;

[0007] A negative current circuit for providing a negative current;

[0008] The input end is connected to the positive current circuit, and the output end is connected to the energy storage module as the output end of the charge pump circuit, and is used to be turned on under the control of a first control signal so as to charge the energy storage module through the positive current;

[0009] A second controllable switch having an output end connected to the negative current circuit and an input end connected to the energy storage module, and configured to be turned on under the control of a second control signal so as to discharge the energy storage module through a negative current;

[0010] The first controllable switch and the second controllable switch are both metal oxide semiconductor field effect transistors, the channel types of the first controllable switch and the second controllable switch are opposite, and the channel of the first controllable switch is connected to the channel of the second controllable switch.

[0011] On the other hand, the first controllable switch is a P-channel metal oxide semiconductor field effect transistor, the source of the first controllable switch serves as an input terminal, the gate of the first controllable switch is used to receive the first control signal, and the drain of the first controllable switch serves as an output terminal;

[0012] The second controllable switch is an N-channel metal oxide semiconductor field effect transistor, the source of the second controllable switch serves as an output terminal, the gate of the second controllable switch is used to receive the second control signal, and the drain of the second controllable switch serves as an input terminal.

[0013] On the other hand, the first controllable switch includes a substrate, a first metal, a first insulating layer, a second insulating layer, a second metal, a third metal, a first P-type semiconductor material, and a first N-type semiconductor material;

[0014] The second controllable switch includes the substrate, the second insulating layer, the third metal, a second P-type semiconductor material, a second N-type semiconductor material, a third insulating layer, a fourth metal and a fifth metal;

[0015] The first metal is connected to the first insulating layer and the first P-type semiconductor material respectively, the first insulating layer is connected to the second metal, the first P-type semiconductor material and the first N-type semiconductor material respectively, the first N-type semiconductor material is connected to the third metal, the second insulating layer and the first P-type semiconductor material respectively, the first P-type semiconductor material is connected to the second insulating layer and the second N-type semiconductor material respectively, the second insulating layer is connected to the third metal, the second P-type semiconductor material and the second N-type semiconductor material respectively, the third insulating layer is connected to the second P-type semiconductor material, the fourth metal, the fifth metal and the second N-type semiconductor material respectively, the second N-type semiconductor material is connected to the second P-type semiconductor material and the fifth metal respectively, and the substrate is connected to the first P-type semiconductor material, the second N-type semiconductor material and the fifth metal respectively;

[0016] Among them, the first metal serves as the source of the first controllable switch, the second metal serves as the gate of the first controllable switch, the third metal serves as the drain of both the first controllable switch and the second controllable switch, the fourth metal serves as the gate of the second controllable switch, the fifth metal serves as the source of the second controllable switch, the first P-type semiconductor material and the first N-type semiconductor material serve as the PN junction of the first controllable switch, and the second P-type semiconductor material and the second N-type semiconductor material serve as the PN junction of the second controllable switch.

[0017] On the other hand, the first P-type semiconductor material, the first N-type semiconductor material, the second P-type semiconductor material and the second N-type semiconductor material are all two-dimensional semiconductor materials.

[0018] On the other hand, the contact area between the first P-type semiconductor material and the first N-type semiconductor material is a first preset area, the contact area between the second P-type semiconductor material and the second N-type semiconductor material is a second preset area, and the contact area between the first P-type semiconductor material and the second N-type semiconductor material is a third preset area;

[0019] Wherein, the third preset area is respectively larger than the first preset area and the second preset area.

[0020] On the other hand, the charge pump circuit further includes:

[0021] The current monitoring circuits connected to the positive current circuit and the negative current circuit respectively are used to monitor the first current value of the positive current and the second current value of the negative current respectively, and output the first current value and the second current value.

[0022] On the other hand, the positive current circuit includes a first voltage source, a first current mirror and a first current source;

[0023] The negative current circuit includes a second current source, a second current mirror and a grounding device;

[0024] The first voltage source is connected to an input end of the first current mirror and an input end of the second current source respectively, a first output end of the first current mirror is connected to an input end of the first current source, a second output end of the first current mirror is connected to an input end of the first controllable switch, an output end of the first current source and an output end of the second current mirror are both connected to the grounding device, an output end of the second current source is connected to a first input end of the second current mirror, and a second input end of the second current mirror is connected to an output end of the second controllable switch;

[0025] The first voltage source is used to provide a positive voltage, the first current source and the second current source are both used to control the current in the loop to be a preset current value, the first current mirror is used to mirror the current in the first current mirror connected to the first output terminal to the second output terminal, and the second current mirror is used to mirror the current in the second current mirror connected to the first input terminal to the second input terminal.

[0026] On the other hand, the first current mirror includes a third controllable switch and a fourth controllable switch, and the second current mirror includes a fifth controllable switch and a sixth controllable switch;

[0027] The third controllable switch and the fourth controllable switch are both P-channel metal oxide semiconductor field effect transistors, the source of the third controllable switch and the source of the fourth controllable switch are used together as the input end of the first current mirror, the gate of the third controllable switch is connected to the gate of the fourth controllable switch, the drain of the third controllable switch and the gate of the third controllable switch are used together as the first output end of the first current mirror, and the drain of the fourth controllable switch is used as the second output end of the first current mirror;

[0028] The fifth controllable switch and the sixth controllable switch are both N-channel metal oxide semiconductor field effect transistors, the source of the fifth controllable switch and the source of the sixth controllable switch serve together as the output end of the second current mirror, the gate of the fifth controllable switch is connected to the gate of the sixth controllable switch, the drain of the fifth controllable switch and the gate of the fifth controllable switch serve together as the first input end of the second current mirror, and the drain of the sixth controllable switch serves as the second input end of the second current mirror.

[0029] On the other hand, the first P-type semiconductor material is a P-type semiconductor material of a first preset type, the first N-type semiconductor material is an N-type semiconductor material of a second preset type, the second P-type semiconductor material is a P-type semiconductor material of a third preset type, and the second N-type semiconductor material is an N-type semiconductor material of a fourth preset type;

[0030] The third charge transfer speed is respectively greater than the first charge transfer speed and the second charge transfer speed, the third charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material, the first charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the second preset type of N-type semiconductor material, and the second charge transfer speed refers to: the charge transfer speed of the interface at the junction of the third preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material.

[0031] In order to solve the above technical problems, the present invention further provides a phase-locked loop, comprising a frequency detector, a phase detector, a low-pass filter, a voltage-controlled oscillator and a frequency divider, and also comprising the charge pump circuit as described above;

[0032] The charge pump circuit is connected to the phase frequency detector and the low-pass filter respectively, the voltage-controlled oscillator is connected to the low-pass filter and the frequency divider respectively, and the frequency divider is connected to the phase frequency detector.

[0033] Beneficial effect: The present invention provides a charge pump circuit. Considering that (1) current can be generated between the channels of two MOS transistors that are turned on at the same time through channel connection, and (2) the shunting effect of the channel current can reduce the on-current of the MOS transistor, the present invention controls the on-off of the positive current circuit through a first controllable switch (MOS transistor), and controls the on-off of the negative current circuit through a second controllable switch (MOS transistor), and the channels of the first controllable switch and the second controllable switch are connected. Therefore, during the period when the two controllable switches are turned on at the same time, a channel current will be generated between the channels of the two controllable switches and the channel current will not act on the energy storage module. Even if the net current output by the charge pump (the sum of the on-currents of the first controllable switch and the second controllable switch) is not zero at this time, the on-currents of the first controllable switch and the second controllable switch can be reduced due to the shunting effect of the channel current, thereby reducing the net current output by the charge pump, that is, the voltage fluctuation generated by the energy storage module during the period when the two controllable switches are turned on at the same time is weakened, thereby improving the reliability of the charge pump.

[0034] The present invention also provides a phase-locked loop having the same beneficial effects as the above charge pump circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the relevant technologies and the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 A schematic diagram of the structure of a charge pump circuit provided by the present invention;

[0037] Figure 2 A schematic diagram of the structure of a charge and discharge switch provided by the present invention;

[0038] Figure 3 A schematic diagram of the structure of another charge pump circuit provided by the present invention;

[0039] Figure 4 A schematic diagram of the structure of a phase-locked loop. DETAILED DESCRIPTION

[0040] The core of the present invention is to provide a phase-locked loop and a charge pump circuit thereof. The channels of a first controllable switch and a second controllable switch are connected. Therefore, when the two controllable switches are turned on at the same time, a channel current will be generated between the channels of the two controllable switches and the channel current will not act on the energy storage module. Even if the net current output by the charge pump (the sum of the on-currents of the first controllable switch and the second controllable switch) is not zero at this time, the on-currents of the first controllable switch and the second controllable switch can be reduced due to the shunting effect of the channel current, thereby reducing the net current output by the charge pump, that is, weakening the voltage fluctuation generated by the energy storage module during the period when the two controllable switches are turned on at the same time, thereby improving the reliability of the charge pump.

[0041] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] Please refer to Figure 1 , Figure 1 A schematic diagram of a charge pump circuit provided by the present invention, the charge pump circuit comprising:

[0043] A positive current circuit for generating a positive current;

[0044] A negative current circuit for providing a negative current;

[0045] The input end is connected to the positive current circuit, and the output end is connected to the energy storage module as the output end of the charge pump circuit, and is used to be turned on under the control of a first control signal so as to charge the energy storage module through the positive current;

[0046] A second controllable switch having an output end connected to the negative current circuit and an input end connected to the energy storage module, and configured to be turned on under the control of a second control signal so as to discharge the energy storage module through a negative current;

[0047] The first controllable switch and the second controllable switch are both metal oxide semiconductor field effect transistors, the channel types of the first controllable switch and the second controllable switch are opposite, and the channel of the first controllable switch is connected to the channel of the second controllable switch.

[0048] Specifically, first, the embodiment of the present invention has a basic structure of a charge pump circuit, including a positive current circuit, a negative current circuit, a charging switch (a first controllable switch) and a discharging switch (a first controllable switch).

[0049] Specifically, considering the technical problems in the above background technology, and considering that (1) current can be generated between the channels of two MOS (Metal-Oxide-Semiconductor Field-Effect Transistor) tubes that are turned on at the same time through channel connection, and (2) the shunting effect of the channel current can reduce the on-current of the MOS tube, the embodiment of the present invention first selects "MOS tubes that conduct electricity through channels" as the charging switch and the discharging switch of the charge pump circuit, wherein the first controllable switch is used as the charging switch, and the second controllable switch is used as the discharging switch, both of which are MOS tubes; and the channel types of the first controllable switch and the second controllable switch are opposite, and the channel of the first controllable switch is connected to the channel of the second controllable switch. In this case, if the first controllable switch and the second controllable switch are turned on at the same time, then due to the "channel connection between the first controllable switch and the second controllable switch", the channel between the first controllable switch and the second controllable switch will be connected. A channel current is generated between the two controllable switches. Since the channel current will shunt the on-current of the “first controllable switch and the second controllable switch” themselves, the existence of the channel current will reduce the on-current of the “first controllable switch and the second controllable switch”. Since “the on-current of the first controllable switch is actually the charging current, and the on-current of the second controllable switch is actually the discharging current”, the charging current and the discharging current are reduced at the same time. Even if there is a deviation between the “charging current and the discharging current”, the net current of the “charging current and the discharging current” will be reduced due to the shunting effect of the channel current, thereby reducing the voltage fluctuation caused by the “simultaneous conduction of the first controllable switch and the second controllable switch” on the “energy storage module connected to the output end of the charge pump circuit”, thereby improving the controllability of the charge pump circuit.

[0050] Among them, the theoretical values ​​of positive current and negative current should be the same, but due to process errors and other reasons, there may be slight deviations between the two.

[0051] The present invention provides a charge pump circuit. Considering that (1) current can be generated between channels of two MOS transistors that are turned on at the same time by connecting through channels, and (2) the shunting effect of the channel current can reduce the on-current of the MOS transistor, the present invention controls the on-off of the positive current circuit by a first controllable switch (MOS transistor), and controls the on-off of the negative current circuit by a second controllable switch (MOS transistor), and the channels of the first controllable switch and the second controllable switch are connected. Therefore, during the period when the two controllable switches are turned on at the same time, a channel current will be generated between the channels of the two controllable switches, and the channel current will not act on the energy storage module. Even if the net current output by the charge pump (the sum of the on-current of the first controllable switch and the second controllable switch) is not zero at this time, the on-current of the first controllable switch and the second controllable switch can be reduced due to the shunting effect of the channel current, thereby reducing the net current output by the charge pump, that is, the voltage fluctuation generated by the energy storage module during the period when the two controllable switches are turned on at the same time is weakened, thereby improving the reliability of the charge pump.

[0052] Based on the above embodiment: as an optional embodiment, the first controllable switch is a P-channel metal oxide semiconductor field effect transistor, the source of the first controllable switch is used as the input end, the gate of the first controllable switch is used to receive the first control signal, and the drain of the first controllable switch is used as the output end;

[0053] The second controllable switch is an N-channel metal oxide semiconductor field effect transistor, the source of the second controllable switch serves as an output terminal, the gate of the second controllable switch is used to receive a second control signal, and the drain of the second controllable switch serves as an input terminal.

[0054] Specifically, due to its characteristics, the P-channel MOS tube is turned on when the gate voltage is at a low level, and is suitable for connecting to the power supply end, while the N-channel MOS tube is turned on when the gate voltage is at a high level, and is suitable for connecting to the ground section, which is beneficial to reducing the design difficulty of the MOS tube driving circuit. Therefore, the first controllable switch in the embodiment of the present invention can be a P-channel MOS tube, and the second controllable switch can be an N-channel MOS tube.

[0055] Of course, in addition to this specific form, the selection of the first controllable switch and the second controllable switch can also be opposite in theory, and the embodiment of the present invention is not limited here.

[0056] As an optional embodiment, the first controllable switch includes a substrate, a first metal, a first insulating layer, a second insulating layer, a second metal, a third metal, a first P-type semiconductor material, and a first N-type semiconductor material;

[0057] The second controllable switch includes a substrate, a second insulating layer, a third metal, a second P-type semiconductor material, a second N-type semiconductor material, a third insulating layer, a fourth metal and a fifth metal;

[0058] The first metal is connected to the first insulating layer and the first P-type semiconductor material respectively, the first insulating layer is connected to the second metal, the first P-type semiconductor material and the first N-type semiconductor material respectively, the first N-type semiconductor material is connected to the third metal, the second insulating layer and the first P-type semiconductor material respectively, the first P-type semiconductor material is connected to the second insulating layer and the second N-type semiconductor material respectively, the second insulating layer is connected to the third metal, the second P-type semiconductor material and the second N-type semiconductor material respectively, the third insulating layer is connected to the second P-type semiconductor material, the fourth metal, the fifth metal and the second N-type semiconductor material respectively, the second N-type semiconductor material is connected to the second P-type semiconductor material and the fifth metal respectively, and the substrate is connected to the first P-type semiconductor material, the second N-type semiconductor material and the fifth metal respectively;

[0059] Among them, the first metal serves as the source of the first controllable switch, the second metal serves as the gate of the first controllable switch, the third metal serves as the drain of both the first controllable switch and the second controllable switch, the fourth metal serves as the gate of the second controllable switch, the fifth metal serves as the source of the second controllable switch, the first P-type semiconductor material and the first N-type semiconductor material serve as the PN junction of the first controllable switch, and the second P-type semiconductor material and the second N-type semiconductor material serve as the PN junction of the second controllable switch.

[0060] To better illustrate the embodiments of the present invention, please refer to Figure 2 , Figure 2 A schematic diagram of a charging and discharging switch provided by the present invention includes a charging switch (a first controllable switch) and a discharging switch (a second controllable switch). Figure 2 It can be seen intuitively that the channel of the first controllable switch (i.e., the first P-type semiconductor material P1) and the channel of the second controllable switch (i.e., the second N-type semiconductor material N2) are connected together. Then, when the first controllable switch receives the first control signal UP from the gate (the second metal) and the second controllable switch receives the second control signal DN from the gate (the fourth metal), in addition to the on-current of the first controllable switch "flowing to the first metal-P1-N1 (the first N-type semiconductor material)-the third metal" and the on-current of the second controllable switch "flowing to the third metal-P2 (the second P-type semiconductor material)-N2-the fifth metal", a channel current flowing to the "first metal-P1-N2-the fifth metal" will also be generated (the channel current will not charge and discharge the energy storage module), thereby generating a shunt effect on the on-current through the channel current.

[0061] Specifically, when only the UP signal is valid, the P-channel MOS tube is in the on state, the first metal is used as the source, the second metal is used as the gate, and the third metal is used as the drain. P1 and N1 will form a PN junction, and the current will flow from the first metal through P1 and N1 to the third metal, charging the energy storage module; when only the DN signal is valid, the N-channel MOS tube is in the on state, the third metal is used as the drain, the fourth metal is used as the gate, and the fifth metal is used as the source. N2 and P2 will form a PN junction, and the current will flow from the third metal through P2 and N2 to the fifth metal, discharging the energy storage module.

[0062] Among them, the first metal to the fifth metal can be a variety of metals, for example, metals with good conductivity (gold, copper, silver or titanium, etc.), the substrate can be silicon, and each insulating layer can be silicon dioxide, hafnium dioxide or titanium dioxide, etc., which is not limited in this embodiment of the present invention.

[0063] Specifically, Figure 2 UP is the first control signal, DN is the second control signal, and Vctrl is the voltage of the energy storage module.

[0064] In order to reduce material cost, the gate metal of the first controllable switch and the gate metal of the second controllable switch may be shared, that is, both use the third metal as the gate metal.

[0065] Specifically, in order to reduce material cost, the substrate of the first controllable switch and the substrate of the second controllable switch may be the same.

[0066] Of course, in addition to this specific structure, the charge and discharge switch may also have other specific structures, which is not limited in the embodiment of the present invention.

[0067] As an optional embodiment, the first P-type semiconductor material, the first N-type semiconductor material, the second P-type semiconductor material and the second N-type semiconductor material are all two-dimensional semiconductor materials.

[0068] Specifically, the two-dimensional semiconductor material can be (intrinsic or doped) graphene, molybdenum disulfide, tungsten disulfide, molybdenum selenide or tungsten diselenide, etc., and the number of layers of the two-dimensional material can be between 1 and 15 layers to give full play to the excellent electrical properties of the two-dimensional material.

[0069] Specifically, when setting the PN junction and selecting the specific type of two-dimensional semiconductor material, there is no need for lattice matching, which can improve work efficiency. In addition, since the two-dimensional semiconductor material will undergo annealing treatment when preparing it, a good van der Waals interface is formed between the two two-dimensional semiconductor materials through annealing, which is beneficial to improving carrier mobility and carrier uniformity, and optimizing device performance.

[0070] Of course, in addition to two-dimensional semiconductor materials, semiconductor materials may also be of other types, which is not limited in the embodiments of the present invention.

[0071] As an optional embodiment, the contact area between the first P-type semiconductor material and the first N-type semiconductor material is a first preset area, the contact area between the second P-type semiconductor material and the second N-type semiconductor material is a second preset area, and the contact area between the first P-type semiconductor material and the second N-type semiconductor material is a third preset area;

[0072] The third preset area is larger than the first preset area and the second preset area.

[0073] Specifically, considering that the magnitude of the current generated on the PN junction is proportional to the contact area of ​​the two semiconductor materials in the PN junction, and in order to enhance the "shunting effect of the channel current on the on-current of the first controllable switch and the second controllable switch", in the embodiment of the present invention, the third preset area can be set to be larger than the first preset area and the second preset area, wherein the contact area between the first P-type semiconductor material and the first N-type semiconductor material is the first preset area, the contact area between the second P-type semiconductor material and the second N-type semiconductor material is the second preset area, and the contact area between the first P-type semiconductor material and the second N-type semiconductor material is the third preset area. Figure 2 It can also be seen in.

[0074] Of course, in addition to this specific form, the relationship between the contact areas of the semiconductor materials of the three PN junctions may also be in other forms, which are not limited in the embodiments of the present invention.

[0075] As an optional embodiment, the charge pump circuit further includes:

[0076] The current monitoring circuits connected to the positive current circuit and the negative current circuit respectively are used to monitor the first current value of the positive current and the second current value of the negative current respectively, and output the first current value and the second current value.

[0077] Specifically, considering that the consistency of positive current and negative current is a relatively important performance indicator of the charge pump circuit, in order to ensure the consistency of positive current and negative current, the embodiment of the present invention can monitor the positive current and negative current to prevent deviation between the positive current and the negative current.

[0078] In addition, it is worth mentioning that, considering that the current mirror may also fail in some cases, in order to ensure the reliability of the conduction current, in an embodiment of the present invention, a first current sensor may be arranged between the first controllable switch and the fourth controllable switch, and a second current sensor may be arranged between the second controllable switch and the sixth controllable switch. The first current sensor and the second current sensor may detect the current in the loop and output it, so that the controller compares (when the first controllable switch is turned on and the second controllable switch is not turned on) whether the current value of the first current sensor is consistent with the current value of the first current source, and compares (when the second controllable switch is turned on and the first controllable switch is not turned on) whether the current value of the second current sensor is suppressed by the current value of the second current source.

[0079] In addition, considering that the current value of the net current can directly reflect the voltage stability of the energy storage module, a third current sensor connected to the third metal can be provided in the embodiment of the present invention. The third current sensor can detect the current value of the third metal and output it. The controller can monitor the current value (that is, the net current) of the third metal (when the first controllable switch and the second controllable switch are both turned on), so as to analyze the fluctuation degree of the net current for the energy storage module, and can control the alarm to sound when "the first controllable switch and the second controllable switch are both turned on" and the current value of the third current sensor is greater than the preset current value, so that the staff can deal with the abnormal situation in time.

[0080] As an optional embodiment, the positive current circuit includes a first voltage source, a first current mirror and a first current source;

[0081] The negative current circuit includes a second current source, a second current mirror and a grounding device;

[0082] The first voltage source is connected to the input end of the first current mirror and the input end of the second current source respectively, the first output end of the first current mirror is connected to the input end of the first current source, the second output end of the first current mirror is connected to the input end of the first controllable switch, the output end of the first current source and the output end of the second current mirror are both connected to the grounding device, the output end of the second current source is connected to the first input end of the second current mirror, and the second input end of the second current mirror is connected to the output end of the second controllable switch;

[0083] The first voltage source is used to provide a positive voltage, the first current source and the second current source are both used to control the current in the loop to be a preset current value, the first current mirror is used to mirror the current in the first current mirror connected to the first output terminal to the second output terminal, and the second current mirror is used to mirror the current in the second current mirror connected to the first input terminal to the second input terminal.

[0084] Specifically, the current mirror can achieve high-precision current matching and has good current stability and temperature stability, which is beneficial to improving the accuracy of the charge pump circuit.

[0085] Specifically, the positive current circuit and the negative current circuit in the embodiment of the present invention have the advantages of simple structure and high precision.

[0086] Of course, in addition to this specific structure, the positive current circuit and the negative current circuit can also be of other types, which are not limited in the embodiment of the present invention.

[0087] As an optional embodiment, the first current mirror includes a third controllable switch and a fourth controllable switch, and the second current mirror includes a fifth controllable switch and a sixth controllable switch;

[0088] The third controllable switch and the fourth controllable switch are both P-channel metal oxide semiconductor field effect transistors, the source of the third controllable switch and the source of the fourth controllable switch are used together as the input end of the first current mirror, the gate of the third controllable switch is connected to the gate of the fourth controllable switch, the drain of the third controllable switch and the gate of the third controllable switch are used together as the first output end of the first current mirror, and the drain of the fourth controllable switch is used as the second output end of the first current mirror;

[0089] The fifth controllable switch and the sixth controllable switch are both N-channel metal oxide semiconductor field effect transistors, the source of the fifth controllable switch and the source of the sixth controllable switch serve together as the output end of the second current mirror, the gate of the fifth controllable switch is connected to the gate of the sixth controllable switch, the drain of the fifth controllable switch and the gate of the fifth controllable switch serve together as the first input end of the second current mirror, and the drain of the sixth controllable switch serves as the second input end of the second current mirror.

[0090] Specifically, to better illustrate the embodiments of the present invention, please refer to Figure 3 , Figure 3 Schematic diagram of another charge pump circuit provided by the present invention, in which M1 is a first controllable switch, M2 is a second controllable switch, M3 is a third controllable switch, M4 is a fourth controllable switch, M5 is a fifth controllable switch, and M6 is a sixth controllable switch. 1 is the first current source, I 2 is the second current source, I up is the charging current, I DN is the discharge current.

[0091] Specifically, the first current mirror is formed by two P-channel MOS transistors, and the second current mirror is formed by two N-channel MOS transistors, which has the advantages of simple structure and low cost.

[0092] Of course, in addition to this specific structure, the first current mirror and the second current mirror may also be of other types, which are not limited in the embodiment of the present invention.

[0093] As an optional embodiment, the first P-type semiconductor material is a P-type semiconductor material of a first preset type, the first N-type semiconductor material is an N-type semiconductor material of a second preset type, the second P-type semiconductor material is a P-type semiconductor material of a third preset type, and the second N-type semiconductor material is an N-type semiconductor material of a fourth preset type;

[0094] The third charge transfer speed is greater than the first charge transfer speed and the second charge transfer speed, respectively. The third charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material. The first charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the second preset type of N-type semiconductor material. The second charge transfer speed refers to: the charge transfer speed of the interface at the junction of the third preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material.

[0095] Specifically, considering that there are differences in charge transfer speeds at the interface of a PN junction composed of different types of semiconductor materials, the charge transfer speed is generally proportional to the numerical value of the current generated by the PN junction. Therefore, in order to further improve the shunting effect of the channel current, in an embodiment of the present invention, the third charge transfer speed (the charge transfer speed at the interface at the junction of the first preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material) can be set to be greater than the first charge transfer speed (the charge transfer speed at the interface at the junction of the first preset type of P-type semiconductor material and the second preset type of N-type semiconductor material) and the second charge transfer speed (the charge transfer speed at the interface at the junction of the third preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material).

[0096] Among them, the first P-type semiconductor material is a first preset type of P-type semiconductor material, the first N-type semiconductor material is a second preset type of N-type semiconductor material, the second P-type semiconductor material is a third preset type of P-type semiconductor material, and the second N-type semiconductor material is a fourth preset type of N-type semiconductor material.

[0097] Please refer to Figure 4 , Figure 4 A schematic diagram of the structure of a phase-locked loop provided by the present invention, the phase-locked loop includes a frequency detector, a low-pass filter, a voltage-controlled oscillator and a frequency divider, and also includes the charge pump circuit as above;

[0098] The charge pump circuit is connected to the phase frequency detector and the low-pass filter respectively, the voltage-controlled oscillator is connected to the low-pass filter and the frequency divider respectively, and the frequency divider is connected to the phase frequency detector.

[0099] Specifically, to better illustrate the embodiments of the present invention, please refer to Figure 4 , Figure 4 This is a schematic diagram of the structure of a phase-locked loop. A phase-locked loop (PLL) is a negative feedback control system that uses the voltage generated by phase synchronization to tune a voltage-controlled oscillator to generate a target frequency. According to the principle of automatic control, this is a typical feedback control circuit that uses an external reference signal to control the frequency and phase of the oscillation signal inside the loop to achieve automatic tracking of the output signal frequency to the input signal frequency. It is generally used in closed-loop tracking circuits. Figure 1 The overall block diagram of a phase-locked loop is given, including a phase frequency detector (PFD), a charge pump circuit (CP), a low-pass filter (LPF), a voltage-controlled oscillator (VCO), and a divider. The charge pump circuit is one of the basic components of the phase-locked loop. The charge pump circuit converts the pulse signals UP and DN generated by the phase frequency detector into a current signal Icp, and charges and discharges the capacitor in the low-pass filter under the action of the switch tube, thereby increasing or decreasing the voltage Vctrl on the capacitor, which plays an important role in the performance of the entire phase-locked loop; among them, CLK ref is the reference signal, CLK fed is the feedback signal.

[0100] For an introduction to the phase-locked loop provided in the embodiment of the present invention, please refer to the aforementioned embodiment of the charge pump circuit, and the embodiment of the present invention will not be described in detail here.

[0101] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same and similar parts between the embodiments can be referred to each other. It should also be noted that in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also other elements that are not explicitly listed, or also include elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the element.

[0102] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A charge pump circuit, characterized in that: include: A positive current circuit for generating a positive current; A negative current circuit for providing a negative current; The input end is connected to the positive current circuit, and the output end is connected to the energy storage module as the output end of the charge pump circuit, and is used to be turned on under the control of a first control signal so as to charge the energy storage module through the positive current; A second controllable switch having an output end connected to the negative current circuit and an input end connected to the energy storage module, and configured to be turned on under the control of a second control signal so as to discharge the energy storage module through a negative current; The first controllable switch and the second controllable switch are both metal oxide semiconductor field effect transistors, the channel types of the first controllable switch and the second controllable switch are opposite, and the channel of the first controllable switch is connected to the channel of the second controllable switch.

2. The charge pump circuit according to claim 1, characterized in that: The first controllable switch is a P-channel metal oxide semiconductor field effect transistor, the source of the first controllable switch is used as an input terminal, the gate of the first controllable switch is used to receive the first control signal, and the drain of the first controllable switch is used as an output terminal; The second controllable switch is an N-channel metal oxide semiconductor field effect transistor, the source of the second controllable switch serves as an output terminal, the gate of the second controllable switch is used to receive the second control signal, and the drain of the second controllable switch serves as an input terminal.

3. The charge pump circuit according to claim 2, characterized in that: The first controllable switch includes a substrate, a first metal, a first insulating layer, a second insulating layer, a second metal, a third metal, a first P-type semiconductor material, and a first N-type semiconductor material; The second controllable switch includes the substrate, the second insulating layer, the third metal, a second P-type semiconductor material, a second N-type semiconductor material, a third insulating layer, a fourth metal and a fifth metal; The first metal is connected to the first insulating layer and the first P-type semiconductor material respectively, the first insulating layer is connected to the second metal, the first P-type semiconductor material and the first N-type semiconductor material respectively, the first N-type semiconductor material is connected to the third metal, the second insulating layer and the first P-type semiconductor material respectively, the first P-type semiconductor material is connected to the second insulating layer and the second N-type semiconductor material respectively, the second insulating layer is connected to the third metal, the second P-type semiconductor material and the second N-type semiconductor material respectively, the third insulating layer is connected to the second P-type semiconductor material, the fourth metal, the fifth metal and the second N-type semiconductor material respectively, the second N-type semiconductor material is connected to the second P-type semiconductor material and the fifth metal respectively, and the substrate is connected to the first P-type semiconductor material, the second N-type semiconductor material and the fifth metal respectively; Among them, the first metal serves as the source of the first controllable switch, the second metal serves as the gate of the first controllable switch, the third metal serves as the drain of both the first controllable switch and the second controllable switch, the fourth metal serves as the gate of the second controllable switch, the fifth metal serves as the source of the second controllable switch, the first P-type semiconductor material and the first N-type semiconductor material serve as the PN junction of the first controllable switch, and the second P-type semiconductor material and the second N-type semiconductor material serve as the PN junction of the second controllable switch.

4. The charge pump circuit according to claim 3, characterized in that: The first P-type semiconductor material, the first N-type semiconductor material, the second P-type semiconductor material, and the second N-type semiconductor material are all two-dimensional semiconductor materials.

5. The charge pump circuit according to claim 3, characterized in that: The contact area between the first P-type semiconductor material and the first N-type semiconductor material is a first preset area, the contact area between the second P-type semiconductor material and the second N-type semiconductor material is a second preset area, and the contact area between the first P-type semiconductor material and the second N-type semiconductor material is a third preset area; Wherein, the third preset area is respectively larger than the first preset area and the second preset area.

6. The charge pump circuit according to claim 3, characterized in that: The charge pump circuit further includes: The current monitoring circuits connected to the positive current circuit and the negative current circuit respectively are used to monitor the first current value of the positive current and the second current value of the negative current respectively, and output the first current value and the second current value.

7. The charge pump circuit according to claim 3, characterized in that: The positive current circuit comprises a first voltage source, a first current mirror and a first current source; The negative current circuit includes a second current source, a second current mirror and a grounding device; The first voltage source is connected to an input end of the first current mirror and an input end of the second current source respectively, a first output end of the first current mirror is connected to an input end of the first current source, a second output end of the first current mirror is connected to an input end of the first controllable switch, an output end of the first current source and an output end of the second current mirror are both connected to the grounding device, an output end of the second current source is connected to a first input end of the second current mirror, and a second input end of the second current mirror is connected to an output end of the second controllable switch; The first voltage source is used to provide a positive voltage, the first current source and the second current source are both used to control the current in the loop to be a preset current value, the first current mirror is used to mirror the current in the first current mirror connected to the first output terminal to the second output terminal, and the second current mirror is used to mirror the current in the second current mirror connected to the first input terminal to the second input terminal.

8. The charge pump circuit according to claim 7, characterized in that: The first current mirror includes a third controllable switch and a fourth controllable switch, and the second current mirror includes a fifth controllable switch and a sixth controllable switch; The third controllable switch and the fourth controllable switch are both P-channel metal oxide semiconductor field effect transistors, the source of the third controllable switch and the source of the fourth controllable switch are used together as the input end of the first current mirror, the gate of the third controllable switch is connected to the gate of the fourth controllable switch, the drain of the third controllable switch and the gate of the third controllable switch are used together as the first output end of the first current mirror, and the drain of the fourth controllable switch is used as the second output end of the first current mirror; The fifth controllable switch and the sixth controllable switch are both N-channel metal oxide semiconductor field effect transistors, the source of the fifth controllable switch and the source of the sixth controllable switch serve together as the output end of the second current mirror, the gate of the fifth controllable switch is connected to the gate of the sixth controllable switch, the drain of the fifth controllable switch and the gate of the fifth controllable switch serve together as the first input end of the second current mirror, and the drain of the sixth controllable switch serves as the second input end of the second current mirror.

9. The charge pump circuit according to any one of claims 3 to 8, characterized in that: The first P-type semiconductor material is a P-type semiconductor material of a first preset type, the first N-type semiconductor material is an N-type semiconductor material of a second preset type, the second P-type semiconductor material is a P-type semiconductor material of a third preset type, and the second N-type semiconductor material is an N-type semiconductor material of a fourth preset type; The third charge transfer speed is respectively greater than the first charge transfer speed and the second charge transfer speed, the third charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material, the first charge transfer speed refers to: the charge transfer speed of the interface at the junction of the first preset type of P-type semiconductor material and the second preset type of N-type semiconductor material, and the second charge transfer speed refers to: the charge transfer speed of the interface at the junction of the third preset type of P-type semiconductor material and the fourth preset type of N-type semiconductor material.

10. A phase-locked loop, characterized in that: It comprises a frequency detector, a phase detector, a low-pass filter, a voltage-controlled oscillator and a frequency divider, and also comprises a charge pump circuit as claimed in any one of claims 1 to 9; The charge pump circuit is connected to the phase frequency detector and the low-pass filter respectively, the voltage-controlled oscillator is connected to the low-pass filter and the frequency divider respectively, and the frequency divider is connected to the phase frequency detector.