SiC MOS (Metal Oxide Semiconductor) device with high outflow capacity and preparation method
CN119208147APending Publication Date: 2024-12-27YANGZHOU YANGJIE ELECTRONIC TECH CO LTD
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Patent Information
- Application Number
- CN202411410368.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-10
- Publication Date
- 2024-12-27
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Figure CN119208147A_ABST
Abstract
The invention discloses a SiC MOS (Metal Oxide Semiconductor) device with high outflow capacity and a preparation method thereof. Relates to the technical field of semiconductors. Comprising the following steps: S100, forming a SiC Drift layer on the top surface of a SiC Sub layer, and sequentially forming a P-body region, an N + region with the doping concentration of 1E18-3E19cm <-2 >, an NP region and a PP region in the SiC Drift layer; the N + region is located in the middle of the SiC Drift layer, and the N + region and the P-body region are arranged at intervals; the NP region and the PP region are connected and are respectively located in the P-body region; s200, sequentially forming a gate oxide layer, a Poly layer and an isolation dielectric layer on the top surface of the SiC Drift layer; s300, forming ohmic contact alloy layers on the top surfaces of the NP region and the PP region; and S400, forming a front electrode metal layer at the uppermost part of the device through Ti and AlCu metal sputtering. According to the invention, the current path space in the JFET region is larger, so that the outflow capability of the device in the saturation region is stronger.
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