Light emitting diode epitaxial wafer and preparation method thereof, LED

Abstract

This invention relates to the field of optoelectronic technology, and discloses a light-emitting diode epitaxial wafer and its fabrication method, as well as an LED. The light-emitting diode epitaxial wafer includes a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed. The multiple quantum well layer includes sequentially alternating quantum well layers and quantum barrier layers, and the quantum barrier layer includes at least one set of sequentially stacked first GaN layer, AlN layer, InN layer, and second GaN layer. The light-emitting diode epitaxial wafer provided by this invention can improve wavelength uniformity and reduce wavelength blue shift.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and in particular to a light-emitting diode epitaxial wafer and its preparation method, and LEDs. Background Technology

[0002] LED chips are light-emitting semiconductor electronic components characterized by their small size, high brightness, and low power consumption, and are widely used in lighting and other fields. LED chips are obtained by splitting LED epitaxial wafers. An LED epitaxial wafer includes a substrate and a GaN epitaxial layer grown on the substrate.

[0003] Currently, sapphire, silicon, or silicon carbide are commonly used as substrates. As LEDs are applied in various fields, the requirements for chip performance also shift. For example, applications in the display field demand chip consistency, especially consistency under different current driving conditions. Because LED chips exhibit a blue shift in wavelength as the applied current increases, significant differences in chip design will result in varying degrees of blue shift, amplifying wavelength variations and ultimately affecting display quality due to color differences. Therefore, LED chip consistency is a crucial technical indicator, and since wavelength is determined by epitaxy, growing highly uniform epitaxial wafers is a critical technical challenge that urgently needs to be overcome. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an epitaxial wafer for a light-emitting diode that can improve wavelength uniformity and reduce the blue shift of wavelength.

[0005] The technical problem to be solved by the present invention is to provide a method for preparing an epitaxial wafer of a light-emitting diode, which has a simple process and can stably produce an epitaxial wafer of a light-emitting diode with good luminous efficiency.

[0006] To solve the above-mentioned technical problems, the present invention provides a light-emitting diode epitaxial wafer, including a substrate, wherein a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed on the substrate.

[0007] The multiple quantum well layer includes quantum well layers and quantum barrier layers stacked alternately in sequence, and the quantum barrier layer includes at least one set of first GaN layer, AlN layer, InN layer and second GaN layer stacked alternately in sequence.

[0008] In some embodiments, the quantum barrier layer includes 1 to 5 sets of sequentially stacked first GaN layers, AlN layers, InN layers, and second GaN layers.

[0009] In some embodiments, the thickness of the quantum barrier layer is 8 nm to 12 nm.

[0010] In some embodiments, the thickness of the first GaN layer is 0.1 nm to 5 nm.

[0011] In some embodiments, the thickness of the second GaN layer is 0.1 nm to 5 nm.

[0012] In some embodiments, the thickness of the AlN layer is 0.1 nm to 3 nm.

[0013] In some embodiments, the thickness of the InN layer is 0.1 nm to 3 nm.

[0014] In some embodiments, the quantum well layer is an InGaN layer.

[0015] To address the above problems, the present invention also provides a method for fabricating a light-emitting diode epitaxial wafer, comprising the following steps:

[0016] S1, Provide a substrate;

[0017] S2. A buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially deposited on the substrate.

[0018] The multiple quantum well layer includes quantum well layers and quantum barrier layers stacked alternately in sequence, and the quantum barrier layer includes at least one set of first GaN layer, AlN layer, InN layer and second GaN layer stacked alternately in sequence.

[0019] Accordingly, the present invention also provides an LED, the LED comprising a light-emitting diode epitaxial wafer as described above, or comprising a light-emitting diode epitaxial wafer prepared by the method for preparing a light-emitting diode epitaxial wafer as described above.

[0020] Implementing this invention has the following beneficial effects:

[0021] The LED epitaxial wafer provided by this invention utilizes a composite quantum barrier layer, which, compared to traditional single-layer quantum barrier layers, better releases stress and more effectively blocks electron overflow, thus improving current spread. Because Ga, Al, and In atoms have different diameters (Al atoms are the smallest, Ga atoms the largest), the GaN / AlN / InN / GaN stack can fill gaps and improve defect extension direction, releasing stress to some extent. This allows for a more uniform In composition distribution during subsequent quantum well layer growth. Furthermore, AlN has a higher potential barrier than InN, and the GaN / AlN / InN / GaN stack forms a stepped potential barrier. Electrons require more energy to overflow, thus better limiting current overflow and improving spread. These two effects improve the In composition distribution in the quantum well, reduce electron overflow, and improve current spread, thereby enhancing wavelength uniformity and reducing blue shift. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of the light-emitting diode epitaxial wafer provided by the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the invention, and should not be construed as limiting the invention. Furthermore, it should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0024] In the description of this invention, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0025] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0026] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0027] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0028] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0029] In this invention, "preferred" and "more preferred" are merely descriptions of better implementation methods or embodiments, and should be understood as not constituting a limitation on the scope of protection of this invention. In this invention, the technical features described in an open-ended manner include both closed-ended technical solutions composed of the listed features and open-ended technical solutions that include the listed features. In this invention, numerical ranges are involved; unless otherwise specified, they include the two endpoints of the numerical range.

[0030] To address the above problems, the present invention provides a light-emitting diode epitaxial wafer, such as... Figure 1 As shown, the substrate includes a substrate 100, on which a buffer layer 200, an undoped GaN layer 300, an N-type GaN layer 400, a stress relief layer 500, a multiple quantum well layer 600, an electron blocking layer 700, and a P-type GaN layer 800 are sequentially disposed.

[0031] The multi-quantum well layer 600 includes quantum well layers 610 and quantum barrier layers 620 stacked alternately in sequence. The quantum barrier layer 620 includes at least one set of first GaN layer 621, AlN layer 622, InN layer 623 and second GaN layer 624 stacked alternately in sequence.

[0032] The specific structure of the quantum barrier layer 620 provided by this invention is as follows:

[0033] In some embodiments, the multiple quantum well layer 600 includes 1 to 20 sets of sequentially stacked quantum well layers 610 and quantum barrier layers 620; the quantum well layer 610 is an InGaN layer; the quantum barrier layer 620 includes 1 to 5 sets of sequentially stacked first GaN layer 621, AlN layer 622, InN layer 623 and second GaN layer 624.

[0034] In some embodiments, the thickness of the quantum well layer 610 is 2nm to 5nm; exemplary thicknesses of the quantum well layer 610 are 2nm, 3nm, and 4nm, and are not limited to the above examples. The thickness of the quantum barrier layer 620 is 8nm to 12nm. Exemplary thicknesses of the quantum barrier layer 620 are 9nm, 10nm, and 11nm, and are not limited to the above examples.

[0035] In some embodiments, the thickness of the first GaN layer 621 is 0.1 nm to 5 nm; exemplary thicknesses of the first GaN layer 621 are 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, and are not limited to the above examples.

[0036] In some embodiments, the thickness of the AlN layer 622 is 0.1 nm to 3 nm; exemplary thicknesses of the AlN layer 622 are 0.5 nm, 1 nm, 1.5 nm, 2 nm, and 2.5 nm, and are not limited to the above examples.

[0037] In some embodiments, the thickness of the InN layer 623 is 0.1 nm to 3 nm; exemplary thicknesses of the InN layer 623 are 0.5 nm, 1 nm, 1.5 nm, 2 nm, and 2.5 nm, and are not limited to the above examples.

[0038] In some embodiments, the thickness of the second GaN layer 624 is 0.1 nm to 5 nm; exemplary thicknesses of the second GaN layer 624 are 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, and 4.5 nm, and are not limited to the above examples.

[0039] In the LED epitaxial wafer provided in the above embodiments, the composite quantum barrier layer, compared to the traditional single-layer quantum barrier layer, can better release stress and more effectively block electron overflow, thus improving current spread. Because Ga, Al, and In atoms have different diameters (Al atoms are the smallest and Ga atoms are the largest), the GaN / AlN / InN / GaN stack can fill gaps and improve defect extension direction, releasing stress to some extent. This allows for a more uniform In composition distribution during the subsequent growth of the quantum well layer. Furthermore, AlN has a higher potential barrier than InN, and the GaN / AlN / InN / GaN stack can form a stepped potential barrier. Electrons need more energy to overflow, thus better limiting current overflow and improving spread. These two effects improve the In composition distribution in the quantum well, reduce electron overflow, and improve current spread, thereby enhancing wavelength uniformity and reducing blue shift.

[0040] Accordingly, the present invention provides a method for fabricating a light-emitting diode epitaxial wafer, comprising the following steps:

[0041] S1. Provide substrate 100;

[0042] In some embodiments, the substrate 100 may be selected from one of the following: sapphire substrate, SiO2-sapphire composite substrate, silicon substrate, silicon carbide substrate, gallium nitride substrate, and zinc oxide substrate. Preferably, the substrate 100 is a sapphire substrate. Sapphire is a commonly used GaN-based LED substrate material. Sapphire substrates have mature manufacturing processes, low prices, are easy to clean and process, and have good stability at high temperatures.

[0043] S2. A buffer layer 200, an undoped GaN layer 300, an N-type GaN layer 400, a stress relief layer 500, a multiple quantum well layer 600, an electron blocking layer 700, and a P-type GaN layer 800 are sequentially deposited on the substrate 100.

[0044] The multi-quantum well layer 600 includes quantum well layers 610 and quantum barrier layers 620 stacked alternately in sequence. The quantum barrier layer 620 includes at least one set of first GaN layer 621, AlN layer 622, InN layer 623 and second GaN layer 624 stacked alternately in sequence.

[0045] Specifically, step S2 above includes the following steps:

[0046] S21. Deposit the buffer layer 200 on the substrate 100.

[0047] In some embodiments, the buffer layer 200 is an AlN buffer layer.

[0048] S22. Deposit the undoped GaN layer 300 on the buffer layer 200.

[0049] In some embodiments, the temperature of the reaction chamber is controlled at 1050°C to 1200°C, the pressure is controlled at 100 torr to 600 torr, and an N source and a Ga source are introduced to grow an undoped GaN layer with a thickness of 1 μm to 5 μm.

[0050] S23. Deposit the N-type GaN layer 400 on the undoped GaN layer 300.

[0051] In some embodiments, the temperature of the reaction chamber is controlled at 1050°C to 1200°C, the pressure is controlled at 100 torr to 600 torr, and an N source, a Ga source, and a Si source are introduced to grow the N-type GaN layer.

[0052] S24. Deposit the stress relief layer 500 on the N-type GaN layer 400.

[0053] In some embodiments, the temperature of the reaction chamber is controlled at 700°C to 900°C, the pressure is controlled at 50 torr to 600 torr, and N source, Ga source, and In source are introduced to grow a periodic structure in which InGaN layer and GaN layer are grown alternately as a stress relief layer.

[0054] S25. Deposit the multi-quantum well layer 600 on the stress relief layer 500.

[0055] In some embodiments, the growth temperature is 850℃~950℃, the growth pressure is 100 torr~300 torr, the MO source is TEGa, TMIn, and TMAl, and the gas introduced for growing the GaN layer is N2, H2, and NH3. NH3 is used as the reactant gas, N2 as the carrier gas, and H2 as the reducing gas to improve crystal quality. For growing the AlN and InN layers, the gas introduced is N2 and NH3, and H2 needs to be turned off. This is because TMAl and TMIn undergo strong pre-reactions in an H2 atmosphere, causing Al and In atoms to decompose and be carried away before they can combine with N atoms, preventing the formation of AlN and InN layers.

[0056] S26. Deposit the electron blocking layer 700 on the multi-quantum well layer 600;

[0057] In some embodiments, the temperature of the reaction chamber is controlled at 900°C to 1000°C, the pressure is controlled at 100 torr to 300 torr, and N source, Al source, Ga source, and In source are introduced to grow an AlInGaN electron blocking layer with a thickness of 10 nm to 40 nm.

[0058] S27. Deposit the P-type GaN layer 800 on the electron blocking layer 700.

[0059] In some embodiments, the temperature of the reaction chamber is controlled at 900°C to 1050°C, the pressure is controlled at 100 torr to 600 torr, and an N source, a Mg source, and a Ga source are introduced to grow the P-type GaN layer.

[0060] Accordingly, the present invention also provides an LED comprising the aforementioned light-emitting diode epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other electrical properties are also excellent.

[0061] The present invention is further illustrated below with specific embodiments:

[0062] Example 1

[0063] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0064] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises a set of sequentially stacked first GaN layer, AlN layer, InN layer, and second GaN layer. The thickness of the first GaN layer is 4 nm, the thickness of the second GaN layer is 4 nm, the thickness of the AlN layer is 1 nm, the thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0065] Example 2

[0066] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0067] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises two sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 1 nm, the total thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0068] Example 3

[0069] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0070] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 1 nm, the total thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0071] Example 4

[0072] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0073] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises four sets of sequentially stacked first GaN layers, AlN layers, InN layers, and second GaN layers. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 1 nm, the total thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0074] Example 5

[0075] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0076] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises five sets of sequentially stacked first GaN layers, AlN layers, InN layers, and second GaN layers. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 1 nm, the total thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0077] Example 6

[0078] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0079] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 0.5 nm, the total thickness of the InN layer is 1.5 nm, and the quantum well layer is an InGaN layer.

[0080] Example 7

[0081] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0082] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 4 nm, the total thickness of the second GaN layer is 4 nm, the total thickness of the AlN layer is 1.5 nm, the total thickness of the InN layer is 0.5 nm, and the quantum well layer is an InGaN layer.

[0083] Example 8

[0084] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0085] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 3 nm, the total thickness of the second GaN layer is 3 nm, the total thickness of the AlN layer is 2 nm, the total thickness of the InN layer is 2 nm, and the quantum well layer is an InGaN layer.

[0086] Example 9

[0087] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0088] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 3 nm, the total thickness of the second GaN layer is 3 nm, the total thickness of the AlN layer is 1 nm, the total thickness of the InN layer is 3 nm, and the quantum well layer is an InGaN layer.

[0089] Example 10

[0090] This embodiment provides a light-emitting diode epitaxial wafer, including a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially disposed;

[0091] The multiple quantum well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises three sets of alternating layers: a first GaN layer, an AlN layer, an InN layer, and a second GaN layer. The total thickness of the first GaN layer is 3 nm, the total thickness of the second GaN layer is 3 nm, the total thickness of the AlN layer is 3 nm, the total thickness of the InN layer is 1 nm, and the quantum well layer is an InGaN layer.

[0092] Comparative Example 1

[0093] This comparative example provides a light-emitting diode epitaxial wafer, which differs from the rest of Example 1 in that its quantum barrier layer is a GaN layer with a thickness of 10 nm, and the rest is the same as Example 1.

[0094] The light-emitting diode epitaxial wafers prepared in Example 10 and Comparative Example 1 were fabricated into 5mil×8mil chips using the same chip process conditions. 300 LED chips were sampled from each chip and tested at a current of 20mA. The blue shift value was a wavelength difference of 20mA-1mA. The specific test results are shown in Table 1.

[0095] Table 1. Performance test results of the LEDs prepared in Example 10 and Comparative Example 1

[0096]

[0097]

[0098] In the test results, the smaller the STD value and the blue shift value, the better the consistency. As can be seen from the above results, the LED epitaxial wafer provided by the present invention can improve wavelength consistency and reduce wavelength blue shift.

[0099] In the description of this specification, the references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0100] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light-emitting diode epitaxial wafer, characterized in that, The substrate includes a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer, which are sequentially disposed on the substrate. The multi-quantum-well layer comprises alternating layers of quantum wells and quantum barrier layers. The quantum barrier layer comprises at least one set of sequentially stacked first GaN layer, AlN layer, InN layer, and second GaN layer. Since Ga, Al, and In atoms have different diameters, with Al atoms being the smallest and Ga atoms being the largest, the GaN / AlN / InN / GaN stack can fill gaps and improve the defect extension direction. AlN has a higher potential barrier, while InN has a lower potential barrier, and the GaN / AlN / InN / GaN stack can form a stepped potential barrier.

2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The quantum barrier layer comprises 1 to 5 sets of sequentially stacked first GaN layer, AlN layer, InN layer and second GaN layer.

3. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the quantum barrier layer is 8nm~12nm.

4. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the first GaN layer is 0.1 nm to 5 nm.

5. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the second GaN layer is 0.1 nm to 5 nm.

6. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the AlN layer is 0.1 nm to 3 nm.

7. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The thickness of the InN layer is 0.1 nm to 3 nm.

8. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The quantum well layer is an InGaN layer.

9. A method for fabricating a light-emitting diode epitaxial wafer as described in any one of claims 1 to 8, characterized in that, The following steps are involved: S1, Provide a substrate; S2. A buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially deposited on the substrate. The multiple quantum well layer includes quantum well layers and quantum barrier layers stacked alternately in sequence, and the quantum barrier layer includes at least one set of first GaN layer, AlN layer, InN layer and second GaN layer stacked alternately in sequence; The growth temperature of the multi-quantum well layer is 850℃~950℃, the growth pressure is 100 torr~300 torr, and the MO source is TEGa, TMI, and TMI. The gas introduced for growing the GaN layer is N2, H2, and NH3. NH3 is used as the reactant gas, N2 is used as the carrier gas, and H2 is used as the reducing gas to improve the crystal quality. The gas introduced for growing the AlN and InN layers is N2 and NH3, and H2 needs to be turned off.

10. An LED, characterized in that, The LED includes a light-emitting diode epitaxial wafer as described in any one of claims 1 to 8, or a light-emitting diode epitaxial wafer prepared by the method for preparing a light-emitting diode epitaxial wafer as described in claim 9.

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