A new semiconductor test probe packaging process

Abstract

The present invention provides a novel semiconductor test probe packaging process, comprising: cleaning a first intermediate product; filling a glue layer on the top surface of the first intermediate product; bonding a glass plate on the top surface of the glue layer to obtain a second intermediate product; flipping the second intermediate product; coating a photoresist layer on the top surface of a silicon substrate, photoetching and developing a preset position of the photoresist layer to form a metal column etching position; etching the silicon substrate and the metal layer directly below the metal column etching position to form a metal column growth position; growing a metal column at the metal column growth position by an electroplating method; removing the photoresist layer and then cleaning to obtain a third intermediate product; flipping the third intermediate product; removing the glass plate and the glue layer; bonding the metal column to a ceramic substrate; etching the metal layer. The novel semiconductor test probe packaging process provided by the present invention simplifies the process flow and improves production capacity.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a novel semiconductor test probe packaging process. Background Art

[0002] A probe card is a key device used for electronic testing and analysis. It consists of multiple probes that can test and analyze the electrical performance of a circuit or device by contacting the contact points of the circuit or device to be tested. Probe cards are widely used in the research and development and manufacturing of integrated circuits, PCB circuits, new electronic devices, and other fields.

[0003] MEMS probe card is a new type of probe card manufactured using micro-electromechanical system (MEMS) technology. It has the following main features: (1) Ultra-high probe density. MEMS probes use micromachining technology to integrate more than 100k needles in a probe card to meet the testing needs of electronic devices; (2) Excellent contact performance. The MEMS probe tip has a fine shape and the tip diameter can be as small as a few microns. Within a tiny contact area, the MEMS probe can provide stable and reliable contact force and electrical contact, greatly improving the test accuracy; (3) Integrated manufacturing. The entire MEMS probe array can be manufactured using batch micromachining, which improves the consistency and reliability of the probe array; (4) Tiny size.

[0004] The specific process of the current mainstream probe packaging method is: first use dry etching to remove the silicon substrate around the probe, then go through multiple coating, photolithography, development, wet etching, electrochemical plating and chemical grinding on the existing ceramic substrate to obtain a metal column that can be connected to the probe, then use a bonding process to bond the probe and the ceramic substrate together, and finally use wet etching to remove the remaining silicon substrate and the metal in the silicon substrate to complete the probe packaging. However, the existing probe packaging method has multiple coating, photolithography, and development steps, with many process flows and low production capacity. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a novel semiconductor test probe packaging process, simplify the process flow and improve the production capacity.

[0006] In order to solve the above technical problems, an embodiment of the present invention provides a novel semiconductor test probe packaging process, comprising the following steps:

[0007] Step 1, cleaning the first intermediate product; the first intermediate product includes a silicon substrate, a metal layer covering the top surface of the silicon substrate, and a probe formed on the top surface of the metal layer;

[0008] Step 2, filling a glue layer on the top surface of the first intermediate product;

[0009] Step 3, bonding a glass plate on the top surface of the glue layer to obtain a second intermediate product;

[0010] Step 4, turning over the second intermediate product so that the silicon substrate is located at the top of the second intermediate product;

[0011] Step 5, coating a photoresist layer on the top surface of the silicon substrate, photolithography and developing a preset position of the photoresist layer to form a metal column etching position;

[0012] Step 6, etching the silicon substrate directly below the metal column etching position;

[0013] Step 7, etching the metal layer directly below the metal column etching position to form a metal column growth position;

[0014] Step 8, growing a metal column at the metal column growth position by using an electroplating method;

[0015] Step 9, removing the photoresist layer and then washing to obtain a third intermediate product;

[0016] Step 10, turning over the third intermediate product so that the glass plate is located on the top of the third intermediate product;

[0017] Step 11, removing the glass plate;

[0018] Step 12, remove the glue layer;

[0019] Step 13, bonding the metal pillar to the ceramic substrate;

[0020] Step 14, etching the metal layer.

[0021] As a further improvement of the embodiment of the present invention, in step 2, the top surface height of the glue layer is consistent.

[0022] As a further improvement of the embodiment of the present invention, in step 5, the metal column etching position is located directly above the probe.

[0023] As a further improvement of the embodiment of the present invention, in step 8, the top surface of the metal column is higher than the top surface of the silicon substrate.

[0024] As a further improvement of the embodiment of the present invention, in step 6, the silicon substrate directly below the metal column etching position is dry-etched.

[0025] As a further improvement of the embodiment of the present invention, in step 7, the metal layer directly below the metal column etching position is wet etched.

[0026] As a further improvement of the embodiment of the present invention, in step 14, the metal layer is wet-etched.

[0027] As a further improvement of the embodiment of the present invention, in step 5, the bottom surface of the metal column etching position is the top surface of the silicon substrate, and the surrounding area of ​​the metal column etching position is the photoresist layer.

[0028] As a further improvement of the embodiment of the present invention, in step 7, the bottom surface of the metal column growth position is the top surface of the probe, and the surroundings of the metal column growth position are the metal layer, the silicon substrate and the photoresist layer from bottom to top.

[0029] As a further improvement of the embodiment of the present invention, in step 12, the glue layer is removed by wet etching.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] A novel semiconductor test probe packaging process provided by an embodiment of the present invention manufactures a metal column connected to the probe on a silicon substrate, then bonds the metal column to the ceramic substrate through a bonding process, and finally removes the silicon substrate to complete the probe packaging. Compared with the existing method for manufacturing a metal column on a ceramic substrate, the process flow of the present invention has only one step of gluing, photolithography, and development, eliminating multiple steps of gluing, photolithography, and development, and only one step of electrochemical plating, eliminating multiple steps of electrochemical plating, and also eliminating the chemical grinding step, simplifying the process flow and improving production capacity. The process flow of the present invention manufactures a metal column on a silicon substrate, and only performs one step of gluing, photolithography, and development on the silicon substrate, while the existing method manufactures a metal column on a ceramic substrate, and performs multiple steps of gluing, photolithography, and development on the ceramic substrate. Compared with the existing method, the process flow of the present invention reduces the number of photolithography machines used for ceramic substrates, saves costs, and at the same time breaks through the limitation of the photolithography machine production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 The figure is a flow chart of a novel semiconductor test probe packaging process according to an embodiment of the present invention.

[0033] The figure includes: silicon substrate 1, metal layer 2, probe 3, glue layer 4, glass plate 5, photoresist layer 6, metal column etching position 61, metal column growth position 23, metal column 7, and ceramic substrate 8. DETAILED DESCRIPTION

[0034] The technical solution of the present invention is described in detail below with reference to the accompanying drawings.

[0035] The embodiment of the present invention provides a novel semiconductor test probe packaging process, such as Figure 1 As shown, the following steps are included:

[0036] Step 1, cleaning the first intermediate product. The first intermediate product comprises a silicon substrate 1, a metal layer 2 covering the top surface of the silicon substrate 1, and a probe 3 formed on the metal layer 2. The metal layer 2 is relatively thin.

[0037] Step 2: Fill the top surface of the first intermediate product with a glue layer 4. The glue layer 4 covers the probe 3 and the metal layer 2. Preferably, the top surface of the glue layer 4 has a uniform height, that is, the top surface of the glue layer 4 is horizontal.

[0038] Step 3: bonding a glass plate 5 to the top surface of the glue layer 4 to obtain a second intermediate product.

[0039] Step 4: flip the second intermediate product over so that the probe 3 is located below the silicon substrate 1. After flipping, the side of the silicon substrate 1 that is not covered with the metal layer becomes the top surface of the silicon substrate.

[0040] Step 5: coating a photoresist layer 6 on the top surface of the silicon substrate 1 , photolithography and developing are performed on a preset position of the photoresist layer 6 to form a metal column etching position 61 .

[0041] The metal column etching position 61 is located directly above the probe 3. The bottom surface of the metal column etching position 61 is the top surface of the silicon substrate 1, and the metal column etching position 61 is surrounded by the photoresist layer 6.

[0042] Step 6, etching the silicon substrate 1 directly below the metal column etching position 61.

[0043] Preferably, the silicon substrate 1 directly below the metal column etching position 61 is dry-etched.

[0044] Due to the existence of the photoresist layer 6 , only the silicon substrate 1 directly below the metal column etching position 61 is etched during etching.

[0045] Step 7, etching the metal layer 2 directly below the metal column etching position 61 to form a metal column growth position 23.

[0046] Preferably, the metal layer 2 directly below the metal column etching position 61 is wet etched.

[0047] The bottom surface of the metal column growth position 23 is the top surface of the probe, and the surroundings of the metal column growth position 23 are the metal layer 2, the silicon substrate 1 and the photoresist layer 6 from bottom to top.

[0048] Step 8: grow a metal column 7 at the metal column growth position 23 by electroplating. The top surface of the metal column 7 is higher than the top surface of the silicon substrate 1.

[0049] Due to the presence of the photoresist layer 6 , the metal pillars 7 are grown only at the metal pillar growth positions 23 during electroplating.

[0050] Step 9, removing the photoresist layer 6 and then cleaning to obtain a third intermediate product.

[0051] In the above steps 3 and 4, the top surface of the first intermediate product is filled with a glue layer 4 and bonded with a glass plate 5, which serves as a support structure for the probe after flipping in step 5. The top surface of the glue layer 4 is horizontal before flipping, and the top surface of the glass plate is also horizontal. Then, the bottom surface of the glass plate is horizontal after flipping, so that the top surface of the silicon substrate is horizontal after flipping, which facilitates the dry etching of the silicon substrate 1 directly below the metal column etching position 61 in step 6.

[0052] Step 10, flip the third intermediate product so that the probe 3 is located above the silicon substrate 1. After flipping, the surface of the metal column opposite to the surface connected to the probe becomes the bottom surface of the metal column.

[0053] Step 11, removing the glass plate 5.

[0054] Step 12, remove the glue layer 4.

[0055] Step 13 , bonding the bottom surface of the metal pillar 7 to the top surface of the metal layer on the top surface of the ceramic substrate 8 .

[0056] Step 14, etching the metal layer 2. After the metal layer 2 is completely etched away, the silicon substrate 1 automatically falls off.

[0057] Preferably, the metal layer 2 is wet etched.

[0058] The novel semiconductor test probe packaging process of the embodiment of the present invention manufactures a metal column connected to the probe on a silicon substrate, then bonds the metal column to the ceramic substrate through a bonding process, and finally removes the silicon substrate to complete the probe packaging. Compared with the existing method of manufacturing a metal column on a ceramic substrate, the process flow of the present invention has only one step of glue coating, photolithography, and development, eliminating multiple steps of glue coating, photolithography, and development, and only one step of electrochemical plating, eliminating multiple steps of electrochemical plating, and also eliminating the chemical grinding step, thereby simplifying the process flow and improving production capacity.

[0059] The novel semiconductor test probe packaging process of the embodiment of the present invention manufactures metal pillars on a silicon substrate, and only performs one process of glue coating, photolithography, and development on the silicon substrate, while the existing method manufactures metal pillars on a ceramic substrate, and performs multiple processes of glue coating, photolithography, and development on the ceramic substrate. Compared with the existing method, the process flow of the present invention reduces the number of photolithography machines used for ceramic substrates, saving costs; at the same time, it eliminates multiple processes of glue coating, photolithography, and development, breaking through the limitation of the production capacity of the photolithography machine.

[0060] In the novel semiconductor test probe packaging process of the embodiment of the present invention, a metal layer is provided between the silicon substrate of the first intermediate product and the probe, and step 14 only etches the metal layer. When the metal layer is completely etched away, the silicon substrate automatically falls off, and there is no need to etch the silicon substrate. The thinner metal layer is easier to etch than the silicon substrate, thereby simplifying the process and improving production capacity.

[0061] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A novel semiconductor test probe packaging process, characterized in that: The following steps are involved: Step 1, cleaning a first intermediate product; the first intermediate product comprises a silicon substrate (1), a metal layer (2) covering the top surface of the silicon substrate (1), and a probe (3) formed on the top surface of the metal layer (2); Step 2, filling a glue layer (4) on the top surface of the first intermediate product; Step 3, bonding a glass plate (5) on the top surface of the glue layer (4) to obtain a second intermediate product; Step 4, turning over the second intermediate product so that the silicon substrate (1) is located at the top of the second intermediate product; Step 5, coating a photoresist layer (6) on the top surface of the silicon substrate (1), performing photolithography and development on a preset position of the photoresist layer (6), and forming a metal column etching position (61); Step 6, etching the silicon substrate (1) directly below the metal column etching position (61); Step 7, etching the metal layer (2) directly below the metal column etching position (61) to form a metal column growth position (23); Step 8, growing a metal column (7) at the metal column growth position (23) by using an electroplating method; Step 9, removing the photoresist layer (6) and then washing to obtain a third intermediate product; Step 10, turning over the third intermediate product so that the glass plate (5) is located at the top of the third intermediate product; Step 11, removing the glass plate (5); Step 12, removing the glue layer (4); Step 13, bonding the metal pillar (7) to the ceramic substrate (8); Step 14, etching the metal layer (2).

2. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 2, the top surface height of the glue layer (4) is consistent.

3. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 5, the metal column etching position (61) is located directly above the probe.

4. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 8, the top surface of the metal pillar (7) is higher than the top surface of the silicon substrate (1).

5. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In the step 6, dry etching is performed on the silicon substrate (1) directly below the metal column etching position (61).

6. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 7, the metal layer (2) directly below the metal column etching position (61) is wet etched.

7. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 14, the metal layer (2) is wet etched.

8. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In the step 5, the bottom surface of the metal column etching position (61) is the top surface of the silicon substrate (1), and the surrounding area of ​​the metal column etching position (61) is the photoresist layer (6).

9. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 7, the bottom surface of the metal column growth position (23) is the top surface of the probe, and the surrounding areas of the metal column growth position (23) are, from bottom to top, the metal layer (2), the silicon substrate (1) and the photoresist layer (6).

10. The novel semiconductor test probe packaging process according to claim 1, characterized in that: In step 12, the glue layer (4) is removed by wet etching.

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