A pixel driving circuit, a display panel and a display device

Abstract

This invention discloses a pixel driving circuit, a display panel, and a display device. The pixel driving circuit includes a pulse amplitude modulation (PAM) module and a pulse width modulation (PWM) module. The PAM module includes a first driving unit and a first light-emitting control unit, which is electrically connected to a first enable signal terminal. The PWM module includes a control unit, which is electrically connected to the PAM module. The control unit is also electrically connected to the first enable signal terminal. By modulating the structure of the pixel driving circuit, this invention avoids the coupling effect of the PAM module's signal on the PWM module, prevents the brightness of the light-emitting element from shifting, and improves the display effect.

Description

Technical Field

[0001] The present invention relates to display technology, and more particularly to a pixel driving circuit, a display panel, and a display device. Background Technology

[0002] With the development of display technology, the application of display panels is becoming more and more widespread, and users have increasingly higher requirements for the display quality of display panels. In order to meet the driving requirements of high-resolution display panels such as Micro LED or Organic Light Emitting Diode (OLED) panels, existing technologies widely use driving circuits that combine Pulse Amplitude Modulation (PAM) and Pulse Width Modulation (PWM) to control the intensity and duration of the driving current in order to control the light-emitting state of the light-emitting element.

[0003] However, the driving circuit that uses a combination of pulse amplitude modulation (PAM) and pulse width modulation (PWM) may cause a shift in the brightness of the light-emitting element due to the coupling effect of the PAM module's signal on the PWM module, thus affecting the display effect. Summary of the Invention

[0004] This invention provides a pixel driving circuit, a display panel, and a display device. By modulating the structure of the pixel driving circuit, the coupling effect of the PAM module signal on the PWM module is avoided, thus preventing the brightness of the light-emitting element from shifting and improving the display effect.

[0005] In a first aspect, embodiments of the present invention provide a pixel driving circuit, including a pulse amplitude modulation module and a pulse width modulation module;

[0006] The pulse amplitude modulation module includes a first driving unit and a first light-emitting control unit, wherein the control terminal of the first light-emitting control unit is electrically connected to the first enable signal terminal.

[0007] The pulse width modulation module includes a control unit, which is electrically connected to the pulse amplitude modulation module; wherein the control unit is electrically connected to a first enable signal terminal.

[0008] Secondly, embodiments of the present invention also provide a display panel, including the pixel driving circuit described in the first aspect.

[0009] Thirdly, embodiments of the present invention also provide a display device, including the display panel described in the second aspect.

[0010] The pixel driving circuit provided in this embodiment of the invention includes a pulse amplitude modulation module and a pulse width modulation module. The pulse amplitude modulation module includes a first driving unit and a first light-emitting control unit, the first light-emitting control unit being electrically connected to a first enable signal terminal. The pulse width modulation module includes a control unit, which is electrically connected to the pulse amplitude modulation module; wherein the control unit is electrically connected to the first enable signal terminal. By setting a control unit between the pulse width modulation module and the pulse amplitude modulation module, and having the control unit turn on or off under the control of the first enable signal terminal, the signal from the pulse width modulation module can be prevented from being prematurely input to the pulse amplitude modulation module, thereby avoiding the influence of signal coupling on the pulse amplitude modulation module and improving the display effect. Attached Figure Description

[0011] Figure 1 A schematic diagram of a pixel driving circuit designed by the inventor during the research process;

[0012] Figure 2 Figure 1 The diagram shown is a simulation result of a portion of the signals when the pixel driving circuit is in operation.

[0013] Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention;

[0014] Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0015] Figure 5 for Figure 4 The diagram shows a simulation result of some signals when the pixel driving circuit is working.

[0016] Figure 6 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0017] Figure 7 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0018] Figure 8 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0019] Figure 9 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0020] Figure 10 This is a timing diagram of the driving signals of a pixel driving circuit provided in an embodiment of the present invention;

[0021] Figure 11This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention;

[0022] Figure 12 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0023] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0024] The terminology used in the embodiments of this invention is for the purpose of describing specific embodiments only and is not intended to limit the invention. It should be noted that directional terms such as "upper," "lower," "left," and "right" described in the embodiments of this invention are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this invention. Furthermore, in the context, it should be understood that when referring to an element being formed "upper" or "lower" of another element, it can be formed not only directly "upper" or "lower" of the other element, but also indirectly "upper" or "lower" of the other element through an intermediate element. The terms "first," "second," etc., are used for descriptive purposes only and do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0025] Figure 1 This is a schematic diagram of a pixel driving circuit designed by the inventor during the research process, for reference. Figure 1 The pixel driving circuit includes a PAM module 1 and a PWM module 2. The PAM module 1 includes a PAM driving unit 101, which includes a transistor M1'. The first terminal of transistor M1' is electrically connected to the voltage terminal PVDD, the control terminal of transistor M1' is electrically connected to node N1', and the second terminal of transistor M1' is electrically connected to the first terminal of the light-emitting element 3. The second terminal of the light-emitting element 3 is electrically connected to the voltage terminal PVEE. The PAM module 1 operates at the corresponding scan signal terminal (…). Figure 1 The scan signal and enable signal terminal (not shown) provided by the scan signal and enable signal terminal (not shown) Figure 1The PWM module 2 operates under the control of an enable signal provided by (not shown). It includes a PAM drive unit 201, a PAM light-emitting control unit 202, and a storage unit 203. The PAM drive unit 201 includes a transistor M2', the PAM light-emitting control unit 202 includes a transistor M3', and the storage unit 203 includes a capacitor C1'. The first terminal of transistor M2' is connected to the voltage terminal PVDD, the control terminal of transistor M2' is electrically connected to node Q1', the second terminal of transistor M2' (node ​​Q2') is electrically connected to the first terminal of transistor M3', the control terminal of transistor M2' is electrically connected to the enable signal terminal, the control terminal of transistor M3' is electrically connected to the enable signal terminal PWM_EM, the second terminal of transistor M3' is electrically connected to node N1', the first terminal of capacitor C1' is electrically connected to node Q1', and the second terminal of capacitor C1' is electrically connected to the scan signal terminal SWEEP. The PWM module 2 operates under the control of the corresponding scan signal terminal (PVDD). Figure 1 The pixel drive circuit operates under the control of the scanning signal (not shown) and the enable signal PWM_EMIT provided by the PWM_EM terminal. This pixel drive circuit can achieve pixel-level dimming, and can also keep the light-emitting element operating at a relatively efficient current or voltage (provided by PAM module 1), adjusting the brightness by only controlling the light emission time (adjusting the duty cycle by PWM module 2). Figure 2 for Figure 1 The diagram shown illustrates the simulation results of some signals during the operation of the pixel driving circuit. (Refer to...) Figure 2 The inventors discovered during their research that after the PAM and PWM modules complete their write operations, nodes N1′ and Q1′ remain at a stable value. When the enable signal PWM_EM of PWM module 2 is turned on, M2′ is also turned on, connecting nodes N1′ and Q2′. Although the holding capacitance of node N1′ is relatively large and the parasitic capacitance of node Q2′ is relatively small, the voltage of node N1′ is written into Q2′. However, node N1′ is also slightly affected by the voltage of Q2′, resulting in a slight voltage spike. This spike causes the voltage of node N1′ to fluctuate, leading to a lower actual light emission brightness and an abnormally dim lighting effect when the light-emitting element is actually lit. Furthermore, the inventors' experiments confirmed that this problem cannot be solved by changing the timing. Even if the enable signal of PAM module 1 is turned on first, followed by the enable signal PWM_EM of PWM module 2, node N1′ will still fluctuate abnormally due to the influence of Q2′.

[0026] To address the aforementioned problems, this invention provides a pixel driving circuit, including a pulse amplitude modulation module and a pulse width modulation module. The pulse amplitude modulation module includes a first driving unit and a first light-emitting control unit, the first light-emitting control unit being electrically connected to a first enable signal terminal. The pulse width modulation module includes a control unit, which is electrically connected to the pulse amplitude modulation module. The control terminal of the control unit is electrically connected to the first enable signal terminal. By placing a control unit between the pulse width modulation module and the pulse amplitude modulation module, and having the control unit turn on or off under the control of the first enable signal terminal, this pixel driving circuit avoids the signal from the pulse width modulation module being prematurely input to the pulse amplitude modulation module, thereby preventing signal coupling from affecting the pulse amplitude modulation module and improving the display effect.

[0027] The above is the core idea of ​​the embodiments of the present invention. The specific embodiments of the present invention will be explained below with reference to the accompanying drawings. Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 3 The pixel driving circuit includes a pulse amplitude modulation module 10 and a pulse width modulation module 20. The pulse amplitude modulation module 10 includes a first driving unit 11 and a first light emission control unit 12, and the first light emission control unit 12 is electrically connected to the first enable signal terminal PAM_EM. The pulse width modulation module 20 includes a control unit 21, and is electrically connected to the pulse amplitude modulation module 10 through the control unit 21. The control unit 21 is electrically connected to the first enable signal terminal PAM_EM.

[0028] Optionally, the pulse amplitude modulation module 10 is electrically connected to the light-emitting element 30 and is used to provide the light-emitting element 30 with a preset amplitude driving current or voltage to drive the light-emitting element 30 to emit light. In specific implementations, it may also include structures such as an initialization unit, a data writing unit, and a threshold compensation unit. The pulse width modulation module 20 is electrically connected to the pulse amplitude modulation module 10 and is used to adjust the light-emitting brightness of the light-emitting element 30 by controlling the light-emitting duration of the light-emitting element 30. Specifically, the pulse width modulation module 20 provides a pulse width modulation (PWM) control signal to the pulse amplitude modulation module 10. When a higher light-emitting brightness of the light-emitting element 30 is required, a PWM control signal with a larger effective duty cycle can be provided, that is, the light-emitting time of the light-emitting element 30 is controlled to be longer within one light-emitting cycle. When a lower light-emitting brightness of the light-emitting element 30 is required, a PWM control signal with a smaller effective duty cycle can be provided, that is, the light-emitting time of the light-emitting element 30 is controlled to be shorter within one light-emitting cycle. The pulse amplitude modulation module 10 can always provide the maximum driving current or voltage when the light-emitting element 30 emits light, thereby improving the efficiency of the pixel driving circuit. It should be noted that during one cycle of the PWM control signal, when the signal changes, the first drive unit 10 is turned off. In this embodiment, the effective duty cycle refers to the duty cycle of the time period during which the PWM control signal turns on the first drive unit 10 within one cycle of the PWM control signal.

[0029] It should be noted that, in this embodiment of the invention, the control unit 21 is equivalent to a switch that can control the electrical connection between the pulse amplitude modulation module 10 and the pulse width modulation module 20. That is, when the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM turns on the control unit 21, the PWM signal provided by the pulse width modulation module 20 can be transmitted to the pulse amplitude modulation module 10. The pulse width modulation module 20 actually affects the effective duty cycle of the light-emitting period of the light-emitting element 30 during the light-emitting stage, thereby controlling the light-emitting duration. The first light-emitting control unit 12 in the pulse amplitude modulation module 10 is used to turn on under the control of the enable signal PAM_EMIT provided by the enable signal terminal PAM_EM during the light-emitting stage of the light-emitting element 30. Therefore, during the time when the first light-emitting control unit 12 in the pulse amplitude modulation module 10 is turned on so that the light-emitting element 30 can receive the driving current or voltage, the pulse amplitude modulation module 10 can receive the PWM control signal generated by the pulse width modulation module 20 on the light-emitting element 30. Therefore, by setting the turn-on signals of control unit 21 and first light-emitting control unit 12 in a unified manner, that is, by connecting them both to the first enable signal terminal PAM_EM, the first enable signal terminal PAM_EM can simultaneously control control unit 21 and first light-emitting control unit 12 to be turned on, thus avoiding the phenomenon of node voltage offset when pulse amplitude modulation module 10 and pulse width modulation module 20 are turned on before this.

[0030] The technical solution of this invention, by setting the pulse width modulation module to include a control unit, with the control terminal of the control unit connected to the first enable signal terminal PAM_EM, can prevent unnecessary conduction between the pulse width modulation module and the pulse amplitude modulation module. This avoids the voltage in the pulse width modulation module from affecting the voltage of important nodes in the pulse amplitude modulation module due to coupling, thereby preventing abnormal dimming of the light-emitting element and affecting the display effect. Furthermore, the control signal electrically connected to the control unit 21 is the same as that of the first light-emitting control unit 12, thus eliminating the need for additional control signals. The enable signal provided by the first enable signal terminal PAM_EM is multiplexed as the control signal of the control unit. This design achieves the technical effect of this invention without increasing the manufacturing process difficulty, and avoids introducing new signals that may couple with other signals in the pixel driving circuit, potentially causing other problems when the light-emitting element emits light.

[0031] Optional, continue to refer to Figure 3 The control unit 21 includes a first transistor M1, and the control terminal of the first transistor M1 is electrically connected to the first enable signal terminal PAM_EM.

[0032] Among them, the first enable signal terminal PAM_EM is the light emission control signal terminal of the pulse amplitude modulation module 10, which is connected to the control terminal of the first transistor M1. When the light emission control signal in the pulse width modulation module 20 ( Figure 3 When (not shown) is turned on, the first transistor M1 is turned off, thereby preventing the pulse width modulation module 20 from being connected to the pulse amplitude modulation module 10, and eliminating the influence of the light emission control signal in the pulse width modulation module 20 on the pulse amplitude modulation module 10 when it is turned on.

[0033] Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 4Optionally, the pulse width modulation module 20 further includes a second driving unit 22 and a second light-emitting control unit 23. The first end of the first driving unit 11 and the first end of the second driving unit 22 are both electrically connected to the first voltage terminal PVDD. The control terminal of the first driving unit 11 is electrically connected to the first node N1. The first end of the second driving unit 22 is electrically connected to the second node N2. The second end of the first driving unit 11 is electrically connected to the first end of the first light-emitting control unit 12. The second end of the second driving unit 22 is electrically connected to the first end of the second light-emitting control unit 23. The control terminal of the second light-emitting control unit 23 is electrically connected to the second enable signal terminal PWM_EM. The second end of the second light-emitting control unit 23 is electrically connected to the first end of the first transistor M1. The second end of the first light-emitting control unit 12 is electrically connected to the first end of the light-emitting element 30. The second end of the light-emitting element 30 is electrically connected to the third voltage terminal PVEE. The signal output terminal 20a of the pulse width modulation module 20 is electrically connected to the first end of the first transistor M1, and the second end of the first transistor M1 is electrically connected to the first node N1.

[0034] In this embodiment, the first voltage terminal PVDD provides a positive power supply voltage to the anode of the light-emitting element, and the third voltage terminal PVEE provides a negative power supply voltage to the cathode of the light-emitting element. The light-emitting element can be a Micro LED or an OLED, and the specific implementation can be designed according to the actual situation. This embodiment of the invention does not limit this. It is understood that the voltage of the first node N1 is used to control the working state of the first driving unit 11. When the voltage of the first node N1 controls the first driving unit 11 to be turned on, the electrical signal provided by the first voltage terminal PVDD can be provided to the light-emitting element 30 through the first driving unit 11. The voltage of the second node N2 is used to control the working state of the second driving unit 22. Unlike the first driving unit 11, the second node N2 can be connected to the sweep frequency signal terminal through a capacitor (see reference). Figure 1 , Figure 4(Not shown), the sweep frequency signal output from the sweep frequency signal terminal controls the voltage of the second node N2, causing the pulse width modulation module 20 to output a PWM control signal. The enable signal PWM_EMIT provided by the second light emission control signal terminal PWM_EM is used to turn on the second light emission control unit 23. In this embodiment, during the light emission stage of the light emission element 30, the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM turns on the first transistor M1, and the enable signal PWM_EMIT provided by the second light emission control signal terminal PWM_EM turns on the second light emission control unit 23. The PWM signal provided by the pulse width modulation module 20 is transmitted to the first node N1. Moreover, since the first transistor M1 is provided, the first transistor M1 is in a turned-off state before the first enable signal terminal PAM_EM provides an effective enable signal. This can avoid the influence of the voltage at 20a on the voltage of the first node N1 when the second light emission control unit 23 is turned on, and prevent the brightness of the light emission element 30 from being affected.

[0035] For example, Figure 5 for Figure 4 The diagram shows simulation results of some signals when the pixel driving circuit is working, for comparison. Figure 2 and Figure 5 It can be seen that, in this embodiment of the invention, the first transistor M1 blocks PWM_EMIT, causing the second light-emitting control unit 23 to conduct at position 20a and the first node N1, the first node N1 ( Figure 2 The voltage jump corresponding to N1′ disappears, thus eliminating the influence of the voltage jump of the first node N1 on the brightness of the light-emitting element 30.

[0036] Figure 6 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 6 ,and Figure 4 The difference from the illustrated embodiment is that in this embodiment, the second terminal of the second driving unit 22 is electrically connected to the first terminal of the first transistor M1, the first terminal of the second light-emitting control unit 23 is electrically connected to the second terminal of the first transistor M1, and the second terminal of the second light-emitting control unit 23 is electrically connected to the first node N1. That is, the control unit 21 is electrically connected in series between the second light-emitting control unit 23 and the second driving unit 22.

[0037] Understandable Figure 4 In the illustrated embodiment, the first transistor M1 is disposed between the second light-emitting control unit 23 and the pulse amplitude modulation module 10. Figure 6 In the embodiment shown, the first transistor M1 is disposed between the second light-emitting control unit 23 and the second driving unit 22, which can achieve the same technical effect. In specific implementation, it can be designed according to the actual situation, and the embodiment of the present invention is not limited.

[0038] Since both the control unit 21 and the second light-emitting control unit 23 function as switches, the inventors discovered in their research that, in order to simplify the circuit structure, the second light-emitting control unit 23 can be reused as the control unit 21. Figure 7 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 7 Optionally, the control unit 21 is reused as the second light-emitting control unit 23; the first end of the second driving unit 22 is electrically connected to the first voltage terminal PVDD, the control terminal of the second driving unit 22 is electrically connected to the second node N2, and the second end of the second driving unit 22 is electrically connected to the first end of the second light-emitting control unit 23.

[0039] It is understandable that, in this embodiment, to simplify the circuit structure, the second light-emitting control unit 23 can be directly reused as the control unit 21. This design does not require increasing the number of transistors in the pixel driving circuit; it only requires connecting the control terminal of the second light-emitting control unit 23 to the first enable signal terminal PAM_EM. This simplifies the circuit structure, reduces the panel design difficulty caused by the increase in the number of transistors, and also eliminates the impact of the voltage jump of the first node N1 on the brightness of the light-emitting element 30, thereby improving the display effect.

[0040] In another embodiment, the output of the pulse width modulation module may not be directly electrically connected to the first node to avoid affecting the voltage of the first node. For example, Figure 8 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 8 Optionally, the pulse amplitude modulation module 10 further includes a third light-emitting control unit 13. The first terminal of the third light-emitting control unit 13 is electrically connected to the first voltage terminal PVDD, the second terminal of the third light-emitting control unit 13 is electrically connected to the first terminal of the first driving unit 11, the second terminal of the first driving unit 11 is electrically connected to the first terminal of the first light-emitting control unit 12, the second terminal of the first light-emitting control unit 12 is electrically connected to the first terminal of the light-emitting element 30, and the second terminal of the light-emitting element 30 is electrically connected to the third voltage terminal PVEE. The signal output terminal of the pulse width modulation module 20 is electrically connected to the first terminal of the first transistor M1, and the second terminal of the first transistor M1 is electrically connected to the control terminal of the third light-emitting control unit 13.

[0041] It is understood that in this embodiment, the pulse width modulation module 20 is not directly connected to the control terminal (first node) of the first control unit 11. Figure 8Instead of being connected to the first node (not shown), it is connected to the control terminal of the third light-emitting control unit 13. That is, the pulse width modulation module 20 transmits the PWM control signal to the third control unit 13 to control the light-emitting duration of the light-emitting element 30. Since the pulse width modulation module 20 is not directly electrically connected to the first node, the influence of the voltage in the pulse width modulation module 20 on the voltage of the first node can also be removed, so as to avoid the brightness of the light-emitting element 30 being inconsistent with the desired brightness and improve the display effect.

[0042] The following descriptions use the connection between the pulse width modulation module 20 and the first node as an example to illustrate other structures of the pixel driving circuit. Figure 9 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 9Optionally, the pulse amplitude modulation module 10 further includes a first initialization unit 14, a second initialization unit 15, a first data writing unit 16, a first threshold compensation unit 17, a third light emission control unit 13, and a first storage unit 18; the pulse width modulation module 20 further includes a third initialization unit 24, a second data writing unit 25, a second threshold compensation unit 26, a fourth light emission control unit 27, and a second storage unit 28.The first terminal of the first initialization unit 14 is electrically connected to the first reference voltage terminal PAM_VREF1, the control terminal of the first initialization unit 14 is electrically connected to the first scan signal terminal PAM_S1, and the second terminal of the first initialization unit 14 is electrically connected to the first node N1. The first terminal of the second initialization unit 15 is electrically connected to the second reference voltage terminal PAM_VREF2, and the control terminal of the second initialization unit 15 is electrically connected to either the first scan signal terminal PAM_S1 or the second scan signal terminal PAM_S2. The second terminal of the second initialization unit 15 is electrically connected to the first terminal of the light-emitting element 30. The first terminal of the third initialization unit 24 is electrically connected to the third reference voltage terminal PWM_VRFE1. The control terminal of the initialization unit 24 is electrically connected to the third scan signal terminal PWM_S1, and the second terminal of the third initialization unit 24 is electrically connected to the second node N2; the first terminal of the first data writing unit 16 is electrically connected to the first data signal terminal PAM_DATA, the control terminal of the first data writing unit 16 is electrically connected to the second scan signal terminal PAM_S2, the second terminal of the first data writing unit 16 is electrically connected to the first terminal of the first driving unit 11, the first terminal of the first threshold compensation unit 17 is electrically connected to the second terminal of the first driving unit 11, the control terminal of the first threshold compensation unit 17 is electrically connected to the second scan signal terminal PAM_S2, and the second terminal of the first threshold compensation unit 17 is electrically connected to the first node N1. The first terminal of the second data writing unit 25 is electrically connected to the second data signal terminal PWM_DATA, the control terminal of the second data writing unit 25 is electrically connected to the fourth scan signal terminal PWM_S2, the second terminal of the second data writing unit 25 is electrically connected to the first terminal of the second driving unit 22, the first terminal of the second threshold compensation unit 26 is electrically connected to the second terminal of the second driving unit 22, the control terminal of the second threshold compensation unit 26 is electrically connected to the fourth scan signal terminal PWM_S2, and the second terminal of the second threshold compensation unit 26 is electrically connected to the second node N2; the first terminal of the third light-emitting control unit 13 is electrically connected to the first voltage terminal PVDD, and the control terminal of the third light-emitting control unit 13 is electrically connected to the first voltage terminal PVDD. The enable signal terminal PAM_EM is electrically connected; the second terminal of the third light-emitting control unit 13 is electrically connected to the first terminal of the first driving unit 11; the first terminal of the fourth light-emitting control unit 27 is electrically connected to the first voltage terminal PVDD; the control terminal of the fourth light-emitting control unit 27 is electrically connected to the second enable signal terminal PWM_EM; and the second terminal of the fourth light-emitting control unit 27 is electrically connected to the first terminal of the second driving unit 22. The first terminal of the first storage unit 18 is electrically connected to the first voltage terminal PVDD; the second terminal of the first storage unit 18 is electrically connected to the first node; the first terminal of the second storage unit 28 is electrically connected to the sweep frequency voltage terminal SWEEP; and the second terminal of the second storage unit 28 is electrically connected to the second node N2.

[0043] Optional, continue to refer to Figure 9The first driving unit 11 includes a second transistor M2, the first light-emitting control unit 12 includes a third transistor M3, the first initialization unit 14 includes a fourth transistor M4, the second initialization unit 15 includes a fifth transistor M5, the first data writing unit 16 includes a sixth transistor M6, the first threshold compensation unit 17 includes a seventh transistor M7, the third light-emitting control unit 13 includes an eighth transistor M8, and the first storage unit 18 includes a first capacitor C1. In specific implementations, M4 and M7 can be dual-gate transistors, and this embodiment of the invention does not limit this. The second driving unit 22 includes a twelfth transistor M12, the second light-emitting control unit 23 includes a thirteenth transistor M13, the third initialization unit 24 includes a fourteenth transistor M14, the second data writing unit 25 includes a fifteenth transistor M15, the second threshold compensation unit 26 includes a sixteenth transistor M16, the fourth light-emitting control unit 27 includes a seventeenth transistor M17, and the second storage unit 28 includes a third capacitor C3. In specific implementations, M14 and M16 can be dual-gate transistors, and this embodiment of the invention does not limit this. It is understood that in other embodiments, M1 and M13 can be multiplexed into a single transistor, namely the second light-emitting control unit 23, as control unit 21.

[0044] It is understandable that the pulse amplitude modulation module 10 includes 7 transistors and one capacitor. Its basic structure and principle are the same as those of the 7T1C circuit in the prior art, which includes seven transistors and one capacitor. The pulse width modulation module 20 includes 6 transistors and one capacitor in addition to the control unit. Its basic structure is similar to that of the 7T1C circuit in the prior art. The difference is that the first terminal of the capacitor C3 is not connected to the first voltage terminal PVDD, but to the scanning signal terminal SWEEP. In addition, since the pulse width modulation module 20 is not directly electrically connected to the light-emitting element 30, the initialization unit connected to the first terminal of the light-emitting element 30 is removed. Figure 10 This is a timing diagram of the driving signals of a pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 10The pixel driving circuit's driving process includes a PAM input stage T1, a PWM input stage T2, and an emission stage T3. In the PAM input stage T1, the scan signal PAM_SCAN1 provided by the first scan signal terminal PAM_S1 first controls the fourth transistor M4 to turn on. The reference voltage signal provided by the first reference voltage terminal PAM_VREF1 is written to the first node N1 to initialize the N1 voltage. Then, the scan signal PAM_SCAN2 provided by the second scan signal terminal PAM_S2 controls the sixth transistor M6 and the seventh transistor M7 to turn on. The data signal PAM_DATA is written to the first node N1, simultaneously achieving threshold compensation for the second transistor M2. In the PWM input stage T2, the scan signal PWM_SCAN1 provided by the third scan signal terminal PWM_S1 first controls the fourteenth transistor M14 to turn on. The reference voltage signal provided by the third reference voltage terminal PWM_VRFE1 is used to initialize the N2 voltage at the second node N2. Then, the fourth scan signal... The scanning signal PWM_SCAN2 provided by the PWM_S2 terminal controls the fifteenth transistor M15 and the sixteenth transistor M16 to turn on, and the data signal PWM_DATA is written to the second node N2. At the same time, threshold compensation of the twelfth transistor M112 is realized. In the light-emitting stage T3, the second enable signal terminal PWM_EM provides the enable signal PWM_EMIT to control the thirteenth transistor M13 and the seventeenth transistor M17 to turn on. At the same time, the sweep frequency signal SWEEP is applied to the PWM module 2. The gate voltage of the twelfth transistor M12 is changed by using the bootstrap effect of the capacitor. When the voltage of the sweep frequency signal reaches the threshold, the PWM module 2 outputs a turn-off signal to the gate of the second transistor M2 to control the second transistor M2 to turn off. At the same time, in this stage, the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM controls the first transistor M1, the third transistor M3 and the eighth transistor M8 to turn on. The light-emitting element is in the light-emitting state before the second transistor M2 is turned off.

[0045] Continue to refer to Figure 10 Optionally, during one working cycle of the pixel driving circuit driving the light-emitting element to emit light, the second enable signal PWM_EMIT provided by the second enable signal terminal is earlier than the first enable signal PAM_EMIT provided by the first enable signal terminal.

[0046] In one working cycle of the pixel driving circuit driving the light-emitting element, the second enable signal PWM_EMIT provided by the second enable signal terminal PWM_EM is set to be earlier than the first enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM. That is, the effective signal of PAM_EM is later than the effective signal of PWM_EM. Since the first transistor M1 is controlled by the first enable signal terminal PAM_EM, this can ensure that the first node N1 is not connected to the second terminal of the second driving unit 22 before the pulse amplitude modulation module 10 is working, and prevent the voltage of the first node N1 from changing due to the coupling effect.

[0047] Figure 11 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, with reference to... Figure 11 Optionally, the pulse amplitude modulation module 10 also includes a voltage stabilization unit 19, which is used to stabilize the voltage of the first voltage terminal PVDD.

[0048] By setting the voltage stabilization unit 19, the stability of the power supply voltage provided by the first voltage terminal PVDD can be improved, thereby enhancing the display effect.

[0049] Optionally, the voltage stabilization unit 19 includes a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, and a second capacitor C2; the first terminal of the ninth transistor M9 is electrically connected to the first voltage terminal PVDD, the control terminal of the ninth transistor M9 is electrically connected to the first scan signal terminal PAM_S1, and the third terminal of the ninth transistor M9 is electrically connected to the first terminal of the first storage unit 18; the first terminal of the tenth transistor M10 is electrically connected to the first voltage terminal PVDD, the control terminal of the tenth transistor M10 is electrically connected to the second scan signal terminal PWM_S2, and the third terminal of the tenth transistor M10 is electrically connected to the first terminal of the first storage unit 18; the first terminal of the eleventh transistor M11 is electrically connected to the first voltage terminal PVDD, the control terminal of the eleventh transistor M11 is electrically connected to the second enable signal terminal PWM_EM, and the second terminal of the eleventh transistor M11 is electrically connected to the first terminal of the first storage unit 18; the first terminal of the second capacitor C2 is electrically connected to the second voltage terminal Vinit, and the second terminal of the second capacitor C2 is electrically connected to the first terminal of the first storage unit 18.

[0050] Optionally, the pulse width modulation module 20 also includes a sweep voltage reset module 29, which is used to reset the sweep signal of the sweep voltage terminal SWEEP.

[0051] By setting up the sweep frequency voltage reset module 29, the sweep frequency signal of the previous frame can be reset when scanning the next frame display signal, thus avoiding the possible influence of the sweep frequency signal of the previous frame on the circuit.

[0052] Optionally, the sweep frequency voltage reset module 29 includes an eighteenth transistor M18, the first terminal of the eighteenth transistor M18 is electrically connected to the sweep frequency ground terminal SWEEP_GND, the control terminal of the eighteenth transistor M18 is electrically connected to the fourth scan signal terminal PWM_S2, and the second terminal of the eighteenth transistor M18 is electrically connected to the first terminal of the second storage unit 28.

[0053] This invention also provides a display panel, including any of the pixel driving circuits provided in the above embodiments.

[0054] Since the display panel provided in the embodiments of the present invention includes any of the pixel driving circuits provided in the above embodiments, and has the same or corresponding technical effects as the pixel driving circuit, it will not be described in detail here.

[0055] Figure 12 This is a schematic diagram of a display device provided in an embodiment of the present invention. (Reference) Figure 12 The display device 100 includes any of the display panels 200 provided in the embodiments of the present invention. Specifically, the display device 100 can be a mobile phone, a computer, or a smart wearable device, etc.

[0056] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A pixel driving circuit, characterized by comprising: Includes a pulse amplitude modulation module and a pulse width modulation module; The pulse amplitude modulation module includes a first driving unit, a first light-emitting control unit, a first initialization unit, a second initialization unit, a first data writing unit, a first threshold compensation unit, a third light-emitting control unit, and a first storage unit. The first light-emitting control unit is electrically connected to a first enable signal terminal. The first terminal of the first initialization unit is electrically connected to a first reference voltage terminal. The control terminal of the first initialization unit is electrically connected to a first scan signal terminal. The second terminal of the first initialization unit is electrically connected to a first node. The first terminal of the second initialization unit is electrically connected to a second reference voltage terminal. The control terminal of the second initialization unit is electrically connected to either the first scan signal terminal or the second scan signal terminal. The second terminal of the second initialization unit is electrically connected to the first terminal of the light-emitting element. The first terminal of the first data writing unit is electrically connected to a first data signal terminal. The first data writing unit is electrically connected to the control terminal of the first data writing unit and the second scanning signal terminal. The second terminal of the first data writing unit is electrically connected to the first terminal of the first driving unit. The first terminal of the first threshold compensation unit is electrically connected to the second terminal of the first driving unit. The control terminal of the first threshold compensation unit is electrically connected to the second scanning signal terminal. The second terminal of the first threshold compensation unit is electrically connected to the first node. The first terminal of the third light-emitting control unit is electrically connected to the first voltage terminal. The control terminal of the third light-emitting control unit is electrically connected to the first enable signal terminal. The second terminal of the third light-emitting control unit is electrically connected to the first terminal of the first driving unit. The first terminal of the first storage unit is electrically connected to the first voltage terminal. The second terminal of the first storage unit is electrically connected to the first node. The pulse width modulation module includes a control unit, which is electrically connected to the pulse amplitude modulation module; wherein the control terminal of the control unit is electrically connected to the first enable signal terminal.

2. The pixel driving circuit according to claim 1, characterized in that, The control unit includes a first transistor, and the control terminal of the first transistor is electrically connected to the first enable signal terminal.

3. The pixel driving circuit according to claim 2, characterized in that, The control terminal of the first driving unit is electrically connected to the first node, the second terminal of the first driving unit is electrically connected to the first terminal of the first light-emitting control unit, and the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the light-emitting element. The signal output terminal of the pulse width modulation module is electrically connected to the first terminal of the first transistor, and the second terminal of the first transistor is electrically connected to the first node.

4. The pixel driving circuit according to claim 3, characterized in that, The pulse width modulation module includes a second driving unit and a second light emission control unit; The first terminal of the second driving unit is electrically connected to the first voltage terminal; the control terminal of the second driving unit is electrically connected to the second node; the second terminal of the second driving unit is electrically connected to the first terminal of the second light-emitting control unit; the control terminal of the second light-emitting control unit is electrically connected to the second enable signal terminal; and the second terminal of the second light-emitting control unit is electrically connected to the first terminal of the first transistor. Alternatively... The first end of the second driving unit is electrically connected to the first voltage terminal, the control terminal of the second driving unit is electrically connected to the second node, the second end of the second driving unit is electrically connected to the first end of the first transistor, the first end of the second light-emitting control unit is electrically connected to the second end of the first transistor, the control terminal of the second light-emitting control unit is electrically connected to the second enable signal terminal, and the second end of the second light-emitting control unit is electrically connected to the first node.

5. The pixel driving circuit according to claim 4, characterized in that, During one working cycle in which the pixel driving circuit drives the light-emitting element to emit light, the second enable signal provided by the second enable signal terminal is earlier than the first enable signal provided by the first enable signal terminal.

6. The pixel driving circuit according to claim 3, characterized in that, The pulse width modulation module includes a second driving unit and a second light-emitting control unit, wherein the control unit is multiplexed as the second light-emitting control unit; The first end of the second driving unit is electrically connected to the first voltage terminal, the control terminal of the second driving unit is electrically connected to the second node, and the second end of the second driving unit is electrically connected to the first end of the second light-emitting control unit.

7. The pixel driving circuit according to claim 2, characterized in that, The control terminal of the first driving unit is electrically connected to the first node, the second terminal of the first driving unit is electrically connected to the first terminal of the first light-emitting control unit, and the second terminal of the first light-emitting control unit is electrically connected to the first terminal of the light-emitting element. The signal output terminal of the pulse width modulation module is electrically connected to the first terminal of the first transistor, and the second terminal of the first transistor is electrically connected to the control terminal of the third light-emitting control unit.

8. The pixel driving circuit according to claim 1, characterized in that, The first driving unit includes a second transistor, the first light-emitting control unit includes a third transistor, the first initialization unit includes a fourth transistor, the second initialization unit includes a fifth transistor, the first data writing unit includes a sixth transistor, the first threshold compensation unit includes a seventh transistor, the third light-emitting control unit includes an eighth transistor, and the first storage unit includes a first capacitor.

9. The pixel driving circuit according to claim 1, characterized in that, The pulse amplitude modulation module further includes a voltage stabilization unit, which is used to stabilize the voltage at the first voltage terminal.

10. The pixel driving circuit according to claim 9, characterized in that, The voltage stabilizing unit includes a ninth transistor, a tenth transistor, an eleventh transistor, and a second capacitor; The first terminal of the ninth transistor is electrically connected to the first voltage terminal, the control terminal of the ninth transistor is electrically connected to the first scan signal terminal, and the third terminal of the ninth transistor is electrically connected to the first terminal of the first memory cell. The first terminal of the tenth transistor is electrically connected to the first voltage terminal, the control terminal of the tenth transistor is electrically connected to the second scan signal terminal, and the third terminal of the tenth transistor is electrically connected to the first terminal of the first memory cell. The first terminal of the eleventh transistor is electrically connected to the first voltage terminal, the control terminal of the eleventh transistor is electrically connected to the second enable signal terminal, and the second terminal of the eleventh transistor is electrically connected to the first terminal of the first memory cell. The first terminal of the second capacitor is electrically connected to the second voltage terminal, and the second terminal of the second capacitor is electrically connected to the first terminal of the first storage unit.

11. The pixel driving circuit according to claim 4, characterized in that, The pulse width modulation module further includes a third initialization unit, a second data writing unit, a second threshold compensation unit, a fourth light emission control unit, and a second storage unit; The first terminal of the third initialization unit is electrically connected to the third reference voltage terminal, the control terminal of the third initialization unit is electrically connected to the third scan signal terminal, the second terminal of the third initialization unit is electrically connected to the second node, the first terminal of the second data writing unit is electrically connected to the second data signal terminal, the control terminal of the second data writing unit is electrically connected to the fourth scan signal terminal, the second terminal of the second data writing unit is electrically connected to the first terminal of the second driving unit, the first terminal of the second threshold compensation unit is electrically connected to the second terminal of the second driving unit, the control terminal of the second threshold compensation unit is electrically connected to the fourth scan signal terminal, the second terminal of the second threshold compensation unit is electrically connected to the second node, the first terminal of the fourth light-emitting control unit is electrically connected to the first voltage terminal, the control terminal of the fourth light-emitting control unit is electrically connected to the second enable signal terminal, the second terminal of the fourth light-emitting control unit is electrically connected to the first terminal of the second driving unit, the first terminal of the second storage unit is electrically connected to the sweep frequency voltage terminal, and the second terminal of the second storage unit is electrically connected to the second node.

12. The pixel driving circuit according to claim 11, characterized in that, The second driving unit includes a twelfth transistor, the second light-emitting control unit includes a thirteenth transistor, the third initialization unit includes a fourteenth transistor, the second data writing unit includes a fifteenth transistor, the second threshold compensation unit includes a sixteenth transistor, the fourth light-emitting control unit includes a seventeenth transistor, and the second storage unit includes a third capacitor.

13. The pixel driving circuit according to claim 11, characterized in that, The pulse width modulation module further includes a sweep voltage reset module, which is used to reset the sweep signal at the sweep voltage terminal.

14. The pixel driving circuit according to claim 13, characterized in that, The frequency sweep voltage reset module includes an eighteenth transistor. The first terminal of the eighteenth transistor is electrically connected to the frequency sweep ground terminal, the control terminal of the eighteenth transistor is electrically connected to the fourth scan signal terminal, and the second terminal of the eighteenth transistor is electrically connected to the first terminal of the second storage unit.

15. A display panel, characterized in that, Includes the pixel driving circuit according to any one of claims 1 to 14.

16. A display device, characterized in that, Includes the display panel as described in claim 15.

Images