Pixel circuit, driving method thereof and display device

Abstract

The invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display device, a data writing unit can write a data signal into a first end of a driving unit according to a first scanning signal, and a compensation unit can perform threshold compensation on the driving unit according to the first scanning signal. The storage unit can store the voltage at the control end of the driving unit. The driving unit can generate a driving signal according to the potential at the control end of the driving unit so as to drive the light-emitting unit to emit light by using the driving signal. The coupling unit can be used for controlling the voltage at the control end of the driving unit, and the change of the luminance of the pixel circuit caused by crosstalk in the circuit is reduced. According to the pixel circuit, the potential at the control end of the driving unit is ensured by using the coupling unit, so that the influence caused by voltage crosstalk is reduced, and the brightness stability of the pixel circuit is improved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof, and a display device. Background Art

[0002] Active-matrix organic light-emitting diode (AMOLED) has unparalleled advantages over liquid crystal display (LCD) in terms of display color saturation, power consumption, and foldability. In order to achieve more refined color and brightness display effects, AMOLED has gradually occupied the main market of high-end mobile phones. However, the existing AMOLED pixel circuit architecture has serious crosstalk problems. Summary of the invention

[0003] Based on this, it is necessary to provide a pixel circuit and a driving method thereof, and a display device to address the serious crosstalk problem in the existing pixel circuit architecture.

[0004] A pixel circuit comprises a data writing unit, a storage unit, a driving unit, a compensation unit, a coupling unit and a light-emitting unit, wherein the data writing unit is connected to a first end of the driving unit, and the data writing unit is configured to write a data signal to the first end of the driving unit according to a first scanning signal; the compensation unit is connected between a control end of the driving unit and a second end of the driving unit, and the compensation unit is configured to perform threshold compensation on the driving unit according to the first scanning signal; the storage unit is used to store a voltage at the control end of the driving unit; the coupling unit is connected between the control end of the driving unit and the first end of the driving unit, and the coupling unit is configured to control the potential at the control end of the driving unit according to a second scanning signal; the second end of the driving unit is connected to the light-emitting unit, and the driving unit is configured to generate a driving signal according to the voltage at the control end of the driving unit; the driving signal is used to drive the light-emitting unit to emit light.

[0005] In one embodiment, the driving unit includes a first transistor, the first electrode of the first transistor serves as the first end of the driving unit, the gate of the first transistor serves as the control end of the driving unit, and the second electrode of the first transistor serves as the second end of the driving unit; the data writing unit includes a second transistor, the first electrode of the second transistor is connected to the first end of the driving unit, the gate of the second transistor is connected to the first scan line, and the second electrode of the second transistor is connected to the data line; the compensation unit includes a third transistor, the first electrode of the third transistor is connected to the second end of the driving unit, the gate of the third transistor is connected to the first scan line, and the second electrode of the third transistor is connected to the control end of the driving unit; the storage unit includes a storage capacitor, the first end of the storage capacitor is connected to the first power line, and the second end of the storage capacitor is connected to the control end of the driving unit; the coupling unit includes a fourth transistor and a voltage-stabilizing capacitor, the first electrode of the fourth transistor is connected to the first power line, the gate of the fourth transistor is connected to the second scan line, the second electrode of the fourth transistor is connected to the first end of the voltage-stabilizing capacitor, and the second end of the voltage-stabilizing capacitor is connected to the control end of the driving unit.

[0006] In one of the embodiments, the pixel circuit further includes a first light-emitting control unit and a second light-emitting control unit, wherein the first light-emitting control unit is connected between a first power line and a first end of the driving unit, and is configured to turn on or off the connection between the first power line and the first end of the driving unit according to a light-emitting control signal; the second light-emitting control unit is connected between a second end of the driving unit and the light-emitting unit, and is configured to turn on or off the connection between the second end of the driving unit and the light-emitting unit according to the light-emitting control signal.

[0007] In one embodiment, the first light-emitting control unit includes a fifth transistor, a first electrode of the fifth transistor is connected to the first power line, a gate of the fifth transistor is connected to the light-emitting control signal line, and a second electrode of the fifth transistor is connected to the first end of the driving unit; the second light-emitting control unit includes a sixth transistor, a first electrode of the sixth transistor is connected to the second end of the driving unit, the gate of the sixth transistor is connected to the light-emitting control signal line, and a second electrode of the sixth transistor is connected to the light-emitting unit.

[0008] In one embodiment, the pixel circuit further includes a first initialization unit and a second initialization unit, wherein the first initialization unit is connected to the control end of the driving unit, and the first initialization unit is configured to transmit the initialization signal to the control end of the driving unit according to a third scanning signal to initialize the control end of the driving unit; the second initialization unit is connected to the light-emitting unit, and the second initialization unit is configured to transmit the initialization signal to the light-emitting unit according to a fourth scanning signal to initialize the light-emitting unit.

[0009] In one embodiment, the first initialization unit includes a seventh transistor, a first electrode of the seventh transistor is connected to the control end of the driving unit, a gate of the seventh transistor is connected to the third scan line, and a second electrode of the seventh transistor is connected to the initialization signal line, and the second initialization unit includes an eighth transistor, a first electrode of the eighth transistor is connected to the light-emitting unit, a gate of the eighth transistor is connected to the fourth scan line, and a second electrode of the eighth transistor is connected to the initialization signal line.

[0010] In one embodiment, the third transistor and the seventh transistor are dual-gate transistors.

[0011] A display device comprises the pixel circuit described in any one of the above embodiments.

[0012] A driving method for a pixel circuit, wherein the pixel circuit comprises a first initialization stage, a data writing stage and a second initialization stage during a working process of a display frame, wherein the driving method comprises: in the first initialization stage, controlling the level of a first scanning signal to be a cut-off level, and controlling the level of a second scanning signal to be a conduction level; in the data writing stage, controlling the level of the first scanning signal to be a conduction level, and controlling the level of the second scanning signal to be a cut-off level; in the second initialization stage, controlling the level of the first scanning signal to be a cut-off level, and controlling the level of the second scanning signal to be a conduction level.

[0013] In one of the embodiments, the driving method further includes, in the first initialization stage, controlling the level of the third scan signal to be an on-level, controlling the level of the fourth scan signal to be an off-level, and controlling the level of the light-emitting control signal to be an off-level; in the data writing stage, controlling the level of the third scan signal to be an off-level, controlling the level of the fourth scan signal to be an off-level, and controlling the level of the light-emitting control signal to be an off-level; in the second initialization stage, controlling the level of the third scan signal to be an off-level, controlling the level of the fourth scan signal to be an on-level, and controlling the level of the light-emitting control signal to be an off-level.

[0014] In one of the embodiments, the pixel circuit further includes a light-emitting stage after the second initialization stage during the operation of a display frame, and the driving method further includes, during the light-emitting stage, controlling the level of the first scanning signal to be a cut-off level, controlling the level of the second scanning signal to be a cut-off level, controlling the level of the third scanning signal to be a cut-off level, controlling the level of the fourth scanning signal to be a cut-off level, and controlling the level of the light-emitting control signal to be a turn-on level.

[0015] In the above pixel circuit, the data writing unit can write the data signal into the first end of the driving unit according to the first scanning signal, the compensation unit can perform threshold compensation on the driving unit according to the first scanning signal, and the storage unit can store the voltage at the control end of the driving unit. The driving unit can generate a driving signal according to the potential at the control end of the driving unit to drive the light-emitting unit to emit light using the driving signal. The coupling unit can be used to stabilize the voltage at the control end of the driving unit and reduce the change in the brightness of the light-emitting pixel circuit caused by crosstalk in the circuit. The above pixel circuit uses the coupling unit to ensure the potential at the control end of the driving unit, thereby reducing the impact of voltage crosstalk and improving the brightness stability of the pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the implementation methods of this specification or the technical solutions in the prior art, the drawings required for use in the implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some implementation methods recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0017] Figure 1 This is a schematic diagram of the structure of a pixel circuit in one of the embodiments of the present application;

[0018] Figure 2 This is a schematic diagram of the circuit structure of a pixel circuit in one of the embodiments of the present application;

[0019] Figure 3 This is a schematic diagram of the circuit structure of a pixel circuit in another embodiment of the present application;

[0020] Figure 4 A schematic diagram of a process of driving a pixel circuit in one embodiment of the present application;

[0021] Figure 5 FIG. 1 is a timing diagram of a pixel circuit in one embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to understand the disclosure of the present invention more thoroughly and comprehensively.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0024] In the case of using “including”, “having”, and “comprising” described herein, another component may be added unless a clear limiting term such as “only”, “consisting of”, etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be construed as being one in number.

[0025] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the present application.

[0026] In this application, unless otherwise clearly specified and limited, the terms "connected", "connection" and the like should be understood in a broad sense, for example, it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0027] In the existing 7T1C pixel circuit architecture, there is a parasitic capacitor between the data line (Data line) and the power supply voltage line (ELVDD). The voltage jump of the data signal Source transmitted on the Data line will cause the ELVDD potential to change. The ELVDD potential change will be fed back to the gate Vg of the driving transistor through the storage capacitor Cst, thereby causing the brightness of the pixel circuit to change, resulting in serious crosstalk problems.

[0028] Figure 1This is a structural schematic diagram of a pixel circuit in one of the embodiments of the present application. In one of the embodiments, the pixel circuit may include a data writing unit 100, a storage unit 200, a driving unit 300, a compensation unit 400, a coupling unit 500 and a light-emitting unit 10.

[0029] The data writing unit 100 may be connected to the first end of the driving unit 300, and the data writing unit 100 may be configured to transmit the data signal Vdata to the first end of the driving unit 300 according to the first scanning signal S1. The data writing unit 100 may also be connected to the first scanning line and the data line respectively, and the data writing unit 100 obtains the first scanning signal S1 through the first scanning line and obtains the data signal Vdata through the data line, so that the data writing unit 100 may transmit the data signal Vdata to the first end of the driving unit 300 according to the first scanning signal S1.

[0030] The compensation unit 400 may be connected between the control terminal of the driving unit 300 and the second terminal of the driving unit 300, and the compensation unit 400 may be configured to perform threshold compensation on the driving unit 300 according to the first scanning signal S1. The compensation unit 400 may also be connected to the first scanning line to obtain the first scanning signal S1 through the first scanning line. The data writing unit 100 may perform threshold compensation on the driving unit 300 according to the first scanning signal S1.

[0031] The storage unit 200 may be used to store a voltage at the control terminal of the driving unit 300 , and the voltage at the control terminal of the driving unit 300 may be a data signal after threshold compensation.

[0032] The coupling unit 500 may be connected between the control end of the driving unit 300 and the first end of the driving unit 300, and the coupling unit 500 may be configured to be turned on or off according to the second scanning signal S2, thereby achieving the technical effect of maintaining the potential at the control end of the driving unit 300. The coupling unit 500 may also be connected to the second scanning line to obtain the second scanning signal S2 through the second scanning line.

[0033] The driving unit 300 may be configured to generate a driving signal according to the voltage at the control end of the driving unit 300. The driving signal may be used to drive the light emitting unit 10 to emit light. That is, when the data signal Vdata after threshold compensation is transmitted to the control end of the driving unit 300, the driving unit 300 may generate a driving signal according to the voltage received at the control end of the driving unit 300, and transmit the driving signal to the light emitting unit 10 to drive the light emitting unit 10 to emit light.

[0034] In the pixel circuit provided by the embodiment of the present disclosure, the data writing unit 100 transmits the data signal Vdata to the first end of the driving unit 300 according to the first scanning signal S1, and the compensation unit 400 performs threshold compensation on the driving unit 300, so that the information of the data signal Vdata and the threshold voltage Vth is stored in the storage unit 200. When the pixel circuit is in the light-emitting stage, the storage unit 200 discharges to the control end of the driving unit 300, and the driving unit 300 can generate a driving signal according to the voltage at the control end of the driving unit 300, so as to drive the light-emitting unit 10 to emit light by using the driving signal. The above-mentioned pixel circuit uses the coupling unit 500 to ensure the potential at the control end of the driving unit 300 through the internal circuit design, thereby reducing the influence of voltage crosstalk and improving the brightness stability of the pixel circuit.

[0035] Figure 2 This is a circuit structure diagram of a pixel circuit in one of the embodiments of the present application. In one of the embodiments, the driving unit 300 may include a first transistor M1, the first electrode of the first transistor M1 may serve as a first end of the driving unit 300, the gate of the first transistor M1 may serve as a control end of the driving unit 300, and the second electrode of the first transistor M1 may serve as a second end of the driving unit 300.

[0036] In the embodiments of the present disclosure, a transistor refers to a component including at least a gate, a drain, and a source. In the present disclosure, the first electrode of the transistor may be a drain, the second electrode may be a source, or the first electrode may be a source, and the second electrode may be a drain. In the case of using transistors with opposite polarities or the current direction changes during circuit operation, the functions of the "source" and "drain" are sometimes interchanged. In the embodiments of the present disclosure, the gate of all or part of the transistors may be a control electrode of the transistor, and the first electrode and the second electrode may be interchangeable as needed.

[0037] In one embodiment, the data writing unit 100 may include a second transistor M2. The first electrode of the second transistor M2 may be connected to the data line, the gate of the second transistor M2 may be connected to the first scan line, and the second electrode of the second transistor M2 may be connected to the first end of the driving unit 300. Specifically, the second electrode of the second transistor M2 may be connected to the first electrode of the first transistor M1. The second transistor M2 may obtain the data signal Vdata transmitted by the data line through the first electrode of the second transistor M2, and obtain the first scan signal S1 transmitted on the first scan line through the gate of the second transistor M2. The first scan signal S1 may be used to control the turning on and off of the second transistor M2. After the second transistor M2 is turned on according to the first scan signal S1, it may transmit the data signal Vdata to the first end of the driving unit 300.

[0038] In one embodiment, the compensation unit 400 may include a third transistor M3. A first electrode of the third transistor M3 may be connected to a second terminal of the driving unit 300, and specifically, a first electrode of the third transistor M3 may be connected to a second electrode of the first transistor M1. A gate of the third transistor M3 may be connected to a first scan line, and a second electrode of the third transistor M3 may be connected to a control terminal of the driving unit 300, and specifically, a second electrode of the third transistor M3 may be connected to a gate of the first transistor M1. The third transistor M3 may obtain a first scan signal S1 transmitted by the first scan line through a gate of the third transistor M3, and the first scan signal S1 may be used to control the third transistor M3 to enter an on or off state, so that the third transistor M3 may perform threshold compensation on the driving unit 300 when entering an on state according to the third scan signal S3.

[0039] In one embodiment, the storage unit 200 may include a storage capacitor Cst, and a first end of the storage capacitor Cst may be connected to a first power line. The first power line may continuously provide a high-level first power supply signal ELVDD. A second end of the storage capacitor Cst may be connected to a control end of the driving unit 300. Specifically, a second end of the storage capacitor Cst may be connected to a gate of the first transistor M1.

[0040] In one embodiment, the coupling unit 500 may include a fourth transistor M4 and a voltage-stabilizing capacitor C1. The first electrode of the fourth transistor M4 may be connected to the first power line. The gate of the fourth transistor M4 may be connected to the second scan line, the second electrode of the fourth transistor M4 may be connected to the first end of the voltage-stabilizing capacitor C1, the second end of the voltage-stabilizing capacitor C1 may be connected to the control end of the driving unit 300, and specifically, the second end of the voltage-stabilizing capacitor C1 may be connected to the gate of the first transistor M1. The fourth transistor M4 may obtain the second scan signal S2 transmitted by the second scan line through the gate of the fourth transistor M4, and the second scan signal S2 may be used to control the opening and closing of the fourth transistor M4, so that the fourth transistor M4 may control the connection between the voltage-stabilizing capacitor C1 and the first power line to be turned on or off according to the second scan signal S2.

[0041] In one embodiment, the light emitting unit 10 may include a light emitting diode D1. When the driving signal generated by the first transistor M1 is transmitted to the light emitting diode D1, the light emitting diode D1 may emit light with a brightness corresponding to the driving signal. The light emitting diode D1 may include an anode and a cathode, the anode of the light emitting diode D1 is connected to the second electrode of the first transistor M1, and the cathode of the light emitting diode D1 is connected to the second power line. The second power line may continuously provide a low-level second voltage ELVSS.

[0042] In one embodiment, the pixel circuit may further include a first light emitting control unit 600 and a second light emitting control unit 700 .

[0043] The first light-emitting control unit 600 may be connected between the first power line and the first end of the driving unit 300, and the first light-emitting control unit 600 may be configured to turn on or off the connection between the first power line and the first end of the driving unit 300 according to the light-emitting control signal EM. The first light-emitting control unit 600 may include a switch tube, and the switch tube is controlled to be turned on or off according to the light-emitting control signal EM, so that the first light-emitting control unit 600 may turn on or off the connection between the first power line and the first end of the driving unit 300 according to the light-emitting control signal EM. The first power line may continuously provide a high-level first power supply signal ELVDD.

[0044] The second light-emitting control unit 700 may be connected between the second end of the driving unit 300 and the light-emitting unit 10, and the second light-emitting control unit 700 may be configured to turn on or off the connection between the second end of the driving unit 300 and the light-emitting unit 10 according to the light-emitting control signal EM. Similarly, the second light-emitting control unit 700 may also include a switch tube, and the switch tube is controlled to be turned on or off according to the light-emitting control signal EM, so that the second light-emitting control unit 700 may turn on or off the connection between the second end of the driving unit 300 and the light-emitting unit 10 according to the light-emitting control signal EM.

[0045] In one embodiment, the first light emitting control unit 600 may include a fifth transistor M5. A first electrode of the fifth transistor M5 may be connected to the first power line, a gate of the fifth transistor M5 may be connected to the light emitting control signal line, and a second electrode of the fifth transistor M5 may be connected to the first end of the driving unit 300. Specifically, the second electrode of the fifth transistor M5 may be connected to the first electrode of the first transistor M1. The fifth transistor M5 receives a light emitting control signal EM transmitted by the light emitting control signal line through the gate of the fifth transistor M5. The light emitting control signal EM may be used to control the conduction or cut-off of the fifth transistor M5, so that the first light emitting control unit 600 may conduct or cut off the connection between the first power line and the first end of the driving unit 300 according to the light emitting control signal EM.

[0046] The second light emitting control unit 700 may include a sixth transistor M6. The first electrode of the sixth transistor M6 may be connected to the second end of the driving unit 300, specifically, the first electrode of the sixth transistor M6 may be connected to the second electrode of the first transistor M1. The gate of the sixth transistor M6 may be connected to the light emitting control signal line, the second electrode of the sixth transistor M6 may be connected to the light emitting unit 10, specifically, the second electrode of the eighth transistor M8 may be connected to the anode of the light emitting diode D1. The sixth transistor M6 may receive the light emitting control signal EM transmitted by the light emitting control signal line through the gate of the sixth transistor M6, and the light emitting control signal EM may also be used to control the conduction or cut-off of the sixth transistor M6, so that the second light emitting control unit 700 may turn on or off the connection between the second end of the driving unit 300 and the light emitting unit 10 according to the light emitting control signal EM.

[0047] In one embodiment, the pixel circuit may further include a first initialization unit 800 and a second initialization unit 900 .

[0048] The first initialization unit 800 may be connected to the control end of the driving unit 300, and the first initialization unit 800 may be configured to transmit the initialization signal VREFN to the control end of the driving unit 300 according to the third scan signal S3, so as to initialize the control end of the driving unit 300. The first initialization unit 800 may also be connected to the third scan line, and obtain the third scan signal S3 through the third scan line.

[0049] The second initialization unit 900 may be connected to the light emitting unit 10, and the second initialization unit 900 may be configured to transmit the initialization signal VREFN to the light emitting unit 10 according to the fourth scan signal S4 to initialize the light emitting unit 10. The second initialization unit 900 may also be connected to the fourth scan line to obtain the fourth scan signal S4 through the fourth scan line.

[0050] In one embodiment, the first initialization unit 800 may include a seventh transistor M7. A first electrode of the seventh transistor M7 may be connected to an initialization signal line, a gate of the seventh transistor M7 may be connected to a third scan line, and a second electrode of the seventh transistor M7 may be connected to a control terminal of the driving unit 300. Specifically, a second electrode of the seventh transistor M7 is connected to a gate of the first transistor M1. The seventh transistor M7 may receive a third scan signal S3 transmitted by the third scan line through the gate of the seventh transistor M7. The third scan signal S3 may be used to control the conduction or the shutoff of the seventh transistor M7. Thus, when the first initialization unit 800 is turned on according to the third scan signal S3, it may transmit the first initialization signal VREFN to the control terminal of the driving unit 300 to initialize the control terminal of the driving unit 300.

[0051] The second initialization unit 900 may include an eighth transistor M8. A first electrode of the eighth transistor M8 may be connected to the initialization signal line, a gate of the eighth transistor M8 may be connected to the fourth scan line, and a second electrode of the eighth transistor M8 may be connected to the light emitting unit 10. Specifically, the second electrode of the eighth transistor M8 may be connected to the anode of the light emitting diode D1. The eighth transistor M8 may receive a fourth scan signal S4 transmitted by the fourth scan line through the gate of the eighth transistor M8. The fourth scan signal S4 may be used to control the conduction or cutoff of the eighth transistor M8, so that the second initialization unit 900 may transmit the initialization signal VREFN to the anode of the light emitting diode D1 when it is turned on according to the fourth scan signal S4, so as to initialize the anode of the light emitting diode D1.

[0052] Figure 3 This is a circuit structure diagram of a pixel circuit in another embodiment of the present application. In this embodiment, the third transistor M3 and the seventh transistor M7 may be dual-gate transistors. Specifically, the compensation unit 400 may include a MOS tube group 1, and the MOS tube group 1 may include two transistors connected in series. The MOS tube group formed by the two transistors in series constitutes a dual-gate TFT, and the gates of the two transistors are connected to the first scan line. The MOS tube group 1 can obtain the first scan signal S1 transmitted by the first scan line, and the first scan signal S1 can be used to control the MOS tube group 1 to enter the on or off state, so that the MOS tube group 1 can perform threshold compensation on the driving unit 300 when entering the on state according to the first scan signal S1.

[0053] The first initialization unit 800 may include a MOS tube group 2, which may include two transistors connected in series. The MOS tube group formed by the two transistors in series constitutes a dual-gate TFT, and the gates of the two transistors are both connected to the third scan line. The MOS tube group 2 may obtain a third scan signal S3 transmitted by the third scan line, and the third scan signal S3 may be used to control the MOS tube group 2 to enter a conducting state or a cut-off state, so that the MOS tube group 2 may initialize the control end of the driving unit 300 when entering a conducting state according to the third scan signal S3.

[0054] In this embodiment, Figure 2 Taking the pixel circuit shown in FIG. 1 as an example, a driving method of the pixel circuit is described.

[0055] The operation process of the pixel circuit in one display frame may include a first stage, a second stage, a third stage and a fourth stage.

[0056] In this embodiment, when the pixel circuit operates in the first stage, the second end of the storage capacitor Cst and the gate of the first transistor M1 can be initialized, that is, the first stage can be a first initialization stage. In the first stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to be turned off, the second scan signal S2 controls the fourth transistor M4 to be turned on, the third scan signal S3 controls the seventh transistor M7 to be turned on, the fourth scan signal S4 controls the eighth transistor M8 to be turned off, and the light emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to be turned off.

[0057] After the seventh transistor M7 is turned on, the initialization signal VREFN can be transmitted to the second end of the storage capacitor Cst and the gate of the first transistor M1 through the seventh transistor M7 to initialize the second end of the storage capacitor Cst and the gate of the first transistor M1. In addition, after the fourth transistor M4 is turned on, the first power supply signal ELVDD can charge the first capacitor C1. At this time, the potentials at the upper plate of the first capacitor C1 and the upper plate of the storage capacitor Cst are both ELVDD, and the potentials at the lower plate of the first capacitor C1 and the lower plate of the storage capacitor Cst are both VREFN. It can be seen that in the first stage, the first capacitor C1 stores the potential information ELVDD before the first power supply signal jumps.

[0058] When the pixel circuit operates in the second stage, data writing can be realized, that is, the second stage can be a data writing stage. In the second stage, the first scanning signal S1 controls the second transistor M2 and the third transistor M3 to be turned on, the second scanning signal S2 controls the fourth transistor M4 to be turned off, the third scanning signal S3 controls the seventh transistor M7 to be turned off, the fourth scanning signal S4 controls the eighth transistor M8 to be turned off, and the light emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to be turned off.

[0059] After the second transistor M2 and the third transistor M3 are turned on, the data signal Vdata transmitted on the data line can be transmitted to the first electrode of the first transistor M1 through the second transistor M2, and the first transistor M1 is also turned on in the second stage according to the potential at the gate. At the same time, since the third transistor M3 is also turned on, the data signal Vdata is transmitted to the lower plate of the storage capacitor Cst through the first transistor M1 and the third transistor M3 in sequence, and the signal transmitted to the lower plate of the storage capacitor Cst is a data signal after threshold compensation, for example, it can be Vdata+Vth, where Vth is the threshold voltage of the first transistor M1. That is, in the second stage, the storage capacitor Cst stores the data information after threshold compensation.

[0060] At the same time, when the pixel circuit is working in the case of switching from the white screen L255 to the Blank L0 screen, in the second stage, the voltage jump of the data signal transmitted on the data line Data line will couple the voltage of the first power supply signal ELVDD, causing the voltage of the first power supply signal to change from ELVDD to ELVDD'. After the data signal is written into the storage capacitor Cst in the second stage, the voltage of the first power supply signal has not yet recovered to a stable voltage, that is, during the data writing process, the potential at the upper plate of the storage capacitor Cst is ELVDD'. In the subsequent working process, as the first power supply signal is restored from ELVDD' to ELVDD, the storage capacitor Cst will be floating (that is, the voltage change of the plate on one side of the storage capacitor Cst will cause the voltage change of the plate on the other side, but the voltage difference between the two plates remains unchanged), and the potential at the upper plate of the storage capacitor Cst changes from ELVDD' to ELVDD, which will cause the potential at the lower plate of the storage capacitor Cst to be coupled from Vg (the potential at the lower plate of the storage capacitor Cst is the same as the gate voltage of the first transistor M1) to Vg'. It can be seen that under the existing pixel circuit architecture, the potential change of the first power supply signal will be fed back to the gate of the first transistor M1 through the storage capacitor Cst, thereby causing the brightness of the pixel circuit to change and generating serious crosstalk problems.

[0061] In this embodiment, when the pixel circuit operates in the third stage, the initialization of the anode of the light-emitting unit and the coupling voltage stabilization of the gate of the first transistor M1 can be realized, that is, the third stage can be the second initialization stage. In the third stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to be turned off, the second scan signal S2 controls the fourth transistor M4 to be turned on, the third scan signal S3 controls the seventh transistor M7 to be turned off, the fourth scan signal S4 controls the eighth transistor M8 to be turned on, and the light-emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to be turned off.

[0062] After the eighth transistor M8 is turned on, the initialization signal VREFN can be transmitted to the anode of the light-emitting diode D1 through the eighth transistor M8 to initialize the anode of the light-emitting diode D1. At the same time, after the fourth transistor M4 is turned on, since the potential of the upper plate of the first capacitor C1 changes from ELVDD to ELVDD', the first capacitor C1 also appears floating (that is, the voltage change of the upper plate of the first capacitor C1 will cause the voltage change of the lower plate, and the voltage difference between the two plates remains unchanged). After the upper plate potential of the first capacitor C1 increases, the lower plate potential of the first capacitor C1 also increases. At the same time, the gate potential of the first transistor M1 is the same as the lower plate potential of the first capacitor C1, so the gate potential of the first transistor M1 is also increased due to the change in the upper plate potential of the first capacitor C1, so that the gate voltage attenuation of the first transistor M1 in the pixel circuit provided by the present application is weaker than the gate voltage attenuation of the first transistor in the existing 7T1C pixel circuit, thereby reducing the probability of crosstalk in the pixel circuit.

[0063] In the pixel circuit provided in this embodiment, the first capacitor C1 and the fourth transistor M4 cooperate to achieve the technical effect of reversely coupling the voltage fluctuation (Ripple) on the first power supply signal ELVDD to the gate of the first transistor M1, which can avoid the influence of the voltage fluctuation (Ripple) on the first power supply signal ELVDD on the gate voltage of the first transistor M1 during the subsequent recovery process, and effectively improve the crosstalk problem caused by the voltage jump on the data line.

[0064] When the pixel circuit operates in the fourth stage, the light emitting unit 10 can be driven to emit light, that is, the fourth stage can be a light emitting stage. In the fourth stage, the first scanning signal S1 controls the second transistor M2 and the third transistor M3 to be turned off, the second scanning signal S2 controls the fourth transistor M4 to be turned off, the third scanning signal S3 controls the seventh transistor M7 to be turned off, the fourth scanning signal S4 controls the eighth transistor M8 to be turned off, and the light emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to be turned on.

[0065] After the fifth transistor M5 and the sixth transistor M6 are turned on, the connection path from ELVDD to ELVSS in the pixel circuit is turned on, and at this time, the connection between the first power line and the first electrode of the first transistor M1 and the second electrode of the first transistor M1 and the anode of the light-emitting diode D1 are all turned on. The first power supply signal ELVDD provided by the first power line can be transmitted to the first electrode of the first transistor M1 through the fifth transistor M5, and the storage capacitor Cst can transmit the stored data signal after threshold compensation to the gate of the first transistor M1. The first transistor M1 can generate a corresponding drive signal according to the voltage at the gate, and output it to the anode of the light-emitting diode D1 through the sixth transistor M6 to drive the light-emitting diode D1 to emit light. Specifically, the drive signal output by the first transistor M1 can be a drive current, so that the light-emitting diode D1 can be lit according to the drive current output by the first transistor M1.

[0066] In the above pixel circuit, in the first stage, not only the storage capacitor Cst and the gate of the first transistor M1 are initialized, but also the first capacitor C1 is charged, so that the first capacitor C1 can reversely couple the voltage fluctuation (Ripple) on the first power supply signal ELVDD to the gate of the first transistor M1 after the data writing stage. By reversely coupling the voltage fluctuation (Ripple) on the first power supply signal ELVDD to the gate of the first transistor M1, the subsequent voltage fluctuation (Ripple) on the first power supply signal ELVDD can be prevented from affecting the gate voltage of the first transistor M1 during the recovery process, thereby improving the brightness uniformity of the pixel.

[0067] In one embodiment, each transistor in the pixel circuit provided by the present application is a P-type transistor, that is, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7 and the eighth transistor M8 can all be P-type transistors, for example, they can be polycrystalline silicon thin film transistors. In some other embodiments, the device selection of each unit in the pixel circuit can also select other suitable functional elements according to actual application requirements.

[0068] The embodiment of the present invention further provides a display device, which includes the pixel circuit described in any one of the above embodiments. The display device may include one or more groups of pixel circuits. Among them, the pixel circuit can be configured to generate a drive signal and drive the light-emitting unit 10 to emit light using the drive signal. The display device can be applied to any product or component with a display function, including but not limited to the following categories: mobile phones, televisions, digital cameras, tablet computers, laptops, desktop displays, smart bracelets, smart glasses, car displays, medical equipment, industrial control equipment, touch interactive terminals, etc., and the embodiment of the present invention does not specifically limit this.

[0069] An embodiment of the present invention further provides a driving method for driving a pixel circuit as described in any one of the above embodiments. The operation process of the pixel circuit in a display frame may include a first initialization phase, a data writing phase, and a second initialization phase. Figure 4 This is a flow chart of a driving method for a pixel circuit in one of the embodiments of the present application. In one of the embodiments, the driving method may include the following steps S100 to S300.

[0070] Step S100: In the first initialization stage, the level of the first scanning signal is controlled to be a cut-off level, and the level of the second scanning signal is controlled to be a conduction level.

[0071] In practical applications, appropriate levels can be selected as the on-level and off-level of each transistor according to the type of each transistor in the pixel circuit. Figure 3 Taking the pixel circuit shown in FIG. 1 as an example, a driving method of the pixel circuit is described. Figure 3 In the embodiment, each transistor is a P-type transistor, so in the present embodiment, the on-level may be a low level, and the off-level may be a high level. Figure 5 This is a timing diagram of a pixel circuit in one embodiment of the present application. Figure 5 The signal timing shown is used to drive the pixel circuit during a display frame. Figure 5 Among them, S1 can represent the first scanning signal, S2 can represent the second scanning signal, S3 can represent the third scanning signal, S4 can represent the fourth scanning signal, EM can represent the light emitting control signal, t1 can represent the first initialization stage, t2 can represent the data writing stage, t3 can represent the second initialization stage, and t4 can represent the light emitting stage.

[0072] In this embodiment, when the pixel circuit operates in the first initialization stage t1, the storage capacitor Cst and the gate of the first transistor M1 can be initialized. In the first initialization stage t1, the level of the first scanning signal S1 can be controlled to be a cut-off level, and the level of the second scanning signal S2 can be controlled to be a conduction level, so as to control the second transistor M2 and the third transistor M3 to be cut off, and control the fourth transistor M4 to be turned on.

[0073] In one embodiment, the driving method may further include the following steps: in the first initialization stage, controlling the level of the third scanning signal to be the on level, controlling the level of the fourth scanning signal to be the off level, and controlling the level of the light emitting control signal to be the off level.

[0074] Specifically, in the first initialization stage t1, by controlling the level of the third scan signal S3 to be the on level, controlling the level of the fourth scan signal S4 to be the off level, and controlling the level of the light-emitting control signal EM to be the off level, the seventh transistor M7 can be controlled to be turned on, and the eighth transistor M8, the fifth transistor M5, and the sixth transistor M6 can be controlled to be turned off.

[0075] After the seventh transistor M7 is turned on according to the third scan signal S3, the initialization signal VREFN can be transmitted through the seventh transistor M7 to the second end of the storage capacitor Cst and the gate of the first transistor M1 to initialize the second end of the storage capacitor Cst and the gate of the first transistor M1. In addition, after the fourth transistor M4 is turned on according to the second scan signal S2, the first power supply signal ELVDD can charge the first capacitor C1. At this time, the potentials at the upper plate of the first capacitor C1 and the upper plate of the storage capacitor Cst are both ELVDD, and the potentials at the lower plate of the first capacitor C1 and the lower plate of the storage capacitor Cst are both VREFN. It can be seen that in the first stage, the first capacitor C1 stores the potential information ELVDD before the first power supply signal jumps.

[0076] Step S200: In the data writing stage, the level of the first scanning signal is controlled to be the on level, and the level of the second scanning signal is controlled to be the off level.

[0077] In this embodiment, when the pixel circuit operates in the data writing phase t2, data writing can be implemented. In the data writing phase t2, the level of the first scanning signal S1 can be controlled to be the on level, and the level of the second scanning signal S2 can be controlled to be the off level, so as to control the second transistor M2 and the third transistor M3 to be turned on, and the fourth transistor M4 to be turned off.

[0078] In one of the embodiments, the driving method may further include the following steps: in the data writing stage, controlling the level of the third scanning signal to be the cut-off level, controlling the level of the fourth scanning signal to be the cut-off level, and controlling the level of the light emitting control signal to be the cut-off level.

[0079] Specifically, in the data writing stage t2, by controlling the level of the third scanning signal S3 to be the cut-off level, controlling the level of the fourth scanning signal S4 to be the cut-off level, and controlling the level of the light-emitting control signal EM to be the cut-off level, the seventh transistor M7, the eighth transistor M8, the fifth transistor M5, and the sixth transistor M6 can all be cut off.

[0080] After the second transistor M2 and the third transistor M3 are turned on according to the first scan signal S1, the data signal Vdata transmitted on the data line can be transmitted to the first electrode of the first transistor M1 through the second transistor M2, and the first transistor M1 is also turned on in the second stage according to the potential at its gate. At the same time, since the third transistor M3 is also turned on, the data signal Vdata is transmitted to the lower plate of the storage capacitor Cst through the first transistor M1 and the third transistor M3 in sequence, and the signal transmitted to the lower plate of the storage capacitor Cst is a data signal after threshold compensation, for example, it can be Vdata+Vth, where Vth is the threshold voltage of the first transistor M1. That is, in the second stage, the storage capacitor Cst stores the data information after threshold compensation.

[0081] Step S300: In the second initialization stage, the level of the first scanning signal is controlled to be a cut-off level, and the level of the second scanning signal is controlled to be a conduction level.

[0082] In this embodiment, when the pixel circuit operates in the second initialization stage t3, the initialization of the anode of the light-emitting unit and the coupling voltage stabilization of the gate of the first transistor M1 can be realized. In the second initialization stage t3, the level of the first scanning signal S1 can be controlled to be the cut-off level, and the level of the second scanning signal S2 can be controlled to be the on level, so as to control the second transistor M2 and the third transistor M3 to be cut off, and control the fourth transistor M4 to be turned on.

[0083] In one embodiment, the driving method may further include the following steps: in the second initialization stage, controlling the level of the third scanning signal to be the cut-off level, controlling the level of the fourth scanning signal to be the on level, and controlling the level of the light emitting control signal to be the cut-off level.

[0084] Specifically, in the second initialization stage t3, by controlling the level of the third scanning signal S3 to be the cut-off level, controlling the level of the fourth scanning signal S4 to be the on level, and controlling the level of the light-emitting control signal EM to be the cut-off level, the seventh transistor M7, the fifth transistor M5, and the sixth transistor M6 can all be cut off, and the eighth transistor M8 can be turned on.

[0085] After the eighth transistor M8 is turned on according to the fourth scan signal S4 , the initialization signal VREFN may be transmitted to the anode of the light emitting diode D1 through the eighth transistor M8 to initialize the anode of the light emitting diode D1 .

[0086] Considering that in the data writing phase t2, the voltage jump of the data signal transmitted on the data line Data line will cause coupling to the voltage of the first power supply signal ELVDD, causing the voltage of the first power supply signal to change from ELVDD to ELVDD'. The potential change of the first power supply signal will be fed back to the gate of the first transistor M1 through the storage capacitor Cst, thereby causing the luminance of the pixel circuit to change, which will cause serious crosstalk problems. Therefore, in this embodiment, the fourth transistor M4 is turned on according to the second scanning signal S2, and the potential of the upper plate of the first capacitor C1 changes from ELVDD to ELVDD', so the first capacitor C1 also appears floating (that is, the voltage change of the upper plate of the first capacitor C1 will cause the voltage change of the lower plate, and the voltage difference between the two plates remains unchanged), and after the upper plate potential of the first capacitor C1 increases, the lower plate potential of the first capacitor C1 also increases. At the same time, since the gate potential of the first transistor M1 is the same as the lower plate potential of the first capacitor C1, the gate potential of the first transistor M1 will also increase due to the change of the upper plate potential of the first capacitor C1, thereby achieving coupling voltage stabilization for the gate potential of the first transistor M1.

[0087] In one embodiment, the pixel circuit may further include a light-emitting stage after the second initialization stage during the operation of a display frame. The driving method may further include the following steps: in the light-emitting stage, controlling the level of the first scanning signal to be the cut-off level, controlling the level of the second scanning signal to be the cut-off level, controlling the level of the third scanning signal to be the cut-off level, controlling the level of the fourth scanning signal to be the cut-off level, and controlling the level of the light-emitting control signal to be the on-level.

[0088] In this embodiment, when the pixel circuit operates in the light emitting stage t4, the light emitting unit 10 can be driven to emit light. In the light emitting stage t4, the level of the first scanning signal S1 can be controlled to be the cut-off level, the level of the second scanning signal S2 can be controlled to be the cut-off level, the level of the third scanning signal S3 can be controlled to be the cut-off level, the level of the fourth scanning signal S4 can be controlled to be the cut-off level, and the level of the light emitting control signal EM can be controlled to be the on level, so as to control the second transistor M2, the third transistor M3, the fourth transistor M4, the seventh transistor M7 and the eighth transistor M8 to be cut off, and control the fifth transistor M5 and the sixth transistor M6 to be turned on.

[0089] After the fifth transistor M5 and the sixth transistor M6 are turned on, the connection path from ELVDD to ELVSS in the pixel circuit is turned on, and at this time, the connection between the first power line and the first electrode of the first transistor M1 and the second electrode of the first transistor M1 and the anode of the light-emitting diode D1 are all turned on. The first power supply signal ELVDD provided by the first power line can be transmitted to the first electrode of the first transistor M1 through the fifth transistor M5, and the storage capacitor Cst can transmit the stored data signal after threshold compensation to the gate of the first transistor M1. The first transistor M1 can generate a corresponding drive signal according to the voltage at the first electrode and the gate, and output it to the anode of the light-emitting diode D1 through the sixth transistor M6 to drive the light-emitting diode D1 to emit light. Specifically, the drive signal output by the first transistor M1 can be a drive current, so that the light-emitting diode D1 can be lit according to the drive current output by the first transistor M1.

[0090] In the pixel circuit driving method provided in the present embodiment, the timing of the second scanning signal S2 is used to control the operation of the fourth transistor M4, and the first capacitor C1 is used to achieve the technical effect of reversely coupling the voltage fluctuation (Ripple) on the first power supply signal ELVDD to the gate of the first transistor M1. By reversely coupling the voltage fluctuation (Ripple) on the first power supply signal ELVDD to the gate of the first transistor M1, the influence of the voltage fluctuation (Ripple) on the first power supply signal ELVDD on the gate voltage of the first transistor M1 during the subsequent recovery process can be avoided, and the crosstalk problem caused by the voltage jump on the data line is effectively improved, and the brightness uniformity of the pixel is improved.

[0091] It should be understood that, although the steps in the flowcharts of the accompanying drawings of the specification are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts of the accompanying drawings of the specification may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0092] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0093] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims.

Claims

1. A pixel circuit, characterized in that: It includes a data writing unit, a storage unit, a driving unit, a compensation unit, a coupling unit and a light emitting unit. The data writing unit is connected to the first end of the driving unit, and the data writing unit is configured to write a data signal into the first end of the driving unit according to a first scanning signal; The compensation unit is connected between the control end of the driving unit and the second end of the driving unit, and the compensation unit is configured to perform threshold compensation on the driving unit according to the first scanning signal; The storage unit is used to store the voltage at the control end of the driving unit; The coupling unit is connected between the control end of the driving unit and the first end of the driving unit, and the coupling unit is configured to control the potential at the control end of the driving unit according to the second scanning signal; The second end of the driving unit is connected to the light emitting unit, and the driving unit is configured to generate a driving signal according to the voltage of the control end of the driving unit; the driving signal is used to drive the light emitting unit to emit light.

2. The pixel circuit according to claim 1, characterized in that: The driving unit comprises a first transistor, a first electrode of the first transistor serves as a first end of the driving unit, a gate of the first transistor serves as a control end of the driving unit, and a second electrode of the first transistor serves as a second end of the driving unit; The data writing unit comprises a second transistor, a first electrode of the second transistor is connected to the first end of the driving unit, a gate of the second transistor is connected to the first scanning line, and a second electrode of the second transistor is connected to the data line; The compensation unit includes a third transistor, a first electrode of the third transistor is connected to the second end of the driving unit, a gate of the third transistor is connected to the first scanning line, and a second electrode of the third transistor is connected to the control end of the driving unit. The storage unit comprises a storage capacitor, a first end of the storage capacitor is connected to the first power line, and a second end of the storage capacitor is connected to the control end of the driving unit; The coupling unit includes a fourth transistor and a voltage-stabilizing capacitor, the first electrode of the fourth transistor is connected to the first power line, the gate of the fourth transistor is connected to the second scan line, the second electrode of the fourth transistor is connected to the first end of the voltage-stabilizing capacitor, and the second end of the voltage-stabilizing capacitor is connected to the control end of the driving unit.

3. The pixel circuit according to claim 1 or 2, characterized in that: The pixel circuit further includes a first light emitting control unit and a second light emitting control unit. The first light-emitting control unit is connected between the first power line and the first end of the driving unit, and the first light-emitting control unit is configured to turn on or off the connection between the first power line and the first end of the driving unit according to a light-emitting control signal; The second light emitting control unit is connected between the second end of the driving unit and the light emitting unit, and is configured to switch on or off the connection between the second end of the driving unit and the light emitting unit according to a light emitting control signal.

4. The pixel circuit according to claim 3, characterized in that: The first light emitting control unit comprises a fifth transistor, a first electrode of the fifth transistor is connected to the first power line, a gate of the fifth transistor is connected to the light emitting control signal line, and a second electrode of the fifth transistor is connected to the first end of the driving unit; The second light emitting control unit includes a sixth transistor, a first electrode of the sixth transistor is connected to the second end of the driving unit, a gate of the sixth transistor is connected to the light emitting control signal line, and a second electrode of the sixth transistor is connected to the light emitting unit.

5. The pixel circuit according to claim 1, characterized in that: The pixel circuit further includes a first initialization unit and a second initialization unit. The first initialization unit is connected to the control end of the driving unit, and the first initialization unit is configured to transmit an initialization signal to the control end of the driving unit according to the third scanning signal, so as to initialize the control end of the driving unit; The second initialization unit is connected to the light emitting unit, and is configured to transmit the initialization signal to the light emitting unit according to a fourth scanning signal to initialize the light emitting unit.

6. The pixel circuit according to claim 5, characterized in that: The first initialization unit includes a seventh transistor, a first electrode of the seventh transistor is connected to the control end of the driving unit, a gate of the seventh transistor is connected to the third scan line, and a second electrode of the seventh transistor is connected to the initialization signal line. The second initialization unit includes an eighth transistor, a first electrode of the eighth transistor is connected to the light emitting unit, a gate of the eighth transistor is connected to a fourth scan line, and a second electrode of the eighth transistor is connected to an initialization signal line.

7. The pixel circuit according to claim 2 or 6, characterized in that: The third transistor and the seventh transistor are dual-gate transistors.

8. A display device, characterized in that: A pixel circuit comprising any one of claims 1 to 7.

9. A method for driving a pixel circuit, for driving the pixel circuit according to any one of claims 1 to 7, wherein the pixel circuit comprises a first initialization phase, a data writing phase, and a second initialization phase during a display frame operation, characterized in that: The driving method comprises: In the first initialization stage, the level of the first scanning signal is controlled to be a cut-off level, and the level of the second scanning signal is controlled to be a conduction level; In the data writing stage, the level of the first scanning signal is controlled to be an on level, and the level of the second scanning signal is controlled to be an off level; In the second initialization stage, the level of the first scanning signal is controlled to be a cut-off level, and the level of the second scanning signal is controlled to be a turn-on level.

10. The driving method according to claim 9, characterized in that: The driving method further includes: In the first initialization stage, the level of the third scanning signal is controlled to be the on level, the level of the fourth scanning signal is controlled to be the off level, and the level of the light emitting control signal is controlled to be the off level; In the data writing stage, the level of the third scanning signal is controlled to be a cut-off level, the level of the fourth scanning signal is controlled to be a cut-off level, and the level of the light emitting control signal is controlled to be a cut-off level; In the second initialization stage, the level of the third scanning signal is controlled to be a cut-off level, the level of the fourth scanning signal is controlled to be a conduction level, and the level of the light emitting control signal is controlled to be a cut-off level; Optionally, the pixel circuit further includes a light emitting stage after the second initialization stage during a working process of a display frame, and the driving method further includes: In the light-emitting stage, the level of the first scanning signal is controlled to be a cut-off level, the level of the second scanning signal is controlled to be a cut-off level, the level of the third scanning signal is controlled to be a cut-off level, the level of the fourth scanning signal is controlled to be a cut-off level, and the level of the light-emitting control signal is controlled to be a turn-on level.

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