A serial port control method and device, electronic equipment and storage medium

Abstract

The application discloses a serial port control method and device, electronic equipment and a storage medium, and is applied to a server. A programmable pin is connected between a baseboard management controller and a processor in the server. The method comprises the following steps: when the baseboard management controller obtains a serial port control command, the level state of a plurality of programmable pins is set according to the target serial port state required to be set and contained in the serial port control command; after the server is restarted, the processor obtains the level state of the plurality of programmable pins, and determines the corresponding target serial port state identifier according to the level state of the plurality of programmable pins; and the processor sets the state of an ABL serial port to the target serial port state corresponding to the target serial port state identifier. The application improves the efficiency of opening the ABL serial port and reduces the boot time of the server.

Description

Technical Field

[0001] This application relates to the field of computer technology, and more specifically, to a serial port control method, apparatus, electronic device, and storage medium. Background Technology

[0002] The ABL (AGESA Boot Loader) is a key component in the initialization process of the AMD processor platform. It is responsible for the pre-initialization of the processor and platform during the initial system startup, laying a solid foundation for subsequent BIOS (Basic Input Output System) firmware execution and operating system loading. The ABL's main responsibilities cover processor and memory initialization, hardware resource management, error detection and recovery, and platform security initialization, ensuring the system is in optimal condition from the start. In related technologies, two reboots are required for the ABL serial port to become active, which is inefficient and leads to excessively long server boot times.

[0003] Therefore, how to improve the efficiency of opening the ABL serial port is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this application is to provide a serial port control method, device, electronic device, and storage medium that improves the efficiency of opening the ABL serial port.

[0005] To achieve the above objectives, this application provides a serial port control method applied to a server, wherein the baseboard management controller in the server is connected to the programmable pins of the processor, and the method includes:

[0006] When the baseboard management controller receives a serial port control command, it sets the level state of multiple programmable pins according to the target serial port state to be set contained in the serial port control command.

[0007] After the server restarts, the processor acquires the level states of multiple programmable pins and determines the corresponding target serial port status identifier based on the level states of the multiple programmable pins.

[0008] The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0009] The programmable pin is a general-purpose input / output pin;

[0010] Accordingly, the baseboard management controller sets the level states of multiple programmable pins according to the target serial port state to be set included in the serial port control command, including:

[0011] The baseboard management controller determines the level states that need to be set for multiple general-purpose input / output pins based on the target serial port state to be set contained in the serial port control command.

[0012] Access the general-purpose input / output pin level status register and set the level status of the general-purpose input / output pin to the desired level status.

[0013] The processor acquires the level states of multiple programmable pins, including:

[0014] The processor accesses the general-purpose input / output pin mode register, configures multiple general-purpose input / output pins into input mode, and reads the level state of multiple general-purpose input / output pins.

[0015] The processor sets the ABL serial port status to the target serial port status corresponding to the target serial port status identifier, including:

[0016] The processor loads the configuration block data corresponding to the target serial port status identifier to set the status of the ABL serial port to the target serial port status.

[0017] After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, it further includes:

[0018] Load the ABL serial port, execute the startup phase of the basic input / output system, and output the ABL serial port information.

[0019] After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, it further includes:

[0020] During the startup phase of the basic input / output system, if the setup is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setup success information in the first IPMI command and the target serial port status identifier.

[0021] If the setup fails, the basic input / output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setup failure information in the second IPMI command and the target serial port status identifier.

[0022] Specifically, the level states of multiple programmable pins are set according to the target serial port state to be set in the serial port control command, including:

[0023] Determine the target serial port status identifier corresponding to the target serial port status that needs to be set in the serial port control command;

[0024] Determine the programmable pin corresponding to each flag bit in the target serial port status flag, and set the level state of the corresponding programmable pin by accessing the programmable pin level status register based on the flag value of each flag bit;

[0025] Wherein, if the flag value of the flag bit is a first preset value, the level state of the programmable pin corresponding to the flag bit is set to low level; if the flag value of the flag bit is a second preset value, the level state of the programmable pin corresponding to the flag bit is set to high level.

[0026] Accordingly, the corresponding target serial port status identifier is determined based on the level states of the multiple programmable pins, including:

[0027] The identifier value of the corresponding identifier bit in the target serial port status identifier is determined based on the level state of each of the programmable pins;

[0028] Wherein, if the level state of the programmable pin is low, the identifier value of the corresponding identifier bit in the target serial port status identifier is the first preset value; if the level state of the programmable pin is high, the identifier value of the corresponding identifier bit in the target serial port status identifier is the second preset value.

[0029] To achieve the above objectives, this application provides a serial port control device applied to a server, wherein the baseboard management controller in the server is connected to the programmable pins of the processor, and the device includes:

[0030] The first setting module is used to set the level state of multiple programmable pins according to the target serial port state to be set in the serial port control command when a serial port control command is obtained.

[0031] The determination module is used to acquire the level status of multiple programmable pins after the server restarts, and determine the corresponding target serial port status identifier based on the level status of the multiple programmable pins.

[0032] The second setting module is used to set the status of the ABL serial port to the target serial port status corresponding to the target serial port status identifier.

[0033] To achieve the above objectives, this application provides an electronic device, comprising:

[0034] Memory, used to store computer programs;

[0035] A processor is used to implement the steps of the serial port control method described above when executing the computer program.

[0036] To achieve the above objectives, this application provides a non-volatile storage medium storing a computer program, which, when executed by a processor, implements the steps of the serial port control method described above.

[0037] To achieve the above objectives, this application provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the serial port control method described above.

[0038] As can be seen from the above scheme, the serial port control method provided in this application is applied to a server, wherein the baseboard management controller in the server is connected to the programmable pins of the processor. The method includes: when the baseboard management controller obtains a serial port control command, setting the level state of multiple programmable pins according to the target serial port state to be set contained in the serial port control command; after the server restarts, the processor obtains the level state of the multiple programmable pins and determines the corresponding target serial port state identifier according to the level state of the multiple programmable pins; the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0039] The serial port control method provided in this application connects the BMC (Browser Control Center) to the processor's programmable pins in hardware. The BMC controls the voltage levels of these programmable pins, enabling real-time out-of-band (ABL) serial port activation. Even if the server crashes during the ABL phase, the ABL serial port can still be activated to collect fault information. Furthermore, the processor does not need to communicate with the BMC to obtain the ABL serial port status settings; even if the BIOS-BMC communication channel malfunctions, the ABL serial port can still be activated to collect fault information. Additionally, this application only requires a single server restart to activate the ABL serial port, improving the efficiency of ABL serial port activation and reducing server boot time. This application also discloses a serial port control device, an electronic device, a non-volatile storage medium, and a computer program product, all of which achieve the same technical effects.

[0040] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The drawings are used to provide a further understanding of this disclosure and constitute a part of the specification. They are used together with the following detailed description to explain this disclosure, but do not constitute a limitation of this disclosure. In the drawings:

[0042] Figure 1 This is a flowchart illustrating a serial port control method according to an exemplary embodiment;

[0043] Figure 2 A flowchart illustrating another serial port control method according to an exemplary embodiment;

[0044] Figure 3 A flowchart of a serial port control method provided in an application embodiment of this application;

[0045] Figure 4 This is a structural diagram illustrating a serial port control device according to an exemplary embodiment;

[0046] Figure 5 This is a structural diagram of an electronic device according to an exemplary embodiment. Detailed Implementation

[0047] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Furthermore, in the embodiments of this application, "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0048] The ABL (AGESA Boot Loader) is a key component in the initialization process of the AMD processor platform. It is responsible for the pre-initialization of the processor and platform during the initial system startup, laying a solid foundation for subsequent BIOS (Basic Input Output System) firmware execution and operating system loading. The ABL's main responsibilities cover processor and memory initialization, hardware resource management, error detection and recovery, and platform security initialization, ensuring the system is in optimal condition from the very beginning of startup.

[0049] The ABL (Automatic Boot Record) is crucial for the boot process of AMD processor platforms. It not only ensures the safe and efficient initialization of the processor and platform hardware but also provides a solid guarantee for the stable operation of the entire system. By optimizing the ABL, AMD can further improve system performance, enhance compatibility, and strengthen platform security. The ABL serial port is an important tool for outputting critical information to confirm status and for troubleshooting. However, because printing ABL serial port information increases the CPU's workload, significantly extending server boot time, the ABL serial port is usually disabled. Enabling the ABL serial port requires engineers to manually modify the code and recompile to generate a new BIOS firmware.

[0050] In related technologies, the BIOS and BMC (Baseboard Management Controller) store the setting values ​​representing the ABL serial port switches in EEPROM (Electrically Erasable Programmable Read-Only Memory). Users can use IPMI (Intelligent Platform Management Interface) commands to have the BMC write the user-defined values ​​to the EEPROM. After restarting the server, the BIOS retrieves the corresponding settings from the BMC via IPMI commands during the boot process, updates the settings, and then restarts to make the settings take effect.

[0051] In the above scheme, if the server crashes during the ABL phase, the BIOS will not continue execution, and therefore the scheme will not work in this situation. This means that when the server fails during the ABL phase or early in the BIOS startup, the above scheme cannot help collect fault information. Furthermore, even if the new ABL serial port switch settings are successfully applied during the BIOS startup process, two restarts are required for the ABL serial port to take effect, which is inefficient and leads to excessively long server boot times. Additionally, if the interaction channel between the BIOS and BMC malfunctions, such as due to network problems or other faults, the BIOS will be unable to obtain the ABL serial port switch settings from the BMC via IPMI commands, thus preventing the ABL serial port from being enabled.

[0052] Therefore, in this application, by connecting the BMC to the processor's programmable pins in hardware, and having the BMC control the voltage levels of the processor's programmable pins, the ABL serial port can be enabled in real-time out-of-band. Even if the server crashes during the ABL phase, the ABL serial port can still be enabled to collect fault information. Simultaneously, the processor does not need to communicate with the BMC to obtain the ABL serial port status settings; even if the BIOS-BMC communication channel malfunctions, the ABL serial port can still be enabled to collect fault information. Furthermore, this application only requires a single server restart for the ABL serial port enabling setting to take effect, improving the efficiency of enabling the ABL serial port and reducing server boot time.

[0053] This application discloses a serial port control method that improves the efficiency of opening the ABL serial port.

[0054] See Figure 1 A flowchart illustrating a serial port control method according to an exemplary embodiment is shown below. Figure 1 As shown, it includes:

[0055] S101: When the baseboard management controller receives a serial port control command, it sets the level state of multiple programmable pins according to the target serial port state to be set contained in the serial port control command.

[0056] This embodiment is applied to a server, wherein the baseboard management controller is connected to the programmable pins of the processor, and the baseboard management controller can control the level state of the programmable pins of the processor. In this embodiment, the programmable pins can be general-purpose input / output (GPIO) pins. The baseboard management controller determines the level state that multiple GPIO pins need to be set according to the target serial port state to be set contained in the serial port control command, accesses the GPIO pin level state register, and sets the level state of the GPIO pins to the required level state.

[0057] In practical implementation, during the BMC code development phase, the server agrees with the BIOS on the specified programmable pins and their arrangement order, such as GPIO0, GPIO1, and GPIO2. Each GPIO has two states: high (1) and low (0), which can form ID values ​​from 0 to 7. The server also agrees with the BIOS on the corresponding serial port status flags and settings. For example, a serial port status flag of 000 means the ABL serial port is off, while a serial port status flag of 001 means the ABL serial port is on. The BMC provides the corresponding IPMI / Redfish interaction interface to the user. For example, `raw 0x3c 0x1` means the ABL serial port is on. When the BMC receives this command from the user, it sets GPIO0, GPIO1, and GPIO2 to 1, 0, and 0, respectively.

[0058] When a user needs to control the status of the ABL serial port, they first configure it through the IPMI / Redfish interface provided by the BMC, for example, raw 0x3c 0x1, where 0x1 is the target serial port status identifier, indicating that the ABL serial port is set to the open state. After receiving the corresponding command, the BMC will set the corresponding level states of the GPIOs agreed upon with the BIOS, such as setting GPIO0, GPIO1, and GPIO2 to 1, 0, and 0, respectively.

[0059] S102: After the server restarts, the processor acquires the level status of multiple programmable pins and determines the corresponding target serial port status identifier based on the level status of the multiple programmable pins.

[0060] In practice, the server is restarted, the processor obtains the agreed-upon level states of the programmable pins, and determines the corresponding target serial port status identifier based on the level states of the programmable pins and the agreed-upon arrangement order.

[0061] As one possible implementation, the processor acquires the level states of the multiple programmable pins by: accessing a general-purpose input / output (GPIO) pin mode register, configuring the multiple GPIO pins to input mode, and reading the level states of the multiple GPIO pins. In a specific implementation, during the ABL loading phase, the processor accesses the GPIO pin mode register and sets the corresponding GPIO to GPI (input mode) to receive the level states of the GPIO.

[0062] For example, the processor obtains the level states of GPIO0, GPIO1, and GPIO2 as 1 (high), 0 (low), and 0 (low) respectively, and the determined target serial port status is identified as 001.

[0063] S103: The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0064] In practice, the processor sets the ABL serial port status to the target serial port status corresponding to the target serial port status identifier. For example, if the target serial port status identifier is 001 and the corresponding target serial port status is enabled, then the processor sets the ABL serial port status to enabled.

[0065] As a possible implementation method, the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, including: the processor loading the configuration block data corresponding to the target serial port state identifier to set the state of the ABL serial port to the target serial port state.

[0066] In practical implementation, during the BIOS code development phase, different serial port status flags are pre-defined to correspond to different APCB (AGESA Platform Configuration Block) data settings. For example, a serial port status flag of 000 corresponds to APCB data that sets the ABL serial port switch to off, while a serial port status flag of 001 corresponds to APCB data that sets the ABL serial port switch to on. After determining the target serial port status flag, the APCB data settings corresponding to the target serial port status flag are loaded. For example, if the target serial port status flag is 001, the ABL serial port is set to on, and ABL serial port information can then be output.

[0067] As a possible implementation, after the processor sets the ABL serial port status to the target serial port status corresponding to the target serial port status identifier, it further includes: loading the ABL serial port, executing the basic input / output system startup phase, and outputting the ABL serial port information. In a specific implementation, the server continues with POST (Power-On Self-Test), performing the ABL phase and the BIOS startup phase.

[0068] The serial port control method provided in this application embodiment connects the BMC (Browser Control Center) to the processor's programmable pins in hardware. The BMC controls the voltage levels of these programmable pins, enabling real-time out-of-band (ABL) serial port activation. Even if the server crashes during the ABL phase, the ABL serial port can still be activated to collect fault information. Furthermore, the processor does not need to communicate with the BMC to obtain the ABL serial port status settings; even if the BIOS-BMC communication channel malfunctions, the ABL serial port can still be activated to collect fault information. Additionally, this application embodiment requires only a single server restart for the ABL serial port activation setting to take effect, improving the efficiency of ABL serial port activation and reducing server boot time.

[0069] This application discloses a serial port control method. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution. Specifically:

[0070] See Figure 2 A flowchart illustrating another serial port control method according to an exemplary embodiment, such as... Figure 2 As shown, it includes:

[0071] S201: When the baseboard management controller receives a serial port control command, it sets the level state of multiple programmable pins according to the target serial port state to be set contained in the serial port control command.

[0072] S202: After the server restarts, the processor acquires the level status of multiple programmable pins and determines the corresponding target serial port status identifier based on the level status of the multiple programmable pins.

[0073] S203: The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier;

[0074] S204: Load the ABL serial port, execute the startup phase of the basic input / output system, and output the ABL serial port information;

[0075] S205: During the startup phase of the basic input / output system, if the setup is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setup success information in the first IPMI command and the target serial port status identifier; if the setup fails, the basic input / output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setup failure information in the second IPMI command and the target serial port status identifier.

[0076] In practice, during the BIOS boot process, if the ABL serial port status is successfully set, the BIOS sends a first IPMI command to the BMC containing success information and the target serial port status identifier. Upon receiving this command, the BMC creates a system event log containing the success information and the target serial port status identifier. Conversely, if the serial port setup fails, the BIOS sends a second IPMI command to the BMC containing failure information and the target serial port status identifier. Upon receiving this command, the BMC generates an alarm log containing the failure information and the target serial port status identifier. The alarm log can also record the cause of the failure and a timestamp, providing more information for later troubleshooting and system maintenance, helping to quickly locate the problem.

[0077] As a preferred implementation, after the processor loads the APCB data, in addition to recording a flag indicating whether the setup was successful, a status indicator light or a status notification can be sent to the administrator via a network management interface to clearly inform them of the current status of the ABL serial port. This way, even if the user cannot see the ABL serial port information temporarily, they can still understand the port's status through other means.

[0078] As a preferred implementation, if the processor fails to load APCB data, an automatic retry mechanism can be designed. After an initial setup failure, the processor can automatically retry, for example, by setting retry intervals of 1 minute, 5 minutes, or 15 minutes, until success or the maximum number of retries is reached. This improves system robustness and reduces setup failures caused by transient faults.

[0079] As a feasible implementation, setting the level states of multiple programmable pins according to the target serial port state to be set included in the serial port control command includes: determining a target serial port state identifier corresponding to the target serial port state to be set included in the serial port control command; determining the programmable pin corresponding to each identifier bit in the target serial port state identifier, and setting the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identifier value of each identifier bit; wherein, if the identifier value of the identifier bit is a first preset value, the level state of the programmable pin corresponding to the identifier bit is set to low level, and if the identifier value of the identifier bit is a second preset value, the level state of the programmable pin corresponding to the identifier bit is set to high level; correspondingly, determining the corresponding target serial port state identifier according to the level states of the multiple programmable pins includes: determining the identifier value of the identifier bit corresponding to the target serial port state identifier according to the level state of each programmable pin; wherein, if the level state of the programmable pin is low level, the identifier value of the identifier bit corresponding to the target serial port state identifier is the first preset value, and if the level state of the programmable pin is high level, the identifier value of the identifier bit corresponding to the target serial port state identifier is the second preset value.

[0080] In practical implementation, when the BMC receives a user's serial port control command, it first determines the target serial port status identifier. Then, according to a pre-defined agreement, it determines the programmable pin corresponding to each identifier bit in the target serial port status identifier. Next, it maps the flag value of each identifier bit in the target serial port status identifier to the specific programmable pin, that is, it sets the level state of the programmable pin by accessing the programmable pin level status register based on the identifier value. If the identifier bit value is a first preset value (e.g., 0), the corresponding programmable pin level state in the programmable pin level status register is set to low; if the identifier bit value is a second preset value (e.g., 1), the corresponding programmable pin level state in the programmable pin level status register is set to high. After the server restarts, the processor monitors the level states of each programmable pin, and then sets the flag value of the corresponding identifier bit in the target serial port status identifier according to the level state of each programmable pin. If the level state is low, the corresponding identifier bit in the target serial port status identifier will be set to the first preset value; if the level state is high, the corresponding identifier bit in the target serial port status identifier will be set to the second preset value.

[0081] The following describes an application embodiment provided by this application, such as... Figure 3 As shown, it includes the following steps:

[0082] The user sends a command to turn on the ABL serial port switch, such as raw 0x3c 0x1;

[0083] The BMC receives a command and sets the level state of the GPIO;

[0084] The BMC sets the GPIO level state, GPIO0(1), GPIO1(0), GPIO2(0), forming an ID of 001;

[0085] The user restarted the server;

[0086] During the ABL loading phase, the CPU (Central Processing Unit) sets the corresponding GPIO to GPI mode.

[0087] The CPU obtains the level status of the corresponding GPIO and forms an ID of 001;

[0088] The CPU finds the matching APCB data based on ID 001;

[0089] CPU loads APCB data (ABL is set to enabled).

[0090] The CPU records the flag indicating whether the setting was successful and outputs APOB.

[0091] The system determines whether the setup was successful. If successful, the user can see the ABL serial port information, and the BIOS sends an IPMI command to the BMC, containing a success message and the setup ID. The BMC records the corresponding SEL (System Event Log): setup successful, ID 001. If unsuccessful, the user cannot see the ABL serial port information, and the BIOS sends an IPMI command to the BMC, containing a failure message and the setup ID. The BMC records the SEL alarm log for the failure.

[0092] The following describes a serial port control device provided in an embodiment of this application. The serial port control device described below and the serial port control method described above can be referred to each other.

[0093] See Figure 4 A structural diagram of a serial port control device according to an exemplary embodiment is shown, as follows: Figure 4 As shown, it includes:

[0094] The first setting module 401 is used to set the level state of multiple programmable pins according to the target serial port state to be set in the serial port control command when a serial port control command is obtained.

[0095] The determination module 402 is used to acquire the level status of multiple programmable pins after the server restarts, and determine the corresponding target serial port status identifier based on the level status of the multiple programmable pins.

[0096] The second setting module 403 is used to set the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier.

[0097] The serial port control device provided in this application embodiment is connected to the processor's programmable pin via a hardware BMC. The BMC controls the voltage level of the processor's programmable pin, enabling real-time out-of-band (ABL) serial port activation. Even if the server crashes during the ABL phase, the ABL serial port can still be activated to collect fault information. Furthermore, the processor does not need to communicate with the BMC to obtain the ABL serial port status settings; even if the BIOS-BMC communication channel malfunctions, the ABL serial port can still be activated to collect fault information. Additionally, this application embodiment requires only a single server restart for the ABL serial port activation setting to take effect, improving the efficiency of ABL serial port activation and reducing server boot time.

[0098] Based on the above embodiments, as a preferred embodiment, the programmable pin is a general-purpose input / output pin;

[0099] Accordingly, the first setting module 401 is specifically used to: determine the level state that needs to be set for multiple general-purpose input / output pins according to the target serial port state that needs to be set contained in the serial port control command; access the general-purpose input / output pin level state register, and set the level state of the general-purpose input / output pins to the level state that needs to be set.

[0100] Based on the above embodiments, as a preferred implementation, the determining module 402 is specifically used to: access the general input / output pin mode register, configure the plurality of general input / output pins as input modes, and read the level states of the plurality of general input / output pins.

[0101] Based on the above embodiments, as a preferred implementation, the second setting module 403 is specifically used to: load the configuration block data corresponding to the target serial port status identifier, so as to set the status of the ABL serial port to the target serial port status.

[0102] Based on the above embodiments, as a preferred embodiment, it further includes:

[0103] The loading module is used to load the ABL serial port, execute the startup phase of the basic input / output system, and output the ABL serial port information.

[0104] Based on the above embodiments, as a preferred embodiment, it further includes:

[0105] The generation module is configured to, during the startup phase of the basic input / output system, if the setup is successful, send a first IPMI command to the baseboard management controller so that the baseboard management controller generates a system event log based on the setup success information in the first IPMI command and the target serial port status identifier; if the setup fails, the basic input / output system sends a second IPMI command to the baseboard management controller so that the baseboard management controller generates an alarm log based on the setup failure information in the second IPMI command and the target serial port status identifier.

[0106] Based on the above embodiments, as a preferred implementation, the first setting module 401 is specifically used for: determining the target serial port status identifier corresponding to the target serial port status to be set included in the serial port control command; determining the programmable pin corresponding to each identifier bit in the target serial port status identifier, and setting the level state of the corresponding programmable pin by accessing the programmable pin level state register based on the identifier value of each identifier bit; wherein, if the identifier value of the identifier bit is a first preset value, the level state of the programmable pin corresponding to the identifier bit is set to low level, and if the identifier value of the identifier bit is a second preset value, the level state of the programmable pin corresponding to the identifier bit is set to high level;

[0107] Accordingly, the second setting module 403 is specifically used to: determine the identifier value of the corresponding identifier bit in the target serial port status identifier according to the level state of each programmable pin; wherein, if the level state of the programmable pin is low, the identifier value of the corresponding identifier bit in the target serial port status identifier is the first preset value, and if the level state of the programmable pin is high, the identifier value of the corresponding identifier bit in the target serial port status identifier is the second preset value.

[0108] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0109] Based on the hardware implementation of the above program modules, and in order to implement the method of the embodiments of this application, the embodiments of this application also provide an electronic device. Figure 5 This is a structural diagram of an electronic device according to an exemplary embodiment, such as... Figure 5 As shown, the electronic device includes:

[0110] Communication interface 1 enables information exchange with other devices, such as network devices;

[0111] Processor 2 is connected to communication interface 1 to enable information exchange with other devices. When running a computer program, it executes the serial port control method provided by one or more of the above-mentioned technical solutions. The computer program is stored in memory 3.

[0112] Of course, in practical applications, the various components in an electronic device are coupled together through bus system 4. It can be understood that bus system 4 is used to achieve communication and connection between these components. In addition to the data bus, bus system 4 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 5 The general will label all buses as Bus System 4.

[0113] The memory 3 in this embodiment is used to store various types of data to support the operation of the electronic device. Examples of such data include any computer program used to operate on the electronic device.

[0114] It is understood that memory 3 can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), ferromagnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM); magnetic surface memory can be disk storage or magnetic tape storage. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Synchronous Static Random Access Memory (SSRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic Random Access Memory (DDRSDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), SyncLink Dynamic Random Access Memory (SLDRAM), and Direct Rambus Random Access Memory (DRRAM).The memory 3 described in the embodiments of this application is intended to include, but is not limited to, these and any other suitable types of memory.

[0115] The methods disclosed in the embodiments of this application can be applied to processor 2, or implemented by processor 2. Processor 2 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in processor 2 or by instructions in the form of software. The processor 2 may be a general-purpose processor, DSP, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 2 can implement or execute the methods, steps and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in memory 3. Processor 2 reads the program in memory 3 and completes the steps of the aforementioned method in combination with its hardware.

[0116] When processor 2 executes the program, it implements the corresponding processes in the various methods of the embodiments of this application. For the sake of brevity, these will not be described in detail here.

[0117] In an exemplary embodiment, this application also provides a non-volatile storage medium storing a computer program that can be executed by a processor 2 to perform the steps described in the aforementioned method.

[0118] In an exemplary embodiment, this application also provides a computer program product, including a computer program executed by a processor 2 to perform the steps described in the aforementioned method.

[0119] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to computer program instructions. The aforementioned computer program can be stored in a non-volatile storage medium, and when executed, it performs the steps of the above method embodiments. Alternatively, if the integrated units of this application are implemented as software functional modules and sold or used as independent products, they can also be stored in a non-volatile storage medium. Based on this understanding, the technical solutions of the embodiments of this application, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a non-volatile storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, network device, etc.) to execute all or part of the methods described in the various embodiments of this application.

[0120] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A serial port control method, characterized in that, Applied to a server, wherein the baseboard management controller is connected to a programmable pin of the processor, the method includes: When the baseboard management controller receives a serial port control command, it sets the level state of multiple programmable pins according to the target serial port state to be set contained in the serial port control command. After the server restarts, the processor acquires the level states of multiple programmable pins and determines the corresponding target serial port status identifier based on the level states of the multiple programmable pins. The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier. Specifically, the level states of multiple programmable pins are set according to the target serial port state to be set in the serial port control command, including: Determine the target serial port status identifier corresponding to the target serial port status that needs to be set in the serial port control command; Determine the programmable pin corresponding to each flag bit in the target serial port status flag, and set the level state of the corresponding programmable pin by accessing the programmable pin level status register based on the flag value of each flag bit; Accordingly, the corresponding target serial port status identifier is determined based on the level states of the multiple programmable pins, including: The identifier value of the corresponding identifier bit in the target serial port status identifier is determined based on the level state of each of the programmable pins.

2. The serial port control method according to claim 1, characterized in that, The programmable pin is a general-purpose input / output pin; Accordingly, the baseboard management controller sets the level states of multiple programmable pins according to the target serial port state to be set included in the serial port control command, including: The baseboard management controller determines the level states that need to be set for multiple general-purpose input / output pins based on the target serial port state to be set contained in the serial port control command. Access the general-purpose input / output pin level status register and set the level status of the general-purpose input / output pin to the desired level status.

3. The serial port control method according to claim 2, characterized in that, The processor acquires the level states of the multiple programmable pins, including: The processor accesses the general-purpose input / output pin mode register, configures multiple general-purpose input / output pins into input mode, and reads the level state of multiple general-purpose input / output pins.

4. The serial port control method according to claim 1, characterized in that, The processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, including: The processor loads the configuration block data corresponding to the target serial port status identifier to set the status of the ABL serial port to the target serial port status.

5. The serial port control method according to claim 1, characterized in that, After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, it also includes: Load the ABL serial port, execute the startup phase of the basic input / output system, and output the ABL serial port information.

6. The serial port control method according to claim 5, characterized in that, After the processor sets the state of the ABL serial port to the target serial port state corresponding to the target serial port state identifier, it also includes: During the startup phase of the basic input / output system, if the setup is successful, the basic input / output system sends a first IPMI command to the baseboard management controller, so that the baseboard management controller generates a system event log based on the setup success information in the first IPMI command and the target serial port status identifier. If the setup fails, the basic input / output system sends a second IPMI command to the baseboard management controller, so that the baseboard management controller generates an alarm log based on the setup failure information in the second IPMI command and the target serial port status identifier.

7. The serial port control method according to claim 1, characterized in that, When setting the level state of the corresponding programmable pin based on the identifier value of each of the identifier bits, if the identifier value of the identifier bit is a first preset value, the level state of the programmable pin corresponding to the identifier bit is set to low level; if the identifier value of the identifier bit is a second preset value, the level state of the programmable pin corresponding to the identifier bit is set to high level. Accordingly, when determining the identifier value of the corresponding identifier bit in the target serial port status identifier based on the level state of each programmable pin, if the level state of the programmable pin is low, the identifier value of the corresponding identifier bit in the target serial port status identifier is the first preset value; if the level state of the programmable pin is high, the identifier value of the corresponding identifier bit in the target serial port status identifier is the second preset value.

8. A serial port control device, characterized in that, Applied to a server, wherein the baseboard management controller is connected to a programmable pin of the processor, the device includes: The first setting module is used to set the level state of multiple programmable pins according to the target serial port state to be set in the serial port control command when a serial port control command is obtained. The determination module is used to acquire the level status of multiple programmable pins after the server restarts, and determine the corresponding target serial port status identifier based on the level status of the multiple programmable pins. The second setting module is used to set the status of the ABL serial port to the target serial port status corresponding to the target serial port status identifier. Specifically, the first setting module is used to: determine the target serial port status identifier corresponding to the target serial port status to be set contained in the serial port control command; determine the programmable pin corresponding to each identifier bit in the target serial port status identifier; and set the level state of the corresponding programmable pin by accessing the programmable pin level status register based on the identifier value of each identifier bit. Accordingly, the second setting module is specifically used to: determine the identifier value of the corresponding identifier bit in the target serial port status identifier according to the level state of each programmable pin.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the serial port control method as described in any one of claims 1 to 7 when executing the computer program.

10. A non-volatile storage medium, characterized in that, The non-volatile storage medium stores a computer program, which, when executed, implements the steps of the serial port control method as described in any one of claims 1 to 7.

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