Noise-reduction orthogonal double-speed differential chaos shift keying communication system and method

Abstract

The invention provides a noise reduction orthogonal double-speed differential chaos shift keying communication system and method, and belongs to the technical field of chaos secret communication. The system comprises a modulator, a transmission channel and a demodulator, the modulator generates a chaos sequence and performs caching processing, the chaos sequence is divided into two paths, one path serves as a reference signal, and the other path generates an information signal after time delay and orthogonal processing; combining the reference signal and the information signal to obtain a transmission signal, and sending the transmission signal to a demodulator through a transmission channel; after the demodulator receives the signal, original information bits are recovered through processing such as moving average filtering, time delay and correlation operation; according to the system, through orthogonal transformation and double-rate transmission, the information transmission rate and the energy utilization rate are remarkably improved, and the bit error rate is effectively reduced; according to the method, the problems of low information transmission rate and high bit error rate in the existing differential chaos shift keying system are solved, and the method has a wide application prospect.

Description

Technical Field

[0001] The invention belongs to the technical field of chaotic secure communication, and in particular relates to a noise reduction orthogonal double-speed differential chaotic shift keying communication system and method. Background Art

[0002] Chaotic communication is an important research direction in the field of digital communication, but its bit error performance still faces challenges. Although the Differential Chaos Shift Keying (DCSK) system has certain advantages without the need for chaotic synchronization, compared with some traditional modulation methods, the bit error rate of DCSK is higher and the bit error performance is still insufficient. In addition, in the DCSK system, about half of the time slots are used to transmit unmodulated reference signals, which not only leads to a decrease in energy utilization, but also reduces the information transmission rate of the system.

[0003] In order to make up for the low error performance of the DCSK system, some scholars proposed a noise reduction differential chaos shift keying communication system (NR-DCSK). For each transmission bit, this system no longer generates β different chaotic samples as a reference sequence, but generates β = P chaotic samples, and then repeats P times in the signal. Then, at the receiving end, each P identical samples are averaged, and the resulting received information signal time slot is correlated with its delayed reference signal time slot to restore the original information bit. This averaging operation of size P reduces the noise variance and improves the system error performance. However, compared with the DCSK system, the NR-DCSK system does not increase the information transmission rate, and its physical implementation is relatively difficult. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a noise-reducing orthogonal double-speed differential chaotic shift keying communication system and method in view of the deficiencies of the above-mentioned prior art. The method is based on reference signal transformation and adopts a noise-reducing orthogonal double-speed differential chaotic shift keying communication system and method to solve the problem of low information transmission rate of the noise-reducing differential chaotic shift keying communication system.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0006] On the one hand, the present invention provides a noise-reducing orthogonal double-speed differential chaotic shift keying communication system, comprising: a modulator, a demodulator and a transmission channel; the modulator is used to generate a noise-reducing orthogonal double-speed differential chaotic sequence, and generate a transmission signal by superimposing the chaotic signal obtained after orthogonal transformation of the chaotic sequence with the original signal, so that two information bits can be transmitted in one frame of signal; the transmission signal generated by the modulator is transmitted to the demodulator through the transmission channel; the demodulator demodulates the received transmission signal to obtain the recovered two information bits.

[0007] Preferably, the modulator comprises a chaotic sequence generator, a buffer, a modulator delay unit, a modulation Walsh orthogonal device, a modulation multiplier, an adder, a switch selector, a sampler and a clock;

[0008] The chaotic sequence generator is used to generate a chaotic sequence with orthogonal double-speed difference for noise reduction, and send it to a buffer for buffer processing. The chaotic sequence is divided into chaotic sequences with equal time intervals under the control of a clock and divided into two transmission paths; the first chaotic sequence with equal time intervals is transmitted to a switch selector as a reference signal; the second chaotic sequence with equal time intervals is transmitted to a modulator delay unit;

[0009] The modulator delay unit is used to delay the second chaotic sequence with equal time intervals sent by the buffer, and divide the chaotic sequence with equal time intervals after delay processing into two chaotic sequences, namely, a w-way chaotic sequence and a u-way chaotic sequence, and transmit them to the modulation multiplier and the modulation Walsh orthogonalizer respectively;

[0010] The modulation multiplier multiplies the w-way chaotic sequence with the set initial k-bit information bit a to obtain a modulation signal a which is transmitted to the adder;

[0011] The modulation Walsh orthogonalizer is used to obtain a chaotic signal after performing an orthogonal transformation on the u-channel chaotic sequence, and multiply the chaotic signal with the set initial k-bit information bits b through a modulation multiplier to obtain a modulation signal b and transmit it to the adder;

[0012] The adder is used to perform addition operation on the modulation signal a and the modulation signal b output by the modulation multiplier to obtain an information signal and transmit it to the switch selector;

[0013] The switch selector is used to combine the reference signal and the information signal to obtain a transmission signal and transmit it to the transmission channel;

[0014] The sampler is used to generate a sampling interval and control the closing of the switch selector.

[0015] Preferably, the demodulator comprises a sliding average filter, a demodulator delay unit, a first demodulation multiplier, a second demodulation multiplier, a demodulation Walsh orthogonal device, a correlator unit and a threshold decision device;

[0016] The sliding average filter uses the transmission signal sent by the modulator through the transmission channel as the initial receiving signal, and performs average filtering processing on the initial receiving signal to reduce the variance of the noise in the transmission channel, and obtains three processing signals, namely, A-channel processing signal, B-channel processing signal and C-channel processing signal; wherein the A-channel processing signal is transmitted to the first demodulation multiplier, the B-channel processing signal is transmitted to the demodulator delay unit, and the C-channel processing signal is transmitted to the second demodulation multiplier;

[0017] The demodulator delay unit is used to delay the B-path processed signal according to the delay length of the B-path processed signal to obtain a delayed signal and divide it into two transmission paths, namely, a D-path delayed signal and an E-path delayed signal, and transmit the D-path delayed signal to the first demodulation multiplier, and transmit the E-path delayed signal to the demodulation Walsh orthogonal device;

[0018] The demodulation Walsh orthogonal device is used to perform orthogonal transformation on the E-path delayed signal to obtain an E-path chaotic signal and transmit it to the second demodulation multiplier;

[0019] The first demodulation multiplier multiplies the A-channel processed signal and the D-channel processed signal to obtain an F-channel output signal, which is transmitted to the correlator unit;

[0020] The second demodulation multiplier multiplies the C-channel processed signal with the E-channel chaotic signal to obtain a G-channel output signal which is transmitted to the correlator unit;

[0021] The correlator unit is used to perform a correlation operation on the received F-channel output signal and the initial received signal to obtain a correlation value and sum it to obtain an H-channel summed output signal, which is transmitted to the threshold decision device; perform a correlation operation on the G-channel output signal and the initial received signal to obtain a correlation value and sum it to obtain an I-channel summed output signal, which is transmitted to the threshold decision device;

[0022] The threshold decision device is used to compare the H-channel summed output signal and the I-channel summed output signal with a preset threshold value, that is, to perform threshold decision to obtain the restored k-bit information bits. With k information bits

[0023] On the other hand, the present invention also provides a noise reduction orthogonal double-speed differential chaotic shift keying communication method, comprising the following steps:

[0024] Step 1: Generate a chaotic sequence of orthogonal double-speed difference with a length of R through a chaotic sequence generator, and send it to the buffer for caching. After the control of the clock, the chaotic sequence is divided to obtain equal time intervals T. c The chaotic sequence is divided into two transmission paths;

[0025] Step 2: Set the first path to equal time interval Tc The chaotic sequence of length β is transmitted to the switch selector as a reference signal; the second path is equally spaced T c The chaotic sequence is transmitted to the modulator delay unit, and after delay processing, it is divided into two transmission paths, namely, a w-path chaotic sequence and a u-path chaotic sequence, and transmitted to the modulation multiplier and the modulation Walsh orthogonalizer respectively; the w-path chaotic sequence is multiplied by the modulation multiplier with the set initial k-bit information bits a to obtain a modulation signal a, which is transmitted to the adder; the u-path chaotic sequence is orthogonally transformed by the modulation Walsh orthogonalizer to obtain a chaotic signal, and the chaotic signal is multiplied by the modulation multiplier with the set initial k-bit information bits b to obtain a modulation signal b, which is transmitted to the adder; the modulation signal a and the modulation signal b are added to generate an information signal of length β, which is transmitted to the switch selector;

[0026] The value of each information bit in the set initial k information bits a and initial k information bits b is +1 or -1;

[0027] Step 3: Add the reference signal with a length of β and the information signal with a length of β to generate a transmission signal, and send the transmission signal from the modulator to the demodulator through the transmission channel;

[0028] The specific formula of the transmission signal is:

[0029]

[0030] Among them, s i,k is the transmission signal of the i-th frame, 2β is the sum of the lengths of the reference signal and the information signal in one frame, a k are the k information bits a, b corresponding to the i-th frame signal k is the k-bit information bit b corresponding to the i-th frame signal, is the chaotic sequence of the i-th frame, is the chaotic signal obtained by delaying the chaotic signal of the i-th frame by β, k represents the transmission signal of the k-th frame, and β is the length of the reference signal in one frame;

[0031] Step 4: The demodulator receives the transmission signal sent by the modulator through the transmission channel to obtain the initial received signal r i ;

[0032] Step 5: Send the initial received signal to a sliding average filter, and use the sliding average filter with a replication parameter of P to average the initial received signal to obtain three processed signals, namely, A-channel processed signal, B-channel processed signal and C-channel processed signal;

[0033] Step 6: Transmit the A-channel processed signal to the first demodulation multiplier; transmit the C-channel processed signal to the second demodulation multiplier; transmit the B-channel processed signal to the demodulator delay unit with a delay length of β and perform delay processing on the B-channel processed signal according to the delay length of the B-channel processed signal to obtain a delayed signal and divide it into two transmission paths, namely, the D-channel delayed signal and the E-channel delayed signal; transmit the D-channel delayed signal to the first demodulation multiplier and multiply it with the A-channel processed signal to obtain the F-channel output signal r i-β Transmit to the correlator unit; transmit the E-path delayed signal to the demodulation Walsh orthogonalizer, and perform orthogonal transformation to obtain the E-path chaotic signal, which is transmitted to the second demodulation multiplier and multiplied with the C-path processed signal to obtain the G-path output signal r′ i-β transmitting to a correlator unit;

[0034] Step 7: Output signal r i-β With the initial received signal r i Perform correlation operation, obtain correlation value and sum to obtain H-path summation output signal r a Transmit to the threshold decision device; G output signal r' i-β With the initial received signal r i Perform correlation operation, obtain the correlation value and sum it to obtain the I-way summed output signal r b Transmitted to the threshold decision device, the specific formula is:

[0035]

[0036] Among them, Z i,1 is the H-path summation output signal r of the initial k information bits a in the i-th frame a , Z i,2 is the I-way summation output signal r of the initial k information bits b in the i-th frame b , n i is the noise of the i-th frame;

[0037] Step 8: According to the threshold decision rule, sum the H paths and output the signal r a And I-way summation output signal r b Perform threshold judgment to obtain the recovered k-bit information bits With k information bits

[0038] Step 9: Calculate the recovered k information bits and k information bits The demodulation is now complete with the bit error rate of the original k-bit information bits a and k-bit information bits b set in step 2.

[0039] The beneficial effects of adopting the above technical solution are as follows: compared with the existing method, the system and method of the present invention adopts a method of performing orthogonal transformation processing on the same signal and then superimposing it with the original signal, thereby enabling two information bits to be transmitted in one frame of signal, so that the correlation between the signal of the current frame and the signal of the next frame is reduced and the energy utilization rate of the information is improved, thereby improving the information transmission rate of the noise reduction orthogonal double-speed differential chaotic shift keying communication system;

[0040] The system of the present invention uses a Walsh orthogonalizer to perform orthogonal transformation of information signals, and utilizes the orthogonal transformation characteristics to superimpose two different information signals in the same frame signal, saving the energy consumed in transmitting information bits, thereby improving the information transmission rate of the communication system. In addition, because a buffer and a sliding average filter are used, the error performance of the communication system is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A structural diagram of a noise reduction orthogonal double-speed differential chaotic shift keying communication system provided by an embodiment of the present invention;

[0042] Figure 2 A structural diagram of a modulator provided by an embodiment of the present invention;

[0043] Figure 3 A structural diagram of a demodulator provided by an embodiment of the present invention;

[0044] Figure 4 A flowchart of a noise reduction orthogonal double-speed differential chaotic shift keying communication method provided by an embodiment of the present invention;

[0045] Figure 5 A schematic diagram of a demodulated signal frame structure of a noise reduction orthogonal double-speed differential chaotic shift keying communication system provided by an embodiment of the present invention;

[0046] Figure 6 A flow chart of transmission signal generation provided by an embodiment of the present invention;

[0047] Figure 7 A comparison diagram of the error code performance of the noise reduction orthogonal double-speed differential chaotic shift keying communication system and the differential chaotic shift keying communication system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0049] In this embodiment, a noise reduction orthogonal double-speed differential chaotic shift keying communication system is provided. Figure 1 As shown, including: Figure 2 The modulator shown, Figure 3 The demodulator and transmission channel shown; the modulator is used to generate a noise-reduced orthogonal double-speed differential chaotic sequence, and generate a transmission signal by superimposing the chaotic signal obtained after orthogonal transformation of the chaotic sequence with the original signal, so that two information bits can be transmitted in one frame of signal; the transmission signal generated by the modulator is transmitted to the demodulator through the transmission channel; the demodulator demodulates the received transmission signal to obtain the recovered two information bits.

[0050] The modulator includes a chaotic sequence generator, a buffer, a modulator delay unit, a modulation Walsh orthogonal device, a modulation multiplier, an adder, a switch selector, a sampler and a clock;

[0051] In this embodiment, the initial k-bit information bits a, the initial k-bit information bits b, the initial delay length, the sampling time interval and the replication parameter P are respectively set in the modulator; the initial delay length is the chaotic signal delay length used in the last signal transmission;

[0052] The chaotic sequence generator is used to generate a chaotic sequence with orthogonal double-speed difference for noise reduction, and send it to a buffer for buffer processing. The chaotic sequence is divided into chaotic sequences with equal time intervals under the control of a clock and divided into two transmission paths; the first chaotic sequence with equal time intervals is transmitted to a switch selector as a reference signal; the second chaotic sequence with equal time intervals is transmitted to a modulator delay unit;

[0053] The chaotic sequence generation principle of the chaotic sequence generator in this embodiment includes the selection of the type of chaotic mapping and the selection of the initial value of the chaotic mapping;

[0054] The modulator delay unit is used to delay the second chaotic sequence with equal time intervals sent by the buffer, and divide the chaotic sequence with equal time intervals after delay processing into two chaotic sequences, namely, a w-way chaotic sequence and a u-way chaotic sequence, and transmit them to the modulation multiplier and the modulation Walsh orthogonalizer respectively;

[0055] The modulation multiplier multiplies the w-way chaotic sequence with the set initial k-bit information bit a to obtain a modulation signal a which is transmitted to the adder;

[0056] The modulation Walsh orthogonalizer is used to obtain a chaotic signal after performing an orthogonal transformation on the u-channel chaotic sequence, and multiply the chaotic signal with the set initial k-bit information bits b through a modulation multiplier to obtain a modulation signal b and transmit it to the adder;

[0057] The purpose of the Walsh orthogonalizer in this embodiment is to perform an orthogonal transformation on the chaotic sequence, so that two different and mutually orthogonal binary sequences can be restored in the demodulator to obtain a chaotic signal;

[0058] The adder is used to perform addition operation on the modulation signal a and the modulation signal b output by the modulation multiplier to obtain an information signal and transmit it to the switch selector;

[0059] The switch selector is used to combine the reference signal and the information signal to obtain a transmission signal and transmit it to the transmission channel;

[0060] The sampler is used to generate a sampling interval and control the closing of the switch selector;

[0061] In this embodiment, the clock device is used to generate a clock signal with a fixed frequency, so as to synchronize and coordinate the operation of each part. The clock signal is transmitted to the chaotic sequence generator, the sampler and the buffer respectively; the clock signal is multiplied by the replication parameter P and transmitted to the chaotic sequence generator, and the clock signal is multiplied by the delay parameter β and transmitted to the sampler;

[0062] In this embodiment, the closing of the switch selector is transmitted to the sampler by the delay time generated by the clock and is controlled by the sampler. The initial position of the switch selector is in the upper branch, and the chaotic sequence transmitted by the chaotic sequence generator is received to form a reference signal; after the chaotic signal is obtained after the Walsh orthogonalizer delay and orthogonal processing, the switch selector is adjusted to the lower branch, and the chaotic sequence transmitted by the chaotic sequence generator is delayed to form an information signal; each closure of the switch forms the end-to-end connection of the reference signal and the information signal.

[0063] The demodulator includes a sliding average filter, a demodulator delay unit, a first demodulation multiplier, a second demodulation multiplier, a demodulation Walsh orthogonal device, a correlator unit and a threshold decision device;

[0064] The sliding average filter uses the transmission signal sent by the modulator through the transmission channel as the initial receiving signal, and performs average filtering processing on the initial receiving signal to reduce the variance of the noise in the transmission channel, and obtains three processing signals, namely, A-channel processing signal, B-channel processing signal and C-channel processing signal; wherein the A-channel processing signal is transmitted to the first demodulation multiplier, the B-channel processing signal is transmitted to the demodulator delay unit, and the C-channel processing signal is transmitted to the second demodulation multiplier;

[0065] The demodulator delay unit is used to delay the B-path processed signal according to the delay length of the B-path processed signal to obtain a delayed signal and divide it into two transmission paths, namely, a D-path delayed signal and an E-path delayed signal, and transmit the D-path delayed signal to the first demodulation multiplier, and transmit the E-path delayed signal to the demodulation Walsh orthogonal device;

[0066] The demodulation Walsh orthogonal device is used to perform orthogonal transformation on the E-path delayed signal to obtain an E-path chaotic signal and transmit it to the second demodulation multiplier;

[0067] The first demodulation multiplier multiplies the A-channel processed signal and the D-channel processed signal to obtain an F-channel output signal, which is transmitted to the correlator unit;

[0068] The second demodulation multiplier multiplies the C-channel processed signal with the E-channel chaotic signal to obtain a G-channel output signal which is transmitted to the correlator unit;

[0069] The correlator unit is used to perform a correlation operation on the received F-way multiplication signal and the initial received signal to obtain a correlation value and sum it to obtain an H-way summation output signal, which is transmitted to the threshold decision device; perform a correlation operation on the G-way multiplication signal and the initial received signal to obtain a correlation value and sum it to obtain an I-way summation output signal, which is transmitted to the threshold decision device;

[0070] In this embodiment, a new correlation operation is performed every time delay, that is, a new information signal is demodulated and calculated, thereby obtaining a summed output signal;

[0071] The threshold decision device is used to compare the H-path summation output signal and the I-path summation output signal with a preset threshold value, that is, to make a threshold decision, wherein the threshold value is 0, a value greater than 0 is judged as +1, and a value less than 0 is judged as -1; the k-bit information bits are recovered. With k information bits

[0072] In this embodiment, a noise reduction orthogonal double-speed differential chaotic shift keying communication method is provided. Figure 4 As shown, the following steps are included:

[0073] Step 1: Generate a chaotic sequence of orthogonal double-speed difference with a length of R through a chaotic sequence generator, and send it to the buffer for caching. After the control of the clock, the chaotic sequence is divided to obtain equal time intervals T. c The chaotic sequence is divided into two transmission paths;

[0074] Step 2: Set the first path to equal time interval T c The chaotic sequence of length β is transmitted to the switch selector as a reference signal; the second path is equally spaced T c The chaotic sequence is transmitted to the modulator delay unit, and after delay processing, it is divided into two transmission paths, namely, a w-path chaotic sequence and a u-path chaotic sequence, and transmitted to the modulation multiplier and the modulation Walsh orthogonalizer respectively; the w-path chaotic sequence is multiplied by the modulation multiplier with the set initial k-bit information bits a to obtain a modulation signal a, which is transmitted to the adder; the u-path chaotic sequence is orthogonally transformed by the modulation Walsh orthogonalizer to obtain a chaotic signal, and the chaotic signal is multiplied by the modulation multiplier with the set initial k-bit information bits b to obtain a modulation signal b, which is transmitted to the adder; the modulation signal a and the modulation signal b are added to generate an information signal of length β, which is transmitted to the switch selector;

[0075] The value of each information bit in the set initial k information bits a and initial k information bits b is +1 or -1;

[0076] Step 3: Add the reference signal with a length of β and the information signal with a length of β to generate a transmission signal, and send the transmission signal from the modulator to the demodulator through the transmission channel;

[0077] The specific formula of the transmission signal is:

[0078]

[0079] Among them, s i,k is the transmission signal of the i-th frame, 2β is the sum of the lengths of the reference signal and the information signal in one frame, a k are the k information bits a, b corresponding to the i-th frame signal k is the k-bit information bit b corresponding to the i-th frame signal, is the chaotic sequence of the i-th frame, is the chaotic signal obtained by delaying the chaotic signal of the i-th frame by β, k represents the transmission signal of the k-th frame, and β is the length of the reference signal in one frame;

[0080] Step 4: The demodulator receives the transmission signal sent by the modulator through the transmission channel to obtain the initial received signal r i ;

[0081] In this embodiment, the transmission channel is a Gaussian white noise channel, and the initial received signal r i The output signal s i and noise signal n i The specific formula is:

[0082] r i =s i +n i

[0083] Step 5: Convert the initial received signal r i The initial received signal is sent to a sliding average filter, and the sliding average filter with a replication parameter of P is used to average the initial received signal to obtain three processing signals, namely, A processing signal, B processing signal and C processing signal;

[0084] Step 6: Transmit the A-channel processed signal to the first demodulation multiplier; transmit the C-channel processed signal to the second demodulation multiplier; transmit the B-channel processed signal to the demodulator delay unit with a delay length of β and perform delay processing on the B-channel processed signal according to the delay length of the B-channel processed signal to obtain a delayed signal and divide it into two transmission paths, namely, the D-channel delayed signal and the E-channel delayed signal; transmit the D-channel delayed signal to the first demodulation multiplier and multiply it with the A-channel processed signal to obtain the F-channel output signal ri-β Transmit to the correlator unit; transmit the E-path delayed signal to the demodulation Walsh orthogonalizer, and perform orthogonal transformation to obtain the E-path chaotic signal, which is transmitted to the second demodulation multiplier and multiplied with the C-path processed signal to obtain the G-path output signal r′ i-β transmitting to a correlator unit;

[0085] Step 7: Output signal r i-β With the initial received signal r i Perform correlation operation, obtain correlation value and sum to obtain H-path summation output signal r a Transmit to the threshold decision device; G output signal r' i-β With the initial received signal r i Perform correlation operation, obtain the correlation value and sum it to obtain the I-way summed output signal r b Transmitted to the threshold decision device, the specific formula is:

[0086]

[0087] Among them, Z i,1 is the H-path summation output signal r of the initial k information bits a in the i-th frame a , Z i,2 is the I-way summation output signal r of the initial k information bits b in the i-th frame b , n i is the noise of the i-th frame;

[0088] The demodulation signal frame structure of the noise reduction orthogonal double-speed differential chaotic shift keying communication system in this embodiment is as follows: Figure 5 As shown, the i-th frame signals of the two paths are first delayed by β, and then correlated with the reference signal itself;

[0089] In this embodiment, Figure 6 As shown in the figure, since the generated chaotic sequence is transmitted in two ways, the first way is transmitted with equal intervals of T c The chaotic sequence of length β is directly used as the reference signal for the second path with equal intervals T c The method for processing the chaotic sequence is as follows: define an initial protocol for the transmitter and the receiver, and set the same clock signal T at the transmitter and the receiver respectively according to the initial protocol. c The main purpose is to make the modulator buffer and the demodulator sliding average filter have the same clock signal T c To maintain the accuracy of data transmission; the second chaotic sequence is delayed, and the delayed chaotic sequence is expressed as: Will It is divided into two transmission paths, namely w path and u path. The w path is multiplied by the set initial k-bit information bit a to form a modulated signal The u-way chaotic sequence is first processed by orthogonal transformation to obtain a chaotic signal, and the chaotic signal obtained after orthogonal transformation is expressed as: The signal is multiplied by the initial k information bits b to form a modulated signal. Finally, the modulated signal and modulation signal Add together to form an information signal of length β

[0090] Take the chaotic signal x of the i-th frame i For example, The chaotic signal obtained after a delay of β units is Multiply the delayed chaotic signal by the set initial k-bit information bit a to generate an information signal of length β The chaotic signal after orthogonal transformation is: Multiply it by the initial k information bits a to generate an information signal of length β a k Indicates the kth information bit a corresponding to the i-th frame signal; b k represents the kth information bit b corresponding to the i-th frame signal; where each corresponding frame signal and are numerically identical;

[0091] In this embodiment, when performing correlation operation, since the initial received signal r i The output signal s i and noise signal n i The noise signal n i There is a good correlation between the chaotic signal and the noise component in the transmission signal can be approximated to 0, leaving only the information component, and then summing the related independent values;

[0092] Step 8: According to the threshold decision rule, sum the H paths and output the signal r a And I-way summation output signal r b Perform threshold judgment to obtain the recovered k-bit information bits With k information bits

[0093] In this embodiment, according to the threshold decision rule shown in the following formula, the H-way summation output signal r a And I-way summation output signal r b Compared with the decision threshold, when the output signal is greater than 0, +1 is output as the restored k-bit information bit a and k-bit information bit b values; when the output signal is less than or equal to 0, -1 is output as the restored k-bit information bit a and k-bit information bit b values ​​to obtain the restored k-bit information bit With k information bits

[0094]

[0095] Step 9: Calculate the recovered k information bits and k information bits The bit error rate of the original k-bit information bits a and k-bit information bits b set in step 2, at which point the demodulation is complete;

[0096] The test verification of this embodiment is as follows: Energy utilization analysis: In the noise reduction orthogonal double-speed differential chaotic shift keying communication system, the reference signal length in the current symbol period is β, the information signal length is β, and the specific formula for the bit energy sent in one symbol period is:

[0097]

[0098] Where E represents the signal energy, E b-nR-ODBR-DCSK To reduce the signal energy of the orthogonal double-speed differential chaotic shift keying communication system, E data To reduce the noise of the information signal energy of the orthogonal double-speed differential chaotic shift keying communication system, E ref To reduce the reference signal energy of the orthogonal double-speed differential chaotic shift keying communication system;

[0099] The ratio of the transmission data energy to the transmission bit energy in one frame of the noise reduction orthogonal double-speed differential chaotic shift keying communication system is DBR, and the specific formula is:

[0100]

[0101] The specific formula for the signal energy in a frame of the differential chaotic shift keying system is:

[0102]

[0103] Among them, DBR DCSK E is the ratio of transmitted data energy to transmitted bit energy, data-DCSK is the information signal energy of the differential chaotic shift keying system, E b-DCSK is the signal energy of the differential chaotic shift keying system;

[0104] The energy utilization rates of the noise-reduced orthogonal double-speed differential chaotic shift keying communication system and the differential chaotic shift keying system are compared. It can be seen that the noise-reduced orthogonal double-speed differential chaotic shift keying communication system has higher energy efficiency than the differential chaotic shift keying system.

[0105] Comparison of different systems: Comparison of differential chaotic shift keying system and noise reduction orthogonal double-speed differential chaotic shift keying communication system. Selecting the improved logistic map with an initial value of 0.4, that is, the improved logistic map, the differential chaotic shift keying system is under the condition of β = 160, and the noise reduction orthogonal double-speed differential chaotic shift keying communication system is under the condition of β = 160 to verify the influence of different signal-to-noise ratios on the system error performance. Figure 7 It can be seen that at this time, the error performance of the noise reduction orthogonal double-speed differential chaotic shift keying communication system is better than that of the differential chaotic shift keying system.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope defined by the claims of the present invention.

Claims

1. A noise reduction orthogonal double-speed differential chaotic shift keying communication system, characterized in that: include: Modulator, demodulator and transmission channel; the modulator is used to generate a chaotic sequence with orthogonal double-speed differential noise reduction, and generate a transmission signal by superimposing the chaotic signal obtained by orthogonal transformation of the chaotic sequence with the original signal, so that two information bits can be transmitted in one frame of signal; the transmission signal generated by the modulator is transmitted to the demodulator through the transmission channel; the demodulator demodulates the received transmission signal to obtain the recovered two information bits.

2. The noise reduction orthogonal double-speed differential chaotic shift keying communication system according to claim 1, characterized in that: The modulator includes a chaotic sequence generator, a buffer, a modulator delay unit, a modulation Walsh orthogonal device, a modulation multiplier, an adder, a switch selector, a sampler and a clock; The chaotic sequence generator is used to generate a chaotic sequence with orthogonal double-speed difference for noise reduction, and send it to the buffer for buffer processing. The chaotic sequence is divided into chaotic sequences with equal time intervals under the control of the clock and divided into two transmission paths; the first chaotic sequence with equal time intervals is transmitted to the switch selector as a reference signal; The second chaotic sequence with equal time intervals is transmitted to the modulator delay unit; The modulator delay unit is used to delay the second chaotic sequence with equal time intervals sent by the buffer, and divide the chaotic sequence with equal time intervals after delay processing into two chaotic sequences, namely, a w-way chaotic sequence and a u-way chaotic sequence, and transmit them to the modulation multiplier and the modulation Walsh orthogonalizer respectively; The modulation multiplier multiplies the w-way chaotic sequence with the set initial k-bit information bit a to obtain a modulation signal a which is transmitted to the adder; The modulation Walsh orthogonalizer is used to obtain a chaotic signal after performing an orthogonal transformation on the u-channel chaotic sequence, and multiply the chaotic signal with the set initial k-bit information bits b through a modulation multiplier to obtain a modulation signal b and transmit it to the adder; The adder is used to perform addition operation on the modulation signal a and the modulation signal b output by the modulation multiplier to obtain an information signal and transmit it to the switch selector; The switch selector is used to combine the reference signal and the information signal to obtain a transmission signal and transmit it to the transmission channel; The sampler is used to generate a sampling interval and control the closing of the switch selector.

3. The noise reduction orthogonal double-speed differential chaotic shift keying communication system according to claim 2 is characterized in that: The demodulator includes a sliding average filter, a demodulator delay unit, a first demodulation multiplier, a second demodulation multiplier, a demodulation Walsh orthogonal device, a correlator unit and a threshold decision device; The sliding average filter uses the transmission signal sent by the modulator through the transmission channel as the initial receiving signal, and performs average filtering processing on the initial receiving signal to reduce the variance of the noise in the transmission channel, and obtains three processing signals, namely, A-channel processing signal, B-channel processing signal and C-channel processing signal; wherein the A-channel processing signal is transmitted to the first demodulation multiplier, the B-channel processing signal is transmitted to the demodulator delay unit, and the C-channel processing signal is transmitted to the second demodulation multiplier; The demodulator delay unit is used to delay the B-path processed signal according to the delay length of the B-path processed signal to obtain a delayed signal and divide it into two transmission paths, namely, a D-path delayed signal and an E-path delayed signal, and transmit the D-path delayed signal to the first demodulation multiplier, and transmit the E-path delayed signal to the demodulation Walsh orthogonal device; The demodulation Walsh orthogonal device is used to perform orthogonal transformation on the E-path delayed signal to obtain an E-path chaotic signal and transmit it to the second demodulation multiplier; The first demodulation multiplier multiplies the A-channel processed signal and the D-channel processed signal to obtain an F-channel output signal, which is transmitted to the correlator unit; The second demodulation multiplier multiplies the C-channel processed signal with the E-channel chaotic signal to obtain a G-channel output signal which is transmitted to the correlator unit; The correlator unit is used to perform a correlation operation on the received F-channel output signal and the initial received signal to obtain a correlation value and sum it to obtain an H-channel summed output signal, which is transmitted to the threshold decision device; perform a correlation operation on the G-channel output signal and the initial received signal to obtain a correlation value and sum it to obtain an I-channel summed output signal, which is transmitted to the threshold decision device; The threshold decision device is used to compare the H-channel summed output signal and the I-channel summed output signal with a preset threshold value, that is, to perform threshold decision to obtain the restored k-bit information bits. With k information bits 4. A noise reduction orthogonal double-speed differential chaotic shift keying communication method, based on the noise reduction orthogonal double-speed differential chaotic shift keying communication system of claim 1, characterized in that: The following steps are involved: Step 1: Generate a chaotic sequence of orthogonal double-speed difference with a length of R through a chaotic sequence generator, and send it to the buffer for caching. After the control of the clock, the chaotic sequence is divided to obtain equal time intervals T. c The chaotic sequence is divided into two transmission paths; Step 2: Set the first path to equal time interval T c The chaotic sequence of length β is transmitted to the switch selector as a reference signal; the second path is equally spaced T c The chaotic sequence is transmitted to the modulator delay unit, and after delay processing, it is divided into two transmission paths, namely, a w-path chaotic sequence and a u-path chaotic sequence, and transmitted to the modulation multiplier and the modulation Walsh orthogonalizer respectively; the w-path chaotic sequence is multiplied by the modulation multiplier with the set initial k-bit information bits a to obtain a modulation signal a, which is transmitted to the adder; the u-path chaotic sequence is orthogonally transformed by the modulation Walsh orthogonalizer to obtain a chaotic signal, and the chaotic signal is multiplied by the modulation multiplier with the set initial k-bit information bits b to obtain a modulation signal b, which is transmitted to the adder; the modulation signal a and the modulation signal b are added to generate an information signal of length β, which is transmitted to the switch selector; The value of each information bit in the set initial k information bits a and initial k information bits b is +1 or -1; Step 3: Add the reference signal with a length of β and the information signal with a length of β to generate a transmission signal, and send the transmission signal from the modulator to the demodulator through the transmission channel; Step 4: The demodulator receives the transmission signal sent by the modulator through the transmission channel to obtain the initial received signal r i ; Step 5: Send the initial received signal to a sliding average filter, and use the sliding average filter with a replication parameter of P to average the initial received signal to obtain three processed signals, namely, A-channel processed signal, B-channel processed signal and C-channel processed signal; Step 6: Transmit the A-channel processed signal to the first demodulation multiplier; transmit the C-channel processed signal to the second demodulation multiplier; transmit the B-channel processed signal to the demodulator delay unit with a delay length of β and perform delay processing on the B-channel processed signal according to the delay length of the B-channel processed signal to obtain a delayed signal and divide it into two transmission paths, namely, the D-channel delayed signal and the E-channel delayed signal; transmit the D-channel delayed signal to the first demodulation multiplier and multiply it with the A-channel processed signal to obtain the F-channel output signal r i-β Transmit to the correlator unit; transmit the E-path delayed signal to the demodulator Walsh orthogonalizer, and perform orthogonal transformation to obtain the E-path chaotic signal, which is transmitted to the second demodulator multiplier and multiplied with the C-path processed signal to obtain the G-path output signal r' i-β transmitting to a correlator unit; Step 7: Output signal r i-β With the initial received signal r i Perform correlation operation, obtain correlation value and sum to obtain H-path summation output signal r a Transmit to the threshold decision device; output signal r' i-β With the initial received signal r i Perform correlation operation, obtain the correlation value and sum it to obtain the I-way summed output signal r b Transmitted to the threshold decision device; Step 8: According to the threshold decision rule, sum the H paths and output the signal r a And I-way summation output signal r b Perform threshold judgment to obtain the recovered k-bit information bits With k information bits Step 9: Calculate the recovered k information bits and k information bits The demodulation is now completed with the bit error rate of the original k-bit information bits a and k-bit information bits b set in step 2.

5. The noise reduction orthogonal double-speed differential chaotic shift keying communication method according to claim 4 is characterized in that: The specific formula for the transmission signal in step 3 is: Among them, s i,k is the transmission signal of the i-th frame, 2β is the sum of the lengths of the reference signal and the information signal in one frame, a k are the k information bits a, b corresponding to the i-th frame signal k is the k-bit information bit b corresponding to the i-th frame signal, is the chaotic sequence of the i-th frame, is the chaotic signal obtained by delaying the chaotic signal of the i-th frame by β, k represents the transmission signal of the k-th frame, and β is the length of the reference signal in one frame.

6. The noise reduction orthogonal double-speed differential chaotic shift keying communication method according to claim 5 is characterized in that: The correlation values ​​are obtained in step 7 and summed to obtain the I-way summed output signal r b The specific formula transmitted to the threshold decision device is: Among them, Z i,1 is the H-path summation output signal r of the initial k information bits a in the i-th frame a , Z i,2 is the I-way summation output signal r of the initial k information bits b in the i-th frame b , n i is the noise of the i-th frame.

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