Semiconductor back-end process and semiconductor device

Abstract

The invention relates to a semiconductor back-end process and a semiconductor device, and the semiconductor back-end process comprises the steps: carrying out the wiping treatment of a wafer on which a titanium nitride layer is formed through employing a wiping device, and carrying out the wiping treatment of rotating the wafer and providing a cleaning solution for the surface of the wafer, the rotation sequentially comprises a first stage, a second stage and a third stage, the rotating speed of the second stage is smaller than that of the first stage, and the rotating speed of the third stage is larger than that of the first stage. After the titanium nitride layer is formed, the middle-high-low-high rotating speed setting is used for wiping sheet treatment, a buffer layer of surface tension can be broken, and the number of water stain defects is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, in particular to a semiconductor back-end process and a semiconductor device. Background Art

[0002] The semiconductor backend process mainly includes the formation of metal wire connections and passivation layers. Before forming the metal layer, the backend process can form an adhesion layer (Glue Layer) to make the metal layer adhere more firmly to the surface of the wafer structure, that is, to improve the metal adhesion in the aluminum interconnection process. After the metal layer is formed, a metal anti-reflection layer (Metal ARC) can be formed on the surface of the metal layer. The metal anti-reflection layer can improve the ohmic contact of the aluminum interconnection process and enhance the conductivity of the metal layer.

[0003] After forming the adhesion layer and the metal anti-reflection layer, the wafer surface can be cleaned by scrubbing. Scrubber mainly uses physical principles and physical effects to clean particles and other pollutants on the wafer surface. However, water mark defects may appear on the wafer after the scrubbing process, affecting the yield. Summary of the invention

[0004] Based on this, it is necessary to provide a semiconductor back-end process that can improve water stain defects.

[0005] A semiconductor back-end process includes using a wiping device to wipe a wafer formed with a titanium nitride layer, the wiping process includes rotating the wafer and providing a cleaning liquid to the surface of the wafer, the rotation includes a first stage, a second stage and a third stage in sequence, the rotation speed of the second stage is less than the rotation speed of the first stage, and the rotation speed of the third stage is greater than the rotation speed of the first stage.

[0006] In the semiconductor back-end process, the wipe process after the titanium nitride layer is formed uses a "medium-high-low-high" rotation speed setting, which can break the buffer layer of surface tension and reduce the number of water stain defects.

[0007] In one embodiment, the wiping process includes brushing the surface of the wafer with a brush head of a wiping device during the rotation.

[0008] In one embodiment, the material of the brush head includes Teflon.

[0009] In one embodiment, the cleaning solution includes deionized water.

[0010] In one embodiment, the rotation further includes a zero stage before the first stage, and a rotation speed of the zero stage is smaller than a rotation speed of the first stage.

[0011] In one embodiment, the rotation speed of the first stage is 2000 to 4000 rpm, the rotation speed of the third stage is 4000 to 6000 rpm, and the rotation speed of the first stage is greater than 200 rpm and less than 2000 rpm.

[0012] In one embodiment, the duration of the second stage is longer than that of the first stage, and the duration of the third stage is longer than that of the second stage.

[0013] In one embodiment, the first stage lasts for 1 to 20 seconds, the second stage lasts for 1 to 20 seconds, and the third stage lasts for 2 to 40 seconds.

[0014] In one embodiment, before the wiping step, a step of forming the titanium nitride layer is also included and the wafer exit temperature is less than 120 degrees Celsius.

[0015] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by an ionized metal plasma process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 50 seconds.

[0016] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by a metal organic chemical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 45 to 55 seconds.

[0017] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by a physical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 45 seconds.

[0018] In one embodiment, the back-end process includes a step of forming an adhesion layer on the wafer, and the adhesion layer includes the titanium nitride layer.

[0019] In one embodiment, the back-end process includes a step of forming a metal anti-reflection layer on the wafer, and the metal anti-reflection layer includes the titanium nitride layer.

[0020] In one embodiment, the back-end process includes: forming a contact hole on a wafer; forming an adhesion layer on the wafer; the adhesion layer covers the side walls and the bottom of the contact hole in the dielectric layer, and the upper surface of the dielectric layer; the adhesion layer includes the titanium nitride layer, and the wiping process is to wipe the titanium nitride layer of the adhesion layer.

[0021] In one of the embodiments, the back-end process includes: filling the contact hole with a conductive material after forming the adhesion layer; forming a metal layer on the adhesion layer; forming a metal anti-reflection layer on the metal layer; wherein the metal anti-reflection layer includes the titanium nitride layer, and the wipe treatment also includes wiping the titanium nitride layer of the metal anti-reflection layer.

[0022] It is also necessary to protect a semiconductor device manufactured using the semiconductor back-end process described in any of the aforementioned embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.

[0024] Figure 1 It is a schematic diagram of using a wafer wiping device to wipe a wafer;

[0025] Figure 2a This is a microscope photo of water stain defects on the surface of titanium nitride film. Figure 2b It is a map of water damage defects;

[0026] Figure 3 It is the contact angle definition diagram;

[0027] Figure 4 is a schematic diagram of a water stain defect 11 on an adhesive layer 9;

[0028] Figure 5 2 are contact angle distribution diagrams of the embodiments and comparative examples using the parameter settings in Table 2;

[0029] Figure 6 is a schematic diagram of a water stain defect 15 on a metal anti-reflection layer 14;

[0030] Figure 7 This is a flow chart of some steps of the back-end process in one embodiment of the present application;

[0031] Figure 8 is a distribution diagram of the number of water stain defects on a wafer using the solution of an embodiment of the present application and the number of water stain defects on a wafer of a comparative example;

[0032] Fig. 9 This is a yield trend chart of the product after adopting the solution of the embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0035] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. "Connection" in this specification should be understood as "electrical connection", "communication connection" and the like if the connected circuits, modules, units, etc. have transmission of electrical signals or data to each other. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

[0036] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0037] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present invention. When used herein, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least part of an element" refers to part or all of an element. It should also be understood that the terms "compose" and / or "comprise" when used in this specification determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0038] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0039] Figure 1 The schematic diagram of using a wiping device to wipe a wafer. When wiping, the wafer is clamped on the rotating table 110 of the wiping device. The rotating table 110 clamps the wafer and rotates it at high speed. The high-speed rotating wafer is brushed back and forth using a special elastic, low-pollution Teflon brush head 111. At the same time, a liquid spray pipe 112 sprays a cleaning liquid containing deionized water (DIW) onto the surface of the wafer. The cleaning liquid is used to clean the surface of the wafer to rinse away particles and other contaminants. After a certain period of wiping, the effect of removing particles and other contaminants can be achieved by spinning. When the cleaning liquid only contains deionized water, it will not have any chemical reaction effect on the wafer.

[0040] The inventors found in actual production that water mark defects may appear after the titanium nitride layer on the wafer is wiped. Figure 2a and Figure 2b shown.

[0041] Common processes for forming titanium nitride thin films include: ionized metal plasma (IMP) TiN process, referred to as IMP TiN; physical vapor deposition (PVD) TiN process, referred to as PVD TiN; and metal organic chemical vapor deposition (MOCVD) TiN process, referred to as CVD TiN.

[0042] The inventors believe that whether water stain defects will occur is related to the contact angle of the titanium nitride surface. The contact angle is also called the wetting angle. Figure 3 , it refers to the angle A between the solid-liquid interface through the liquid to the gas-liquid interface at the interface of solid, liquid and gas. A is a quantitative way to characterize the hydrophilicity and hydrophobicity of the interface. The surface with A>90° is hydrophobic, and the surface with A<90° is hydrophilic. Table 1 is a set of contact angle data of titanium nitride films obtained from actual tests. Generally speaking, the contact angle size is CVD TiN>PVD TiN>IMP TiN.

[0043]

[0044] Table 1

[0045] According to the inventor's research, among the three processes, when the contact angle is less than 45 degrees, there is basically no water spot defect; and when the contact angle is greater than 45 degrees, the contact angle and the water spot defect are roughly in a proportional linear relationship.

[0046] Based on this, the present application improves the water stain defect of the titanium nitride film by controlling the contact angle. Specifically, the present application provides a semiconductor back-end process capable of improving the water stain defect, in which when a wafer having a titanium nitride layer is wiped using a wiping device, the wiping device rotates the wafer and provides a cleaning liquid to the surface of the wafer, and the rotation sequentially includes a first stage, a second stage, and a third stage, wherein the rotation speed of the second stage is less than the rotation speed of the first stage, and the rotation speed of the third stage is greater than the rotation speed of the first stage.

[0047] In the semiconductor back-end process, the wipe process after the titanium nitride layer is formed uses a "medium-high-low-high" rotation speed setting, which can break the buffer layer of surface tension and reduce the number of water stain defects.

[0048] In one embodiment, the wiping process includes brushing the surface of the wafer with a brush head of a wiping device during the rotation.

[0049] In one embodiment, the material of the brush head includes Teflon.

[0050] In one embodiment, the cleaning solution includes deionized water.

[0051] In one embodiment, the rotation further includes a zero stage before the first stage, and a rotation speed of the zero stage is smaller than a rotation speed of the first stage.

[0052] In one embodiment, the rotation speed of the first stage is 2000 to 4000 rpm, the rotation speed of the third stage is 4000 to 6000 rpm, and the rotation speed of the first stage is greater than 200 rpm and less than 2000 rpm.

[0053] In one embodiment, the duration of the second stage is longer than that of the first stage, and the duration of the third stage is longer than that of the second stage.

[0054] In one embodiment, the first stage lasts for 1 to 20 seconds, the second stage lasts for 1 to 20 seconds, and the third stage lasts for 2 to 40 seconds.

[0055] In one embodiment, before the wiping step, a step of forming the titanium nitride layer is also included and the wafer exit temperature is less than 120 degrees Celsius.

[0056] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by an ionized metal plasma process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 50 seconds.

[0057] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by a metal organic chemical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 45 to 55 seconds.

[0058] In one embodiment, the step of forming the titanium nitride layer includes forming the titanium nitride layer by a physical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 45 seconds.

[0059] In one embodiment, the back-end process includes a step of forming an adhesion layer on the wafer, and the adhesion layer includes the titanium nitride layer.

[0060] In one embodiment, the back-end process includes a step of forming a metal anti-reflection layer on the wafer, and the metal anti-reflection layer includes the titanium nitride layer.

[0061] In one embodiment, the back-end process includes:

[0062] A contact hole is formed on a wafer; an adhesion layer is formed on the wafer; the adhesion layer covers the sidewalls and the bottom of the contact hole in the dielectric layer, and the upper surface of the dielectric layer; the adhesion layer includes the titanium nitride layer, and the wiping process is to rub the titanium nitride layer of the adhesion layer.

[0063] Since the adhesive layer covers the sidewalls and bottom of the contact hole in the dielectric layer, as well as the upper surface of the dielectric layer, the wipe treatment setting must not only solve the problem of residual water stains on the adhesive layer on the upper surface of the dielectric layer, but also take into account the residual water stains on the adhesive layer at the bottom of the contact hole. The wipe treatment after the adhesive layer is formed uses a "medium-high-low-high" speed setting, which can not only effectively reduce the amount of residual water stains on the adhesive layer on the upper surface of the dielectric layer, but also take into account the residual water stains at the bottom of the contact hole.

[0064] In one embodiment, the back-end process includes:

[0065] After forming the adhesion layer, filling the contact hole with a conductive material;

[0066] forming a metal layer on the adhesion layer;

[0067] forming a metal anti-reflection layer on the metal layer;

[0068] Wherein, the metal anti-reflection layer includes the titanium nitride layer, and the wiping process further includes wiping the titanium nitride layer of the metal anti-reflection layer.

[0069] Figure 4 Schematic diagram of water stain defect 11 on adhesion layer 9. After etching interlayer dielectric layer 8 to form contact hole 10, titanium nitride is deposited on the surface of wafer to form adhesion layer 9. Wafer structure includes substrate 1, metal silicide 2, gate dielectric layer 3, shallow trench isolation structure (STI) 4, gate 5, sidewall 6, silicon oxynitride layer 7, interlayer dielectric layer 8, adhesion layer 9.

[0070] The gate dielectric layer 3 is located on the substrate 1. The gate 5 is located on the gate dielectric layer 3. The sidewall 6 is located on the side of the gate 5. The metal silicide 2 is formed on the upper surface of the gate 5 and the upper surface of a part of the substrate 1. The silicon oxynitride layer 7 covers the metal silicide 2, the interlayer dielectric layer 8, the sidewall 6 and other structures. The interlayer dielectric layer 8 is located on the silicon oxynitride layer 7. The adhesion layer 9 covers the interlayer dielectric layer 8 and the sidewall and bottom of the contact hole 10.

[0071] The substrate 1 is a semiconductor substrate, and its material can be undoped single crystal silicon, single crystal silicon doped with impurities, silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc. It can also be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors. Figure 4 In the embodiment shown, the constituent material of the substrate 1 is single crystal silicon. Devices, such as NMOS and / or PMOS transistors, may be formed on the substrate 1. Accordingly, a conductive component may also be formed in the substrate 1, and the conductive component may be a gate, source or drain of the transistor, etc.

[0072] In one embodiment of the present application, the gate dielectric layer 3 may include conventional dielectric materials such as oxides, nitrides and oxynitrides of silicon having a dielectric constant from about 4 to about 20 (measured in vacuum), or the gate dielectric layer 3 may include a generally higher dielectric constant dielectric material having a dielectric constant from about 20 to at least about 100. Such higher dielectric constant dielectric materials may include, but are not limited to, hafnium oxide, hafnium silicate, titanium oxide, barium strontium titanate (BSTs) and lead zirconate titanate (PZTs).

[0073] In one embodiment of the present application, the gate 5 is made of polysilicon. In other embodiments, metal, metal nitride, metal silicide or similar compounds may be used as the material of the gate 5 .

[0074] In one embodiment of the present application, the material of the metal silicide 2 can be CoSi x 、NiSi x 、PtSi x or a combination of these compounds.

[0075] In one embodiment of the present application, the material of the interlayer dielectric layer 8 may be a silicon oxide layer, for example, a doped or undoped silicon oxide material layer formed by a thermal chemical vapor deposition (thermal CVD) manufacturing process or a high-density plasma chemical vapor deposition (HDPCVD) manufacturing process, and specifically may be undoped silicon glass (USG), phosphosilicate glass (PSG) or borophosphosilicate glass (BPSG). In addition, the interlayer dielectric may also be spin-on-glass (SOG) doped with boron or phosphorus, tetraethoxysilane doped with phosphorus (PTEOS) or tetraethoxysilane doped with boron (BTEOS).

[0076] In one embodiment of the present application, the water stain defect 11 is formed after the adhesion layer 9 is deposited, the wafer is thermally annealed, and then the wafer is wiped. The wafer wipe can be used Figure 1 The cleaning liquid used in the wafer wiping device shown is deionized water. The rotation of the wafer by the rotating table 110 includes the first stage, the second stage and the third stage in sequence, wherein the rotation speed of the second stage is less than that of the first stage, and the rotation speed of the third stage is greater than that of the first stage. The wafer wiping process uses the "medium-high-low-high" speed setting, which can break the buffer layer of surface tension and make the contact angle present a state of <50 degrees, thereby reducing the number of water stain defects. That is, the wafer wiping process can obtain the best contact angle by controlling the rotation speed, contributing to the process window of the best contact angle.

[0077] In one embodiment of the present application, a zero stage with a rotation speed lower than that of the first stage is further included before the first stage.

[0078] In one embodiment of the present application, the rotation speed of the first stage is 2000 to 4000 rpm, the rotation speed of the third stage is 4000 to 6000 rpm, the rotation speed of the first stage is greater than 200 rpm and less than 2000 rpm, and the rotation speed of the zero stage is greater than 200 rpm and less than 2000 rpm.

[0079] In one embodiment of the present application, the duration of the second stage is longer than that of the first stage, and the duration of the third stage is longer than that of the second stage. In one embodiment of the present application, the duration of the zero stage is longer than that of the first stage.

[0080] In one embodiment of the present application, the duration of the first stage is 1 to 20 seconds, the duration of the second stage is 1 to 20 seconds, and the duration of the third stage is 2 to 40 seconds.

[0081] Since the contact hole 10 has been formed on the wafer during wiping, if water stains remain at the bottom of the hole, the yield will be affected. Therefore, the setting of the rotation speed of the wiping equipment needs to not only solve the problem of water stains remaining on the surface of the adhesion layer 9, but also take into account the problem of water stains remaining at the bottom of the contact hole 10. Table 2 is the process parameters of wiping in an embodiment of the present application. Among them, steps 1 and 2 belong to the zero stage, step 3 belongs to the first stage, step 4 belongs to the second stage, and step 5 belongs to the third stage.

[0082]

[0083] Table 2

[0084] Figure 5 3 is a contact angle distribution diagram of an embodiment and a comparative example using the parameter settings in Table 2, in which the horizontal axis represents the number of the wafer, the solid points are the data of the embodiment of the present application, and the hollow points are the data of the comparative example.

[0085] After the wafer completes the deposition of the titanium nitride layer in the reaction chamber of the deposition machine, it has a relatively high temperature and needs to be cooled in the reaction chamber before exiting the chamber. During cooling, the deposition machine stops heating and an inert gas can be introduced. According to the inventor's research, the exit temperature is also one of the key factors in controlling the contact angle. In one embodiment of the present application, the wafer exit temperature of the titanium nitride layer deposition process is less than 120 degrees Celsius. Since the wafer stays in the reaction chamber for too long, it will occupy equipment resources. In order to take into account production efficiency, the cooling time cannot be too long.

[0086] Based on the correlation between the water stain defect and the contact angle difference caused by the difference in the wafer exit temperature after the thin film deposition titanium nitride process, the present application designs a suitable cooling time setting, as shown in Table 3:

[0087]

[0088] Table 3

[0089] This allows the contact angle to be less than 50 degrees after the titanium nitride thin film deposition process is completed.

[0090] In one embodiment of the present application, after the adhesion layer 9 is deposited and the wipe process is performed, the following steps are further included:

[0091] Filling the contact hole 10 with a conductive material 12;

[0092] forming a metal layer 13 on the adhesion layer 9;

[0093] forming a metal anti-reflection layer 14 on the metal layer 13;

[0094] The wafer on which the metal anti-reflection layer 14 is formed is subjected to a wiping process.

[0095] Figure 6 FIG. 1 is a schematic diagram of a water spot defect 15 on the metal anti-reflection layer 14 .

[0096] Figure 7 This is a flowchart of some steps of the back-end process in one embodiment of the present application. Please refer to Figure 4 and Figure 6 , the back-end process includes the following steps:

[0097] S211, contact hole etching.

[0098] The interlayer dielectric layer 8 is photolithographically processed and etched to form a contact hole 10 .

[0099] S213, deposition of titanium nitride as an adhesion layer.

[0100] The adhesion layer 9 may be formed by using the aforementioned IMP TiN, PVD TiN or CVD TiN.

[0101] S215, annealing.

[0102] After forming the adhesion layer 9, the wafer is thermally annealed.

[0103] S217, wiping process.

[0104] use Figure 1 The wiping device shown is used to wipe the wafer, and the parameter settings of the wiping device can be as shown in Table 2.

[0105] S219, defect scanning.

[0106] Use defect inspection equipment to inspect wafers for defects.

[0107] S221, filling the contact hole with a conductive material.

[0108] The conductive material 12 may be metal tungsten, that is, a tungsten plug is formed in the contact hole 10 .

[0109] S223, CMP.

[0110] The excess tungsten metal on the wafer surface is removed by chemical mechanical polishing (CMP).

[0111] S225, forming a metal layer.

[0112] A metal layer 13 is formed and patterned to serve as a metal connection. The material of the metal layer 13 may be an aluminum-copper alloy.

[0113] S227, forming a metal anti-reflection layer.

[0114] A titanium nitride layer may be formed on the metal layer 13 by using the aforementioned IMP TiN, PVD TiN or CVD TiN method as the metal anti-reflection layer 14 .

[0115] S229, wiping process.

[0116] use Figure 1 The wiping device shown performs wiping processing on the wafer. Since the metal anti-reflection layer 14 is also a titanium nitride layer, the wiping processing settings of any of the above embodiments can be adopted, for example, the parameter settings can be the same as those of step 217.

[0117] S231, defect scanning.

[0118] This application is based on the adhesion layer (Glue Layer) and metal anti-reflection layer (Metal ARC) process. The number of water mark defects generated after the wiping process is related to the contact angle difference caused by the difference in the wafer exit temperature after the thin film deposition TiN process and the wiping process, so as to design the optimal cooling time. At the same time, the wiping process adopts the "medium-high-low-high" speed switching method to make the surface contact angle present the best state. Using the semiconductor back-end process solution of this application, the median value of water mark defects can be controlled within 10. Refer to Figure 8 . Figure 8 The horizontal axis in the middle represents the number of wafers, and each number includes one wafer each of IMP TiN, PVD TiN and CVD TiN. The left side of the dotted line is the wafer data of the comparative example, and the dotted line and the right side thereof are the data of the embodiment of the present application.

[0119] The present application accordingly provides a semiconductor device, which is manufactured using the semiconductor back-end process described in any of the aforementioned embodiments. Fig. 9 This is a yield trend chart of the product after adopting the solution of the embodiment of the present application. The horizontal axis in the figure represents the wafer number, the solid points are the data of the embodiment of the present application, and the hollow points are the data of the comparative example.

[0120] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0121] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0122] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0123] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A semiconductor back-end process, characterized in that: The invention comprises using a wiping device to wipe a wafer having a titanium nitride layer formed thereon, wherein the wiping process comprises rotating the wafer and providing a cleaning liquid to the surface of the wafer, wherein the rotation comprises a first stage, a second stage and a third stage in sequence, wherein the rotation speed of the second stage is less than the rotation speed of the first stage, and the rotation speed of the third stage is greater than the rotation speed of the first stage.

2. The semiconductor back-end process according to claim 1, characterized in that: The wiping process includes brushing the surface of the wafer with a brush head of a wiping device during the rotation.

3. The semiconductor back-end process according to claim 1, characterized in that: The rotation further includes a zero phase before the first phase, and a rotation speed of the zero phase is lower than a rotation speed of the first phase.

4. The semiconductor back-end process according to claim 3, characterized in that: The rotation speed of the first stage is 2000 to 4000 rpm, the rotation speed of the third stage is 4000 to 6000 rpm, and the rotation speed of the first stage is greater than 200 rpm and less than 2000 rpm.

5. The semiconductor back-end process according to claim 1, characterized in that: The duration of the second stage is longer than that of the first stage, and the duration of the third stage is longer than that of the second stage; and / or The duration of the first stage is 1 to 20 seconds, the duration of the second stage is 1 to 20 seconds, and the duration of the third stage is 2 to 40 seconds.

6. The semiconductor back-end process according to claim 1, characterized in that: Before the wiping step, the method further includes forming the titanium nitride layer and the wafer exit temperature is less than 120 degrees Celsius.

7. The semiconductor back-end process according to claim 6, characterized in that: The step of forming the titanium nitride layer includes forming the titanium nitride layer by an ionized metal plasma process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 50 seconds; or The step of forming the titanium nitride layer includes forming the titanium nitride layer by a metal organic compound chemical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 45 to 55 seconds; or The step of forming the titanium nitride layer includes forming the titanium nitride layer by a physical vapor deposition process, and exiting the reaction chamber after cooling in the reaction chamber for 40 to 45 seconds.

8. The semiconductor back-end process according to any one of claims 1 to 7, characterized in that: comprising the step of forming an adhesion layer on the wafer, the adhesion layer comprising the titanium nitride layer; and / or The method comprises the step of forming a metal anti-reflection layer on the wafer, wherein the metal anti-reflection layer comprises the titanium nitride layer.

9. The semiconductor back-end process according to any one of claims 1 to 7, characterized in that: include: forming contact holes on the wafer; An adhesion layer is formed on the wafer, and the adhesion layer covers the sidewalls and the bottom of the contact hole in the dielectric layer, and the upper surface of the dielectric layer; the adhesion layer includes the titanium nitride layer, and the wipe treatment is to wipe the titanium nitride layer of the adhesion layer.

10. The semiconductor back-end process according to claim 9, characterized in that: include: After forming the adhesion layer, filling the contact hole with a conductive material; forming a metal layer on the adhesion layer; forming a metal anti-reflection layer on the metal layer; Wherein, the metal anti-reflection layer includes the titanium nitride layer, and the wiping process further includes wiping the titanium nitride layer of the metal anti-reflection layer.

11. A semiconductor device manufactured by using the semiconductor back-end process according to any one of claims 1 to 10.

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