Semiconductor structure and mask layout

By designing the quantitative graphical structure of alternating distribution in the semiconductor structure, the problem of low marking detection efficiency of semiconductor wafers in existing technologies has been solved, and higher targeted accuracy and efficiency are achieved.

CN119340309APending Publication Date: 2025-01-21SEMICON MFG INT (SHANGHAI) CORP
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Patent Information

Application Number
CN202310885879.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-07-18
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

The prior art has errors in the detection of semiconductor wafer alignment marks, resulting in inefficiency.

Method used

Provide a semiconductor structure, including the three -layer structure layer, of which the second quantity measured graphic structure is distributed vertically in the direction of the extension in the projection of the first structure layer. The graphic composition of the tri -structure layer is overlapped with the third volume measurement of the graphic structure to achieve the accuracy of the two layers of structure layers at the same time.

Benefits of technology

Through this structure, the second structural layer and the first structural layer can be aligned simultaneously in the longitudinal direction to obtain more comprehensive and balanced alignment data and improve alignment accuracy. It is especially suitable for structures that require reference to two structural layers. form.

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Abstract

The invention discloses a semiconductor structure and a mask layout, and the semiconductor structure comprises a first structure layer which comprises a first measurement pattern structure, and the first measurement pattern structure comprises a plurality of first pattern structures which are arranged in parallel; the second structure layer is located on the first structure layer, the second structure layer comprises a second measurement pattern structure, the second measurement pattern structure comprises a plurality of second pattern structures which are arranged in parallel, the extension direction of the second pattern structures is the same as that of the first pattern structures, and in the projection of the second measurement pattern structures in the first structure layer, the second measurement pattern structures are arranged along the direction perpendicular to the extension direction. Projections of the first graphic structures and the second graphic structures are alternately distributed; the third structure layer is located on the second structure layer, the third structure layer comprises a third measurement pattern structure, and a pattern structure formed by the projection of the first measurement pattern structure and the projection of the second measurement pattern structure on the third structure layer coincides with the third measurement pattern structure. According to the invention, the scheme of simultaneously referring to two structural layers is realized.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a mask layout. Background Art

[0002] Integrated circuits (ICs) are composed of numerous circuit elements formed on a semiconductor substrate, along with multiple layers of dielectric layers and metal interconnects stacked above the substrate. As IC linewidths shrink and integration increases, wafer alignment accuracy becomes crucial during the wafer exposure process.

[0003] In the existing semiconductor manufacturing process, before semiconductor devices are fabricated on a wafer, the wafer layout must be designed to divide the wafer into a number of unit areas (die) and scribe lines between the unit areas. The unit areas are used to subsequently form semiconductor devices, and the scribe lines serve as scribe lines for separating the unit areas during the packaging phase after the semiconductor devices are manufactured. When designing the photolithography layout used to divide the unit areas and scribe lines on the wafer surface, marking patterns required for the photolithography process, such as alignment marks and overlay marks, are typically formed on the scribe lines.

[0004] In the process of wafer alignment using alignment marks, the alignment marks need to be detected. However, various errors exist in the process of detecting alignment marks in the prior art, resulting in low efficiency of the alignment mark detection method in the prior art. Summary of the Invention

[0005] The problem solved by the implementation of the present invention is to provide a semiconductor structure and a mask layout, which is conducive to realizing a solution of simultaneously referencing two structural layers.

[0006] To solve the above problems, an embodiment of the present invention provides a semiconductor structure, comprising: a first structural layer, comprising a first measurement pattern structure, the first measurement pattern structure comprising a plurality of first pattern structures arranged in parallel; a second structural layer, located on the first structural layer, the second structural layer comprising a second measurement pattern structure, the second measurement pattern structure comprising a plurality of second pattern structures arranged in parallel, the second pattern structure and the first pattern structure having the same extension direction, and in a projection of the second measurement pattern structure on the first structural layer, the projections of the first pattern structure and the second pattern structure are alternately distributed along a direction perpendicular to the extension direction; a third structural layer, located on the second structural layer, the third structural layer comprising a third measurement pattern structure, and a pattern structure formed by projections of the first measurement pattern structure and the second measurement pattern structure on the third structural layer coincides with the third measurement pattern structure.

[0007] Optionally, the first graphic structure includes a first sub-graphic structure extending along a first direction and a second sub-graphic structure extending along a second direction, and the first direction is perpendicular to the second direction; the second graphic structure includes a third sub-graphic structure extending along the first direction and a fourth sub-graphic structure extending along the second direction. In the projection of the second measurement graphic structure on the first structural layer, along the second direction, the projections of the first sub-graphic structure and the third sub-graphic structure are alternately distributed, and along the first direction, the projections of the second sub-graphic structure and the fourth sub-graphic structure are alternately distributed.

[0008] Optionally, multiple first sub-graphic structures correspond one-to-one to multiple second sub-graphic structures, and some of the first sub-graphic structures are in contact with the ends of the second sub-graphic structures, and the remaining first sub-graphic structures are in contact with the extension lines of the second sub-graphic structures, forming multiple first folded-line graphic structures arranged in parallel along a third direction, and the angles between the third direction and the first direction and the second direction are both 45°; multiple third sub-graphic structures correspond one-to-one to multiple fourth sub-graphic structures, and some of the third sub-graphic structures are in contact with the ends of the fourth sub-graphic structures, and the remaining third sub-graphic structures are in contact with the extension lines of the fourth sub-graphic structures, forming multiple second folded-line graphic structures arranged in parallel along the third direction.

[0009] Optionally, the first measurement graphic structure, the second measurement graphic structure and the third measurement graphic structure are used to measure the deviation of the first structure layer, the second structure layer and the third structure layer along the calibration direction; the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°.

[0010] Optionally, in the projection of the second measurement pattern structure on the first structure layer, the projections of the first pattern structure and the second pattern structure are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

[0011] Optionally, the morphology of the first graphic structure is formed by a plurality of first graphic lines extending in a horizontal direction and arranged in parallel; the morphology of the second graphic structure is formed by a plurality of second graphic lines extending in a horizontal direction and arranged in parallel.

[0012] Optionally, the first pattern lines and the second pattern lines have different widths, and / or the spacing between adjacent first pattern lines and the spacing between adjacent second pattern lines are different.

[0013] Optionally, the first graphic line and the second graphic line have different graphic line arrangements, and the first graphic line and the second graphic line are respectively one of the following graphic line arrangements: every two graphic lines are in a group along the arrangement direction, and the ends of each group of graphic lines are connected; every four graphic lines are in a group along the arrangement direction, and the two outer ends of the graphic lines in each group of graphic lines are connected, and the two inner ends of the graphic lines are connected.

[0014] Optionally, the first structural layer, the second structural layer and the third structural layer all include a chip device area, and the first measurement pattern structure, the second measurement pattern structure and the third measurement pattern structure are all located near the center of the chip device area.

[0015] Correspondingly, an embodiment of the present invention further provides a mask pattern, comprising: a first pattern layer, comprising a first measurement pattern, the first measurement pattern comprising a plurality of first patterns arranged in parallel; a second pattern layer, located above the first pattern layer, the second pattern layer comprising a second measurement pattern, the second measurement pattern comprising a plurality of second patterns arranged in parallel, the second patterns and the first patterns having the same extension direction, and in the projection of the second measurement pattern on the first pattern layer, the projections of the first pattern and the second pattern are alternately distributed along a direction perpendicular to the extension direction; a third pattern layer, located above the second pattern layer, the third pattern layer comprising a third measurement pattern, and a pattern formed by the projections of the first measurement pattern and the second measurement pattern on the third pattern layer coincides with the third measurement pattern.

[0016] Optionally, the first graphic includes a first sub-graphic extending along a first direction and a second sub-graphic extending along a second direction, and the first direction is perpendicular to the second direction; the second graphic includes a third sub-graphic extending along the first direction and a fourth sub-graphic extending along the second direction, and in the projection of the second measurement graphic on the first plate layer, the projections of the first sub-graphic and the third sub-graphic are alternately distributed along the second direction, and the projections of the second sub-graphic and the fourth sub-graphic are alternately distributed along the first direction.

[0017] Optionally, multiple first sub-graphics are in one-to-one contact with multiple second sub-graphics to form multiple first fold line graphics arranged in parallel along a third direction, and the angles between the third direction and the first direction and the second direction are both 45°; multiple third sub-graphics are in one-to-one contact with multiple fourth sub-graphics to form multiple second fold line graphics arranged in parallel along the third direction.

[0018] Optionally, the first measurement pattern, the second measurement pattern and the third measurement pattern are used to measure the deviation of the first layer, the second layer and the third layer along the calibration direction; the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°.

[0019] Optionally, in the projection of the second measurement pattern on the first layer, the projections of the first pattern and the second pattern are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

[0020] Optionally, the shape of the first graphic is formed by a plurality of first graphic lines extending in a horizontal direction and arranged in parallel; the shape of the second graphic is formed by a plurality of second graphic lines extending in a horizontal direction and arranged in parallel.

[0021] Optionally, the first pattern lines and the second pattern lines have different widths, and / or the spacing between adjacent first pattern lines and the spacing between adjacent second pattern lines are different.

[0022] Optionally, the first graphic line and the second graphic line have different graphic line arrangements, and the first graphic line and the second graphic line are respectively one of the following graphic line arrangements: every two graphic lines are in a group along the arrangement direction, and the ends of each group of graphic lines are connected; every four graphic lines are in a group along the arrangement direction, and the two outer ends of the graphic lines in each group of graphic lines are connected, and the two inner ends of the graphic lines are connected.

[0023] Optionally, the first version layer, the second version layer and the third version layer all include a chip device area, and the first measurement pattern, the second measurement pattern and the third measurement pattern are all located near the center of the chip device area.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0025] In the semiconductor structure provided by an embodiment of the present invention, in the projection of the second measurement pattern structure on the first structure layer, the projections of the first pattern structure and the second pattern structure are alternately distributed along a direction perpendicular to the extension direction, and the pattern structure formed by the projections of the first measurement pattern structure and the second measurement pattern structure on the third structure layer overlaps with the third measurement pattern structure. In this embodiment of the present invention, the first pattern structure and the second pattern structure are alternately distributed along a direction perpendicular to the extension direction, and the pattern formed by the first pattern structure and the second pattern structure overlaps with the third measurement pattern structure in the vertical direction. Therefore, in the vertical direction, the third measurement pattern structure of the third structure layer can be simultaneously aligned with the second measurement pattern structure of the second structure layer and the first measurement pattern structure of the first structure layer, and more comprehensive and balanced alignment data can be obtained. Therefore, the formation of the structure in the third structure layer can use the first and second structure layers as alignment references at the same time, which facilitates more precise formation position of the structure in the third structure layer. In particular, for the formation of a structure that requires reference to two structure layers, the embodiment of the present invention can more accurately and easily align with both structure layers simultaneously, facilitating the implementation of a solution that simultaneously references both structure layers.

[0026] In the mask pattern provided by the embodiment of the present invention, in the projection of the second measurement pattern on the first plate layer, along the direction perpendicular to the extension, the projections of the first pattern and the second pattern are alternately distributed, and the pattern formed by the projections of the first measurement pattern and the second measurement pattern on the third plate layer coincides with the third measurement pattern; in the embodiment of the present invention, the first plate layer is used to form a first structural layer, the first measurement pattern is used to form a first measurement pattern structure, the first pattern is used to form a first pattern structure, the second plate layer is used to form a second structural layer, the second measurement pattern is used to form a second measurement pattern structure, the second pattern is used to form a second pattern structure, the third plate layer is used to form a third structural layer, and the third measurement pattern is used to form a third measurement pattern structure, along the direction perpendicular to the extension. In the longitudinal direction, the first graphic and the second graphic are alternately distributed, and the graphic formed by the first graphic and the second graphic coincides with the third graphic. Therefore, in the longitudinal direction, the third measurement graphic structure of the third structural layer can be aligned with the second measurement graphic structure of the second structural layer and the first measurement graphic structure of the first structural layer at the same time, and more comprehensive and balanced alignment data can be obtained, so that the formation of the structure in the third structural layer can use the first structural layer and the second structural layer as the alignment reference at the same time, which is conducive to making the formation position of the structure in the third structural layer more accurate, and especially for the formation of a structure that needs to refer to two structural layers, the embodiment of the present invention can be more accurately and easily aligned with the two structural layers at the same time, which is conducive to realizing the solution of simultaneously referring to two structural layers. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a structural schematic diagram corresponding to a semiconductor structure;

[0028] Figures 2 to 11 is a structural schematic diagram corresponding to an embodiment of a semiconductor structure of the present invention;

[0029] Figures 12 to 21 The mask of the present invention Figure 1 Schematic diagram corresponding to the embodiment. DETAILED DESCRIPTION

[0030] Currently, it is difficult to implement a solution that simultaneously references two structural layers. The reasons why it is difficult to implement a solution that simultaneously references two structural layers are now analyzed in conjunction with a semiconductor structure.

[0031] Figure 1 It is a structural schematic diagram corresponding to a semiconductor structure.

[0032] refer to Figure 1 The semiconductor structure includes: a plurality of structural layers 10 stacked in a longitudinal direction, wherein the structural layers 10 include measurement pattern structures 30, and the measurement pattern structures 30 of two adjacent structural layers 10 overlap in the longitudinal direction.

[0033] The measurement pattern structure 30 is a photolithography alignment mark. The measurement pattern structures 30 of two adjacent structural layers 10 overlap in the vertical direction. Therefore, each structural layer 10 can only be aligned with the previous structural layer 10 as a reference, and it is difficult to achieve a solution of aligning with reference to the previous two structural layers 10 at the same time.

[0034] In order to solve the technical problem, an embodiment of the present invention provides a semiconductor structure, including: a first structural layer, including a first measurement pattern structure, the first measurement pattern structure including a plurality of first pattern structures arranged in parallel; a second structural layer, located on the first structural layer, the second structural layer including a second measurement pattern structure, the second measurement pattern structure including a plurality of second pattern structures arranged in parallel, the second pattern structure and the first pattern structure extending in the same direction, and in the projection of the second measurement pattern structure on the first structural layer, the projections of the first pattern structure and the second pattern structure are alternately distributed along a direction perpendicular to the extension direction; a third structural layer, located on the second structural layer, the third structural layer including a third measurement pattern structure, and the pattern structure formed by the projections of the first measurement pattern structure and the second measurement pattern structure on the third structural layer coincides with the third measurement pattern structure.

[0035] In an embodiment of the present invention, the first graphic structure and the second graphic structure are alternately distributed along a direction perpendicular to the extension direction, and the graphic formed by the first graphic structure and the second graphic structure overlaps with the third measurement graphic structure in the longitudinal direction. Therefore, in the longitudinal direction, the third measurement graphic structure of the third structural layer can be simultaneously aligned with the second measurement graphic structure of the second structural layer and the first measurement graphic structure of the first structural layer, and more comprehensive and balanced alignment data can be obtained, so that the formation of the structure in the third structural layer can use the first structural layer and the second structural layer as alignment references at the same time, which is beneficial to making the formation position of the structure in the third structural layer more accurate, and especially for the formation of a structure that needs to refer to two structural layers, the embodiment of the present invention can be more accurately and easily aligned with the two structural layers at the same time, which is beneficial to realize the solution of simultaneously referring to two structural layers.

[0036] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0037] Figures 2 to 11 FIG. 1 is a schematic structural diagram of a semiconductor structure according to an embodiment of the present invention.

[0038] Combined with reference Figures 2 to 11The semiconductor structure includes: a first structure layer 110, including a first measurement pattern structure 210, the first measurement pattern structure 210 including a plurality of first pattern structures 310 arranged in parallel; a second structure layer 120, located on the first structure layer 110, the second structure layer 120 including a second measurement pattern structure 220, the second measurement pattern structure 220 including a plurality of second pattern structures 320 arranged in parallel, the second pattern structures 320 and the first pattern structures 310 extending in the same direction, the second measurement pattern structures 220 projecting onto the first structure layer 110 (e.g., Figure 6 (as shown in the dashed box in the middle), along the direction perpendicular to the extension, the projections of the first graphic structure 310 and the second graphic structure 320 are alternately distributed; the third structure layer 230 is located on the second structure layer 220, and the third structure layer 230 includes a third measurement graphic structure 230. The graphic structure formed by the projections of the first measurement graphic structure 210 and the second measurement graphic structure 220 on the third structure layer 130 coincides with the third measurement graphic structure 230.

[0039] It should be noted that the first structural layer 110, the second structural layer 120 and the third structural layer 230 are stacked in the longitudinal direction, and for the sake of clarity, the first structural layer 110 (eg Figure 2 As shown), the second structural layer 120 (as Figure 4 As shown) and the third structural layer 230 (as Figure 7 As shown) are respectively indicated, wherein, Figure 3 for Figure 2 A partial enlarged view of the dotted box in the middle. Figure 5 for Figure 4 A partial enlarged view of the dotted box in the middle. Figure 8 yes Figure 7 A partial enlarged view of the dotted box in the middle.

[0040] In this embodiment, the semiconductor structure includes a chip device region. Specifically, in this embodiment, the first structure layer 110 , the second structure layer 120 and the third structure layer 130 all include a chip device region 100 c for forming a semiconductor device.

[0041] In this embodiment, the first measurement pattern structure 210 , the second measurement pattern structure 220 and the third measurement pattern structure 230 are all located near the center of the chip device region 100 c .

[0042] Specifically, Figure 9 The diagram shows a 1×1 chip in a 1×1 unit of a semiconductor structure. Figure 10 The diagram shows a 1×2 chip in a 1×1 unit of a semiconductor structure. Figure 11It shows a 2×1 chip in a 1×1 unit of the semiconductor structure. The first measurement pattern structure 210 , the second measurement pattern structure 220 and the third measurement pattern structure 230 are all located in the chip, near the center of the chip device area 100 c.

[0043] The first measurement pattern structure 210, the second measurement pattern structure 220 and the third measurement pattern structure 230 are all located near the center of the chip device area 100c. Figures 9 to 11 As shown in the area 100b, it is beneficial to make the alignment measurement results of the first measurement pattern structure 210, the second measurement pattern structure 220 and the third measurement pattern structure 230 more accurate and can better represent the alignment results of the entire structural layer.

[0044] In this embodiment, the first measurement pattern structure 210 , the second measurement pattern structure 220 and the third measurement pattern structure 230 may also be located in the dicing street 100 a of the semiconductor structure.

[0045] The first structure layer 110 , the second structure layer 120 and the third structure layer 130 are respectively a layer structure in the semiconductor structure, and the first structure layer 110 , the second structure layer 120 and the third structure layer 130 are stacked sequentially from bottom to top along the longitudinal direction.

[0046] The first metrology pattern structure 210 , the second metrology pattern structure 220 and the third metrology pattern structure 230 are all metrology structures used as photolithography alignment marks.

[0047] Specifically, in this embodiment, the first measurement pattern structure 210 , the second measurement pattern structure 220 and the third measurement pattern structure 230 are used to measure deviations of the first structure layer 110 , the second structure layer 120 and the third structure layer 130 along the calibration direction.

[0048] Combined with reference Figure 2 、 Figure 4 and Figure 7 , the deviation in the calibration direction is the offset in the X direction and the Y direction in the semiconductor structure.

[0049] In this embodiment, the first measurement pattern structure 210 includes a plurality of first pattern structures 310 arranged in parallel.

[0050] The plurality of first pattern structures 310 arranged in parallel are used to form the first measurement pattern structure 210 .

[0051] In this embodiment, the first graphic structure 310 includes a first direction (eg Figure 2 A first sub-graphic structure 311 extending in the direction A, and a second sub-graphic structure 312 extending in the direction A Figure 2The second sub-pattern structure 312 extends in the direction B, wherein the first direction is perpendicular to the second direction.

[0052] The first pattern structure 310 includes a first sub-pattern structure 311 extending along the first direction and a second sub-pattern structure 312 extending along the second direction. In other words, the first measurement pattern structure 210 is composed of the first sub-pattern structure 311 and the second sub-pattern structure 312 perpendicular to each other, so that the first measurement pattern structure 210 can simultaneously measure the X direction (such as the X direction) of the semiconductor structure. Figure 2 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 2 The X and Y directions are aligned to obtain the offsets.

[0053] In this embodiment, the first measurement pattern structure 210 is composed of a first sub-pattern structure 311 and a second sub-pattern structure 312 that are perpendicular to each other. In order to make the first measurement pattern structure 210 evenly and more compactly arranged, a plurality of first sub-pattern structures 311 correspond to a plurality of second sub-pattern structures 312 one by one, and some of the first sub-pattern structures 311 are in contact with the ends of the second sub-pattern structures 312, and the remaining first sub-pattern structures 311 are in contact with the extension lines of the second sub-pattern structures 312, forming a pattern along the third direction (such as Figure 2 The plurality of first fold line graphic structures are arranged in parallel (as shown in the direction C in the middle), and the angles between the third direction and the first direction and the second direction are all 45°.

[0054] In this embodiment, the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°.

[0055] Specifically, in this embodiment, for the calibration direction in the X direction, the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. For the calibration direction in the Y direction, the angle between the first direction and the calibration direction is also 45°, and the angle between the second direction and the calibration direction is also 45°.

[0056] The first measurement graphic structure 210 is composed of a first sub-graphic structure 311 and a second sub-graphic structure 312 that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. Therefore, the first measurement graphic structure 210 can more accurately and uniformly obtain the deviation between the structural layers in the calibration direction.

[0057] refer to Figure 3 In this embodiment, the first graphic structure 310 is formed by a plurality of first graphic lines 410 extending in a horizontal direction and arranged in parallel.

[0058] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of first graphic lines 410 extending in the horizontal direction and arranged in parallel are arranged to form the required morphology of the first graphic structure 310. This is conducive to simplifying the formation process of the first graphic structure 310, and is conducive to flexible control of the morphology to be obtained by the first graphic structure 310, which is conducive to improving the flexibility and applicability of the morphology of the first graphic structure 310.

[0059] In this embodiment, the second measurement pattern structure 220 includes a plurality of second pattern structures 320 arranged in parallel.

[0060] The plurality of first pattern structures 310 arranged in parallel are used to form the first measurement pattern structure 210 .

[0061] refer to Figure 6 , Figure 6 The first structure layer 110 is a schematic diagram illustrating a projection of the second measurement pattern structure 220 on the first structure layer 110, wherein: Figure 6 The dotted box in the middle illustrates the projection of the second measurement pattern structure 220 in the first structural layer 110. In this embodiment, the second pattern structure 320 and the first pattern structure 310 extend in the same direction. In the projection of the second measurement pattern structure 220 in the first structural layer 110, the projections of the first pattern structure 310 and the second pattern structure 320 are alternately distributed along a direction perpendicular to the extension direction.

[0062] In the projection of the second measurement graphic structure 220 on the first structural layer 110, the projections of the first graphic structure 310 and the second graphic structure 320 are alternately distributed along a direction perpendicular to the extension direction. That is, in the longitudinal direction, the graphic formed by the morphology of the first graphic structure 310 and the second graphic structure 320 can be used to align the first structural layer 110 through the first graphic structure 310, and to align the second structural layer 120 through the second graphic structure 320.

[0063] In this embodiment, in the projection of the second measurement pattern structure 220 on the first structure layer 110 , the projections of the first pattern structure 310 and the second pattern structure 320 are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

[0064] The projections of the first graphic structure 310 and the second graphic structure 320 are alternately distributed at equal intervals, which is beneficial for making the arrangement of the first graphic structure 310 and the second graphic structure 320 more uniform. At the same time, it is also beneficial for making the arrangement of the third measurement graphic structure 330, which overlaps with the morphology of the first graphic structure 310 and the second graphic structure 320 in the vertical direction, more uniform. It is also beneficial for making the alignment of the third structure layer 130 with the first structure layer 110 according to the first graphic structure 310, and the alignment of the third structure layer 130 with the second structure layer 120 according to the second graphic structure 320 more accurate.

[0065] In this embodiment, the second graphic structure 320 includes a plurality of Figure 4 A third sub-graphic structure 321 extending in the second direction (as shown in FIG. Figure 4 The fourth sub-graphic structure 322 extends in the direction B in FIG.

[0066] The second pattern structure 320 includes a third sub-pattern structure 321 extending along the first direction and a fourth sub-pattern structure 322 extending along the second direction. In other words, the second measurement pattern structure 220 is composed of the third sub-pattern structure 321 and the fourth sub-pattern structure 322 perpendicular to each other, so that the second measurement pattern structure 220 can simultaneously measure the X direction (such as Figure 4 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 4 The X and Y directions are aligned to obtain the offsets.

[0067] In this embodiment, the third sub-pattern structure 321 and the first sub-pattern structure 311 extend in the same direction, and the fourth sub-pattern structure 322 and the second sub-pattern structure 312 extend in the same direction. Accordingly, in the projection of the second measurement pattern structure 220 on the first structural layer 110, the projections of the first sub-pattern structure 311 and the third sub-pattern structure 321 are alternately distributed along the second direction, and the projections of the second sub-pattern structure 312 and the fourth sub-pattern structure 322 are alternately distributed along the first direction.

[0068] In this embodiment, the second measurement pattern structure 220 is composed of a third sub-pattern structure 321 and a fourth sub-pattern structure 322 that are perpendicular to each other. In order to make the second measurement pattern structure 220 evenly and more compactly arranged, a plurality of third sub-pattern structures 321 correspond to a plurality of fourth sub-pattern structures 322 one by one, and some of the third sub-pattern structures 321 are in contact with the ends of the fourth sub-pattern structures 322, and the remaining third sub-pattern structures 321 are in contact with the extension lines of the fourth sub-pattern structures 322, forming a pattern along the third direction (such as Figure 4 Multiple second fold line graphic structures are arranged in parallel (as shown in the direction C in the middle).

[0069] The second measurement graphic structure 220 is composed of a third sub-graphic structure 321 and a fourth sub-graphic structure 322 that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. Therefore, the second measurement graphic structure 220 can more accurately and uniformly obtain the deviation between the structural layers in the calibration direction.

[0070] refer to Figure 5 In this embodiment, the second graphic structure 320 is formed by a plurality of second graphic lines 420 extending in a horizontal direction and arranged in parallel.

[0071] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of second graphic lines 420 extending in the horizontal direction and arranged in parallel are arranged to form the required morphology of the second graphic structure 320. This is beneficial to simplifying the formation process of the second graphic structure 320, and is beneficial to flexibly controlling the morphology that the second graphic structure 320 needs to obtain, and is beneficial to improving the flexibility and applicability of the morphology of the second graphic structure 320.

[0072] In this embodiment, the first structure layer 110 and the second structure layer 120 are structure layers of different layers. Moreover, the first measurement pattern structure 210 in the first structure layer 110 is formed according to the process technology of the first structure layer 110, and the second measurement pattern structure 220 in the second structure layer 120 is formed according to the process technology of the second structure layer 120. Therefore, the formation processes and process parameters of the first measurement pattern structure 210 and the second measurement pattern structure 220 are different. The morphology of the first measurement pattern structure 210 is composed of first pattern lines 410, and the morphology of the second measurement pattern structure 220 is composed of second pattern lines 420. Therefore, according to the process requirements of different layers, the widths of the first pattern lines 410 and the second pattern lines 420 are different, and / or the spacing between adjacent first pattern lines 410 and the spacing between adjacent second pattern lines 420 are different.

[0073] In this embodiment, the first patterning lines 410 and the second patterning lines 420 are both horizontally extending and arranged in parallel. Therefore, the first patterning lines 410 and the second patterning lines 420 are typically formed using a self-aligned double patterning (SADP) or self-aligned quadruple patterning (SAQP) method. Depending on the process requirements of different layers, when the first structure layer 110 and the second structure layer 120 are formed using different methods, that is, when the first structure layer 110 and the second structure layer 120 are formed using SADP and SAQP, respectively, the patterning lines 410 and the second patterning lines 420 are arranged differently. The first patterning lines 410 and the second patterning lines 420 are arranged in one of the following arrangements: two patterning lines are arranged in a group along the arrangement direction, and the ends of each group of patterning lines are connected; four patterning lines are arranged in a group along the arrangement direction, and the two outer patterning lines in each group of patterning lines are connected at their ends, and the two inner patterning lines in each group of patterning lines are connected at their ends.

[0074] In this embodiment, the third structure layer 230 includes a third measurement pattern structure 230 , and a pattern structure formed by projections of the first measurement pattern structure 210 and the second measurement pattern structure 220 on the third structure layer 130 overlaps with the third measurement pattern structure 230 .

[0075] In this embodiment, the first graphic structure 310 and the second graphic structure 320 are alternately distributed along a direction perpendicular to the extension direction, and the graphic formed by the first graphic structure 310 and the second graphic structure 320 overlaps with the third measurement graphic structure 230 in the longitudinal direction. Therefore, in the longitudinal direction, the third measurement graphic structure 230 of the third structural layer 130 can be simultaneously aligned with the second measurement graphic structure 220 of the second structural layer 120 and the first measurement graphic structure 210 of the first structural layer 110, and more comprehensive and balanced alignment data can be obtained, so that the formation of the structure in the third structural layer 130 can use the first structural layer 110 and the second structural layer 120 as alignment references at the same time, which is beneficial to making the formation position of the structure in the third structural layer 130 more accurate. In particular, for the formation of a structure that requires reference to two structural layers, this embodiment can more accurately and easily align with the two structural layers at the same time, which is beneficial to realizing a solution of simultaneously referencing two structural layers.

[0076] In this embodiment, the third measurement pattern structure 230 includes a plurality of third pattern structures 330 arranged in parallel.

[0077] The plurality of third pattern structures 330 arranged in parallel are used to form the third measurement pattern structure 230 .

[0078] In this embodiment, the third graphic structure 330 includes a plurality of Figure 7 A fifth sub-pattern structure 331 extending in the second direction (as shown in FIG. Figure 7 The sixth sub-graphic structure 332 extends in the direction B in FIG.

[0079] The third pattern structure 330 includes a fifth sub-pattern structure 331 extending along the first direction and a sixth sub-pattern structure 332 extending along the second direction. In other words, the third measurement pattern structure 230 is composed of the fifth sub-pattern structure 331 and the sixth sub-pattern structure 332 perpendicular to each other, so that the third measurement pattern structure 230 can simultaneously measure the X direction (such as Figure 7 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 7 The X and Y directions are aligned to obtain the offsets.

[0080] In this embodiment, the fifth sub-pattern structure 331 and the first sub-pattern structure 311 extend in the same direction, and the sixth sub-pattern structure 332 and the second sub-pattern structure 312 extend in the same direction.

[0081] Specifically, in this embodiment, the third structure layer 130 is aligned with the first structure layer 110 by aligning the third measurement structure 230 with the first measurement structure 210 , and the third structure layer 130 is aligned with the second structure layer 120 by aligning the third measurement structure 230 with the second measurement structure 220 .

[0082] In this embodiment, the third measurement pattern structure 230 is composed of a fifth sub-pattern structure 331 and a sixth sub-pattern structure 332 that are perpendicular to each other. In order to make the third measurement pattern structure 230 evenly and more compactly arranged, a plurality of fifth sub-pattern structures 331 and sixth sub-pattern structures 332 correspond to each other one by one, and some of the fifth sub-pattern structures 331 and the sixth sub-pattern structures 332 are in contact with each other at their ends, and the extension lines of the remaining fifth sub-pattern structures 331 and the sixth sub-pattern structures 332 are in contact, forming a pattern along the third direction (such as Figure 7 Multiple third fold line graphic structures arranged in parallel (as shown in the direction C in the middle).

[0083] The third measurement graphic structure 230 is composed of a fifth sub-graphic structure 331 and a sixth sub-graphic structure 332 that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. Therefore, the third measurement graphic structure 230 can more accurately and uniformly obtain the deviation between the structural layers in the calibration direction.

[0084] refer to Figure 8In this embodiment, the third graphic structure 330 is formed by a plurality of third graphic lines 430 extending in a horizontal direction and arranged in parallel.

[0085] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of third graphic lines 430 extending in the horizontal direction and arranged in parallel are arranged to form the required morphology of the third graphic structure 330. This is conducive to simplifying the formation process of the third graphic structure 330, and is conducive to flexible control of the morphology to be obtained by the third graphic structure 330, which is conducive to improving the flexibility and applicability of the morphology of the third graphic structure 330, and accordingly can enable the third graphic structure 330 to better overlap with the combination of the first graphic structure 310 and the second graphic structure 320.

[0086] Figures 12 to 21 The mask of the present invention Figure 1 Schematic diagram corresponding to the embodiment.

[0087] Combined with reference Figures 12 to 21 The mask layer includes: a first mask layer 110, including a first measurement pattern 210, the first measurement pattern 210 including a plurality of first patterns 310 arranged in parallel; a second mask layer 120, located above the first mask layer 110, the second mask layer 120 including a second measurement pattern 220, the second measurement pattern 220 including a plurality of second patterns 320 arranged in parallel, the second patterns 320 extending in the same direction as the first pattern 310, and in the projection of the second measurement pattern 220 on the first mask layer 110, the projections of the first pattern 310 and the second pattern 320 are alternately distributed along a direction perpendicular to the extension direction; a third mask layer 130, located above the second mask layer 120, the third mask layer 130 including a third measurement pattern 230, and the pattern formed by the projections of the first measurement pattern 210 and the second measurement pattern 220 on the third mask layer 130 coincides with the third measurement pattern 230.

[0088] In this embodiment, the mask pattern is used to form a semiconductor structure, the first pattern layer 110 is used to form a first structural layer, the second pattern layer 120 is used to form a second structural layer, the third pattern layer 130 is used to form a third structural layer, the first measurement pattern 210 is used to form a first measurement pattern structure, the second measurement pattern 220 is used to form a second measurement pattern structure, the third measurement pattern 230 is used to form a third measurement pattern structure, the first pattern 310 is used to form a first pattern structure, and the second pattern 320 is used to form a second pattern structure.

[0089] It should be noted that the first structural layer 110, the second structural layer 120 and the third structural layer 230 are stacked in the longitudinal direction, and for the sake of clarity of the diagram, the first structural layer 110 (eg Figure 12 As shown), the second version layer 120 (as shown Figure 14As shown) and the third version layer 230 (as shown Figure 17 As shown) are respectively indicated, wherein, Figure 13 for Figure 12 A partial enlarged view of the dotted box in the middle. Figure 15 for Figure 14 A partial enlarged view of the dotted box in the middle. Figure 18 yes Figure 17 A partial enlarged view of the dotted box in the middle.

[0090] In this embodiment, the semiconductor structure includes a chip device region. Specifically, in this embodiment, the first PCB layer 110 , the second PCB layer 120 and the third PCB layer 130 all include a chip device region 100 c for forming a semiconductor device.

[0091] In this embodiment, the first measurement pattern 210 , the second measurement pattern 220 , and the third measurement pattern 230 are all located near the center of the chip device region 100 c .

[0092] Specifically, Figure 19 The diagram shows a 1×1 chip in a 1×1 unit of a semiconductor structure. Figure 20 The diagram shows a 1×2 chip in a 1×1 unit of a semiconductor structure. Figure 21 It shows a 2×1 chip in a 1×1 unit of a semiconductor structure, and the first measurement pattern 210 , the second measurement pattern 220 and the third measurement pattern 230 are all located in the chip, near the center of the chip device region 100 c.

[0093] The first measurement pattern 210, the second measurement pattern 220 and the third measurement pattern 230 are all located near the center of the chip device area 100c. Figures 19 to 21 As shown in the area 100b, it is beneficial to make the alignment measurement results of the first measurement pattern 210, the second measurement pattern 220 and the third measurement pattern 230 more accurate and can better represent the alignment results of the entire structural layer.

[0094] In this embodiment, the first measurement pattern 210 , the second measurement pattern 220 , and the third measurement pattern 230 may also be located in the scribe line 100 a of the semiconductor structure.

[0095] The first structure layer, the second structure layer and the third structure layer are respectively a layer structure in the semiconductor structure, and the first structure layer, the second structure layer and the third structure layer are stacked in sequence from bottom to top along the longitudinal direction.

[0096] The first measurement pattern structure, the second measurement pattern structure and the third measurement pattern structure are all measurement structures used as photolithography alignment marks.

[0097] Specifically, in this embodiment, the first measurement pattern structure, the second measurement pattern structure, and the third measurement pattern structure are used to measure deviations of the first structure layer, the second structure layer, and the third structure layer along the calibration direction.

[0098] Combined with reference Figure 12 、 Figure 14 and Figure 17 , the deviation in the calibration direction is the offset in the X and Y directions in the mask layout.

[0099] In this embodiment, the first measurement pattern 210 includes a plurality of first patterns 310 arranged in parallel.

[0100] The plurality of first patterns 310 arranged in parallel are used to form the first measurement pattern 210 .

[0101] In this embodiment, the first graphic 310 includes a first direction (eg Figure 12 A first sub-pattern 311 extending in the direction A, and a second sub-pattern 312 extending in the direction A Figure 12 The second sub-pattern 312 extends in the direction B, wherein the first direction is perpendicular to the second direction.

[0102] The first pattern 310 includes a first sub-pattern 311 extending along the first direction and a second sub-pattern 312 extending along the second direction. In other words, the first measurement pattern 210 is composed of the first sub-pattern 311 and the second sub-pattern 312 perpendicular to each other, so that the first measurement pattern structure can simultaneously measure the X direction (such as Figure 12 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 12 The X and Y directions are aligned to obtain the offsets.

[0103] In this embodiment, the plurality of first sub-patterns 311 are in contact with the plurality of second sub-patterns 312 in a one-to-one correspondence, forming a Figure 12 The third direction forms a plurality of first fold line patterns arranged in parallel (as shown in the direction C in the middle), and the angles between the third direction and the first direction and the second direction are all 45°.

[0104] That is to say, in this embodiment, the first measurement graphic structure is composed of a first sub-graphic structure and a second sub-graphic structure that are perpendicular to each other. In order to make the first measurement graphic structure arranged evenly and more compactly, multiple first sub-graphic structures correspond to multiple second sub-graphic structures one by one, and some of the first sub-graphic structures are in contact with the ends of the second sub-graphic structures, and the remaining first sub-graphic structures are in contact with the extension lines of the second sub-graphic structures, forming multiple first broken line graphic structures arranged in parallel along the third direction, and the angles between the third direction and the first direction and the second direction are both 45°.

[0105] In this embodiment, the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°.

[0106] Specifically, in this embodiment, for the calibration direction in the X direction, the angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. For the calibration direction in the Y direction, the angle between the first direction and the calibration direction is also 45°, and the angle between the second direction and the calibration direction is also 45°.

[0107] The first measurement graphic structure is composed of a first sub-graphic structure and a second sub-graphic structure that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. The first measurement graphic structure can more accurately and uniformly obtain the deviation between the structural layers in the calibration direction.

[0108] refer to Figure 13 In this embodiment, the first graphic 310 is formed by a plurality of first graphic lines 410 extending in a horizontal direction and arranged in parallel.

[0109] That is to say, in this embodiment, the morphology of the first pattern structure is formed by a plurality of first pattern lines extending in a horizontal direction and arranged in parallel.

[0110] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of first graphic lines extending in the horizontal direction and arranged in parallel are arranged to form the required morphology of the first graphic structure. This is conducive to simplifying the formation process of the first graphic structure, and is conducive to flexible control of the morphology that the first graphic structure needs to obtain, which is conducive to improving the flexibility and applicability of the morphology of the first graphic structure.

[0111] In this embodiment, the second measurement pattern 220 includes a plurality of second patterns 320 arranged in parallel.

[0112] The plurality of first patterns 310 arranged in parallel are used to form the first measurement pattern 210 .

[0113] refer to Figure 16 , Figure 16 The first layer 110 is a schematic diagram illustrating the projection of the second measurement pattern 220 on the first layer 110, wherein: Figure 6 The dotted box in the middle illustrates the projection of the second measurement pattern 220 on the first layout layer 110. In this embodiment, the second pattern 320 and the first pattern 310 extend in the same direction. In the projection of the second measurement pattern 220 on the first layout layer 110, the projections of the first pattern 310 and the second pattern 320 are alternately distributed along a direction perpendicular to the extension direction.

[0114] In the projection of the second measurement pattern 220 on the first layout layer 110, the projections of the first pattern 310 and the second pattern 320 are alternately distributed along a direction perpendicular to the extension direction. That is, in the longitudinal direction, the pattern formed by the topography of the first graphic structure and the second graphic structure can be used to align the first structural layer through the first graphic structure and to align the second structural layer through the second graphic structure.

[0115] In this embodiment, in the projection of the second measurement pattern 220 on the first layout layer 110 , the projections of the first pattern 310 and the second pattern 320 are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

[0116] That is, in this embodiment, in the projection of the second measurement pattern structure on the first structure layer, the projections of the first pattern structure and the second pattern structure are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

[0117] The projections of the first graphic structure 310 and the second graphic structure 320 are alternately distributed at equal intervals, which is beneficial for making the arrangement of the first graphic structure 310 and the second graphic structure 320 more uniform. At the same time, it is also beneficial for making the arrangement of the third measurement graphic structure 330, which overlaps with the morphology of the first graphic structure 310 and the second graphic structure 320 in the vertical direction, more uniform. It is also beneficial for making the alignment of the third structure layer 130 with the first structure layer 110 according to the first graphic structure 310, and the alignment of the third structure layer 130 with the second structure layer 120 according to the second graphic structure 320 more accurate.

[0118] In this embodiment, the second graphic 320 includes a first direction (eg Figure 14 A third sub-pattern 321 extending in the second direction (as shown in FIG. Figure 14 The fourth sub-graph 322 extends in the direction B.

[0119] That is, in this embodiment, the second pattern structure includes a third sub-pattern structure extending along the first direction and a fourth sub-pattern structure extending along the second direction.

[0120] The second pattern structure includes a third sub-pattern structure extending along the first direction and a fourth sub-pattern structure extending along the second direction. In other words, the second measurement pattern structure is composed of the third sub-pattern structure and the fourth sub-pattern structure that are perpendicular to each other, so that the second measurement pattern structure can simultaneously measure the X direction (such as Figure 14 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 14 The X and Y directions are aligned to obtain the offsets.

[0121] In this embodiment, the third sub-pattern 321 and the first sub-pattern 311 extend in the same direction, and the fourth sub-pattern 322 and the second sub-pattern 312 extend in the same direction. Accordingly, in the projection of the second measurement pattern 220 on the first layout layer 110, the projections of the first sub-pattern 311 and the third sub-pattern 321 are alternately distributed along the second direction, and the projections of the second sub-pattern 312 and the fourth sub-pattern 322 are alternately distributed along the first direction.

[0122] In this embodiment, the second measurement pattern structure is composed of a third sub-pattern structure and a fourth sub-pattern structure that are perpendicular to each other. In order to make the second measurement pattern structure evenly arranged and more compact, multiple third sub-pattern structures correspond to multiple fourth sub-pattern structures one by one, and some of the third sub-pattern structures are in contact with the ends of the fourth sub-pattern structures, and the remaining third sub-pattern structures are in contact with the extension lines of the fourth sub-pattern structures, forming a pattern along the third direction (such as Figure 14 Multiple second fold line graphic structures are arranged in parallel (as shown in the direction C in the middle).

[0123] The second measurement graphic structure is composed of a third sub-graphic structure and a fourth sub-graphic structure that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. The second measurement graphic structure can obtain the deviation between the structural layers in the calibration direction more accurately and uniformly.

[0124] refer to Figure 15 In this embodiment, the second graphic 320 is formed by a plurality of second graphic lines 420 extending in a horizontal direction and arranged in parallel.

[0125] That is to say, in this embodiment, the morphology of the second pattern structure is formed by a plurality of second pattern lines extending in the horizontal direction and arranged in parallel.

[0126] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of second graphic lines extending in the horizontal direction and arranged in parallel are arranged to form the required morphology of the second graphic structure. This is conducive to simplifying the formation process of the second graphic structure, and is conducive to flexible control of the morphology that the second graphic structure needs to obtain, which is conducive to improving the flexibility and applicability of the morphology of the second graphic structure.

[0127] In this embodiment, the first structural layer and the second structural layer are structural layers of different layers. Moreover, the first measurement pattern structure in the first structural layer is formed according to the process technology of the first structural layer, and the second measurement pattern structure in the second structural layer is formed according to the process technology of the second structural layer. Therefore, the formation process and process parameters of the first measurement pattern structure and the second measurement structure are different, and the morphology of the first measurement pattern structure is composed of the first pattern lines, and the morphology of the second measurement pattern structure is composed of the second pattern lines. Therefore, according to the process requirements of different layers, the widths of the first pattern lines 410 and the second pattern lines 420 are different, and / or the spacing between adjacent first pattern lines 410 and the spacing between adjacent second pattern lines 420 are different.

[0128] In this embodiment, the first patterning lines 410 and the second patterning lines 420 are both horizontally extending and arranged in parallel. Therefore, the first patterning lines 410 and the second patterning lines 420 are typically formed using a self-aligned double patterning (SADP) or self-aligned quadruple patterning (SAQP) method. Depending on the process requirements of different layers, when the first structure layer and the second structure layer are formed using different formation methods, that is, when the first structure layer and the second structure layer are formed using SADP and SAQP, respectively, the patterning line arrangements of the first patterning lines 410 and the second patterning lines 420 are different. The first patterning lines 410 and the second patterning lines 420 are arranged in one of the following patterning line arrangements: two patterning lines are grouped together along the arrangement direction, and the ends of each group of patterning lines are connected; four patterning lines are grouped together along the arrangement direction, and the two outer patterning lines in each group of patterning lines are connected at their ends, and the two inner patterning lines in each group of patterning lines are connected at their ends.

[0129] In this embodiment, the third layer 230 includes a third measurement pattern 230 , and a pattern formed by projections of the first measurement pattern 210 and the second measurement pattern 220 on the third layer 130 overlaps with the third measurement pattern 230 .

[0130] That is, in this embodiment, the third structural layer includes the third measurement pattern structure, and the pattern structure formed by the projections of the first measurement pattern structure and the second measurement pattern structure on the third structural layer overlaps with the third measurement pattern structure.

[0131] In this embodiment, the first graphic 310 and the second graphic 320 are alternately distributed along the direction perpendicular to the extension direction, and the graphic formed by the first graphic 310 and the second graphic 320 coincides with the third graphic 330. Therefore, in the longitudinal direction, the third measurement graphic structure of the third structural layer can be simultaneously aligned with the second measurement graphic structure of the second structural layer and the first measurement graphic structure of the first structural layer, and more comprehensive and balanced alignment data can be obtained, so that the formation of the structure in the third structural layer can use the first structural layer and the second structural layer as alignment references at the same time, which is beneficial to making the formation position of the structure in the third structural layer more accurate, and especially for the formation of a structure that needs to refer to two structural layers, this embodiment can be more accurately and easily aligned with the two structural layers at the same time, which is beneficial to realize the solution of simultaneously referring to two structural layers.

[0132] In this embodiment, the third measurement pattern 230 includes a plurality of third patterns 330 arranged in parallel.

[0133] The plurality of third patterns 330 arranged in parallel are used to form the third measurement pattern 230 .

[0134] In this embodiment, the third graphic 330 includes a Figure 17 A fifth sub-pattern 331 extending in the second direction (as shown in FIG. Figure 17 The sixth sub-graph 332 extends in the direction B in FIG.

[0135] The fifth sub-pattern 331 is used to form a fifth sub-pattern structure, and the sixth sub-pattern 332 is used to form a sixth sub-pattern structure.

[0136] The third pattern 330 includes a fifth sub-pattern 331 extending along the first direction and a sixth sub-pattern 332 extending along the second direction. In other words, the third measurement pattern 230 is composed of the fifth sub-pattern 331 and the sixth sub-pattern 332 perpendicular to each other, so that the third measurement pattern 230 can simultaneously measure the X direction (such as Figure 17 X direction (as shown in the figure) and Y direction (as shown in the figure) Figure 17 The X and Y directions are aligned to obtain the offsets.

[0137] In this embodiment, the fifth sub-pattern 331 and the first sub-pattern 311 extend in the same direction, and the sixth sub-pattern 332 and the second sub-pattern 312 extend in the same direction.

[0138] Specifically, in this embodiment, the third structure layer is aligned with the first structure layer by aligning the third measurement structure with the first measurement structure, and the third structure layer is aligned with the second structure layer by aligning the third measurement structure with the second measurement structure.

[0139] In this embodiment, the plurality of fifth sub-patterns 331 and the sixth sub-patterns 332 correspond to each other one by one, and the ends of some of the fifth sub-patterns 331 and the sixth sub-patterns 332 are in contact with each other, and the extension lines of the remaining fifth sub-patterns 331 and the sixth sub-patterns 332 are in contact with each other, forming a plurality of fifth sub-patterns 331 and the sixth sub-patterns 332 along the third direction (such as Figure 17 Multiple third broken line graphics arranged in parallel (as shown in the direction C in the middle).

[0140] That is to say, in this embodiment, the third measurement graphic structure is composed of a fifth sub-graphic structure and a sixth sub-graphic structure that are perpendicular to each other. In order to make the third measurement graphic structure arranged evenly and more compactly, multiple fifth sub-graphic structures and sixth sub-graphic structures correspond to each other one by one, and some of the fifth sub-graphic structures and the sixth sub-graphic structures are in contact with the ends, and the remaining parts of the fifth sub-graphic structures and the extension lines of the sixth sub-graphic structures are in contact, forming multiple third broken line graphic structures arranged in parallel along the third direction.

[0141] The third measurement graphic structure is composed of a fifth sub-graphic structure and a sixth sub-graphic structure that are perpendicular to each other. The angle between the first direction and the calibration direction is 45°, and the angle between the second direction and the calibration direction is 45°. The third measurement graphic structure can obtain the deviation between the structural layers in the calibration direction more accurately and uniformly.

[0142] refer to Figure 18 In this embodiment, the third graphic 330 is formed by a plurality of third graphic lines 430 extending in a horizontal direction and arranged in parallel.

[0143] That is to say, in this embodiment, the morphology of the third pattern structure is formed by a plurality of third pattern lines extending in a horizontal direction and arranged in parallel.

[0144] In the process of semiconductor structure manufacturing, it is relatively easy to obtain a graphic structure extending in the horizontal direction. A plurality of third graphic lines extending in the horizontal direction and arranged in parallel are used to form the required morphology of the third graphic structure. This is conducive to simplifying the formation process of the third graphic structure, and is conducive to flexible control of the morphology to be obtained by the third graphic structure, which is conducive to improving the flexibility and applicability of the morphology of the third graphic structure, and accordingly can make the third graphic structure better overlap with the combination of the first graphic structure and the second graphic structure.

[0145] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that: include: A first structural layer includes a first measurement pattern structure, wherein the first measurement pattern structure includes a plurality of first pattern structures arranged in parallel; A second structural layer is located on the first structural layer, the second structural layer includes a second measurement pattern structure, the second measurement pattern structure includes a plurality of second pattern structures arranged in parallel, the second pattern structure and the first pattern structure extend in the same direction, and in the projection of the second measurement pattern structure on the first structural layer, the projections of the first pattern structure and the second pattern structure are alternately distributed along a direction perpendicular to the extension direction; The third structural layer is located on the second structural layer, and the third structural layer includes a third measurement graphic structure. The graphic structure formed by the projection of the first measurement graphic structure and the second measurement graphic structure on the third structural layer coincides with the third measurement graphic structure.

2. The semiconductor structure according to claim 1, wherein: The first graphic structure includes a first sub-graphic structure extending along a first direction, and a second sub-graphic structure extending along a second direction, wherein the first direction is perpendicular to the second direction; The second graphic structure includes a third sub-graphic structure extending along the first direction and a fourth sub-graphic structure extending along the second direction. In the projection of the second measurement graphic structure on the first structural layer, along the second direction, the projections of the first sub-graphic structure and the third sub-graphic structure are alternately distributed, and along the first direction, the projections of the second sub-graphic structure and the fourth sub-graphic structure are alternately distributed.

3. The semiconductor structure according to claim 2, wherein: A plurality of the first sub-graphic structures correspond to a plurality of the second sub-graphic structures one by one, and some of the first sub-graphic structures are in contact with the ends of the second sub-graphic structures, and the remaining first sub-graphic structures are in contact with the extension lines of the second sub-graphic structures, forming a plurality of first folded line-shaped graphic structures arranged in parallel along a third direction, and the angles between the third direction and the first direction and the second direction are both 45°; The plurality of third sub-graphic structures correspond one-to-one to the plurality of fourth sub-graphic structures, and some of the third sub-graphic structures are in contact with the ends of the fourth sub-graphic structures, while the remaining third sub-graphic structures are in contact with the extension lines of the fourth sub-graphic structures, forming a plurality of second folded line graphic structures arranged in parallel along the third direction.

4. The semiconductor structure according to claim 2 or 3, characterized in that: The first measurement pattern structure, the second measurement pattern structure and the third measurement pattern structure are used to measure deviations of the first structure layer, the second structure layer and the third structure layer along a calibration direction; The included angle between the first direction and the calibration direction is 45°, and the included angle between the second direction and the calibration direction is 45°.

5. The semiconductor structure according to claim 1, wherein: In the projection of the second measurement pattern structure on the first structure layer, along a direction perpendicular to the extension direction, projections of the first pattern structure and the second pattern structure are alternately distributed with equal intervals.

6. The semiconductor structure according to claim 1, wherein: The morphology of the first graphic structure is formed by a plurality of first graphic lines extending in a horizontal direction and arranged in parallel; The second graphic structure is formed by a plurality of second graphic lines extending in a horizontal direction and arranged in parallel.

7. The semiconductor structure according to claim 6, wherein: The first pattern lines and the second pattern lines have different widths, and / or the spacing between adjacent first pattern lines and the spacing between adjacent second pattern lines are different.

8. The semiconductor structure according to claim 6, wherein: The first graphic line and the second graphic line have different graphic line arrangements, and the first graphic line and the second graphic line are respectively one of the following graphic line arrangements: along the arrangement direction, every two of the graphic lines are in a group, and the ends of each group of graphic lines are connected; along the arrangement direction, every four of the graphic lines are in a group, and in each group of graphic lines, the two outer ends of the graphic lines are connected, and the two inner ends of the graphic lines are connected.

9. The semiconductor structure according to claim 1, wherein: The first structure layer, the second structure layer and the third structure layer all include a chip device area, and the first measurement pattern structure, the second measurement pattern structure and the third measurement pattern structure are all located near the center of the chip device area.

10. A mask layout, characterized in that: include: A first layer includes a first measurement pattern, wherein the first measurement pattern includes a plurality of first patterns arranged in parallel; A second layout layer is located above the first layout layer, the second layout layer includes a second measurement pattern, the second measurement pattern includes a plurality of second patterns arranged in parallel, the second pattern and the first pattern have the same extension direction, and in the projection of the first layout layer, the projections of the first pattern and the second pattern are alternately distributed along a direction perpendicular to the extension direction. The third layer is located above the second layer, and the third layer includes a third measurement pattern. A pattern formed by projections of the first measurement pattern and the second measurement pattern on the third layer overlaps with the third measurement pattern.

11. The mask layout according to claim 10, characterized in that: The first pattern includes a first sub-pattern extending along a first direction, and a second sub-pattern extending along a second direction, wherein the first direction is perpendicular to the second direction; The second graphic includes a third sub-graphic extending along the first direction and a fourth sub-graphic extending along the second direction. In the projection of the second measurement graphic on the first plate layer, along the second direction, the projections of the first sub-graphic and the third sub-graphic are alternately distributed, and along the first direction, the projections of the second sub-graphic and the fourth sub-graphic are alternately distributed.

12. The mask layout according to claim 11, characterized in that: A plurality of the first sub-graphs are in one-to-one correspondence with a plurality of the second sub-graphs to form a plurality of first folded line-shaped graphs arranged in parallel along a third direction, and the angles between the third direction and the first direction and the second direction are both 45°; The plurality of third sub-graphs are in contact with the plurality of fourth sub-graphs in a one-to-one correspondence, forming a plurality of second fold line-shaped graphs arranged in parallel along the third direction.

13. The mask layout according to claim 11 or 12, characterized in that: The first measurement pattern, the second measurement pattern and the third measurement pattern are used to measure the deviation of the first plate layer, the second plate layer and the third plate layer along the calibration direction; The included angle between the first direction and the calibration direction is 45°, and the included angle between the second direction and the calibration direction is 45°.

14. The mask layout according to claim 10, characterized in that: In the projection of the second measurement pattern on the first layout layer, the projections of the first pattern and the second pattern are alternately distributed at equal intervals along a direction perpendicular to the extension direction.

15. The mask layout according to claim 10, characterized in that: The morphology of the first graphic is formed by a plurality of first graphic lines extending in a horizontal direction and arranged in parallel; The second graphic shape is formed by a plurality of second graphic lines extending in a horizontal direction and arranged in parallel.

16. The mask layout according to claim 15, characterized in that: The first pattern lines and the second pattern lines have different widths, and / or the spacing between adjacent first pattern lines and the spacing between adjacent second pattern lines are different.

17. The mask layout according to claim 15, characterized in that: The first graphic line and the second graphic line have different graphic line arrangements, and the first graphic line and the second graphic line are respectively one of the following graphic line arrangements: along the arrangement direction, every two of the graphic lines are in a group, and the ends of each group of graphic lines are connected; along the arrangement direction, every four of the graphic lines are in a group, and in each group of graphic lines, the two outer ends of the graphic lines are connected, and the two inner ends of the graphic lines are connected.

18. The mask layout according to claim 10, characterized in that: The first layer, the second layer and the third layer all include a chip device area, and the first measurement pattern, the second measurement pattern and the third measurement pattern are all located near the center of the chip device area.