Chip communication mode configuration system and method

Abstract

This invention provides a communication mode configuration system and method for a chip, including a detection module, a state machine module, a mode register, and a mode control module. The mode register stores the communication modes configured for the FLASH memory. The detection module detects the chip's state and sends it to the state machine module. The state machine module stores the chip's state and sends it to the mode control module. The mode control module sets the chip's communication mode based on the chip's state and / or the FLASH communication mode stored in the mode register. The method described in this application enables accurate and flexible setting of the chip's communication mode, ensuring successful startup and normal communication between the chip and FLASH memory in various modes, reducing the need for FLASH reset pin design, and lowering board-level design complexity.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to a chip communication mode configuration system and method. Background Technology

[0002] FLASH is a type of flash memory that connects to a System-on-a-Chip (SoC) via a Serial Peripheral Interface (SPI) or Quad SPI (QSPI) interface. Communication between the FLASH and the SoC follows a standard interface protocol. FLASH operates in various modes, such as 1-bit, 2-bit, and 4-bit communication modes. The SoC is also designed to operate in consistent modes, and the modes of the FLASH and SoC must match for proper startup and communication.

[0003] In related technologies, after a power outage or when in a software reset state, the SoC chip and FLASH may be in different modes. For example, the SoC chip is in 1-bit communication mode while the FLASH is in 4-bit communication mode. Due to the mode mismatch, the chip may not be able to start up and communicate normally. Summary of the Invention

[0004] This invention provides a chip communication mode configuration system and method to achieve accurate and flexible setting of chip communication modes, ensuring successful startup and normal communication between the chip and FLASH in various modes, reducing the design of FLASH reset pins, and lowering board-level design complexity.

[0005] This invention provides a chip communication mode configuration system, comprising:

[0006] The system comprises a detection module, a state machine module, a mode register, and a mode control module; among which,

[0007] The mode register is used to store the communication mode configured by the FLASH.

[0008] The detection module is used to detect the state of the chip and send the state of the chip to the state machine module;

[0009] The state machine module is used to store the state of the chip and send it to the mode control module;

[0010] The mode control module is used to set the communication mode of the chip according to the chip's state and / or the FALSH communication mode stored in the mode register.

[0011] According to a chip communication mode configuration system provided by the present invention, the state of the chip includes at least one of the following:

[0012] Power-on reset state, software reset state, and working state.

[0013] According to a chip communication mode configuration system provided by the present invention, when the chip is in a power-on reset state, the mode control module is used to set the communication mode of the chip to a preset first communication mode.

[0014] According to a chip communication mode configuration system provided by the present invention, the mode control module is used to set the communication mode of the chip to a preset first communication mode, including:

[0015] The mode control module is used to set the communication mode of the chip to 3-byte mode and 1-bit mode.

[0016] According to a chip communication mode configuration system provided by the present invention, when the chip is in a software reset state or a working state, the mode control module is used to obtain the communication mode configured by the FLASH from the mode register and set the communication mode of the chip to be consistent with the communication mode of the FLASH.

[0017] The present invention also provides a chip, including a communication mode configuration system for the chip as described in the first aspect.

[0018] The present invention also provides a method for configuring the communication mode of a chip, comprising:

[0019] The communication mode of the chip is set according to the chip's state and / or the FALSH communication mode stored in the mode register.

[0020] The present invention also provides a communication mode configuration device for a chip, comprising:

[0021] The setting module is used to set the communication mode of the chip according to the chip's state and / or the FALSH communication mode stored in the mode register.

[0022] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the communication mode configuration method of the chip described above.

[0023] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the communication mode configuration method of the chip as described above.

[0024] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the communication mode configuration method of the chip as described above.

[0025] The chip communication mode configuration system and method provided by this invention detects the chip's state and sets the chip's communication mode according to the chip's state and / or the FLASH communication mode stored in the mode register. This achieves accurate and flexible setting of the chip's communication mode, ensuring successful startup and normal communication between the chip and FLASH in various modes, reducing the design of FLASH reset pins, and lowering the complexity of board-level design. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of a chip communication mode configuration system in the prior art provided by the present invention.

[0028] Figure 2 This is a schematic diagram of the communication mode configuration system of the chip provided by the present invention.

[0029] Figure 3 This is one of the flowcharts illustrating the communication mode configuration provided by the present invention.

[0030] Figure 4 This is the second flowchart illustrating the communication mode configuration provided by the present invention.

[0031] Figure 5 This is the third flowchart illustrating the communication mode configuration provided by the present invention.

[0032] Figure 6 This is a schematic diagram of the communication mode configuration device for the chip provided by the present invention.

[0033] Figure 7 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0034] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0035] The following is combined Figures 1-7 The present invention describes a communication mode configuration system and method for the chip.

[0036] To facilitate a clearer understanding of the technical solutions of the various embodiments of this application, some technical content related to the various embodiments of this application will be introduced first.

[0037] The most common boot method for current SoC chips is FLASH boot. The chip's boot program is burned into the FLASH memory. After power-on, the processor module in the chip reads the boot program from the FLASH memory and executes it.

[0038] Flash memory is a type of flash storage that connects to the SoC chip via an SPI / QSPI interface. Communication between the flash memory and the SoC chip follows a standard interface protocol. Flash memory is generally manufactured by different manufacturers, and different manufacturers produce different models, mainly differing in capacity, speed, and voltage. However, because they use a standard protocol for communication, the SoC chip is designed to be compatible with multiple flash memory types from the outset. Once the SoC chip's software driver is adapted, it can use various flash memory types.

[0039] FLASH has various modes, such as 1-bit, 2-bit, and 4-bit communication modes. When designing a SoC chip, it is also necessary to design consistent modes. Furthermore, the modes of FLASH and SoC chips must match for normal startup and communication.

[0040] After a power outage, the FLASH will be in the default mode. When power is restored, both the SoC chip and the FLASH will be in the default mode. However, when a software reset occurs, the SoC chip resets to the default mode. Since no power outage has occurred, the FLASH will be in the previously configured mode. At this time, the SoC chip and the FLASH may be in different modes. For example, the SoC chip may be in 1-bit communication mode while the FLASH may be in 4-bit communication mode. This mode mismatch will cause the FLASH data to be read incorrectly after the software reset, resulting in a startup failure.

[0041] like Figure 1As shown, existing technologies typically address this issue by adding a reset signal line to the FLASH chip. The SoC chip provides a dedicated reset RST pin connected to the FLASH, resetting the FLASH in software reset mode to achieve mode matching. However, this approach adds extra pins to the chip design, further impacting board-level design. Furthermore, not all FLASH chips have a reset pin, rendering this technology unsuitable when using such FLASH chips.

[0042] Figure 2 This is a schematic diagram of the communication mode configuration system of the chip provided by the present invention, as shown below. Figure 2 As shown, it includes the following:

[0043] The system comprises a detection module, a state machine module, a mode register, and a mode control module; among which,

[0044] The mode register is used to store the communication mode configured by the FLASH memory;

[0045] The detection module is used to detect the chip's state and send the chip's state to the state machine module;

[0046] The state machine module is used to store the chip's state and send it to the mode control module;

[0047] The mode control module is used to set the communication mode of the chip according to the chip's status and / or the communication mode of FALSH stored in the mode register.

[0048] Specifically, the detection module is used to detect the status of the SoC chip, that is, to determine whether the chip is in a power-on reset state, a software reset state, or a working state. Optionally, when the chip is in a power-on reset state or a software reset state, the chip needs to be configured with the same communication mode as the FLASH memory during startup to accurately read the boot program from the FLASH. When the chip is in a normal working state, the chip needs to be configured with the same communication mode as the FLASH memory to enable normal communication and read / write operations between the chip and the FLASH.

[0049] The state machine module receives the detection results from the detection module and sends them to the mode control module to execute logic control. Different state control logic will be executed in different chip states to ensure that the communication mode of the chip and the communication mode of FLASH are consistent.

[0050] The mode register is used to store the communication mode configured for the FLASH memory. That is, after the user configures the communication mode of the FLASH memory, the user writes the communication mode into the mode register, allowing the chip to obtain the FLASH communication mode from the mode register and configure the chip's communication mode based on the obtained FLASH communication mode. Optionally, the mode register in this embodiment includes: a 3 / 4-byte mode register: used to store the 3-byte or 4-byte address mode configuration value of the FLASH memory; and a 1 / 2 / 4-bit mode register: used to store the 1-bit, 2-bit, or 4-bit I / O mode configuration value of the FLASH memory.

[0051] The mode control module is used to set the chip's communication mode according to the chip's state and / or the FLASH communication mode stored in the mode register. Optionally, the mode control module can set the chip to the default communication mode based on the chip's state; or it can combine the chip's state and the FLASH communication mode stored in the mode register to determine the required communication mode for the chip, achieving accurate and flexible setting of the chip's communication mode, enabling the chip to start normally and communicate with FLASH. Optionally, the mode control module in this embodiment includes: a 3 / 4Byte mode control module: used to receive logic control from the state machine module and select a 3Byte or 4Byte address mode according to the logic control; and a 1 / 2 / 4bit mode control module: used to receive logic control from the state machine module and select a 1bit, 2bit, or 4bit IO mode according to the logic control.

[0052] Optionally, the communication mode configuration system in this embodiment may further include: an interface module for the SoC chip to send and receive clock signals, commands, data, etc. from the FLASH memory; a PAD for connecting the signal pins between the chip and the FLASH memory; and clk, cs, and data: the clock, chip select, and data signal lines of the FLASH memory, which are standard design parameters. Optionally, this technical solution is not limited to the proposed FLASH device; the related technical concepts can also be applied to SoC chip boot devices or media such as SD, eMMC, and Ethernet.

[0053] It should be noted that the chip communication mode configuration system in this embodiment, based on a detection module, a state machine module, a mode register, and a mode control module, achieves accurate configuration of the chip's communication mode. Compared with existing technologies, it reduces the design of FLASH reset pins, lowers board-level design complexity, and supports multiple types of FLASH boot, ensuring successful boot in various modes and preventing system crashes. In other words, by designing detection modules, state machines, and mode control modules within the SoC chip, this application eliminates the need to modify the connection between the SoC chip and the FLASH device or the board-level design. This enables accurate configuration of the chip's communication mode in various chip boot scenarios such as power-on and reset, allowing for correct reading and execution of the boot program from the FLASH device. This simplifies chip and board design complexity, ensures compatibility with multiple types of FLASH devices, and guarantees successful boot and communication of the SoC chip.

[0054] The communication mode configuration system of the above embodiment detects the chip's status and sets the chip's communication mode according to the chip's status and / or the FLASH communication mode stored in the mode register. This achieves accurate and flexible setting of the chip's communication mode, ensuring successful startup and normal communication between the chip and FLASH in various modes, reducing the design of FLASH reset pins, and lowering the complexity of board-level design.

[0055] In one embodiment, the state of the chip includes at least one of the following:

[0056] Power-on reset state, software reset state, and working state.

[0057] Specifically, in this embodiment, the detection module can accurately detect the state of the chip, that is, it can accurately detect whether the chip is in a power-on reset state, a software reset state, or a working state, and adopt different communication mode configuration methods for the chip in different states. This realizes accurate and flexible setting of the chip communication mode in different states, ensuring successful startup and normal communication between the chip and FLASH in various modes.

[0058] In one embodiment, when the chip is in a power-on reset state, the mode control module is used to set the chip's communication mode to a preset first communication mode.

[0059] Specifically, in the power-on reset state, FALSH is initialized and set to the first communication mode. Therefore, the mode control module can directly set the chip's communication mode to the preset first communication mode without needing to retrieve the FALSH communication mode from the register. This allows for faster configuration of the chip's communication mode and improves the configuration efficiency of the chip's communication mode in the power-on reset state.

[0060] For example, such as Figure 3 As shown, the detection module first detects the chip's state. If it is a power-on reset scenario, the detection module outputs the power-on reset mode. After receiving this mode, the state machine module sets the current state to the power-on reset state.

[0061] In the power-on reset state, the state machine module controls the 3 / 4Byte mode control module to complete the initialization. At this time, the 3 / 4Byte mode register is set to the 3Byte mode value, and the FLASH device is set to the 3Byte mode value by default in this state. The two mode values ​​are consistent, that is, the 3Byte mode will be used for correct communication between the SoC chip and the FLASH device.

[0062] In the power-on reset state, the state machine module controls the 1 / 2 / 4bit mode control module to complete the initialization. At this time, the 1 / 2 / 4bit mode register is set to the 1bit mode value. The FLASH device is set to the 1bit mode value by default in this state. The two mode values ​​are consistent, that is, the 1bit mode will be used for correct communication between the SoC chip and the FLASH device.

[0063] In the communication mode configuration system of the above embodiment, when the chip is in power-on reset state, the mode control module can directly set the chip's communication mode to the preset first communication mode, without needing to obtain the FALSH communication mode from the register. This allows for faster configuration of the chip's communication mode and improves the configuration efficiency of the chip's communication mode in power-on reset state.

[0064] The mode control module is used to set the chip's communication mode to a preset first communication mode, including:

[0065] The mode control module is used to set the chip's communication mode to 3-byte mode and 1-bit mode.

[0066] Specifically, in this embodiment, based on the actual application scenario, the 3-byte mode and the 1-bit mode can be used as the first communication mode of the chip in the power-on reset state, so that the communication mode of the chip and the communication mode of FLASH are consistent, thereby enabling the boot program to be read accurately from FLASH.

[0067] In the communication mode configuration system of the above embodiment, when the chip is powered on and reset, the mode control module can directly set the chip's communication mode to 3-byte mode and 1-bit mode, so that the chip's communication mode is consistent with the FLASH communication mode, thereby accurately reading the boot program from the FLASH.

[0068] In one implementation, when the chip is in a software reset state or an operating state, the mode control module is used to obtain the communication mode configured by the FLASH from the mode register and set the chip's communication mode to be consistent with the FLASH's communication mode.

[0069] Specifically, when the chip is in a software reset state or an operating state, the FLASH communication mode is not initialized. However, users may change the FLASH communication mode according to their needs. Therefore, to ensure that the chip's communication mode is consistent with the FLASH communication mode, the mode control module needs to obtain the FLASH's configured communication mode from the mode register and set the chip's communication mode to be consistent with the FLASH's communication mode. Optionally, when the chip is in a software reset state or an operating state, the mode control module can periodically obtain the FLASH's configured communication mode from the mode register, or it can obtain the FLASH communication mode only when the chip needs to communicate with the FLASH. This embodiment does not impose specific limitations.

[0070] For example, such as Figure 4 As shown, the detection module first detects the chip's state. If it is a software reset scenario, the detection module outputs the software reset mode. After receiving the mode, the state machine module sets the current state to the software reset state.

[0071] In software reset mode, the state machine module controls the 3 / 4Byte mode control module to maintain its state. The value of the 3 / 4Byte mode register will retain the previously configured value. If the FLASH device was previously set to a 3Byte mode value, the 3 / 4Byte mode register will retain the 3Byte mode value, and both values ​​will be consistent, meaning that 3Byte mode will be used for correct communication between the SoC chip and the FLASH device. If the FLASH device was previously set to a 4Byte mode value, the 3 / 4Byte mode register will retain the 4Byte mode value, and both values ​​will be consistent, meaning that 4Byte mode will be used for correct communication between the SoC chip and the FLASH device.

[0072] In software reset mode, the state machine module controls the 1 / 2 / 4-bit mode control module to maintain the state. At this time, the 1 / 2 / 4-bit mode registers will retain the previously configured values. If the FLASH device was previously set to a 1-bit mode value, the 1 / 2 / 4-bit mode registers will retain a 1-bit mode value, and both values ​​will be consistent, meaning that 1-bit mode will be used for correct communication between the SoC chip and the FLASH device. If the FLASH device was previously set to a 2-bit mode value, the 1 / 2 / 4-bit mode registers will retain a 2-bit mode value, and both values ​​will be consistent, meaning that 2-bit mode will be used for correct communication between the SoC chip and the FLASH device. If the FLASH device was previously set to a 4-bit mode value, the 1 / 2 / 4-bit mode registers will retain a 4-bit mode value, and both values ​​will be consistent, meaning that 4-bit mode will be used for correct communication between the SoC chip and the FLASH device.

[0073] For example, such as Figure 5 As shown, the detection module first detects the chip's state. If it is in a working state, the detection module outputs the working state mode. After receiving the mode, the state machine module sets the current state to the working state.

[0074] In the configuration state, the state machine module controls the 3 / 4Byte mode control module to perform state configuration. At this time, the value of the 3 / 4Byte mode register will be set to a 3Byte or 4Byte mode value according to the user's configuration value, and the FLASH device will be set to a 3Byte or 4Byte mode value according to the user's configuration value. The two mode values ​​are consistent, that is, at this time, the 3Byte or 4Byte mode will be used for correct communication between the SoC chip and the FLASH device.

[0075] In the configuration state, the state machine module controls the 1 / 2 / 4bit mode control module to perform state configuration. At this time, the value of the 1 / 2 / 4bit mode register will be set to a 1-bit, 2-bit, or 4-bit mode value according to the user's configuration value, and the FLASH device will be set to a 1-bit, 2-bit, or 4-bit mode value according to the user's configuration value. The two mode values ​​are consistent, that is, at this time, the 1-bit, 2-bit, or 4-bit mode will be used for correct communication between the SoC chip and the FLASH device.

[0076] In other words, this application, without introducing additional chip pins and supporting multiple types of FLASH, can adapt to various SoC chip boot scenarios such as power-on reset, software reset, and non-reset. It enables the SoC chip to successfully boot and communicate from FLASH in various scenarios, avoiding boot failure problems caused by inconsistent FLASH modes and simplifying the design complexity of chip and hardware board systems.

[0077] In the communication mode configuration system of the above embodiment, when the chip is in a software reset state or a working state, the mode control module is used to obtain the communication mode configured by the FLASH from the mode register and set the communication mode of the chip to be consistent with the communication mode of the FLASH. This achieves accurate setting of the chip communication mode, ensures successful startup and normal communication between the chip and the FLASH in various modes, effectively reduces the design of the FLASH reset pin, and reduces the complexity of board-level design.

[0078] For example, this application embodiment also provides a communication mode configuration method for a chip, applied to a mode control module in a communication mode configuration system, including:

[0079] Set the chip's communication mode according to the chip's status and / or the FALSH communication mode stored in the mode register.

[0080] Specifically, when the chip is in power-on reset or software reset state, it needs to be configured with the same communication mode as the FLASH memory during startup to accurately read the boot program from the FLASH. When the chip is in normal operating state, it also needs to be configured with the same communication mode as the FLASH memory to enable normal communication and read / write operations between the chip and the FLASH.

[0081] After detecting and determining the status of the SoC chip, the mode control module can set the chip's communication mode based on the chip's status and / or the FLASH communication mode stored in the mode register. Optionally, the mode control module can set the chip to the default communication mode based on its status; alternatively, it can combine the chip's status and the FLASH communication mode stored in the mode register to determine the required communication mode for the chip. This achieves accurate and flexible setting of the chip's communication mode, enabling the chip to boot normally and communicate with the FLASH.

[0082] In this embodiment, the communication mode of the chip is accurately configured through the mode control module. Compared with the prior art, the design of the FLASH reset pin is reduced, the board-level design complexity is reduced, and multiple types of FLASH boot are supported, ensuring successful boot in various modes and avoiding system crashes.

[0083] The communication mode configuration method of the above embodiments sets the communication mode of the chip according to the chip's status and / or the communication mode of FLASH stored in the mode register. This achieves accurate and flexible setting of the chip's communication mode, ensuring successful startup and normal communication between the chip and FLASH in various modes. It effectively reduces the design of FLASH reset pins and lowers the complexity of board-level design.

[0084] In one embodiment, such as Figure 6 As shown in the embodiments of this application, a communication mode configuration device for a chip is also provided, including:

[0085] The setting module 610 is used to set the communication mode of the chip according to the chip's status and / or the FALSH communication mode stored in the mode register.

[0086] Optionally, the setting module 610 is specifically used to set the communication mode of the chip to a preset first communication mode when the chip is in a power-on reset state.

[0087] Optionally, the setting module 610 is specifically used to set the communication mode of the chip to 3-byte mode and 1-bit mode when the chip is in the power-on reset state.

[0088] Optionally, the setting module 610 is specifically used to obtain the communication mode configured by the FLASH from the mode register when the chip is in a software reset state or a working state, and set the communication mode of the chip to be consistent with the communication mode of the FLASH.

[0089] Figure 7 A schematic diagram of the physical structure of an electronic device is provided. This electronic device may include a processor 710, a communications interface 720, a memory 730, and a communication bus 740. The processor 710, communications interface 720, and memory 730 communicate with each other via the communication bus 740. The processor 710 can call logical instructions stored in the memory 730 to execute a chip communication mode configuration method. This method includes setting the chip's communication mode according to the chip's status and / or the FALSH communication mode stored in the mode register.

[0090] Furthermore, the logical instructions in the aforementioned memory 730 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0091] On the other hand, the present invention also provides a computer program product, the computer program product including a computer program, the computer program being stored on a non-transitory computer-readable storage medium, the computer program being executed by a processor, the computer being able to execute the chip communication mode configuration method provided by the above methods, the method including: setting the chip communication mode according to the chip's state and / or the FALSH communication mode stored in the mode register.

[0092] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a communication mode configuration method for a chip provided by the above methods, the method comprising: setting the communication mode of the chip according to the chip's state and / or the FALSH communication mode stored in the mode register.

[0093] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0094] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication mode configuration system for a chip, characterized in that, include: The system comprises a detection module, a state machine module, a mode register, and a mode control module; among which, The mode register is used to store the communication mode configured by the FLASH. The detection module is used to detect the state of the chip and send the state of the chip to the state machine module; The state machine module is used to store the state of the chip and send it to the mode control module; The mode control module is used to set the communication mode of the chip according to the chip's state and / or the FALSH communication mode stored in the mode register. The state of the chip includes at least one of the following: Power-on reset state, software reset state, and working state; When the chip is in a software reset state or a working state, the mode control module is used to obtain the communication mode configured by the FLASH from the mode register and set the communication mode of the chip to be consistent with the communication mode of the FLASH. When the chip is in a power-on reset state, the mode control module is used to set the chip's communication mode to a preset first communication mode.

2. The chip communication mode configuration system according to claim 1, characterized in that, The mode control module is used to set the communication mode of the chip to a preset first communication mode, including: The mode control module is used to set the communication mode of the chip to 3-byte mode and 1-bit mode.

3. A chip, characterized in that, The communication mode configuration system includes the chip as described in claim 1 or 2.

4. A method for configuring the communication mode of a chip, characterized in that, A mode control module applied in a communication mode configuration system for the chip as described in claim 1 or 2, comprising: Based on the chip's state and / or the FLASH communication mode stored in the mode register, the chip's communication mode is set; when the chip's state is in a software reset state or a working state, the communication mode configured by the FLASH is obtained, and the chip's communication mode is set to be consistent with the FLASH communication mode.

5. A communication mode configuration device for a chip, characterized in that, include: The setting module is used to set the communication mode of the chip according to the chip's state and / or the communication mode of FLASH stored in the mode register; the chip's state includes at least one of the following: power-on reset state, software reset state, and working state; when the chip's state is software reset state or working state, the module obtains the communication mode configured by FLASH and sets the chip's communication mode to be consistent with the FLASH's communication mode; when the chip's state is software reset state or working state, the module obtains the communication mode configured by FLASH from the mode register and sets the chip's communication mode to be consistent with the FLASH's communication mode; when the chip's state is power-on reset state, the module sets the chip's communication mode to a preset first communication mode, which is a 3-byte mode and a 1-bit mode.

6. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the communication mode configuration method of the chip as described in claim 4.

7. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the communication mode configuration method of the chip as described in claim 4.

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