Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel is provided with a display surface and a non-display surface arranged oppositely. The display panel comprises a first data signal line, a first control signal line, a first power signal line, a second power signal line and a binding part arranged in the same layer on the non-display surface. The first data signal line, the first control signal line, the first power signal line, the second power signal line and the binding part do not overlap in the orthographic projection on the non-display surface. The first data signal line and the first control signal line are located on the first side of the binding part, and the first power signal line and the second power signal line are located on the second side of the binding part. The first side and the second side are distributed on the opposite sides of the binding part. One side of the first data signal line, the first control signal line, the first power signal line and the second power signal line is electrically connected with the binding part. Through the above design, the short circuit problem between the multiple layers of metal can be avoided, and the line defect of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] In the existing technology, Micro-LED (micro light-emitting diode) uses a double-sided process to achieve a narrow bezel. However, considering issues such as layout design, circuit density, heat dissipation performance, and manufacturing difficulty, a multi-layer metal process is usually chosen on the back of the display panel to address these issues. However, the multi-layer metal process also has certain problems.

[0003] Due to the double-sided process, the back side is easily damaged by foreign objects, causing short circuits between the multiple metal layers, which in turn leads to line defects in the display panel. Summary of the Invention

[0004] This application provides a display panel and display device that can improve the short circuit problem on the non-display surface of the display panel, thereby improving the poor quality of the display panel lines.

[0005] A first aspect of this application provides a display panel having a display surface and a non-display surface disposed opposite to each other. The display panel includes: a first data signal line, a first control signal line, a first power signal line, a second power signal line, and a bonding portion disposed on the same layer as the non-display surface; wherein the first data signal line, the first control signal line, the first power signal line, the second power signal line, and the bonding portion do not overlap in their orthographic projections on the non-display surface; the first data signal line and the first control signal line are located on a first side of the bonding portion, and the first power signal line and the second power signal line are located on a second side of the bonding portion, the first side and the second side being distributed on opposite sides of the bonding portion; one side of each of the first data signal line, the first control signal line, the first power signal line, and the second power signal line is electrically connected to the bonding portion.

[0006] The other side of the first data signal line, the first control signal line, the first power signal line, and the second power signal line are respectively electrically connected to the data signal line, the control signal line, the first power input signal line, and the second power input signal line of the display surface via side traces.

[0007] Furthermore, the display panel further includes: a flip-chip film bonded to the bonding portion, comprising at least one first power signal test block, at least one second power signal test block, and at least one data signal test block, wherein the projected area of ​​the data signal test block on the non-display surface is smaller than the projected area of ​​the first power signal test block on the non-display surface, and the projected area of ​​the data signal test block on the non-display surface is smaller than the projected area of ​​the second power signal test block on the non-display surface.

[0008] Preferably, the bonding portion includes a first power signal test pad, a second power signal test pad, and a data signal test pad respectively disposed corresponding to the first power signal test block, the second power signal test block, and the data signal test block. The orthographic projections of the first power signal test pad, the second power signal test pad, and the data signal test pad on the non-display surface at least partially overlap with the orthographic projections of the first power signal test block, the second power signal test block, and the data signal test block on the non-display surface.

[0009] Preferably, the first power signal test block is symmetrically arranged with respect to the data signal test block, and the second power signal test block is also symmetrically arranged with respect to the data signal test block.

[0010] Preferably, the first power signal test block is located between the data signal test block and the second power signal test block.

[0011] The first control signal line extends through the binding part toward the second side to form a first control signal line extension. Multiple control signal test blocks electrically connected to the first control signal line extension are provided in the extension direction of the first control signal line extension.

[0012] Preferably, the plurality of control signal test blocks are located on both sides of the extension of the first control signal line.

[0013] Preferably, the plurality of control signal test blocks are symmetrically arranged about the extension of the first control signal line.

[0014] The display panel has a first direction and a second direction that are perpendicular to each other. Multiple line test blocks are distributed on both sides of the second direction of the display panel. The line test blocks include data signal line test blocks and control signal line test blocks. The data signal line test blocks are connected to the data signal lines of the display surface, and the control signal line test blocks are connected to the control signal lines of the display surface.

[0015] The display panel further includes: the first control signal line includes a first control signal line part and a first control signal line part two, both the first control signal line part one and the first control signal line part two extend through the binding part to the second side direction to respectively form a first control signal line extension part one and a first control signal line extension part two, and the first control signal line extension part one is electrically connected to the plurality of control signal test blocks, and the first control signal line extension part two is electrically connected to the plurality of control signal test blocks.

[0016] Preferably, the first extension of the first control signal line and the second extension of the first control signal line are symmetrically arranged about the first reference plane of the display panel, and the first direction is perpendicular to the first reference plane.

[0017] Furthermore, the display panel further includes: a third power signal test block, distributed in the area where the first power signal line is distributed, the third power signal test block being electrically connected to the first power signal line; and a fourth power signal test block, distributed in the area where the second power signal line is distributed, the fourth power signal test block being electrically connected to the second power signal line.

[0018] Preferably, the first power signal line includes a positive power signal line and the second power signal line includes a negative power signal line; or, the first power signal line includes a negative power signal line and the second power signal line includes a positive power signal line.

[0019] Preferably, the first power signal line extends around the first control signal line by one part and extends around the first control signal line by two parts, and the second power signal line includes a second power signal line part and a second power signal line part, which are respectively located on both sides of the first power signal line.

[0020] Preferably, the binding portion includes a first binding sub-portion and a second binding sub-portion spaced apart, and the first data signal line and the first control signal line are connected to the first binding sub-portion.

[0021] Furthermore, the display panel further includes a second data signal line and a second control signal line located on the second side of the bonding portion 105, one side of the second data signal line and the second control signal line being electrically connected to the second bonding sub-part.

[0022] Preferably, the other side of the second data signal line and the second control signal line is electrically connected to the data signal line and the control signal line on the display surface via the side trace.

[0023] Preferably, the display panel further includes a third data signal line located between the first binding sub-part and the second binding sub-part, and the third data signal line passes through the first binding sub-part and the second binding sub-part and is electrically connected to the first data signal line and the second data signal line.

[0024] Furthermore, the first power signal line further includes a first power signal line portion one and a first power signal line portion two located on both sides of the second data signal line, the first power signal line portion one and the first power signal line portion two connected to the second bonding sub-part; the display panel further includes a third power signal line located on the first side of the bonding sub-part, the third power signal line being electrically connected to the first power input signal line of the display surface through the side trace, the third power signal line including a third power signal line portion one and a third power signal line portion two distributed on both sides of the first data signal line, the third power signal line portion one and the third power signal line portion two connected to the first bonding sub-part; A bonding sub-part; a first power signal line portion passes through the second bonding sub-part and a third power signal line portion passes through the first bonding sub-part, extending towards the center of the display panel to form a first power signal line extension portion, the first power signal line portion, the third power signal line portion, and the first power signal line extension portion are electrically connected; and a second first power signal line portion passes through the second bonding sub-part and a second third power signal line portion passes through the first bonding sub-part, extending towards the center of the display panel to form a second first power signal line extension portion, the second first power signal line portion, the second third power signal line portion, and the second first power signal line extension portion are electrically connected.

[0025] Preferably, one part of the second power signal line is located on the side of the first power signal line away from the second data signal line, and the second part of the second power signal line is located on the side of the first power signal line away from the second data signal line, and the first part of the second power signal line and the second part of the second power signal line are connected to the second bonding sub-part.

[0026] The display panel further includes a fourth power signal line located on the first side of the bonding portion. The fourth power signal line is electrically connected to the second power input signal line of the display surface through the side trace. The fourth power signal line includes a fourth power signal line part and a fourth power signal line part two. The fourth power signal line part one is located on the side of the third power signal line part one that is away from the first data signal line, and the fourth power signal line part two is located on the side of the third power signal line part two that is away from the first data signal line. The fourth power signal line part one and the fourth power signal line part two are connected to the first bonding sub-part.

[0027] Preferably, the third power signal line includes a positive power signal line and the fourth power signal line includes a negative power signal line; or, the third power signal line includes a negative power signal line and the fourth power signal line includes a positive power signal line.

[0028] Preferably, a portion of the second power signal line passes through the second bonding sub-part and a portion of the fourth power signal line passes through the first bonding sub-part, extending towards the center of the display panel to form a second power signal line extension portion. The second power signal line extension portion, the fourth power signal line extension portion, and the second power signal line extension portion are electrically connected. Additionally, a second portion of the second power signal line passes through the second bonding sub-part and the fourth power signal line extension portion passes through the first bonding sub-part, extending towards the center of the display panel to form a second power signal line extension portion. The second power signal line extension portion, the fourth power signal line extension portion, and the second power signal line extension portion are electrically connected.

[0029] Preferably, a portion of the second power signal line extends through the second bonding sub-part to form a second power signal line extension portion, and a portion of the fourth power signal line extends through the first bonding sub-part to form a fourth power signal line extension portion; two portions of the second power signal line extend through the second bonding sub-part to form second power signal line extension portions, and two portions of the fourth power signal line extend through the first bonding sub-part to form fourth power signal line extension portions; the second power signal line extension portion and the second power signal line extension portions are respectively electrically connected to the second power input signal line of the display surface via side traces along one side of the first direction of the display panel; the fourth power signal line extension portion and the fourth power signal line extension portions are respectively electrically connected to the second power input signal line of the display surface via side traces along the other side of the first direction of the display panel; and / or, the first power signal line extension portion and the first power signal line extension portions are respectively electrically connected to the first power input signal line of the display surface via side traces along both sides of the first direction of the display panel.

[0030] The first power signal line, the second power signal line, the third power signal line, and the fourth power signal line are mesh structures.

[0031] Preferably, the line test block is provided in the area where the first data signal line, the first control signal line, the third power signal line, the fourth power signal line, the second data signal line, the second control signal line, the first power signal line, the second power signal line, and the third data signal line are distributed.

[0032] Preferably, the circuit test blocks are distributed near the edge of the display panel or near the bonding portion.

[0033] Preferably, the line test block further includes a redundant test block.

[0034] A second aspect of this application provides a display device, which includes the display panel in any of the above embodiments.

[0035] The beneficial effects are: by designing and optimizing the circuitry of the display panel, this application lays out all circuitry in the same layer, avoiding short circuits between multiple metal layers caused by foreign objects pressing on them. Furthermore, the separate design improves the heat dissipation performance of the display panel and further reduces the manufacturing cost. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:

[0037] Figure 1 This is a schematic diagram of the structure of the display panel of this application;

[0038] Figure 2 This is a top view of one embodiment of the display panel of this application;

[0039] Figure 3 This is a schematic diagram of one embodiment of the flip-chip film bonded to the bonding portion of this application;

[0040] Figure 4 This is a schematic diagram of the orthographic projection of the flip-chip film of this application onto the non-display surface of the display panel;

[0041] Figure 5 yes Figure 2 A magnified schematic diagram of the middle region M;

[0042] Figure 6 yes Figure 2 A magnified schematic diagram of region N in the middle;

[0043] Figure 7 yes Figure 2 A magnified schematic diagram of the middle region L;

[0044] Figure 8 This is a top view of another embodiment of the display panel of this application;

[0045] Figure 9 This is a schematic diagram of the ring circuit structure of this application;

[0046] Figure 10 This is a top view of another embodiment of the display panel of this application;

[0047] Figure 11 This is a schematic diagram of one embodiment of the display device of this application. Detailed Implementation

[0048] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0049] It should be noted that the terms "first" and "second" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0050] For ease of understanding, all signal lines in this application are distributed within the indicated area in the accompanying drawings, and the area includes at least one signal line.

[0051] See Figure 1 and Figure 2This application provides a display panel 10, which has a display surface 10A and a non-display surface 10B disposed opposite to each other. The display panel 10 includes a first data signal line 101, a first control signal line 102, a first power signal line 103, a second power signal line 104, and a bonding portion 105 disposed on the same layer as the non-display surface 10B; wherein the first data signal line 101, the first control signal line 102, the first power signal line 103, the second power signal line 104, and the bonding portion 105 are disposed on the non-display surface 10B. The orthographic projections of the display surface 10B do not overlap. The first data signal line 101 and the first control signal line 102 are located on the first side S1 of the binding part 105, and the first power signal line 103 and the second power signal line 104 are located on the second side S2 of the binding part 105. The first side S1 and the second side S2 are distributed on opposite sides of the binding part 105. One side of the first data signal line 101, the first control signal line 102, the first power signal line 103 and the second power signal line 104 are electrically connected to the binding part 105 respectively.

[0052] Specifically, in existing technologies, considering issues such as circuit layout design, circuit density, heat dissipation performance, and manufacturing difficulty, multi-layer metal processing is used for signal lines on the non-display surface 10B to simplify the layout, reduce circuit density, improve heat dissipation performance, and reduce manufacturing difficulty. However, since the display panel 10 uses a double-sided process, there is a risk of foreign object damage to the non-display surface 10B during the film layer preparation process on the display surface 10A side. Once damaged, it can cause short circuits between different metal layers in the multi-layer metal process, resulting in poor line quality in the display panel 10. In this application, the first data signal line 101, the first control signal line 102, the first power signal line 103, the second power signal line 104, and the bonding portion 105 are arranged on the same layer on the non-display surface 10B. Furthermore, the orthographic projections of these lines on the non-display surface 10B do not overlap, preventing short circuits caused by foreign matter damage during multi-layer metal processing and improving line defects. Simultaneously, this application positions the first data signal line 101, the first control signal line 102, the first power signal line 103, and the second power signal line 104 on opposite sides of the bonding portion 105, all electrically connected to the bonding portion 105. The lines are independent of each other, improving the heat dissipation performance of the display panel 10. Moreover, compared to existing multi-layer metal processes, this same-layer metal process reduces the number of process steps, thereby lowering manufacturing costs.

[0053] Please combine Figure 1 and Figure 2The other side of the first data signal line 101, the first control signal line 102, the first power signal line 103, and the second power signal line 104 are respectively electrically connected to the data signal line (not shown), the control signal line 202, the first power input signal line (not shown), and the second power input signal line 203 of the display surface 10A via the side wiring 201.

[0054] Specifically, on the first side S1 of the non-display surface 10B bonding part 105, the first data signal line 101 is electrically connected to the data signal line (not shown) of the display surface 10A via a side trace 201. The first control signal line 102 on the first side S1 is electrically connected to the control signal line 202 of the display surface 10A via a side trace 201. On the second side S2, the first power signal line 103 is electrically connected to the first power input signal line (not shown) via a side trace 201. The second power signal line 104 on the second side S2 is electrically connected to the second power input signal line 203 via a side trace 201. This design enables electrical connection between the lines on the non-display surface 10B and the lines on the display surface 10A. Furthermore, the lines distributed on the first side S1 and the second side S2 of the bonding part 105 can be electrically connected to at least one of the four sides of the display panel 10 via the side trace 201. It should be noted that a light-emitting chip is provided on the display surface 10A of the display panel 10. This chip is electrically connected to signal lines such as data signal lines, control signal lines 202, and the first or second power input signal line 203. It receives external signal input to provide normal functionality. Specifically, the data signal lines transmit the data voltage signal (Data) of the light-emitting chip; the control signal line 202 transmits high-level (VGH) and low-level (VGL) signals controlling the transistor switch, the switching signal (EM) controlling the light-emitting chip, or the clock signal (CLK); the first and second power input signal lines 203 transmit the power voltage signal of the light-emitting chip. Please refer to... Figure 1 and Figure 3 The display panel 10 also includes a flip-chip film 300, which is bonded to the bonding part 105. The flip-chip film 300 includes at least one first power signal test block 301, at least one second power signal test block 302, and at least one data signal test block 303.

[0055] Specifically, the flip-chip film 300 can be electrically connected to the bonding portion 105 via anisotropic conductive adhesive, such as... Figure 3As shown, the anisotropic conductive adhesive includes conductive particles 304, which are used for electrical connection between the flip-chip film 300 and the bonding portion 105. Alternatively, the flip-chip film 300 can also be electrically connected to the bonding portion 105 via laser welding or other methods. The flip-chip film 300 can receive external signals and transmit them to the light-emitting chip of the display panel 10 through at least one first power signal test block 301, at least one second power signal test block 302, and at least one data signal test block 303. The first power signal test block 301 and the second power signal test block 302 can be used to transmit power voltage signals, and the data signal test block 303 can be used to transmit data voltage signals. Generally, the display panel 10 distinguishes between positive and negative power voltage signals. When the first power signal test block 301 is used to receive a positive power voltage signal, the second power signal test block 302 can be used to receive a negative power voltage signal; conversely, when the first power signal test block 301 is used to receive a negative power voltage signal, the second power signal test block 302 can be used to receive a positive power voltage signal. Through the design of the flip-chip film 300, the functions of the display panel 10 can be controlled by connecting external signals.

[0056] Further, please refer to Figure 4 The projected area of ​​the data signal test block 303 on the non-display surface 10B is smaller than the projected area of ​​the first power signal test block 301 on the non-display surface 10B, and the projected area of ​​the data signal test block 303 on the non-display surface 10B is smaller than the projected area of ​​the second power signal test block 302 on the non-display surface 10B.

[0057] The above design is equivalent to increasing the contact area between the first power signal test block 301 and the second power signal test block 302 and the bonding part 105, which can reduce the transmission resistance and thus improve the heat dissipation effect of the bonding part 105 of the display panel 10.

[0058] Of course, in some other embodiments, the flip-chip film 300 may also include a first control signal test block or other signals, which will not be described in detail here.

[0059] Further, see Figure 3The bonding part 105 includes a first power signal test pad 1501, a second power signal test pad 1502, and a data signal test pad 1503 respectively, which are respectively disposed corresponding to the first power signal test block 301, the second power signal test block 302, and the data signal test block 303. The orthographic projections of the first power signal test pad 1501, the second power signal test pad 1502, and the data signal test pad 1503 on the non-display surface 10B at least partially overlap with the orthographic projections of the first power signal test block 301, the second power signal test block 302, and the data signal test block 303 on the non-display surface 10B. Through the above-mentioned corresponding arrangement and the at least partial overlap of the orthographic projections, good conductivity can be ensured.

[0060] In some other embodiments, the orthographic projections of the first power signal test pad 1501, the second power signal test pad 1502, and the data signal test pad 1503 on the non-display surface 10B may not coincide with the orthographic projections of the first power signal test block 301, the second power signal test block 302, and the data signal test block 303 on the non-display surface 10B.

[0061] Further, please refer to Figure 3 and Figure 4 The first power signal test block 301 is symmetrically arranged with respect to the data signal test block 303, and the second power signal test block 302 is also symmetrically arranged with respect to the data signal test block 303.

[0062] Specifically, setting the number of the first power signal test block 301 and the second power signal test block 302 to 2, 4 or other even numbers, and setting their positions separately, distributed symmetrically on both sides of the data signal test block 303, can improve the heat dissipation effect of the bonding part 105.

[0063] Furthermore, the first power signal test block 301 is located between the data signal test block 303 and the second power signal test block 302. This allows for a more organized layout of the test blocks and facilitates the connection of signal lines.

[0064] Of course, in other embodiments, the number of the first power signal test block 301 and the second power signal test block 302 can be different, and their positions can be arranged symmetrically with respect to the data signal test block 303. Please refer to [link / reference]. Figure 2 and Figure 5 The first control signal line 102 extends through the binding part 105 and extends in the direction of the second side S2 to form a first control signal line extension part 1022. Multiple control signal test blocks 1021 electrically connected to the first control signal line extension part 1022 are provided in the extension direction of the first control signal line extension part 1022.

[0065] Specifically, the first control signal line extension 1022 is electrically connected to multiple control signal test blocks 1021, which can transmit external test signals to the light-emitting chip of the display surface 10A through the multiple control signal test blocks 1021, the first control signal line extension 1022, the bonding part 105, and the first control signal line 102, thereby testing the function of the display panel 10. The multiple control signal test blocks 1021 are distributed along the extension direction of the first control signal line extension 1022, which can improve the heat dissipation effect when testing the display panel 10, making it easier for heat to dissipate and less likely to accumulate.

[0066] Further, please refer to Figure 2 Multiple control signal test blocks 1021 are located on both sides of the extension portion 1022 of the first control signal line. This allows the wiring to be more dispersed, which can further improve the heat dissipation effect.

[0067] For further information, please refer to [link / reference]. Figure 2 Multiple control signal test blocks 1021 are symmetrically arranged about the extension portion 1022 of the first control signal line. This makes the circuit layout more compact and neat.

[0068] In some other embodiments, multiple control signal test blocks 1021 may also be located on one side of the first control signal line extension 1022.

[0069] Please see Figure 2 , Figure 6 and Figure 7 The display panel 10 has a first direction X and a second direction Y that are perpendicular to each other. Multiple line test blocks 400 are distributed on both sides of the second direction Y of the display panel 10. The line test block 400 includes a data signal line test block 401 and a control signal line test block 402. The data signal line test block 401 is connected to the data signal line of the display surface 10A, and the control signal line test block 402 is connected to the control signal line of the display surface 10A.

[0070] Specifically, circuit test blocks 400 are distributed on both sides of the second direction Y. The data signal line test blocks 401 on both sides are connected to the data signal lines of the display surface 10A through side traces. By testing the data signal line test blocks 401 on both sides, the continuity test between the side traces and the data signal lines of the display surface 10A can be realized. Correspondingly, the control signal line test blocks 402 on both sides are connected to the control signal lines of the display surface 10A through side traces. By testing the control signal line test blocks 402 on both sides, the continuity test between the side traces and the control signal lines of the display surface 10A can be realized.

[0071] Of course, in some other implementations, the line test block 400 may also include other signal line test blocks, such as power signal line test blocks, and other signal line test blocks can be set according to the actual situation.

[0072] Please see Figure 2 The first control signal line 102 includes a first control signal line part 102A and a first control signal line part 102B. The first control signal line part 102A and the first control signal line part 102B both pass through the binding part 105 and extend in the direction of the second side S2 to form a first control signal line extension part 1022A and a first control signal line extension part 1022B, respectively. The first control signal line extension part 1022A is electrically connected to a plurality of control signal test blocks 1021, and the first control signal line extension part 1022B is electrically connected to a plurality of control signal test blocks 1021.

[0073] Specifically, from the bonding part 105 towards the second side S2, the first control signal line 102 can be divided into a first control signal line extension part 102A and a first control signal line extension part 102B, extending towards the second side S2. Both the first control signal line extension part 102A and the first control signal line extension part 1022B are electrically connected to multiple control signal test blocks 1021. Therefore, when a control signal is input to the control signal test block 1021, it is transmitted through the first control signal line extension part 1022A and the first control signal line extension part 1022B, and can be used for functional testing of the display panel 10. The above two-part design increases the spacing between the control signal test blocks 1021, thereby further reducing heat accumulation.

[0074] Of course, it is understood that in some other embodiments, the first control signal line extension 1022 may also include more sub-parts, which will not be described in detail here.

[0075] Further, please refer to Figure 2 The first control signal line extension 1022A and the second control signal line extension 1022B are symmetrically arranged about the first reference plane 10C of the display panel 10, and the first direction X is perpendicular to the first reference plane 10C. The first reference plane 10C only needs to be parallel to the second direction; this application is not limited thereto. This allows for more uniform heat dissipation and a neater circuit layout.

[0076] Please see Figure 2The display panel 10 also includes a third power signal test block 1031 and a fourth power signal test block 1041. The third power signal test block 1031 is distributed in the area where the first power signal line 103 is distributed and is electrically connected to the first power signal line 103. The fourth power signal test block 1041 is distributed in the area where the second power signal line 104 is distributed and is electrically connected to the second power signal line 104.

[0077] Specifically, the third power signal test block 1031 and the fourth power signal test block 1041 are respectively set in the distribution areas of the first power signal line 103 and the second power signal line 104, so as to avoid the third power signal test block 1031 and the fourth power signal test block 1041 being too close to the control signal test block 1021, which would affect heat dissipation. At the same time, the third power signal test block 1031 receives external test signals and transmits them to the first power signal line 103, and the fourth power signal test block 1041 receives external test signals and transmits them to the second power signal line 104, which can be used to test the power voltage signal of the entire display panel 10.

[0078] Furthermore, the first power signal line 103 includes a positive power signal line, and the second power signal line 104 includes a negative power signal line. It can be understood that when the first power signal line 103 is a positive power signal line and the second power signal line 104 is a negative power signal line, the first power signal line 103 is used to transmit the positive power supply voltage signal of the display panel 10, and the second power signal line 104 is used to transmit the negative power supply voltage signal of the display panel 10.

[0079] In another embodiment, the first power signal line 103 includes a negative power signal line, and the second power signal line 104 includes a positive power signal line. It is understood that the effect is the opposite of the above, and will not be elaborated further in this application.

[0080] Please combine Figure 1 and Figure 2 The first power signal line 103 is distributed around the first control signal line extension part 1022A and the first control signal line extension part 1022B. The second power signal line 104 includes the second power signal line extension part 104A and the second power signal line extension part 104B, which are located on both sides of the first power signal line 103.

[0081] Specifically, one side of the first power signal line 103 is electrically connected to the side trace 201, and the other side extends around the first control signal line in two parts, 1022A and 1022B, and is electrically connected to the bonding part 105. This dispersed design helps improve heat dissipation performance. Furthermore, the second power signal line 104 includes a second power signal line 104A and a second power signal line 104B. One side of both the second power signal line 104A and the second power signal line 104B is electrically connected to the side trace 201, and the other side surrounds the outside of the first power signal line 103. This dispersed design further improves heat dissipation performance and makes the wiring more uniform.

[0082] Please see Figure 8 The binding portion 105 includes a first binding sub-portion 1051 and a second binding sub-portion 1052 spaced apart, and a first data signal line 101 and a first control signal line 102 are connected to the first binding sub-portion 1051; the display panel 10 further includes a second data signal line 601 and a second control signal line 602 located on the second side S2 of the binding portion 105, and one side of the second data signal line 601 and the second control signal line 602 are electrically connected to the second binding sub-portion 1052.

[0083] Specifically, the first data signal line 101 and the first control signal line 102 are connected to the first bonding sub-part 1051, and one side of the second data signal line 601 and the second control signal line 602 are connected to the second bonding sub-part 1052. The first bonding sub-part 1051 and the second bonding sub-part 1052 are consistent in the functional testing of the display panel 10. By expanding the bonding sub-part 105, the impact on the display panel 10 after one of the first bonding sub-part 1051 and the second bonding sub-part 1052 fails can be reduced, thereby improving the yield of the display panel 10.

[0084] Furthermore, the other side of the second data signal line 601 and the second control signal line 602 are electrically connected to the data signal line and control signal line of the display surface 10A via side traces. This enables the second data signal line 601 to transmit signals to the data line and the second control signal line 602 to transmit signals to the control signal line.

[0085] Further, please refer to Figure 8 and Figure 9 The display panel 10 further includes a third data signal line 106 located between the first binding sub-part 1051 and the second binding sub-part 1052, and the third data signal line 106 is electrically connected to the first data signal line 101 and the second data signal line 601 through the first binding sub-part 1051 and the second binding sub-part 1052.

[0086] Specifically, by setting a third data signal line 106, the first data signal line 101 and the second data signal line 601 are electrically connected. Since both the first data signal line 101 and the second data signal line 601 are electrically connected to the data signal line 204 of the display surface 10A through the side trace 201, the entire circuit forms a ring circuit structure. Therefore, when a circuit breaks at any point on the side trace 201 or outside the display surface 10B, the function of the display panel 10 will not be affected due to the ring circuit structure. Furthermore, when a circuit break occurs, the range of the break can be pinpointed by testing the first bonding sub-part 1051 and the second bonding sub-part 1052, reducing the time required to locate the break.

[0087] Of course, in some other embodiments, the third data signal line 106 may not be provided.

[0088] Please combine Figure 8 and Figure 9 The first power signal line 103 further includes a first power signal line part 103A and a first power signal line part 103B located on both sides of the second data signal line 601. The first power signal line part 103A and the first power signal line part 103B are connected to the second bonding sub-part 1052. The display panel 10 further includes a third power signal line 107 located on the first side S1 of the bonding part 105. The third power signal line 107 is electrically connected to the first power input signal line of the display surface 10A through the side wiring 201. The third power signal line 107 includes a third power signal line part 107A and a third power signal line part 107B distributed on both sides of the first data signal line 101. The third power signal line part 107A and the third power signal line part 107B are connected to the first bonding sub-part 1051. The first power signal line 103A extends towards the center of the display panel 10 through the second binding sub-part 1052 and the third power signal line 107A extends towards the center of the display panel 10 through the first binding sub-part 1051, forming a first power signal line extension 1031A. The first power signal line 103A, the third power signal line 107A, and the first power signal line extension 1031A are electrically connected. The first power signal line 2 103B extends towards the center of the display panel 10 through the second binding sub-part 1052 and the third power signal line 2 107B extends towards the center of the display panel 10 through the first binding sub-part 1051, forming a first power signal line extension 2 1031B. The first power signal line 2 103B, the third power signal line 2 107B, and the first power signal line extension 2 1031B are electrically connected.

[0089] Specifically, by designing a first power signal line extension 1031A between the first binding sub-part 1051 and the second binding sub-part 1052, the first power signal line extension 1031A and the third power signal line extension 107A on the non-display surface 10B are electrically connected through the first power signal line extension 1031A. Furthermore, the first power signal line extension 103A and the third power signal line extension 107A are respectively electrically connected to the first power input signal line of the display surface 10A through the side trace 201, thus forming a loop for the entire signal line. In terms of circuit structure, when any of the first power signal line portion 103A, the third power signal line portion 107A, or the first power signal line extension portion 1031A in the non-display surface 10B is broken, due to the ring circuit structure, a signal can still be provided through another path, thus maintaining the normal function of the display panel 10. Similarly, by designing the first power signal line extension portion 1031B between the first binding sub-part 1051 and the second binding sub-part 1052, a ring circuit structure can also be formed, with similar effects as described above, which will not be elaborated further in this application. Furthermore, dividing the first power signal line 103 and the third power signal line 107 into two separate parts is beneficial for improving the heat dissipation of the display panel 10. In some other embodiments, only one of the first power signal line 103 or the third power signal line 107 may be provided.

[0090] In some other embodiments, the first data signal line 101 may also be provided in multiple parts and set separately.

[0091] Please see Figure 8 The second power signal line 104A is located on the side of the first power signal line 103A away from the second data signal line 601, and the second power signal line 104B is located on the side of the first power signal line 103B away from the second data signal line 601. The second power signal line 104A and the second power signal line 104B are connected to the second bonding sub-part 1052. The display panel 10 further includes a fourth power signal line 108 located on the first side S1 of the bonding portion 105. The fourth power signal line 108 is electrically connected to the second power input signal line of the display surface 10A via a side trace. The fourth power signal line 108 includes a fourth power signal line part 108A and a fourth power signal line part 108B. The fourth power signal line part 108A is located on the side of the third power signal line part 107A away from the first data signal line 101, and the fourth power signal line part 108B is located on the side of the third power signal line part 107B away from the first data signal line 101. The fourth power signal line part 108A and the fourth power signal line part 108B are connected to the first bonding sub-portion 1051.

[0092] Specifically, dividing the second power signal line 104 into two parts and distributing them outside the first power signal line 103 can reduce heat accumulation on the second power signal line 104. Similarly, dividing the fourth power signal line 108 into two parts has a similar effect. Furthermore, two bonding sub-parts are provided, either of which can be used as a backup.

[0093] Of course, in some other embodiments, the second power signal line 104 and the fourth power signal line 108 may be located in only one place.

[0094] Furthermore, the third power signal line 107 and the fourth power signal line 108 can be used to transmit different power voltage signals.

[0095] In one embodiment, the third power signal line 107 includes a positive power signal line, and the fourth power signal line 108 includes a negative power signal line.

[0096] In another embodiment, the third power signal line 107 includes a negative power signal line, and the fourth power signal line 108 includes a positive power signal line.

[0097] The choice between the two options mentioned above can be made based on the actual situation, and this application does not impose any restrictions.

[0098] Please see Figure 8 A second power signal line 104A passes through the second binding sub-part 1052 and a fourth power signal line 108A passes through the first binding sub-part 1051, extending towards the center of the display panel 10 to form a second power signal line extension 1041A. The second power signal line 104A, the fourth power signal line 108A, and the second power signal line extension 1041A are electrically connected. A second power signal line 104B passes through the second binding sub-part 1052 and the fourth power signal line 108B passes through the first binding sub-part 1051, extending towards the center of the display panel 10 to form a second power signal line extension 1041B. The second power signal line 104B, the fourth power signal line 108B, and the second power signal line extension 1041B are electrically connected.

[0099] Specifically, by designing a second power signal line extension 1041A between the first binding sub-part 1051 and the second binding sub-part 1052, the second power signal line extension 1041A and the fourth power signal line extension 108A on the non-display surface 10B are electrically connected through the second power signal line extension 1041A. Furthermore, the second power signal line extension 104A and the fourth power signal line extension 108A are respectively electrically connected to the second power input signal line of the display surface 10A through side traces, thus forming a loop circuit for the entire signal line. In terms of structure, when any of the second power signal line portion 104A, the fourth power signal line portion 108A, and the second power signal line extension portion 1041A in the non-display surface 10B is broken, due to the ring circuit structure, a signal can still be provided through another path, thus maintaining the normal function of the display panel 10. Similarly, by designing the second power signal line extension portion 1041B between the first binding sub-part 1051 and the second binding sub-part 1052, a ring circuit structure can also be formed, with similar effects to the above, which will not be described in detail here.

[0100] Please see Figure 10 A second power signal line 104A extends through the second binding sub-part 1052 to form a second power signal line extension 1041A, and a fourth power signal line 108A extends through the first binding sub-part 1051 to form a fourth power signal line extension 1081A. A second power signal line 104B extends through the second binding sub-part 1052 to form a second power signal line extension 1041B, and a fourth power signal line 108B extends through the first binding sub-part 1051 to form a fourth power signal line extension 1081B. The second power signal line extension 1041A and the second power signal line extension 1041B are electrically connected to the second power input signal line of the display surface 10A via side traces along the first direction X of the display panel 10. The fourth power signal line extension 1081A and the fourth power signal line extension 1081B are electrically connected to the second power input signal line of the display surface 10A via side traces along the first direction X of the display panel 10.

[0101] Specifically, by further extending the second power signal line 104 and the fourth power signal line 108, and electrically connecting the extended portions to the lines of the display surface 10A via side traces on the two sides of the display panel 10 in the first direction X, it is possible to ensure that the display panel 10 can maintain normal function even if a break occurs at any point in the second power signal line 104, the fourth power signal line 108, or the extended portion, due to the ring circuit structure. Furthermore, by arranging the lines on all four sides of the display panel 10, the voltage drop of the display panel 10 can be significantly reduced, thereby improving the brightness uniformity of the display panel 10.

[0102] Please continue reading. Figure 10 The first power signal line extension 1031A and the second power signal line extension 1031B are respectively electrically connected to the first power input signal line of the display surface 10A through side traces along the first direction X on both sides of the display panel 10.

[0103] Specifically, by further extending the first power signal line 103, and electrically connecting the extended portion to the lines on the display surface 10A via side traces on the two sides of the display panel 10 in the first direction X, on the one hand, it can be ensured that even if a break occurs in any part of the first power signal line 103, the third power signal line 107, or the extended portion outside the display surface 10B, the display panel 10 can still maintain normal function due to the ring circuit structure; on the other hand, by arranging the lines on all four sides, the voltage drop of the display panel 10 can be significantly reduced, thereby improving the brightness uniformity of the display panel 10.

[0104] Furthermore, the first power signal line 103, the second power signal line 104, the third power signal line 107, and the fourth power signal line 108 are mesh structures.

[0105] Specifically, the mesh structure can improve the heat dissipation of the first power signal line 103, the second power signal line 104, the third power signal line 107, and the fourth power signal line 108 on the non-display surface 10B, while also having good conductivity.

[0106] Of course, in some other embodiments, the lines of the first power signal line 103, the second power signal line 104, the third power signal line 107 and the fourth power signal line extending toward the middle of the display panel 10 can also be configured as a mesh structure.

[0107] Please see Figure 8 and Figure 10 A line test block 400 is provided in the area where the first data signal line 101, the first control signal line 102, the third power signal line 107, the fourth power signal line 108, the second data signal line 601, the second control signal line 602, the first power signal line 103, the second power signal line 104, and the third data signal line 106 are distributed.

[0108] Specifically, for each type of signal line mentioned above, a line test block 400 can be set in the corresponding distribution area. It can be understood that by setting the corresponding test block, the continuity of each type of signal line between the display surface 10A, the non-display surface 10B, or the side can be detected, so as to achieve the purpose of good monitoring of the continuity of the line.

[0109] Please see Figure 2 and Figure 6The line test block 400 also includes a redundancy test block 403.

[0110] Specifically, the redundant test block 403 is mainly used to provide available space for subsequent high-resolution product development. The redundant test block 403 can be interspersed among other line test blocks, or it can be uniformly placed on one side of other line test blocks.

[0111] Of course, in some other implementations, redundant test block 403 may not be provided.

[0112] Please see Figure 11 This application also provides a display device 800, which includes the display panel 10 in any of the above embodiments. For detailed structure, please refer to the above embodiments, which will not be repeated here.

[0113] Specifically, the display device 800 can be any electronic device such as a laptop, desktop computer, tablet computer, mobile phone, smartwatch, or virtual display terminal, without any restrictions.

[0114] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A display panel, characterized in that, The display panel has a display surface and a non-display surface arranged opposite to each other, and the display panel includes: The first data signal line, the first control signal line, the first power signal line, the second power signal line, and the bonding part are arranged on the same layer as the non-display surface; Wherein, the first data signal line, the first control signal line, the first power signal line, the second power signal line and the bonding part do not overlap in their orthographic projections on the non-display surface. The first data signal line and the first control signal line are located on the first side of the bonding part, and the first power signal line and the second power signal line are located on the second side of the bonding part. The first side and the second side are distributed on opposite sides of the bonding part. One side of the first data signal line, the first control signal line, the first power signal line, and the second power signal line is electrically connected to the bonding part; the other side of the first data signal line, the first control signal line, the first power signal line, and the second power signal line is electrically connected to the data signal line, the control signal line, the first power input signal line, and the second power input signal line of the display surface through side traces. The first control signal line extends through the binding portion toward the second side to form a first control signal line extension portion. A plurality of control signal test blocks electrically connected to the first control signal line extension portion are provided in the extension direction of the first control signal line extension portion. The plurality of control signal test blocks are located on both sides of the first control signal line extension portion. The display panel has a first direction and a second direction that are perpendicular to each other. Multiple line test blocks are distributed on both sides of the second direction of the display panel. The line test blocks include data signal line test blocks and control signal line test blocks. The data signal line test blocks are connected to the data signal lines of the display surface, and the control signal line test blocks are connected to the control signal lines of the display surface.

2. The display panel according to claim 1, characterized in that, Also includes: A flip-chip film, bonded to the bonding portion, includes at least one first power signal test block, at least one second power signal test block, and at least one data signal test block. The projected area of ​​the data signal test block on the non-display surface is smaller than the projected area of ​​the first power signal test block on the non-display surface, and the projected area of ​​the data signal test block on the non-display surface is smaller than the projected area of ​​the second power signal test block on the non-display surface.

3. The display panel according to claim 2, characterized in that, The bonding portion includes a first power signal test pad, a second power signal test pad, and a data signal test pad, which are respectively disposed corresponding to the first power signal test block, the second power signal test block, and the data signal test block. The orthographic projections of the first power signal test pad, the second power signal test pad, and the data signal test pad on the non-display surface at least partially overlap with the orthographic projections of the first power signal test block, the second power signal test block, and the data signal test block on the non-display surface.

4. The display panel according to claim 2, characterized in that, The first power signal test block is symmetrically arranged with respect to the data signal test block, and the second power signal test block is also symmetrically arranged with respect to the data signal test block.

5. The display panel according to claim 2, characterized in that, The first power signal test block is located between the data signal test block and the second power signal test block.

6. The display panel according to claim 1, characterized in that, The plurality of control signal test blocks are symmetrically arranged about the extension of the first control signal line.

7. The display panel according to claim 1, characterized in that, Further includes: The first control signal line includes a first control signal line part and a first control signal line part two. The first control signal line part one and the first control signal line part two both extend through the binding part towards the second side to form a first control signal line extension part one and a first control signal line extension part two, respectively. The first control signal line extension part one is electrically connected to the plurality of control signal test blocks, and the first control signal line extension part two is electrically connected to the plurality of control signal test blocks.

8. The display panel according to claim 7, characterized in that, The first extension of the first control signal line and the second extension of the first control signal line are symmetrically arranged about the first reference plane of the display panel, and the first direction is perpendicular to the first reference plane.

9. The display panel according to claim 7, characterized in that, Also includes: The third power signal test block is distributed in the area where the first power signal line is distributed, and the third power signal test block is electrically connected to the first power signal line. The fourth power signal test block is distributed within the area where the second power signal line is distributed, and the fourth power signal test block is electrically connected to the second power signal line.

10. The display panel according to claim 9, characterized in that, The first power signal line includes a positive power signal line, and the second power signal line includes a negative power signal line; or, the first power signal line includes a negative power signal line, and the second power signal line includes a positive power signal line.

11. The display panel according to claim 9, characterized in that, The first power signal line extends around the first control signal line by one part and extends around the first control signal line by two parts. The second power signal line includes a second power signal line part and a second power signal line part, which are located on both sides of the first power signal line.

12. The display panel according to claim 9, characterized in that, The bonding portion includes a first bonding sub-portion and a second bonding sub-portion spaced apart, and the first data signal line and the first control signal line are connected to the first bonding sub-portion; the display panel further includes a second data signal line and a second control signal line located on the second side of the bonding portion, and one side of the second data signal line and the second control signal line is electrically connected to the second bonding sub-portion.

13. The display panel according to claim 12, characterized in that, The other side of the second data signal line and the second control signal line is electrically connected to the data signal line and the control signal line on the display surface via side traces.

14. The display panel according to claim 12, characterized in that, The display panel further includes a third data signal line located between the first binding sub-part and the second binding sub-part, and the third data signal line passes through the first binding sub-part and the second binding sub-part and is electrically connected to the first data signal line and the second data signal line.

15. The display panel according to claim 12, characterized in that, The first power signal line further includes a first power signal line part and a first power signal line part located on both sides of the second data signal line, and the first power signal line part and the first power signal line part are connected to the second bonding sub-part; The display panel further includes a third power signal line located on the first side of the bonding portion. The third power signal line is electrically connected to the first power input signal line of the display surface through the side wiring. The third power signal line includes a third power signal line part and a third power signal line part distributed on both sides of the first data signal line. The third power signal line part and the third power signal line part are connected to the first bonding sub-part. A portion of the first power signal line passes through the second bonding sub-part, and a portion of the third power signal line passes through the first bonding sub-part, extending towards the center of the display panel to form a first power signal line extension portion. The first power signal line extension portion, the third power signal line extension portion, and the first power signal line extension portion are electrically connected. A second portion of the first power signal line passes through the second bonding sub-part, and a second portion of the third power signal line passes through the first bonding sub-part, extending towards the center of the display panel to form a second first power signal line extension portion. The second first power signal line extension portion, the third power signal line extension portion, and the second first power signal line extension portion are electrically connected.

16. The display panel according to claim 15, characterized in that, One part of the second power signal line is located on the side of the first power signal line away from the second data signal line, and the second part of the second power signal line is located on the side of the first power signal line away from the second data signal line. The first part of the second power signal line and the second part of the second power signal line are connected to the second bonding sub-part. The display panel further includes a fourth power signal line located on the first side of the bonding portion. The fourth power signal line is electrically connected to the second power input signal line of the display surface through the side trace. The fourth power signal line includes a fourth power signal line part and a fourth power signal line part two. The fourth power signal line part one is located on the side of the third power signal line part one that is away from the first data signal line, and the fourth power signal line part two is located on the side of the third power signal line part two that is away from the first data signal line. The fourth power signal line part one and the fourth power signal line part two are connected to the first bonding sub-part.

17. The display panel according to claim 16, characterized in that, The third power signal line includes a positive power signal line, and the fourth power signal line includes a negative power signal line; or, the third power signal line includes a negative power signal line, and the fourth power signal line includes a positive power signal line.

18. The display panel according to claim 16, characterized in that, A portion of the second power signal line passes through the second bonding sub-part and a portion of the fourth power signal line passes through the first bonding sub-part, extending towards the center of the display panel to form a second power signal line extension portion. The second power signal line extension portion, the fourth power signal line extension portion, and the second power signal line extension portion are electrically connected. A second portion of the second power signal line passes through the second bonding sub-part and the fourth power signal line extension portion passes through the first bonding sub-part, extending towards the center of the display panel to form a second power signal line extension portion. The second power signal line extension portion, the fourth power signal line extension portion, and the second power signal line extension portion are electrically connected.

19. The display panel according to claim 16, characterized in that, A portion of the second power signal line extends through the second bonding sub-part to form a second power signal line extension portion, and a portion of the fourth power signal line extends through the first bonding sub-part to form a fourth power signal line extension portion. Two portions of the second power signal line extend through the second bonding sub-part to form second power signal line extension portions, and two portions of the fourth power signal line extend through the first bonding sub-part to form fourth power signal line extension portions. The second power signal line extension portion and the second power signal line extension portions are respectively electrically connected to the second power input signal line of the display surface via side traces along both sides of the first direction of the display panel. The fourth power signal line extension portion and the fourth power signal line extension portions are respectively electrically connected to the second power input signal line of the display surface via side traces along both sides of the first direction of the display panel; and / or, The first power signal line extension part and the first power signal line extension part are respectively electrically connected to the first power input signal line of the display surface through the side traces on both sides of the first direction of the display panel.

20. The display panel according to claim 15, characterized in that, The first power signal line, the second power signal line, the third power signal line, and the fourth power signal line are mesh structures.

21. The display panel according to claim 20, characterized in that, A line test block is provided in the area where the first data signal line, the first control signal line, the third power signal line, the fourth power signal line, the second data signal line, the second control signal line, the first power signal line, the second power signal line, and the third data signal line are distributed.

22. The display panel according to claim 21, characterized in that, The circuit test blocks are distributed near the edge of the display panel or near the bonding portion.

23. The display panel according to claim 21, characterized in that, The line test block also includes a redundant test block.

24. A display device, characterized in that, Includes the display panel as described in any one of claims 1-23.

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