A GaN HEMT device

By using a low-resistance N-type substrate and an epitaxial layer of P-type SiC material in GaN on SiC HEMT devices, grounding is achieved using the first through hole and the N-type connection region, which solves the problems of complex and high cost of traditional TSV through hole processes, and achieves process simplification, cost reduction and performance improvement.

CN119384002BActive Publication Date: 2025-05-16SUZHOU WATECH ELECTRONICS CO LTD
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Patent Information

Application Number
CN202411920163.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-25
Publication Date
2025-05-16
Estimated Expiration
2044-12-25

AI Technical Summary

Technical Problem

The grounding process of existing GaN on SiC HEMT devices is complex and costly, while the traditional TSV through-hole process has problems such as complex process and expensive price.

Method used

Using a low-resistance N-type substrate and an epitaxial layer of P-type SiC material, the device is grounded through the first through hole and the filled N-type connection region, and the TSV through hole process is eliminated and the etching process is simplified.

Benefits of technology

The process simplification and cost reduction are achieved, the area occupied by the device is reduced, and the electrical performance, reliability and stability of the device are improved.

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Abstract

The present application provides a GaN HEMT device, comprising: an N-type low-resistance substrate; a grounded back grounding metal formed on the back side of the substrate; an epitaxial layer of a P-type SiC material formed on the entire upper surface of the substrate, the upper surface of the epitaxial layer being divided into a first epitaxial layer region and a second epitaxial layer region; a first through hole formed downward from the first epitaxial layer region, and the bottom end of the first through hole enters into the substrate; an N-type connection region formed by filling the first through hole with an N-type material, and the bottom end of the N-type connection region enters into the substrate; a GaN HEMT front structure formed on the second epitaxial layer region; a back grounding metal, an N-type substrate and an N-type N-type connection region are connected, and connected to the GaN HEMT device. The present application provides a GaN HEMT device with a new structure.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a GaN HEMT device. Background Art

[0002] Gallium nitride high electron mobility transistor (GaN HEMT) is an emerging semiconductor device that has been widely used in many fields due to its excellent performance. Compared with traditional silicon-based devices, GaN HEMT has higher switching speed and higher breakdown voltage, which enables it to perform well in high-frequency, high-power and high-temperature environments.

[0003] GaN HEMT devices have applications in a variety of fields, including the following:

[0004] Wireless communication: GaN HEMT devices play an important role in 5G communication systems. Their high-frequency characteristics enable signals to be transmitted at higher frequencies, improving data transmission rates and network capacity.

[0005] Radar systems: Due to the high power and high efficiency of GaN HEMT devices, many modern radar systems choose to adopt this technology. It can effectively improve the detection range and accuracy of radar.

[0006] Power conversion: GaN HEMT devices are widely used in power management, especially in high-efficiency power converters and inverters. Their high switching speed and low on-resistance significantly improve power efficiency and help reduce energy consumption.

[0007] Electric vehicles and renewable energy: As electric vehicles and renewable energy become more popular, GaN HEMT devices are becoming core components of electric vehicle charging piles and inverters, improving overall system efficiency and performance.

[0008] In recent years, GaN HEMT device technology has developed rapidly. Many semiconductor companies and research institutions have increased their investment in the research and production of GaN materials. Compared with early technologies, today's GaN HEMT devices have made significant progress in cost, stability and production processes. With the maturity of manufacturing processes, GaN HEMT devices are increasingly widely used in the market, and prices are gradually falling, which has promoted their popularity in various fields.

[0009] ‌ Common substrates for GaN HEMT devices include SiC substrates and diamond substrates. GaN on SiC HEMT devices: specifically refers to GaN HEMT devices made on silicon carbide (SiC) substrates. GaN on SiC HEMT devices are usually high-resistance SiC substrates. SiC substrates, due to their high thermal conductivity, combined with the excellent transport properties of AlGaN / GaN heterojunctions, make GaN HEMT devices on SiC substrates show significant performance advantages in high-frequency, broadband, high-efficiency, and high-power applications.

[0010] The main reasons why GaN on SiC HEMT devices use high-resistance SiC substrates are as follows:

[0011] 1. Reduce leakage current: The high-resistance SiC substrate has a high resistivity, which can effectively reduce the leakage current of the device and improve the breakdown voltage and reliability of the device.

[0012] 2. Improve performance: High-resistance SiC substrate helps to reduce the charge exchange and scattering effects between the SiC substrate and the GaN layer, thereby improving the current collapse effect of the HEMT device and improving the overall performance of the device.

[0013] ‌3. Reduce thermal effects‌: High-resistance SiC substrate can reduce the self-heating effect of the device and help maintain the stability of the device at high power density.

[0014] ‌4. Matching‌: Although the high-resistance SiC substrate itself has a high resistivity, in specific applications, further processing or selection of a specific type of high-resistance SiC substrate can better match the requirements of the GaN layer and optimize device performance.

[0015] In summary, GaN on SiC HEMT devices use high-resistance SiC substrates to improve the electrical performance, reliability and stability of the devices.

[0016] Figure 1 Schematic diagram of a GaN on SiC HEMT device in the prior art. Figure 1 From the literature "A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs". Figure 1 As shown, the Substrate Via (i.e., substrate through hole 1-1) is opened from the back side of the device to the front side to achieve grounding.

[0017] While the existing GaN on SiC HEMT devices are developing, they are also facing problems such as process difficulties. Figure 2 Schematic diagram of another GaN on SiC HEMT device in the prior art. GaN on SiC HEMT devices have been used in RF applications due to their excellent heat dissipation performance and low SiC substrate defect rate, and RF applications have high requirements for the grounding resistance and inductance of the device. However, due to the wide bandgap material characteristics of SiC and GaN themselves, GaN on SiC HEMT devices cannot use the method of conducting electricity from the ground hole to the substrate, and can only use the following methods: Figure 2 The grounding is achieved by means of the TSV through hole 2 - 1 shown.

[0018] TSV (Through Silicon Via) is a vertical interconnection technology that penetrates silicon wafers or chips and is mainly used in three-dimensional packaging and three-dimensional integrated circuits.

[0019] TSV via 2-1 has excellent performance and its cross-sectional morphology is as follows Figure 2 As shown, the diameter of the TSV through hole 2-1 is greater than 30 μm, the depth of the TSV through hole 2-1 is greater than 60 μm, and the TSV through hole 2-1 is filled with gold. The existing TSV through hole 2 process has the problems of complex process and high price.

[0020] Figure 2 The TSV vias used for grounding in GaN on SiC HEMT devices have the following shortcomings:

[0021] 1. The etching process is complicated. Since SiC materials are difficult to etch using ordinary etching processes, ICP (Inductively Coupled Plasma) is required for etching. Therefore, a special etching barrier layer is required, and then a liftoff process (i.e., stripping process) is used to remove it. Figure 2 , ICP etching is performed after the liftoff process, and the etching barrier layer on the front side of the device needs to select a gold layer that is difficult to etch.

[0022] 2. The process cost is very high. After etching is completed, metal filling is required. A gold layer of several microns is required. The cost of the gold layer is high. Due to the selection of the etching stop layer on the front of the device, gold is also selected, which is very costly.

[0023] 3. The etched hole occupies a large area. Since the etching selectivity cannot be very high, the diameter of the device TSV through hole cannot be reduced. When it is above 30μm, the area occupied is larger than the active area.

[0024] Therefore, the structure of the traditional GaN on SiC HEMT device leads to a complicated grounding process, which is a technical problem that technical personnel in this field urgently need to solve.

[0025] The above information disclosed in the background section is only for enhancing understanding of the background of the present application and therefore it may contain information that does not form the prior art known to a person of ordinary skill in the art. Summary of the invention

[0026] The present application provides a GaN HEMT device, and provides a GaN HEMT device with a new structure.

[0027] The present application provides a GaN HEMT device, including:

[0028] N-type low-resistance substrate;

[0029] A grounded back side grounding metal formed on the back side of the substrate;

[0030] An epitaxial layer of a P-type SiC material is formed on the entire upper surface of the substrate, and the upper surface of the epitaxial layer is divided into an epitaxial layer first region and an epitaxial layer second region;

[0031] A first through hole is formed downward from the first region of the epitaxial layer, and the bottom end of the first through hole enters into the substrate;

[0032] An N-type connection region is formed by filling the first through hole with an N-type material, and a lower end of the N-type connection region enters into the substrate;

[0033] A GaN HEMT front structure formed on the second region of the epitaxial layer;

[0034] The back-side grounding metal, the N-type substrate and the N-type N-type connection region are connected and connected to the GaN HEMT device.

[0035] Due to the adoption of the above technical solution, this application has the following technical effects:

[0036] The advantages of the GaN HEMT device of this application are:

[0037] Simple process: TSV through-holes are eliminated, and TSV process is no longer needed. Instead, the first through-hole and the N-type connection area filled in the first through-hole and the low-resistance substrate need to be used. There is no need to etch deep holes, and only the epitaxial layer of the P-type SiC material needs to be etched, which only takes a few microns. Therefore, the etching process of the first through-hole is simple, the process steps are simple, and the process difficulty is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0039] Figure 1 A schematic diagram of a GaN on SiC HEMT device in the prior art;

[0040] Figure 2 is a schematic diagram of another GaN on SiC HEMT device in the prior art;

[0041] Figure 3 A schematic diagram of an implementation of the GaN HEMT device of the present application;

[0042] Figure 4 A schematic diagram of another implementation of the GaN HEMT device of the present application;

[0043] Figure 5 A schematic diagram of another implementation of the GaN HEMT device of the present application;

[0044] Figure 6 A schematic diagram of completing step S1 of the method for preparing a GaN HEMT device of the present application;

[0045] Figure 7 A schematic diagram of completing step S2 of the method for preparing a GaN HEMT device of the present application;

[0046] Figure 8 A schematic diagram of completing step S3 of the method for preparing a GaN HEMT device of the present application;

[0047] Fig. 9 A schematic diagram of completing step S4 of the method for preparing a GaN HEMT device of the present application;

[0048] Fig.10 A schematic diagram of completing step S5 of the method for preparing a GaN HEMT device of the present application;

[0049] Fig.11 A schematic diagram of completing step S6 of the method for preparing a GaN HEMT device of the present application;

[0050] Fig.12 A schematic diagram of completing step S7 of the method for preparing a GaN HEMT device of the present application;

[0051] Fig.13 A schematic diagram of completing step S8 of the method for preparing a GaN HEMT device of the present application;

[0052] Fig.14 A simulation diagram of a conventional GaN HEMT device having a substrate through hole extending from the back side of the device to the front side;

[0053] Fig.15This is a simulation diagram of the GaN HEMT device of the present application.

[0054] Reference numerals:

[0055] In the background technology:

[0056] Substrate through hole 1-1, TSV through hole 2-1;

[0057] In this application:

[0058] Substrate 10, electric field cutoff layer 11, electric field bearing layer 12, N-type connection region 20, first connection region 21,

[0059] AlN layer 22, AlN layer base 220, GaN buffer layer 23, GaN buffer layer base 230,

[0060] GaN layer 24, GaN layer base 240, AlGaN layer 25, AlGaN layer base 250,

[0061] Gate metal 26, SiN layer 27, SiN layer base 270, source 28-1, drain 28-2,

[0062] Metal silicide layer 29 , source metal 31 , back grounding metal 32 , and second connection region 33 . DETAILED DESCRIPTION

[0063] In order to make the technical solutions and advantages of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than an exhaustive list of all the embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict. Embodiment 1

[0064] like Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device of the present application includes:

[0065] N-type low-resistance substrate 10;

[0066] A grounded backside grounding metal 32 is formed on the back side of the substrate 10;

[0067] An epitaxial layer of a P-type SiC material is formed on the entire upper surface of the substrate, and the upper surface of the epitaxial layer is divided into an epitaxial layer first region and an epitaxial layer second region;

[0068] A first through hole is formed by etching downward from the first region of the epitaxial layer, and the bottom end of the first through hole enters into the substrate 10;

[0069] An N-type connection region 20 is formed by filling the first through hole with an N-type material, and the lower end of the N-type connection region 20 enters into the substrate 10;

[0070] A GaN HEMT front structure formed on the second region of the epitaxial layer;

[0071] The back grounding metal 32 , the N-type substrate 10 and the N-type connection region 20 are connected to connect the zero potential to the inside of the GaN HEMT device, and connect the zero potential to the position of the upper surface of the N-type connection region 20 .

[0072] The GaN HEMT device of the present application has an epitaxial layer of P-type SIC material formed on the substrate 10, which is a necessary structure of the GaN HEMT device. The upper surface of the epitaxial layer is divided into an epitaxial layer first region and an epitaxial layer second region, and the GaN HEMT front structure is formed on the epitaxial layer first region.

[0073] The first through hole is formed by etching downward from the second region of the epitaxial layer, and the bottom end of the first through hole enters into the substrate 10. That is, the starting point of the etching for forming the first through hole is the second region of the epitaxial layer, and the end point is to enter into the substrate 10. The etching for forming the first through hole only needs to penetrate the thickness of the epitaxial layer of the SIC material and then enter deeper into the substrate 10. The thickness of the epitaxial layer is generally only a few microns, so the depth of the etching for forming the first through hole is very small.

[0074] The N-type connection region 20 is filled and formed in the first through hole, and the lower end of the N-type connection region 20 enters the substrate 10. Therefore, there is no interface resistance at the interface between the N-type substrate 10 and the N-type connection region 20. In this way, a low resistance connection among the back grounding metal 32, the N-type substrate 10 and the N-type connection region 20 is achieved.

[0075] The GaN HEMT front structure is formed on the second region of the epitaxial layer. The distance between the back grounding metal 32 and the upper surface of the GaN HEMT front structure is the total thickness of the GaN HEMT device of the present application. Therefore, the etching to form the first through hole is performed on the SIC material with greater etching difficulty, and the etching depth is relatively small, and it is also much smaller than the thickness of the GaN HEMT device of the present application. Therefore, the etching to form the first through hole does not need to adopt the TSV through hole process, but only needs to adopt the semi-through hole etching process to form it. The etching process is simple and the process implementation difficulty is relatively low.

[0076] The depth of the first through hole is small, and correspondingly, the diameter of the first through hole is also small, so that the area occupied by the first through hole is also small.

[0077] The back grounding metal 32 is grounded and the conductive carriers are electrons. The substrate adopts an N-type low-resistance substrate 10, that is, the majority carriers of the substrate 10 are electrons and the substrate 10 has more electrons. Since the back grounding metal 32 and the N-type low-resistance substrate 10 each have more electrons as conductive carriers, the connection between the N-type low-resistance substrate 10 and the back grounding metal 32 is better electrically connected and has lower resistance.

[0078] The N-type substrate 10 and the N-type connection region 20 are both N-type, and most carriers are electrons. In this way, by controlling the doping concentration of the N-type substrate 10 and the N-type connection region 20, the connection between the N-type substrate 10 and the N-type connection region 20 can have better electrical connection and lower resistance.

[0079] Thus, the back grounding metal 32, the N-type substrate 10 and the N-type connection area 20 are connected and the electrical connection is good, and the resistance is low. Since the back grounding metal 32 is grounded. Through the connection of the back grounding metal 32, the N-type substrate 10 and the N-type connection area 20, the zero potential of the grounded back grounding metal 32 has been connected to the upper surface of the N-type connection area 20 (corresponding to the height of the upper surface of the second region of the epitaxial layer), that is, the zero potential has been connected to the inside of the GaN HEMT device of the present application and in the middle position in the thickness direction, providing conditions for the GaN HEMT device of the present application to be grounded from the front. In this way, the structural form of the GaN HEMT device of the present application realizes that the front grounding no longer needs to penetrate the entire thickness of the device, and thus no longer needs to adopt the TSV through-hole process.

[0080] The advantages of the GaN HEMT device of this application are:

[0081] (1) Simple process: TSV through hole is eliminated, and TSV process is no longer needed. Instead, a first through hole and an N-type connection area 20 filled in the first through hole and a low-resistance substrate are used. There is no need to etch deep holes, and only the epitaxial layer of the P-type SiC material needs to be etched, which only takes a few microns. Therefore, the etching process of the first through hole is simple, the process steps are simple, and the process difficulty is low.

[0082] (2) Small area of ​​the first through hole: The first through hole and the N-type connection area 20 filled in the first through hole are used, and the area occupied by the first through hole is small, and the device area utilization rate is high. Since the depth of the first through hole is only a few microns, the diameter of the first through hole only needs to be 1-5μm.

[0083] (3) Low material cost: Since the GaN HEMT device of the present application does not need to adopt the TSV process, it does not need to use gold as the metal material and TSV filling material, which greatly reduces the material cost. In addition, since the GaN HEMT device of the present application adopts a low-resistance substrate on a large scale, the cost is lower than that of a high-resistance substrate.

[0084] The present application adopts a low-resistance substrate 10 and a P-type SiC epitaxial layer to replace the high-resistance substrate in the prior art. The reason for the SiC epitaxial layer is that SiC has a high lattice matching degree with GaN, the growth of GaN has few defects, and SiC has a high thermal conductivity, which can better dissipate heat.

[0085] In this way, the combination of the low-resistance substrate 10 and the epitaxial layer of the P-type SiC material can also meet the requirements of improving the electrical performance, reliability and stability of the device.

[0086] If only a low-resistance substrate is used, leakage will occur, but the P-type epitaxial layer can prevent electron leakage.

[0087] As a first optional manner, the N-type connection region 20 is an N-type connection region 20 made of Si material, and the substrate 10 is a substrate made of Si material, that is, the substrate 10 and the N-type connection region 20 are both made of Si material.

[0088] As a second optional manner, the N-type connection region 20 is an N-type connection region 20 made of SIC material, and the substrate 10 is a substrate made of SIC material, that is, the substrate 10 and the N-type connection region 20 are both made of SIC material.

[0089] The substrate of SIC material has a high matching degree with GaN in GaN HEMT device. Therefore, the second optional method is better. The N-type connection region 20 of SIC material can be selected from either single crystal or polycrystalline. However, the growth conditions of polycrystalline SIC material are lower and the conductivity can be higher, so it is better. The substrate adopts a substrate of single crystal SIC material.

[0090] In practice, the depth of the lower end of the N-type connection region 20 entering the substrate 10 is in a range of greater than or equal to 0.1 μm, so as to ensure a good connection between the N-type connection region 20 and the substrate 10 .

[0091] In implementation, the thickness of the substrate 10 is in the range of 5 μm to 300 μm;

[0092] The resistivity of the substrate 10 is in the range of greater than or equal to 0.1 mohm. cm is less than or equal to 1000ohm cm.

[0093] The logic of selecting the resistivity of the substrate is that the device needs to conduct electricity to the back side through the substrate. According to current technology, the thickness of the back substrate is about 100μm. In order to lower the resistance to ground, 10mm 2 Device, according to 100ohm The resistivity of the substrate is 10 ...

[0094] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device of the present application also includes:

[0095] A metal silicide layer 29, wherein the metal silicide layer 29 is formed on the N-type connection region 20;

[0096] A first contact hole 30 is formed on the metal silicide layer 29; an upper end of the first contact hole 30 is connected to a source metal 31 of the GaN HEMT front structure;

[0097] The source metal 31 of the GaN HEMT front structure, the first contact hole 30, the metal silicide layer 29, the N-type connection region 20, the N-type substrate 10, and the grounded back grounding metal 32 are connected.

[0098] In this way, the source metal 31 of the GaN HEMT front structure is grounded from the front of the GaN HEMT device of the present application through the first contact hole 30, the metal silicide layer 29, the N-type connection region 20, the N-type substrate 10, and the grounded back grounding metal 32. That is, the source of the GaN HEMT device of the present application is grounded through the front grounding structure.

[0099] The first contact hole 30 is formed by using a contact hole process, and the metal of the first contact hole 30 is tungsten. Therefore, the manufacturing process of the first contact hole 30 is simple and the cost is low.

[0100] Thus, the front side grounding structure of the GaN HEMT device of the present application includes:

[0101] The source metal 31 , the first contact hole 30 , the metal silicide layer 29 , the N-type connection region 20 (filled in the first through hole), the N-type substrate 10 , the grounded back side grounding metal 32 , and the first connection region 21 .

[0102] The two-terminal structure adopted is that the metal silicide layer 29 and the structure below it (N-type connection area 20 (filled in the first through hole), N-type substrate 10, the grounded back grounding metal 32, and the first connection area 21) are one section, and the structure above the metal silicide layer 29 (source metal 31, the first contact hole 30) is one section. Both the first contact hole 30 and the first through hole are relatively short, far less than the overall thickness of the GaN HEMT device of the present application. Moreover, the first contact hole 30 adopts the contact hole process, and the first through hole adopts the semi-through hole process. That is, the preparation process of the front grounding structure of the GaN HEMT device of the present application does not require the TSV process, and the shortcomings brought by the TSV process are not present in the present application.

[0103] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device of the present application also includes:

[0104] A P-type connection region is formed in the epitaxial layer from the first region of the epitaxial layer downward, the P-type connection region is connected to the outer peripheral surface of the N-type connection region 20; and the metal silicide layer 29 is formed on the N-type connection region 20 and the P-type connection region;

[0105] The metal silicide layer 29 is connected to the N-type connection region 20 and the P-type connection region respectively.

[0106] In this way, the back grounding metal 32, the N-type substrate 10, the N-type connection region 20, and the metal silicide layer 29 are connected; and the P-type epitaxial layer, the P-type connection region, and the metal silicide layer 29 are connected.

[0107] The zero potential of the grounded back grounding metal 32 is connected to the metal silicide layer 29 through the back grounding metal 32, the N-type substrate 10, the N-type connection area 20, and the metal silicide layer 29. The P-type epitaxial layer is connected to the zero potential through the metal silicide layer 29, the P-type connection area, and the P-type epitaxial layer.

[0108] About the structure of epitaxial layer:

[0109] As a first optional manner, the epitaxial layer includes:

[0110] A P-type electric field stop layer 11 is formed on the substrate 10 .

[0111] As a second optional method, in implementation, Figure 3 , Figure 4 , Figure 5 As shown, the epitaxial layer includes:

[0112] A P-type electric field stop layer 11 is formed on the substrate 10;

[0113] The P-type electric field bearing layer 12 is formed on the electric field stopping layer 11 .

[0114] It is a better implementation method to set a P-type electric field stop layer 11 and a P-type electric field pressure-bearing layer 12 at the same time. In this way, the various parameters of the P-type electric field pressure-bearing layer 12 with a lower doping concentration are used to meet the requirements of the withstand voltage of the GaN HEMT device, and the various parameters of the P-type electric field stop layer 11 with a higher doping concentration are used to meet the requirements of the electric field cutoff of the GaN HEMT device. Therefore, the withstand voltage of the GaN HEMT device of the present application can meet the requirements, and the electric field can also be cut off in the electric field stop layer 11, and the thickness of the entire GaN HEMT device is kept small.

[0115] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the GaN HEMT device also includes:

[0116] A P-type first connection region 21 is formed downward from the upper surface of the epitaxial layer and connected to the outer peripheral surface of the N-type connection region 20, and the first connection region 21 occupies a part of the epitaxial layer in the lateral direction;

[0117] The metal silicide layer 29 is also formed on the first connection region 21 , and the metal silicide layer 29 connects the first connection region 21 and the N-type connection region 20 , respectively.

[0118] The epitaxial layer of the P-type SiC material, the P-type first connection region 21, and the metal silicide layer 29 are connected and have good electrical connection. Since the zero potential has been connected to the metal silicide layer 29, the epitaxial layer is connected to the zero potential.

[0119] In implementation, such as Figure 3 , Figure 4 , Figure 5 As shown, the P-type connection region includes a P-type first connection region 21, wherein the first connection region 21:

[0120] In the vertical direction, the first connection area 21 is formed downward from the upper surface of the electric field bearing layer 12, and the lower surface of the first connection area 21 is higher than the lower surface of the electric field bearing layer 12;

[0121] In the lateral direction, the first connection region 21 is connected to the outer peripheral surface of the N-type connection region 20 and occupies a part of the electric field bearing layer 12;

[0122] The doping concentration of the first connection region 21 is greater than the doping concentration of the electric field bearing layer 12;

[0123] The metal silicide layer 29 is also formed on the first connection region 21 , and the metal silicide layer 29 connects the first connection region 21 and the N-type connection region 20 , respectively.

[0124] The doping concentration of the P-type first connection region 21 is greater than the doping concentration of the P-type electric field bearing layer 12. In this way, the P-type electric field bearing layer 12, the P-type first connection region 21, and the metal silicide layer 29 that has been connected to zero potential are electrically connected, thereby achieving the connection of the P-type electric field bearing layer 12 to zero potential.

[0125] The metal silicide layer 29 is respectively connected to the first connection area 21 and the N-type connection area 20. The zero potential of the grounded back grounding metal 32 is connected to the metal silicide layer 29 through the back grounding metal 32, the N-type substrate 10, the N-type N-type connection area 20, and the metal silicide layer 29. The P-type electric field bearing layer 12, the P-type first connection area 21, and the metal silicide layer 29 that has been connected to the zero potential are electrically connected, so that the P-type electric field bearing layer 12 is connected to the zero potential.

[0126] The first region of the epitaxial layer corresponds to the first region of the electric field bearing layer, and the second region of the epitaxial layer corresponds to the second region of the electric field bearing layer.

[0127] As an alternative, Figure 4 As shown, the first connection region 21 is located below the first region of the electric field bearing layer, and is partially located below the second region of the electric field bearing layer, that is, the first connection region 21 extends to below the GaN HEMT front structure in the lateral direction.

[0128] Since the doping concentration of the first connection region 21 is greater than the doping concentration of the electric field bearing layer 12 , the electric field generated by the GaN HEMT front structure is rapidly reduced at the position of the first connection region 21 , thereby balancing the electric field.

[0129] As another alternative, Figure 5 As shown, the P-type connection region further includes a P-type second connection region 33:

[0130] In the vertical direction, the second connection region 33 is connected below the first connection region 21, and the bottom end of the N-type connection region 20 enters into the electric field stop layer 11 or the bottom end of the N-type connection region 20 is connected to the upper surface of the substrate 10;

[0131] In the lateral direction, the second connection region 33 is formed on the outer peripheral surface of the N-type connection region 20;

[0132] The doping concentration of the second connection region 33 is greater than the doping concentration of the electric field stop layer 11 .

[0133] Since the doping concentration of the second connection area 33 is greater than that of the electric field stop layer 11, and the doping concentration of the first connection area 21 is greater than that of the electric field bearing layer 12, the connection between the P-type electric field stop layer 11, the second connection area 33, the first connection area 21, and the metal silicide layer 29 is better, and the connection between the N-type electric field bearing layer 12, the second connection area 33, the first connection area 21, and the metal silicide layer 29 is better.

[0134] The epitaxial layer of the P-type SiC material, the P-type second connection region 33 , and the metal silicide layer 29 are connected and have good electrical connection, so as to better connect the epitaxial layer to zero potential.

[0135] The reason why the first connection region 21 and the second connection region 33 are formed into two structures by two processes is that, due to the limitation of the implantation process, the depth of the first connection region 21 cannot be too deep, and the first connection region 21 cannot directly enter the electric field stop layer 11. Therefore, the second connection region 33 is formed by ion implantation on the side wall of the through hole.

[0136] The higher the doping concentration of the first connection region 21 and the second connection region 33, the better. In actual preparation, the doping concentration of the first connection region 21 and the second connection region 33 is limited by the ion implantation process.

[0137] In the implementation, the doping concentration of the first connection region 21 is in the range of greater than or equal to 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the first connection region 21 is at least 2 orders of magnitude higher than the doping concentration of the electric field bearing layer 12;

[0138] The doping concentration of the second connection region 33 is in the range of 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the second connection region 33 is at least 2 orders of magnitude higher than the doping concentration of the electric field stop layer 11.

[0139] Specifically, Figure 3 , Figure 4 ,and Figure 5 As shown, the GaN HEMT front structure includes:

[0140] An AlN layer 22 is formed on the second region of the electric field bearing layer;

[0141] A GaN buffer layer 23 formed on the AlN layer 22;

[0142] A GaN layer 24 formed on the GaN buffer layer 23;

[0143] An AlGaN layer 25 formed on the GaN layer 24;

[0144] A SiN layer 27 formed on the AlGaN layer 25;

[0145] A gate metal 26 is formed on the SiN layer 27 and connected to the AlGaN layer 25 through a contact hole passing through the SiN layer 27;

[0146] The source electrode 28 - 1 and the drain electrode 28 - 2 respectively penetrate through the SiN layer 27 and the AlGaN layer 25 and enter the GaN layer 24 , and are respectively connected to two ends of the GaN layer 24 ;

[0147] The source metal 31 is connected to the source 28 - 1 .

[0148] Among them, AlN, aluminum nitride; GaN, gallium nitride; AlGaN, aluminum gallium nitride; SiN, silicon nitride.

[0149] AlGaN / GaN forms a heterojunction, and the two-dimensional electron gas (2DEG) generated by the heterojunction is the basis for the operation of all GaN HEMT devices. The AlGaN layer 25 and the GaN layer 24 form a heterojunction, and the two-dimensional electron gas 2DEG generated by the heterojunction is controlled to be turned on and off by the gate metal 26.

[0150] Fig.14 FIG. 4 is a simulation diagram of a conventional GaN HEMT device having a substrate through hole opened from the back side of the device to the front side. Fig.15 This is a simulation diagram of the GaN HEMT device of the present application.

[0151] Fig.14 The conventional GaN HEMT devices and Fig.15 The performance comparison of the GaN HEMT device of this application is as follows:

[0152]

[0153] It can be seen from the table that, under similar performance conditions, the breakdown voltage BV of the GaN HEMT device of the present application is higher.

[0154] The preparation process of the GaN HEMT device of the present application comprises the following steps:

[0155] Step S1: Figure 6As shown, a back grounding metal 32 is formed on the back of an N-type low-resistance substrate 10, and an epitaxial layer of a P-type SIC material is formed from the upper surface of the substrate 10. The epitaxial layers are sequentially a P-type electric field stop layer 11 and an electric field bearing layer 12 from bottom to top;

[0156] Step S2: Figure 7 As shown, a P-type first connection region base is formed by implantation, a first through hole is formed by etching downward from the upper surface of the first connection region base, and an N-type polycrystalline SIC is filled in the first through hole to form an N-type N-type connection region 20; at this time, a first connection region 21 is formed;

[0157] Step S3: Figure 8 As shown, an AlN layer foundation 220, a GaN buffer layer foundation 230, a GaN layer foundation 240, an AlGaN layer foundation 250, and a SiN layer foundation 270 are sequentially formed from bottom to top above the electric field bearing layer 12, the N-type connection region 20, and the first connection region 21;

[0158] Step S4: Fig. 9 As shown, etching is performed downward from the upper surface of the SiN layer base 270 to expose the first connection region 21 and the N-type connection region 20;

[0159] Step S5: Fig.10 As shown, a metal silicide layer 29 is formed on the first connection region 21 and the N-type connection region 20;

[0160] Step S6: Fig.11 As shown, a gate metal 26 is formed on a SiN layer foundation 270;

[0161] Step S7: Fig.12 As shown, a first contact hole 30 is formed on the metal silicide layer 29 to form a source 28-1 and a drain 28-2; thus, an AlN layer 22, a GaN buffer layer 23, a GaN layer 24, an AlGaN layer 25, and a SiN layer 27 are formed;

[0162] Step S8: Fig.13 As shown, source metal 31 and drain metal are formed.

[0163] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0164] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0165] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0166] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0167] Although the preferred embodiments of the present application have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0168] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A GaN HEMT device, characterized in that: include: N-type low-resistance substrate (10); A grounded back side grounding metal (32) formed on the back side of the substrate (10); An epitaxial layer of a P-type SiC material is formed on the substrate, wherein the upper surface of the epitaxial layer is divided into an epitaxial layer first region and an epitaxial layer second region; A first through hole is formed downward from the first region of the epitaxial layer, and the bottom end of the first through hole enters into the substrate (10); An N-type connection region (20) is formed by filling the first through hole with an N-type material, and the lower end of the N-type connection region (20) enters into the substrate (10); A GaN HEMT front structure formed on the second region of the epitaxial layer; Wherein, the back-side grounding metal (32), the N-type substrate (10) and the N-type connection region (20) are connected and connected to the GaN HEMT device; The zero potential of the grounded back grounding metal (32) is connected to the upper surface of the N-type connection area (20) through the back grounding metal (32), the N-type substrate (10) and the N-type connection area (20), so that the zero potential is connected to the inside of the GaN HEMT device and in the middle of the thickness direction.

2. The GaN HEMT device according to claim 1, characterized in that: Also includes: A metal silicide layer (29), the metal silicide layer (29) being formed on the N-type connection region (20); A first contact hole (30) is formed on the metal silicide layer (29); the upper end of the first contact hole (30) is connected to the source metal (31) of the GaN HEMT front structure; Wherein, the source metal (31) of the GaN HEMT front structure, the first contact hole (30), and the metal silicide layer (29) are connected.

3. The GaN HEMT device according to claim 2, characterized in that: Also includes: A P-type connection region is formed downward from the first region of the epitaxial layer in the epitaxial layer, the P-type connection region is connected to the outer peripheral surface of the N-type connection region (20); and the metal silicide layer (29) is also formed on the P-type connection region; Wherein, the metal silicide layer (29) is respectively connected to the N-type N-type connection region (20) and the P-type connection region.

4. The GaN HEMT device according to claim 3, characterized in that: The epitaxial layer comprises: A P-type electric field stop layer (11) is formed on the substrate (10).

5. The GaN HEMT device according to claim 4, characterized in that: The epitaxial layer further comprises: A P-type electric field bearing layer (12) is formed on the electric field cutoff layer (11).

6. The GaN HEMT device according to claim 5, characterized in that: The P-type connection region comprises a P-type first connection region (21); the first connection region (21): In the vertical direction, the first connection area (21) is formed downward from the upper surface of the electric field pressure bearing layer (12), and the lower surface of the first connection area (21) is higher than the lower surface of the electric field pressure bearing layer (12); In the lateral direction, the first connection region (21) is connected to the outer peripheral surface of the N-type connection region (20) and occupies a part of the electric field pressure bearing layer (12); The doping concentration of the first connection region (21) is greater than the doping concentration of the electric field bearing layer (12); Wherein, the metal silicide layer (29) is also formed on the first connection region (21).

7. The GaN HEMT device according to claim 6, characterized in that: The first region of the epitaxial layer corresponds to the first region of the electric field bearing layer, and the second region of the epitaxial layer corresponds to the second region of the electric field bearing layer; The first connection area (21) is located below the first region of the electric field bearing layer, and is partially located below the second region of the electric field bearing layer.

8. The GaN HEMT device according to claim 6, characterized in that: The P-type connection region further includes a P-type second connection region (33): In the vertical direction, the second connection region (33) is connected below the first connection region (21), and the bottom end of the N-type connection region (20) enters into the electric field stop layer (11) or the bottom end of the N-type connection region (20) is connected to the upper surface of the substrate (10); In the lateral direction, the second connection region (33) is formed on the outer peripheral surface of the N-type connection region (20); The doping concentration of the second connection region (33) is greater than the doping concentration of the electric field stop layer (11).

9. The GaN HEMT device according to claim 1, characterized in that: The N-type connection region (20) is an N-type connection region (20) made of Si material, and the substrate (10) is a substrate made of Si material; Alternatively, the N-type connection region (20) is an N-type connection region (20) made of a SIC material, and the substrate (10) is a substrate made of a SIC material.

10. The GaN HEMT device according to any one of claims 1 to 9, characterized in that: The resistivity of the substrate (10) has a value range of greater than or equal to 0.1 mohm. cm is less than or equal to 1000ohm cm; The thickness of the substrate (10) has a value range of greater than or equal to 5 μm and less than or equal to 300 μm.

11. The GaN HEMT device according to claim 8, wherein the doping concentration of the first connection region (21) is in a range of greater than or equal to 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the first connection region (21) is at least 2 orders of magnitude higher than the doping concentration of the electric field bearing layer (12); The doping concentration of the second connection region (33) is in the range of greater than or equal to 1×10 17 cm -3 Less than or equal to 1×10 22 cm -3 , and the doping concentration of the second connection region (33) is at least 2 orders of magnitude higher than the doping concentration of the electric field stop layer (11).

12. The GaN HEMT device according to any one of claims 1 to 9, characterized in that: The depth of the lower end of the N-type connection region (20) entering the substrate (10) has a value range of greater than or equal to 0.1 μm.

Citation Information

Patent Citations

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