Heterojunction solar cell with stacked intrinsic amorphous silicon structure and method of manufacturing the same
By introducing a stacked intrinsic amorphous silicon structure and oxygen passivation into heterojunction silicon solar cells, the problems of silicon substrate interface passivation and hydrogen content control were solved, thereby improving the open-circuit voltage and conversion efficiency of the cells.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI JIAOTONG UNIV
- Filing Date
- 2024-10-21
- Publication Date
- 2026-06-19
AI Technical Summary
Existing technologies cannot effectively passivate the silicon substrate interface of heterojunction silicon solar cells and control the hydrogen content in hydrogenated amorphous silicon, leading to a degradation in cell performance.
A stacked intrinsic amorphous silicon structure is adopted. By introducing oxygen elements at the silicon substrate interface for passivation and designing different hydrogen content variations in different film layers, Si-O-Si bonds are formed to enhance the passivation effect. Combined with phosphorus-doped and boron-doped layers, a pyramid-shaped structure is formed to improve light transmittance and carrier mobility.
The open-circuit voltage and conversion efficiency of heterojunction solar cells were improved by 2-10mV and 0.05-0.3%, respectively.
Smart Images
Figure CN119384046B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a technology in the field of solar photovoltaic cells, specifically a heterojunction solar cell with a stacked intrinsic amorphous silicon structure and its preparation method. Background Technology
[0002] Passivation of defect states on silicon wafer surfaces is a crucial issue in heterogeneous crystalline silicon solar cells. Due to the complexity of interfacial carrier recombination mechanisms and sensitivity to certain elements, hydrogen passivation alone is insufficient to achieve satisfactory results. This patent introduces oxygen passivation on top of hydrogen passivation, which helps form Si-O-Si bonds at the silicon substrate interface, enhancing the overall passivation effect of different elements. Furthermore, a stacked structure design is employed for the intrinsic hydrogenated amorphous silicon, with different hydrogen contents in different layers. This ensures effective hydrogen passivation while preventing excessive hydrogen content within the amorphous silicon layers from causing performance degradation. Summary of the Invention
[0003] This invention addresses the shortcomings of existing technologies in passivating the surface of heterojunction silicon substrates and controlling the hydrogen content in hydrogenated amorphous silicon. It proposes a heterojunction solar cell with a stacked intrinsic amorphous silicon structure and its fabrication method, which broadens the process window of crystalline silicon heterojunction solar cells, improves the transmittance of the front surface, and balances the passivation of the interfaces on both sides of the cell with high carrier mobility, thereby achieving higher cell conversion efficiency.
[0004] This invention is achieved through the following technical solution:
[0005] This invention relates to a heterojunction solar cell with a stacked intrinsic amorphous silicon structure, comprising: an n-type crystalline silicon substrate, three layers of intrinsic layer with decreasing H concentration, a phosphorus-doped layer, a first conductive layer and a front electrode sequentially disposed on the front surface of the substrate, and three layers of intrinsic layer with decreasing H concentration, a boron-doped layer, a second conductive layer and a back electrode sequentially disposed on the back surface of the substrate, wherein the intrinsic layer, the phosphorus-doped layer, the boron-doped layer and the conductive layer are all pyramidal structures.
[0006] The intrinsic layer includes: a first amorphous silicon intrinsic layer or a first amorphous silicon oxide intrinsic layer, a second and a third amorphous silicon intrinsic layer, sequentially disposed on the front surface of the substrate, and a fourth amorphous silicon intrinsic layer or a second amorphous silicon oxide intrinsic layer, a fifth and a sixth amorphous silicon intrinsic layer, sequentially disposed on the back surface of the substrate, wherein: the thickness of the first to third intrinsic layers is 1-3 nm, and the total thickness is within 6 nm; the thickness of the fourth to sixth intrinsic layers is 1-4 nm, and the total thickness is within 8 nm.
[0007] The phosphorus-doped layer is a phosphorus-doped amorphous silicon layer or a phosphorus-doped nano-silicon oxide layer.
[0008] The boron-doped layer is a boron-doped amorphous silicon layer or a boron-doped nano-silicon layer.
[0009] The phosphorus-doped amorphous silicon a-Si:H(n) + The phosphorus atom concentration in the thin film is 1E+19cm. -3 ~1E+20cm -3 Boron-doped amorphous silicon a-Si:H(p + The boron atom concentration in the thin film is 5E+18cm. -3 ~8E+19cm -3 Phosphorus-doped nano-silicon oxide nc-SiO x :H(n + The phosphorus atom concentration in the sample is 1E+19cm. -3 ~1E+20cm -3 Boron-doped nano-silicon nc-Si:H(p + The boron atom concentration in the sample is 5E+18cm⁻¹ -3 ~1E+20cm -3 .
[0010] This invention relates to a method for fabricating the above-mentioned heterojunction solar cell, comprising:
[0011] Step 1: Select an n-type single crystal silicon wafer with a resistivity between 0.5-1Ω·cm and a thickness of 100-160μm as the substrate, and use NaOH solution to remove the wire cutting damage layer on the substrate surface.
[0012] Step 2: The substrate obtained in Step 1 is etched with KOH alkaline solution to form a pyramid structure for light trapping on the front and back surfaces of the substrate.
[0013] Step 3: Place the silicon wafer obtained in Step 2 into a PECVD equipment, introduce SiH4 and H2 gas sources, and deposit three layers of intrinsic amorphous silicon with decreasing hydrogen content on the front surface of the silicon wafer. Specifically, first, introduce high flow rate H2 to prepare the first amorphous silicon intrinsic layer a-Si:H(i-1), then reduce the H2 flow rate to prepare the second amorphous silicon intrinsic layer a-Si:H(i-2), and finally further reduce the H2 flow rate to prepare the third amorphous silicon intrinsic layer a-Si:H(i-3).
[0014] The deposition process involves a pressure of 50-80 Pa and a substrate temperature of 150-400 °C.
[0015] The thickness of each of the three intrinsic layers is 1-3 nm, and the total thickness is controlled within 6 nm.
[0016] Preferably, when a high-flow-rate H2 gas source is introduced simultaneously with CO2, an intrinsic layer of amorphous silicon oxide, a-SiO, can be prepared. x :H(i-1).
[0017] The gas flow rate ratio during the preparation of the first amorphous silicon intrinsic layer a-Si:H(i-1) is SiH4:H2 = 0.005-0.01, the gas flow rate ratio during the preparation of the second amorphous silicon intrinsic layer a-Si:H(i-2) is SiH4:H2 = 0.015-0.02, and the gas flow rate ratio during the preparation of the third amorphous silicon intrinsic layer a-Si:H(i-3) is SiH4:H2 = 0.025-0.04. Among them, the gas flow rate ratios of a-Si:H(i-4) and a-Si:H(i-1) are the same, the gas flow rate ratios of a-Si:H(i-5) and a-Si:H(i-2) are the same, and the gas flow rate ratios of a-Si:H(i-6) and a-Si:H(i-3) are the same.
[0018] The first amorphous silicon oxide intrinsic layer a-SiO x The gas flow ratio during H(i-1) preparation is SiH4:H2 = 0.005-0.01, CO2:H2 = 0.01-0.15, where a-SiO x :H(i-4) and a-SiO x The gas flow rate ratio of H(i-1) is the same.
[0019] Step 4: Place the silicon wafer obtained in Step 3 into a PECVD system, introduce SiH4, PH3, and H2 gases, and deposit phosphorus-doped amorphous silicon a-Si:H(n) on the front surface of the silicon wafer. + )film;
[0020] Preferably, CO2 is introduced during the amorphous silicon deposition process, and the PECVD process conditions are optimized to obtain phosphorus-doped nano-silicon oxide (nc-SiO). x :H(n + )film.
[0021] The phosphorus-doped amorphous silicon a-Si:H(n) + The film thickness is 5-15 nm, phosphorus-doped nano-silicon oxide (nc-SiO) x :H(n + The thickness of the thin film is 5-20 nm.
[0022] Step 5: Place the silicon wafer obtained in Step 4 into the PECVD equipment, introduce SiH4 and H2 gas sources, and deposit three layers of intrinsic amorphous silicon with decreasing hydrogen content on the back surface of the silicon wafer. Specifically: first, introduce high flow rate H2 to prepare the fourth amorphous silicon intrinsic layer a-Si:H (i-4), then reduce the H2 flow rate to prepare the fifth amorphous silicon intrinsic layer a-Si:H (i-5), and finally further reduce the H2 flow rate to prepare the sixth amorphous silicon intrinsic layer a-Si:H (i-6).
[0023] The thickness of each of the three intrinsic layers is 1-4 nm, and the total thickness is controlled within 8 nm.
[0024] Preferably, when a high-flow-rate H2 gas source is introduced simultaneously with CO2, an intrinsic layer of amorphous silicon oxide, a-SiO, can be prepared. x :H(i-4).
[0025] Step 6: Place the silicon wafer obtained in Step 5 into a PECVD system, introduce SiH4, BH3, and H2 gases, and deposit boron-doped amorphous silicon a-Si:H(p) on the back surface of the silicon wafer. + )film;
[0026] Preferably, the PECVD process conditions are optimized during deposition to obtain boron-doped nano-silicon nc-Si:H(p + ).
[0027] The boron-doped amorphous silicon a-Si:H(p + The film thickness is 5-10 nm, boron-doped nano-silicon nc-Si:H(p + The thickness of the material is 5-25nm.
[0028] Step 7: Deposit conductive layers on the front and back surfaces of the silicon wafer obtained in Step 6 using magnetron sputtering.
[0029] Step 8: Using screen printing, grid-shaped Ag, Au, or Cu electrodes are formed on the front and back surfaces of the silicon wafer obtained in step 7, respectively.
[0030] The phosphorus-doped nano-silicon oxide nc-SiO x :H(n + Thin films and boron-doped nanosilicon nc-Si:H(p + It is formed by low-temperature annealing under nitrogen protection, with an annealing temperature of 500-850℃ and an annealing time of 1-2 hours.
[0031] Technical effect
[0032] This invention utilizes a stacked intrinsic amorphous silicon structure with varying hydrogen content, simultaneously incorporating hydrogen and oxygen elements into the intrinsic amorphous silicon layer to achieve mixed passivation of the two elements, thereby improving the interface passivation performance of heterojunction solar cells. Compared to conventional single-layer intrinsic amorphous silicon structures, the introduction of the novel stacked intrinsic amorphous silicon structure can achieve improvements of 2-10mV in open-circuit voltage and 0.05-0.3% in conversion efficiency. Attached Figure Description
[0033] Figure 1 This is a schematic diagram of a heterojunction solar cell structure prepared by laminating intrinsic amorphous silicon thin films, doped silicon thin films, transparent conductive layers, and metal grid electrodes on a double-textured silicon wafer.
[0034] In the figure: 1 is an n-type single-crystal silicon substrate, 2 is a first amorphous silicon intrinsic layer a-Si:H(i-1) with high H concentration or a first amorphous silicon oxide intrinsic layer a-SiO with high H concentration. x :H(i-1), 3 is the second amorphous silicon intrinsic layer a-Si:H(i-2), 4 is the third amorphous silicon intrinsic layer a-Si:H(i-3), 5 is phosphorus-doped amorphous silicon a-Si:H(n) + Or phosphorus-doped nano-silicon oxide nc-SiO x :H(n + ), 6 and 11 are both transparent conductive layers, and 7 is a high-concentration H-based fourth amorphous silicon intrinsic layer a-Si:H(i-4) or a high-concentration H-based fourth amorphous silicon oxide intrinsic layer a-SiO x :H(i-4), 8 is the fifth amorphous silicon intrinsic layer a-Si:H(i-5) with medium concentration of H, 9 is the sixth amorphous silicon intrinsic layer a-Si:H(i-6) with low concentration of H, and 10 is boron-doped amorphous silicon a-Si:H(p + Or boron-doped nano-silicon nc-Si:H(p + 12 and 13 are all metal grid line electrodes. Detailed Implementation
[0035] like Figure 1 As shown, this embodiment relates to a heterojunction solar cell with a stacked intrinsic amorphous silicon structure, comprising: an n-type monocrystalline silicon substrate 1, and the front surface of the substrate consisting of, from the inside out: a first amorphous intrinsic silicon oxide layer a-SiO with a high concentration of H. x 1. H(i-1) thin film; 2. Second amorphous silicon intrinsic layer a-Si:H(i-2) thin film with medium concentration of H; 3. Third amorphous silicon intrinsic layer a-Si:H(i-3) thin film with low concentration of H; 4. Phosphorus-doped nano-silicon oxide nc-SiO x :H(n + Thin film 5, transparent conductive layer 6, and front electrode 12; the back surface of the substrate, from the inside to the outside, consists of: a fourth amorphous silicon oxide intrinsic layer a-SiO with high H concentration. x 7. H(i-4) thin film; 8. a-Si:H(i-5) thin film, fifth amorphous silicon intrinsic layer with medium H concentration; 9. a-Si:H(i-6) thin film, sixth amorphous silicon intrinsic layer with low H concentration; 10. boron-doped nano-silicon nc-Si:H(p) film. + Thin film 10, transparent conductive layer 11 and back electrode 13.
[0036] This embodiment relates to a method for fabricating the above-mentioned heterojunction solar cell, including the following steps:
[0037] Step 1: Select a monocrystalline silicon substrate. An industrial-grade n-type monocrystalline silicon substrate with a crystal orientation of (100), a resistivity of approximately 1 Ω·cm, and a thickness of 150 μm was used as the battery substrate 1.
[0038] Step 2: Double-sided texturing of silicon wafers. The n-type single-crystal silicon substrate obtained in Step 1 is texturized on both sides using KOH solution, followed by standard RCA cleaning to obtain the pre-treated silicon wafer.
[0039] Step 3: Deposition of a multilayer intrinsic amorphous silicon on the front surface. The textured silicon wafer is placed in a PECVD apparatus, and SiH4, H2, and CO2 gases are introduced, with a gas flow ratio of SiH4:H2 = 0.008 and CO2:H2 = 0.1, resulting in a first intrinsic amorphous silicon oxide layer a-SiO with a thickness of 1.5 nm. x Next, the O2 gas source is turned off and the H2 flow rate is reduced to a gas flow rate ratio of SiH4:H2 = 0.018, resulting in a second amorphous silicon intrinsic layer a-Si:H(i-2) with a thickness of 1 nm. Finally, the H2 flow rate is further reduced to a gas flow rate ratio of SiH4:H2 = 0.03, resulting in a third amorphous silicon intrinsic layer a-Si:H(i-3) with a thickness of 2 nm. Three layers of intrinsic amorphous silicon with successively decreasing hydrogen content are deposited on the front surface of the silicon wafer.
[0040] Step 4: Deposit a phosphorus-doped nano-silicon oxide thin film on the front surface. High-purity H2 is introduced into the PECVD system as a dilution gas. The process pressure is set to 70 Pa, the substrate temperature to 250 °C, and the gas flow ratio is set to SiH4:H2 = 0.025 to control the nc-SiO2 content. x The growth rate of H was 0.8 nm / min, and PH3 gas was introduced. After the process was completed, the sample was annealed at low temperature under nitrogen protection at 650℃ for 1 h to obtain nc-SiO. x :H thin film, wherein the phosphorus atom concentration and thickness of the film are 8E+19cm. -3 And 15nm.
[0041] Step 5: Deposit a stacked intrinsic amorphous silicon layer on the back surface. Place the silicon wafer into a PECVD apparatus and introduce SiH4, H2, and CO2 gases, with a gas flow ratio of SiH4:H2 = 0.008 and CO2:H2 = 0.1, to obtain a fourth intrinsic amorphous silicon oxide layer a-SiO with a thickness of 1.5 nm. xNext, the O2 gas source is turned off and the H2 flow rate is reduced to a gas flow rate ratio of SiH4:H2 = 0.018, resulting in a fifth amorphous silicon intrinsic layer a-Si:H(i-5) with a thickness of 2 nm. Finally, the H2 flow rate is further reduced to a gas flow rate ratio of SiH4:H2 = 0.03, resulting in a sixth amorphous silicon intrinsic layer a-Si:H(i-6) with a thickness of 3 nm. Three layers of intrinsic amorphous silicon with progressively decreasing hydrogen content are deposited on the back surface of the silicon wafer.
[0042] Step Six: Deposit boron-doped nanocrystalline silicon thin film on the back surface. In the PECVD system, the process pressure was set to 65 Pa, the substrate temperature to 300 °C, the gas flow ratio to SiH4:H2 = 0.025, the growth rate of nc-Si:H was controlled at 0.6 nm / min, and BH3 gas was introduced. After the process was completed, the sample was annealed at low temperature under nitrogen protection at 600 °C for 1.5 h to obtain the nc-Si:H thin film, in which the boron atom concentration and thickness were 2E+19 cm. -3 And 20nm.
[0043] Step 7: Deposit transparent conductive layers on both sides of the silicon wafer. A transparent conductive ITO layer is deposited on the front and back surfaces of the silicon wafer using a DC magnetron sputtering method. The chamber temperature of the magnetron sputtering apparatus is preferably 320℃, and the chamber pressure is preferably 85Pa. The thickness of the ITO layer on the front surface is preferably 80nm, and the thickness of the ITO layer on the back surface is preferably 95nm.
[0044] Step 8: Fabricate metal electrodes on both sides of the silicon wafer. For silicon wafers with a deposited transparent conductive layer, Ag electrodes are printed on the front and back surfaces of the wafer using screen printing.
[0045] Through specific practical experiments, under normal temperature and dust-free workshop conditions, when using PECVD equipment to deposit high-hydrogen-concentration amorphous silicon oxide, medium-hydrogen-concentration amorphous silicon, and low-hydrogen-concentration amorphous silicon stacked thin films on the front and back surfaces of the cell, the open-circuit voltage is increased by 2-10mV compared with conventional a-Si:H thin films of the same thickness, and the corresponding heterojunction solar cell conversion efficiency can be increased by 0.05-0.3%.
[0046] Compared with existing technologies, this method uses multilayer intrinsic amorphous silicon with varying hydrogen content to control the thickness and hydrogen content of each intrinsic amorphous silicon layer, ensuring that the total thickness and total hydrogen content are within a reasonable range. At the same time, oxygen is introduced into the intrinsic amorphous silicon layer to fully passivate the dangling bonds on the silicon substrate surface, thereby improving the open-circuit voltage of the battery.
[0047] The above-described specific implementations can be partially adjusted by those skilled in the art in different ways without departing from the principles and purpose of the present invention. The scope of protection of the present invention is defined by the claims and is not limited to the above-described specific implementations. All implementation schemes within the scope of the claims are bound by the present invention.
Claims
1. A heterojunction solar cell with a stacked intrinsic amorphous silicon structure, characterized in that, include: An n-type crystalline silicon substrate, three layers of intrinsic layer with decreasing H concentration, a phosphorus-doped layer, a first conductive layer and a front electrode are sequentially disposed on the front surface of the substrate, and three layers of intrinsic layer with decreasing H concentration, a boron-doped layer, a second conductive layer and a back electrode are sequentially disposed on the back surface of the substrate, wherein: the intrinsic layer, the phosphorus-doped layer, the boron-doped layer and the conductive layer are all pyramid-shaped structures. The phosphorus-doped layer is a phosphorus-doped amorphous silicon layer or a phosphorus-doped nano-silicon oxide layer; The boron-doped layer is a boron-doped amorphous silicon layer or a boron-doped nano-silicon layer; The phosphorus-doped amorphous silicon a-Si:H(n) + The phosphorus atom concentration in the thin film is 1E+19cm. -3 ~1E+20cm -3 Boron-doped amorphous silicon a-Si:H(p + The boron atom concentration in the thin film is 5E+18cm. -3 ~8E+19cm -3 Phosphorus-doped nano-silicon oxide nc-SiO x :H(n + The phosphorus atom concentration in the sample is 1E+19cm. -3 ~1E+20cm -3 Boron-doped nano-silicon nc-Si:H(p + The boron atom concentration in the sample is 5E+18cm⁻¹ -3 ~1E+20cm -3 .
2. The heterojunction solar cell with a stacked intrinsic amorphous silicon structure according to claim 1, characterized in that, The intrinsic layer includes: a first amorphous silicon intrinsic layer or a first amorphous silicon oxide intrinsic layer, a second and a third amorphous silicon intrinsic layer, sequentially disposed on the front surface of the substrate, and a fourth amorphous silicon intrinsic layer or a second amorphous silicon oxide intrinsic layer, a fifth and a sixth amorphous silicon intrinsic layer, sequentially disposed on the back surface of the substrate.
3. A method for preparing a heterojunction solar cell according to claim 1 or 2, characterized in that, include: Step 1: Select an n-type single crystal silicon wafer with a resistivity between 0.5-1Ω·cm and a thickness of 100-160μm as the substrate, and use NaOH solution to remove the wire cutting damage layer on the substrate surface. Step 2: The substrate obtained in Step 1 is etched with KOH alkaline solution to form a pyramid structure for light trapping on the front and back surfaces of the substrate. Step 3: Place the silicon wafer obtained in Step 2 into a PECVD equipment, introduce SiH4 and H2 gas sources, and deposit three layers of intrinsic amorphous silicon with decreasing hydrogen content on the front surface of the silicon wafer. Specifically, first, introduce high flow rate H2 to prepare the first amorphous silicon intrinsic layer a-Si:H(i-1), then reduce the H2 flow rate to prepare the second amorphous silicon intrinsic layer a-Si:H(i-2), and finally further reduce the H2 flow rate to prepare the third amorphous silicon intrinsic layer a-Si:H(i-3). Step 4: Place the silicon wafer obtained in Step 3 into a PECVD system, introduce SiH4, PH3, and H2 gases, and deposit phosphorus-doped amorphous silicon a-Si:H(n) on the front surface of the silicon wafer. + )film; Step 5: Place the silicon wafer obtained in Step 4 into the PECVD equipment, introduce SiH4 and H2 gas sources, and deposit three layers of intrinsic amorphous silicon with decreasing hydrogen content on the back surface of the silicon wafer. Specifically: first, introduce high flow rate H2 to prepare the fourth amorphous silicon intrinsic layer a-Si:H (i-4), then reduce the H2 flow rate to prepare the fifth amorphous silicon intrinsic layer a-Si:H (i-5), and finally further reduce the H2 flow rate to prepare the sixth amorphous silicon intrinsic layer a-Si:H (i-6). Step 6: Place the silicon wafer obtained in Step 5 into a PECVD system, introduce SiH4, BH3, and H2 gases, and deposit boron-doped amorphous silicon a-Si:H(p) on the back surface of the silicon wafer. + )film; Step 7: Deposit conductive layers on the front and back surfaces of the silicon wafer obtained in Step 6 using magnetron sputtering. Step 8: Using screen printing, grid-shaped Ag, Au, or Cu electrodes are formed on the front and back surfaces of the silicon wafer obtained in step 7, respectively.
4. The method according to claim 3, characterized in that, When a high-flow-rate H2 gas source is introduced to prepare a-Si:H(i-1), CO2 is introduced simultaneously, an intrinsic layer of amorphous silicon oxide, a-SiO, can be prepared. x :H(i-1).
5. The method according to claim 3, characterized in that, The gas flow rate ratio during the preparation of the first amorphous silicon intrinsic layer a-Si:H(i-1) is SiH4:H2=0.005-0.01, the gas flow rate ratio during the preparation of the second amorphous silicon intrinsic layer a-Si:H(i-2) is SiH4:H2=0.015-0.02, and the gas flow rate ratio during the preparation of the third amorphous silicon intrinsic layer a-Si:H(i-3) is SiH4:H2=0.025-0.
04. Among them, the gas flow rate ratios of a-Si:H(i-4) and a-Si:H(i-1) are the same, the gas flow rate ratios of a-Si:H(i-5) and a-Si:H(i-2) are the same, and the gas flow rate ratios of a-Si:H(i-6) and a-Si:H(i-3) are the same. The first amorphous silicon oxide intrinsic layer a-SiO x The gas flow ratio during H(i-1) preparation is SiH4:H2 = 0.005-0.01, CO2:H2 = 0.01-0.15, where a-SiO x :H(i-4) and a-SiO x The gas flow rate ratio of H(i-1) is the same.
6. The method according to claim 3, characterized in that, in CO2 was introduced during the amorphous silicon deposition process, and the PECVD process conditions were optimized to obtain phosphorus-doped nano-silicon oxide (nc-SiO). x :H(n + )film.
7. The method according to claim 3, characterized in that, When a high-flow-rate H2 gas source is introduced to prepare a-Si:H(i-4), CO2 is introduced simultaneously, thus enabling the preparation of an intrinsic layer of amorphous silicon oxide, a-SiO. x :H(i-4).
8. The method according to claim 3, characterized in that, The phosphorus-doped nano-silicon oxide nc-SiO x :H(n + Thin films and boron-doped nanosilicon nc-Si:H(p + It is formed by low-temperature annealing under nitrogen protection, with an annealing temperature of 500-850℃ and an annealing time of 1-2 hours.