Back-illuminated image sensor preparation method and back-illuminated image sensor

Abstract

The present disclosure relates to a method for preparing a back-illuminated image sensor and a back-illuminated image sensor, and relates to the field of integrated circuit technology, including: providing a substrate including a first top surface, the first top surface of the substrate including a first isolation stack and a first photosensitive stack alternately arranged along a first direction parallel to the first top surface of the substrate; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate; in the process of forming a plurality of second photosensitive stacks directly above the plurality of first photosensitive stacks, a plurality of second isolation stacks are formed directly above the plurality of first isolation stacks; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; after forming a plurality of grid stacks directly above the plurality of second isolation stacks, a filter is formed between the grid stacks adjacent to each other along the first direction. This embodiment increases the electron concentration of the photosensitive region and improves the photosensitivity of the BSI image sensor.

Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a method for preparing a back-illuminated image sensor and the back-illuminated image sensor. Background Art

[0002] Backside illumination (BSI) image sensor is a type of image sensor. In low light conditions, BSI image sensor has better performance than front-illuminated image sensor.

[0003] However, the photosensitivity of BSI image sensors manufactured by existing BSI image sensor preparation methods cannot meet actual needs. Therefore, how to improve the photosensitivity of BSI image sensors has become one of the technical problems that urgently need to be solved. Summary of the invention

[0004] Based on this, it is necessary to provide a back-illuminated image sensor preparation method and a back-illuminated image sensor to address the technical problem of insufficient photosensitivity of BSI image sensors in the prior art.

[0005] In a first aspect, the present disclosure provides a method for preparing a back-illuminated image sensor, comprising:

[0006] Providing a substrate including a first top surface, wherein the first top surface of the substrate includes a first isolation stack and a first photosensitive stack arranged alternately along a first direction parallel to the first top surface of the substrate; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate;

[0007] In the process of forming a plurality of second photosensitive stacks directly above a plurality of first photosensitive stacks, a plurality of second isolation stacks are formed directly above a plurality of first isolation stacks; the cross section of the second photosensitive stack parallel to the second direction is inverted trapezoidal; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements;

[0008] After forming a plurality of grid stacks directly above the plurality of second isolation stacks, a filter is formed between the grid stacks adjacent to each other along the first direction.

[0009] In the method for preparing a back-illuminated image sensor in the above-mentioned embodiment, a first isolation stack and a first photosensitive stack are formed on the first top surface of the substrate, which are alternately arranged along a first direction parallel to the first top surface of the substrate; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate; the first isolation stack is used to perform photoelectric isolation between the first photosensitive stacks adjacent to each other along the first direction; then, in the process of forming a plurality of second photosensitive stacks directly above the plurality of first photosensitive stacks, a plurality of second isolation stacks are formed directly above the plurality of first isolation stacks; the cross-section of the second photosensitive stack parallel to the second direction is inverted trapezoidal; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack; the unidirectional conductivity of the PN junction is used to improve the photoelectric isolation performance of the second isolation stack to the second photosensitive stack adjacent to each other along the first direction; after forming a plurality of grid stacks directly above the plurality of second isolation stacks, a filter is formed between the grid stacks adjacent to each other along the first direction. The use of PN junctions can effectively improve the isolation effect of the isolation wall, avoid signal crosstalk between the photosensitive stacks separated by the isolation wall, and thus improve the display quality of the BSI image sensor. In addition, in the embodiment of the present disclosure, a selective epitaxial deposition process can be combined with an ion diffusion process to obtain a first photosensitive stack and a second photosensitive stack. Compared with the conventional technology of using an ion implantation process to obtain a photosensitive stack including multiple layers of different pentavalent element films, the embodiment of the present disclosure can effectively avoid unnecessary damage to the substrate caused by high-energy ions in the ion implantation process, and further improve the performance and reliability of the back-illuminated image sensor.

[0010] In one embodiment, forming a first isolation stack and a first photosensitive stack alternately arranged along a first direction includes:

[0011] forming an isolation layer and a first semiconductor layer alternately arranged along a first direction on the first top surface;

[0012] After forming a second initial semiconductor layer on the top surface of the first semiconductor layer, a dielectric layer is formed between the second initial semiconductor layers adjacent to each other along the first direction, wherein the top surface of the dielectric layer is flush with the top surface of the second initial semiconductor layer; the isolation layer and the dielectric layer stacked along the second direction are used to form a first isolation stack;

[0013] The top of the second initial semiconductor layer is doped using a first solid phase diffusion process to obtain a third semiconductor layer, and the remaining second initial semiconductor layer is used to constitute a second semiconductor layer; the first semiconductor layer, the second semiconductor layer and the third semiconductor layer stacked in sequence along the second direction are used to constitute a first photosensitive stack.

[0014] In one embodiment, a plurality of second photosensitive stacks and a plurality of second isolation stacks are formed, including: growing a fourth initial semiconductor layer on the top surface of the third semiconductor layer by a selective epitaxial deposition process; the cross section of the fourth initial semiconductor layer parallel to the second direction is an inverted trapezoid; a first groove is included between the fourth initial semiconductor layers adjacent to each other along the first direction; after growing an isolation film layer on the inner surface of the first groove, a dielectric layer is filled in the first groove; the dielectric layer and the isolation film layer are used to constitute the second isolation stack; the top of the fourth initial semiconductor layer is doped by a second solid phase diffusion process to obtain a fifth semiconductor layer, and the remaining fourth initial semiconductor layer is used to constitute a fourth semiconductor layer; the fourth semiconductor layer and the fifth semiconductor layer stacked in sequence along the second direction are used to constitute the second photosensitive stack.

[0015] In one embodiment, the isolation layer includes B element; the first semiconductor layer includes P element; the dielectric layer includes a silicon oxide layer, the second semiconductor layer includes a SiAs layer; and the third semiconductor layer includes P element.

[0016] In one embodiment, the fourth semiconductor layer includes a SiSb layer; the fifth semiconductor layer includes a P element; the isolation film layer includes a B element; and the dielectric layer includes a silicon oxide layer.

[0017] In one embodiment, the substrate includes a plurality of first isolation structures extending into the substrate through a first top surface of the substrate and arranged at intervals along a first direction; the plurality of first isolation structures are located directly below the plurality of first isolation stacks.

[0018] In one embodiment, a top surface of the first isolation structure is located within a bottom surface of the first isolation stack.

[0019] In a second aspect, the present disclosure provides a back-illuminated image sensor, which is prepared by the back-illuminated image sensor preparation method in any of the aforementioned embodiments, wherein the back-illuminated image sensor includes a substrate, and a first isolation stack and a first photosensitive stack located on the substrate and alternately arranged along a first direction parallel to a first top surface of the substrate; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate; a plurality of first photosensitive stacks include a plurality of second photosensitive stacks directly above the plurality of first isolation stacks, and a plurality of second isolation stacks include directly above the plurality of first isolation stacks; the cross-section of the second photosensitive stack parallel to the second direction is in an inverted trapezoidal shape; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements; a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack; a plurality of grid stacks are included directly above the plurality of second isolation stacks, and filters are included between the grid stacks adjacent along the first direction.

[0020] In one embodiment, the first isolation stack includes an isolation layer and a dielectric layer stacked along the second direction; the first photosensitive stack includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer stacked in sequence along the second direction; the first semiconductor layer includes the P element; the second semiconductor layer includes a SiAs layer; and the third semiconductor layer includes the P element.

[0021] In one embodiment, the second photosensitive stack includes a fourth semiconductor layer and a fifth semiconductor layer stacked in sequence along a second direction; the second isolation stack includes a dielectric layer and an isolation film layer located on the outer wall and bottom surface of the dielectric layer; wherein the cross-section of the second photosensitive stack parallel to the second direction is an inverted trapezoid; the fourth semiconductor layer includes a SiSb layer; and the fifth semiconductor layer includes a P element.

[0022] The method for preparing a back-illuminated image sensor and the back-illuminated image sensor in the embodiments of the present disclosure include the following unexpected technical effects:

[0023] The first isolation stack is used to perform photoelectric isolation between the first photosensitive stacks adjacent to each other in the first direction; and a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack, so as to utilize the unidirectional conductivity of the PN junction to improve the photoelectric isolation performance of the second isolation stack to the second photosensitive stack adjacent to each other in the first direction; the PN junction can effectively improve the isolation effect of the isolation wall, and avoid signal crosstalk between the photosensitive stacks separated by the isolation wall, thereby improving the display quality of the BSI image sensor. In addition, in the embodiment of the present disclosure, a selective epitaxial deposition process can be combined with an ion diffusion process to obtain the first photosensitive stack and the second photosensitive stack. Compared with the conventional technology of using an ion implantation process to obtain a photosensitive stack including multiple layers of different pentavalent element films, the embodiment of the present disclosure can effectively avoid unnecessary damage to the substrate caused by high-energy ions in the ion implantation process, and further improve the performance and reliability of the back-illuminated image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 is a schematic flow chart of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0026] Figure 2 Schematic diagram of the longitudinal cross-sectional structure of a substrate provided in step S10 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0027] Figure 3 Schematic diagram of the longitudinal cross-section structure of a semiconductor structure obtained after forming an isolation layer on a substrate in step S10 of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0028] Figure 4 1 is a schematic diagram of a longitudinal cross-sectional structure of a semiconductor structure obtained after forming a plurality of first semiconductor layers spaced apart along a first direction on a substrate in step S10 of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0029] Figure 5 1 is a schematic diagram of a longitudinal cross-sectional structure of a semiconductor structure obtained after forming a plurality of dielectric layers spaced apart along a first direction on a substrate in step S10 of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0030] Figure 6 Schematic diagram of the longitudinal cross-section structure of a semiconductor structure obtained after forming a first photosensitive stack in step S10 of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0031] Figure 7 It is a schematic diagram of the longitudinal cross-section structure of the semiconductor structure obtained after the second isolation stack is formed in step S20 in the method for preparing a back-illuminated image sensor provided in one embodiment;

[0032] Figure 8 It is a schematic diagram of the longitudinal cross-section structure of the semiconductor structure obtained after the second photosensitive stack is formed in step S20 in the method for preparing a back-illuminated image sensor provided in one embodiment;

[0033] Fig. 9 It is a schematic diagram of the longitudinal cross-section structure of the semiconductor structure obtained after the filter is formed in step S30 in the method for preparing a back-illuminated image sensor provided in one embodiment;

[0034] Description of reference numerals:

[0035] 10. substrate; 10a. first top surface; 11. first isolation stack; 12. first photosensitive stack; 13. second photosensitive stack; 14. second isolation stack; 22. grid stack; 1111. first initial isolation layer; 111. isolation layer; 121. first semiconductor layer; 1221. second initial semiconductor layer; 112. dielectric layer; 122. second semiconductor layer; 123. third semiconductor layer; 1311. fourth initial semiconductor layer; 131. fourth semiconductor layer; 132. fifth semiconductor layer; 141. isolation film layer; 142. dielectric layer; 101. first isolation structure; 102. etch stop layer; 103. interlayer dielectric layer; 60. filter; 221. first grid layer; 222. second grid layer; 223. third grid layer. DETAILED DESCRIPTION

[0036] In order to facilitate understanding of the present disclosure, the present disclosure will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present disclosure more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0038] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0039] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0040] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0041] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic representations of ideal embodiments (and intermediate structures) of the present disclosure, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the present disclosure should not be limited to the particular shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the present disclosure.

[0042] In the embodiment of the present disclosure, when the flatness of the substrate surface is ignored, the direction parallel to the substrate surface is, for example, the first direction, and the direction away from the substrate surface (the thickness direction of the substrate) is, for example, the second direction. In the embodiment of the present disclosure, the first direction may be the X-axis direction, and the second direction may be the Z-axis direction.

[0043] Please refer to Figure 1 In some embodiments, a method for preparing a back-illuminated image sensor is provided, comprising:

[0044] Step S10: providing a substrate including a first top surface, wherein the first top surface of the substrate includes a first isolation stack and a first photosensitive stack arranged alternately along a first direction parallel to the first top surface of the substrate; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate;

[0045] Step S20: in the process of forming a plurality of second photosensitive stacks directly above the plurality of first isolation stacks, a plurality of second isolation stacks are formed directly above the plurality of first isolation stacks; the cross section of the second photosensitive stack parallel to the second direction is inverted trapezoidal; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements;

[0046] Step S30: after forming a plurality of grid stacks directly above the plurality of second isolation stacks, forming a filter between the grid stacks adjacent to each other along the first direction.

[0047] Please refer to Figure 2 In some embodiments, the provided substrate 10 includes a plurality of first isolation structures 101 arranged in a first direction, such as an ox direction. The material of the first isolation structure 101 may include, but is not limited to, silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (Si2N2O), etc., or a combination thereof.

[0048] As an example, the first isolation structure 101 can be used to isolate electrons and light energy. The shape of the longitudinal section (the section parallel to the zox plane) of the first isolation structure 101 may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or may also be a combination of a regular trapezoid, an inverted trapezoid, a rectangle, etc. The present disclosure does not impose any specific restrictions on the shape, material, and size of the first isolation structure 101, as long as it can isolate electrons, light energy, and doped ions. In addition, this embodiment does not impose any specific restrictions on the spacing between adjacent first isolation structures 101, and it can be set according to actual needs.

[0049] As an example, the substrate 10 can be made of semiconductor material, insulating material, conductor material or any combination thereof. The substrate 10 can be a single-layer structure or a multi-layer structure. For example, the substrate 10 can be a silicon (Si) substrate, a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate or other III / V semiconductor substrates or II / VI semiconductor substrates. Alternatively, for example, the substrate 10 can be a layered substrate including Si / SiGe, Si / SiC, silicon on insulator (SOI) or silicon germanium on insulator. Therefore, the type of substrate should not limit the scope of protection of the present disclosure.

[0050] Please continue to refer to Figure 2 In some embodiments, a surface of the first isolation structure 101 facing away from the substrate 10 is covered with an etch stop layer 102 , and a side of the etch stop layer 102 facing away from the first isolation structure 101 includes an interlayer dielectric layer 103 .

[0051] For example, after forming the etch stop layer 102, metal is deposited to form a partial connection structure, and on this basis, an interlayer dielectric layer 103 is formed. When the etch stop layer 102 is multi-layer, other process problems and / or metal connection structure failure problems caused by cracks in a single layer can be avoided. The interlayer dielectric layer 103 can be a silicon oxide or other low-dielectric material layer. In addition, a metal interconnect structure can be formed on the interlayer dielectric layer 103 as a metal connection part of the device.

[0052] Of course, this embodiment only shows one of the methods, as long as the metal interconnection structure can be reasonably formed, and the thickness of the etch stop layer 102 and the interlayer dielectric layer 103 is not limited, and can be adjusted according to specific process requirements.

[0053] Please continue to refer to Figure 2 In some embodiments, after forming the first isolation structure 101, the etch stop layer 102, and the interlayer dielectric layer 103, the substrate 10 may be flipped over to form a first initial isolation layer 1111 in the substrate 10 on the side of the first isolation structure 101 away from the interlayer dielectric layer 103. For example, the first initial isolation layer 1111 may include a silicon oxide layer. The silicon oxide layer may be formed in the substrate 10 on the side of the first isolation structure 101 away from the interlayer dielectric layer 103 by an oxygen implantation isolation process.

[0054] For example, the thickness of the first initial isolation layer 1111 is 5 nanometers to 10 nanometers. For example, the thickness of the first initial isolation layer 1111 can be 5 nanometers, 7 nanometers, 9 nanometers, or 10 nanometers.

[0055] Please refer to Figure 2-Figure 3 In some embodiments, after forming the first initial isolation layer 1111, at least one of an etching process, a push-on process, and a chemical mechanical polishing process can be used to remove the portion of the substrate 10 located on the side of the first initial isolation layer 1111 away from the first isolation structure 101, exposing the top surface of the first initial isolation layer 1111, and obtaining the substrate 10 including the first top surface 10a, wherein the first initial isolation layer 1111 is located on the first top surface 10a of the substrate 10. The etching process may include, but is not limited to, a dry etching process and / or a wet etching process. The dry etching process may include, but is not limited to, one or more of RIE and ICP.

[0056] Please continue to refer to Figure 2-Figure 3In some embodiments, after the top surface of the first initial isolation layer 1111 is exposed, a self-aligned etching process may be used to etch the first initial isolation layer 1111 to obtain a plurality of isolation layers 111 spaced apart along a first direction, such as the ox direction, and the plurality of isolation layers 111 are located directly above the plurality of first isolation structures 101, and an isolation layer 111 covers the top surface of a first isolation structure 101. For example, the top surface of the first isolation structure 101 may be arranged to be within the bottom surface of the isolation layer 111 directly above it, so that the first isolation structure 101 and the isolation layer 111 together constitute an isolation wall, and the isolation wall is used to achieve photoelectric isolation.

[0057] Please refer to Figure 3-Figure 4 In some embodiments, a selective epitaxial deposition process may be used in step S10 to epitaxially grow a first semiconductor layer 121 on a first top surface 10a of a substrate 10 adjacent along a first direction, such as an ox direction, to obtain an isolation layer 111 and a first semiconductor layer 121 alternately arranged along the ox direction. The isolation layer 111 may include a boron (B) element. The first semiconductor layer 121 may include a SiP layer. A PN junction may be formed between the isolation layer 111 and the SiP layer, and the unidirectional conductivity of the PN junction may be used to further improve the photoelectric isolation performance of the isolation layer 111.

[0058] Please refer to Figure 4-Figure 5 In some embodiments, the first isolation stack 11 and the first photosensitive stack 12 alternately arranged along the first direction are formed in step S10, and the step also includes: a selective epitaxial deposition process can be used to form a second initial semiconductor layer 1221 on the top surface of the first semiconductor layer 121, and then a dielectric layer 112 is formed between the second initial semiconductor layers 1221 adjacent to each other along the first direction, and the top surface of the dielectric layer 112 is flush with the top surface of the second initial semiconductor layer 1221; the isolation layers 111 and the dielectric layers 112 stacked along the second direction are used to constitute the first isolation stack 11.

[0059] Please refer to Figure 5 In some embodiments, the dielectric layer 112 may include a silicon oxide layer, and a spin on glass coating (SOG) process may be used to form the dielectric layer 112 between the second initial semiconductor layers 1221 adjacent along the ox direction. For example, after the silicon oxide layer is filled in the gap between the second initial semiconductor layers 1221 adjacent along the ox direction, the top surface of the silicon oxide layer may be planarized to obtain the dielectric layer 112 whose top surface is flush with the top surface of the second initial semiconductor layer 1221.

[0060] Please refer to Figure 6In some embodiments, in step S10, a first solid-phase diffusion process can be used to dope the top of the second initial semiconductor layer 1221 to obtain a third semiconductor layer 123, and the remaining second initial semiconductor layer 1221 is used to constitute the second semiconductor layer 122; the first semiconductor layer 121, the second semiconductor layer 122 and the third semiconductor layer 123 stacked in sequence along the second direction are used to constitute the first photosensitive stack 12.

[0061] For example, please continue to refer to Figure 6 , the first semiconductor layer 121 includes the P element; the second semiconductor layer 122 includes the SiAs layer; and the third semiconductor layer 123 includes the P element. For example, a SiP material layer (not shown) may be formed on the top surface of the second initial semiconductor layer 1221, and then the SiP material layer may be treated by a first solid phase diffusion process so that the P element in the SiP material layer diffuses to the top of the second initial semiconductor layer 1221 to obtain the third semiconductor layer 123 including the P element, and the remaining second initial semiconductor layer 1221 is used to form the second semiconductor layer 122; and then the SiP material layer located on the top surface of the third semiconductor layer 123 is removed.

[0062] Please refer to Figure 7 In some embodiments, in step S20, a selective epitaxial deposition process can be used to grow a fourth initial semiconductor layer 1311 on the top surface of the third semiconductor layer 123; the cross-section of the fourth initial semiconductor layer 1311 parallel to the second direction, such as the oz direction, is in an inverted trapezoidal shape; a first groove (not shown) is included between the adjacent fourth initial semiconductor layers 1311 along the first direction, such as the ox direction; after the isolation film layer 141 is grown on the inner surface of the first groove, the dielectric layer 142 is filled in the first groove; the dielectric layer 142 and the isolation film layer 141 are used to jointly constitute the second isolation stack 14.

[0063] Please refer to Figure 8 In some embodiments, in step S20, a second solid-phase diffusion process can be used to dope the top of the fourth initial semiconductor layer 1311 to obtain the fifth semiconductor layer 132, and the remaining fourth initial semiconductor layer 1311 is used to constitute the fourth semiconductor layer 131; the fourth semiconductor layer 131 and the fifth semiconductor layer 132 stacked in sequence along the second direction are used to jointly constitute the second photosensitive stack 13.

[0064] For example, please continue to refer to Figure 8 The fourth semiconductor layer 131 includes a SiSb layer; the fifth semiconductor layer 132 includes a P element; the isolation film layer 141 includes a B element; and the dielectric layer 142 includes a silicon oxide layer. A PN junction can be formed between the isolation film layer 141 including the B element and the SiSb layer, and the unidirectional conductivity of the PN junction can be used to improve the photoelectric isolation performance of the second isolation stack 14.

[0065] Please refer to Fig. 9 In some embodiments, a deposition process may be used in step S30 to form a first grid material layer (not shown), a second grid material layer (not shown), and a third grid material layer (not shown) stacked in sequence along the oz direction, and then the third grid material layer, the second grid material layer, and the first grid material layer are etched to obtain a plurality of grid stacks 22 spaced apart along the ox direction, the remaining first grid material layer is used to constitute the first grid layer 221, the remaining second grid material layer is used to constitute the second grid layer 222, and the remaining third grid material layer is used to constitute the third grid layer 223; the first grid layer 221, the second grid layer 222, and the third grid layer 223 stacked in sequence along the oz direction are used to jointly constitute the grid stack 22; and the plurality of grid stacks 22 are located directly above the plurality of second isolation stacks 14.

[0066] For example, please continue to refer to Fig. 9 , the first grid layer 221 may include a Ta2O5 layer; the second grid layer 222 may include an Al layer; and the third grid layer 223 may include a TiN layer.

[0067] For example, please continue to refer to Fig. 9 In the process of etching the first grid material layer in step S30 , the first grid material layer with a preset thickness can be retained to avoid unnecessary etching damage to the fifth semiconductor layer 132 .

[0068] For example, please continue to refer to Fig. 9 The filter 60 includes but is not limited to a red filter, a yellow filter, a blue filter, etc., and the three filters are arranged adjacent to each other to form a pixel group. The red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves.

[0069] Please continue to refer to Figure 1-Figure 9 The unexpected technical effects that can be produced by the embodiments of the present disclosure include:

[0070] On the first top surface 10a of the substrate 10, a first isolation stack 11 and a first photosensitive stack 12 are formed, which are alternately arranged along a first direction parallel to the first top surface 10a, such as the ox direction; the first photosensitive stack 12 includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate 10, such as the oz direction; the first isolation stack 11 is used to perform photoelectric isolation between the first photosensitive stacks 12 adjacent to each other along the first direction; and then in the process of forming a plurality of second photosensitive stacks 13 directly above the plurality of first isolation stacks 11, a plurality of second photosensitive stacks 13 are formed directly above the plurality of first isolation stacks 11. The second photosensitive stack 13 is formed into a plurality of second isolation stacks 14; the cross section of the second photosensitive stack 13 parallel to the second direction is inverted trapezoidal; the second photosensitive stack 13 includes at least two sub-photosensitive layers alternately stacked along the second direction; a PN junction is formed between the second photosensitive stack 13 and the adjacent second isolation stack 14; the unidirectional conductivity of the PN junction is used to improve the photoelectric isolation performance of the second isolation stack 14 to the second photosensitive stack 13 adjacent to the first direction; after forming a plurality of grid stacks 22 directly above the plurality of second isolation stacks 14, a filter 60 is formed between the grid stacks 22 adjacent to the first direction. The use of the PN junction can effectively improve the isolation effect of the isolation wall, avoid signal crosstalk between the photosensitive stacks separated by the isolation wall, and thus improve the display quality of the BSI image sensor. Moreover, in the embodiment of the present disclosure, a selective epitaxial deposition process combined with an ion diffusion treatment process can be used to obtain a first photosensitive stack 12 and a second photosensitive stack 13. Compared with the conventional technology of using an ion implantation process to obtain a photosensitive stack comprising multiple layers of different pentavalent element film layers, the embodiment of the present disclosure can effectively avoid unnecessary damage to the substrate 10 caused by high-energy ions in the ion implantation process, thereby further improving the performance and reliability of the back-illuminated image sensor.

[0071] Please refer to Fig. 9In some embodiments, a back-illuminated image sensor is provided, which is prepared by the back-illuminated image sensor preparation method in any of the above embodiments. The back-illuminated image sensor includes a substrate 10, and a first isolation stack 11 and a first photosensitive stack 12 that are arranged alternately on the substrate 10 and along a first direction parallel to a first top surface 10a of the substrate 10, such as the ox direction; the first photosensitive stack 12 includes at least three layers of sub-photosensitive layers that are alternately stacked along a second direction away from the substrate 10, such as the oz direction; and multiple sub-photosensitive layers 11 and 12 are arranged alternately above the multiple first photosensitive stacks 12. The second photosensitive stack 13 includes multiple second isolation stacks 14 directly above the multiple first isolation stacks 11; the cross-section of the second photosensitive stack 13 parallel to the second direction is an inverted trapezoid; the second photosensitive stack 13 includes at least two sub-photosensitive layers alternately stacked along the second direction; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements; the second photosensitive stack 13 and the adjacent second isolation stack 14 are used to form a PN junction; the multiple second isolation stacks 14 include multiple grid stacks 22 directly above them, and filters 60 are included between the grid stacks 22 adjacent to each other along the first direction.

[0072] Please refer to Fig. 9 In some embodiments, the first isolation stack 11 includes an isolation layer 111 and a dielectric layer 112 stacked sequentially along a second direction, such as an oz direction; the first photosensitive stack 12 includes a first semiconductor layer 121, a second semiconductor layer 122 and a third semiconductor layer 123 stacked sequentially along the oz direction.

[0073] Please refer to Fig. 9 In some embodiments, the second photosensitive stack 13 includes a fourth semiconductor layer 131 and a fifth semiconductor layer 132 stacked in sequence along a second direction, such as the oz direction; the second isolation stack 14 includes a dielectric layer 142 and an isolation film layer 141 located on the outer wall and bottom surface of the dielectric layer 142; wherein the cross-section of the second photosensitive stack 13 parallel to the second direction is an inverted trapezoid.

[0074] For example, please continue to refer to Fig. 9 , the first semiconductor layer 121 includes the P element; the second semiconductor layer 122 includes the SiAs layer; and the third semiconductor layer 123 includes the P element. For example, a SiP material layer (not shown) may be formed on the top surface of the second initial semiconductor layer 1221, and then the SiP material layer may be treated by a first solid phase diffusion process so that the P element in the SiP material layer diffuses to the top of the second initial semiconductor layer 1221 to obtain the third semiconductor layer 123 including the P element, and the remaining second initial semiconductor layer 1221 is used to form the second semiconductor layer 122; and then the SiP material layer located on the top surface of the third semiconductor layer 123 is removed.

[0075] For example, please continue to refer to Fig. 9The fourth semiconductor layer 131 includes a SiSb layer; the fifth semiconductor layer 132 includes a P element; the isolation film layer 141 includes a B element; and the dielectric layer 142 includes a silicon oxide layer. A PN junction can be formed between the isolation film layer 141 including the B element and the SiSb layer, and the unidirectional conductivity of the PN junction can be used to improve the photoelectric isolation performance of the second isolation stack 14.

[0076] For example, please continue to refer to Fig. 9 The grid layer 22 includes a Ta2O5 layer, an Al layer and a TiN layer stacked in sequence along the oz direction.

[0077] Please continue to refer to Figure 6 and Figure 8 In the above-mentioned embodiment of the present disclosure, the third semiconductor layer 123 is obtained by a first solid-phase diffusion process, and the fifth semiconductor layer 132 is obtained by a second solid-phase diffusion process. Compared with the conventional technology of obtaining the third semiconductor layer 123 containing the P element and the fifth semiconductor layer 132 containing the P element by an ion implantation process, it can effectively avoid unnecessary damage to the substrate 10 caused by high-energy ions in the ion implantation process, thereby further improving the performance and reliability of the back-illuminated image sensor.

[0078] For example, please continue to refer to Fig. 9 , since the first semiconductor layer 121, the second semiconductor layer 122, the third semiconductor layer 123, the fourth semiconductor layer 131 and the fifth semiconductor layer 132 stacked in sequence along the second direction, for example, the oz direction, together constitute the photosensitive stack of the photodiode, the photosensitive stack doped with different pentavalent elements will generate a concentration gradient inside after light excitation, and the difference is used to optimize the transmission path of the photogenerated carriers, reduce the recombination rate in the diffusion process, and improve the quantum efficiency of the photodiode. In addition, since the atomic mass of the pentavalent element is higher than that of silicon, the mobility is low in epitaxial growth, resulting in uneven doping concentration in the single element doped layer, and growing pentavalent elements with different doping in multiple times can improve the uniformity of the doping concentration in the pixel area.

[0079] Furthermore, multiple epitaxial growths are used to prepare the photodiodes in the BSI image sensor, thus avoiding substrate damage introduced by the photodiode preparation method using high-energy ion implantation in the traditional process.

[0080] By forming an isolation stack arranged at intervals in the pixel area, the internal structure of the pixel area is improved, the mutual penetration of photogenerated carriers between adjacent pixel areas is blocked, the probability of light diffusion to adjacent pixels is reduced, and the adverse effects of light and / or charge crosstalk on imaging quality are suppressed.

[0081] The back-illuminated image sensor in the disclosed embodiment has the following unexpected technical effects:

[0082] The first isolation stack is used to perform photoelectric isolation between the first photosensitive stacks adjacent to each other in the first direction; and a PN junction is formed between the second photosensitive stack and the adjacent second isolation stack, so as to utilize the unidirectional conductivity of the PN junction to improve the photoelectric isolation performance of the second isolation stack to the second photosensitive stack adjacent to each other in the first direction; the PN junction can effectively improve the isolation effect of the isolation wall, and avoid signal crosstalk between the photosensitive stacks separated by the isolation wall, thereby improving the display quality of the BSI image sensor. In addition, in the embodiment of the present disclosure, a selective epitaxial deposition process can be combined with an ion diffusion process to obtain the first photosensitive stack and the second photosensitive stack. Compared with the conventional technology of using an ion implantation process to obtain a photosensitive stack including multiple layers of different pentavalent element films, the embodiment of the present disclosure can effectively avoid unnecessary damage to the substrate caused by high-energy ions in the ion implantation process, and further improve the performance and reliability of the back-illuminated image sensor.

[0083] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0084] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0085] The above-mentioned embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure.

Claims

1. A method for preparing a back-illuminated image sensor, characterized in that: include: Providing a substrate including a first top surface, wherein the first top surface includes a first isolation stack and a first photosensitive stack arranged alternately along a first direction parallel to the first top surface; the first photosensitive stack includes at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate; In the process of forming a plurality of second photosensitive stacks directly above a plurality of the first photosensitive stacks, a plurality of second isolation stacks are formed directly above a plurality of the first isolation stacks; the cross section of the second photosensitive stack parallel to the second direction is inverted trapezoidal; the second photosensitive stack comprises at least two sub-photosensitive layers alternately stacked along the second direction; the second photosensitive stack and the adjacent second isolation stack are used to form a PN junction; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements; After forming a plurality of grid stacks directly above a plurality of the second isolation stacks, a filter is formed between the grid stacks adjacent to each other along the first direction; Forming a first isolation stack and a first photosensitive stack alternately arranged along the first direction, comprising: forming an isolation layer and a first semiconductor layer alternately arranged along the first direction on the first top surface; After forming a second initial semiconductor layer on the top surface of the first semiconductor layer, a dielectric layer is formed between the second initial semiconductor layers adjacent to each other along the first direction, wherein the top surface of the dielectric layer is flush with the top surface of the second initial semiconductor layer; the isolation layer and the dielectric layer stacked along the second direction are used to form the first isolation stack; The top of the second initial semiconductor layer is doped using a first solid phase diffusion process to obtain a third semiconductor layer, and the remaining second initial semiconductor layer is used to constitute a second semiconductor layer; the first semiconductor layer, the second semiconductor layer and the third semiconductor layer stacked in sequence along the second direction are used to constitute the first photosensitive stack.

2. The method for preparing a back-illuminated image sensor according to claim 1, characterized in that: The plurality of second photosensitive stacks and the plurality of second isolation stacks are formed, comprising: A fourth initial semiconductor layer is grown on the top surface of the third semiconductor layer by a selective epitaxial deposition process; a cross section of the fourth initial semiconductor layer parallel to the second direction is in an inverted trapezoidal shape; and a first groove is included between the fourth initial semiconductor layers adjacent to each other along the first direction; After growing an isolation film layer on the inner surface of the first groove, a dielectric layer is filled in the first groove; the dielectric layer and the isolation film layer are used to jointly constitute the second isolation stack; The top of the fourth initial semiconductor layer is doped using a second solid phase diffusion process to obtain a fifth semiconductor layer, and the remaining fourth initial semiconductor layer is used to constitute a fourth semiconductor layer; the fourth semiconductor layer and the fifth semiconductor layer stacked in sequence along the second direction are used to constitute the second photosensitive stack.

3. The method for preparing a back-illuminated image sensor according to claim 1, characterized in that: The isolation layer includes B element; the first semiconductor layer includes P element; The dielectric layer comprises a silicon oxide layer, and the second semiconductor layer comprises a SiAs layer; The third semiconductor layer includes a P element.

4. The method for preparing a back-illuminated image sensor according to claim 2, characterized in that: The fourth semiconductor layer includes a SiSb layer; the fifth semiconductor layer includes a P element; The isolation film layer includes B element; the dielectric layer includes a silicon oxide layer.

5. The method for preparing a back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: The substrate includes a plurality of first isolation structures extending into the substrate through the first top surface of the substrate and arranged at intervals along the first direction; The plurality of first isolation structures are located directly below the plurality of first isolation stacks.

6. The method for preparing a back-illuminated image sensor according to claim 5, characterized in that: The top surface of the first isolation structure is located within the bottom surface of the first isolation stack.

7. A back-illuminated image sensor, characterized in that: The back-illuminated image sensor is prepared by the method for preparing a back-illuminated image sensor according to any one of claims 1 to 6; the back-illuminated image sensor comprises a substrate, and a first isolation stack and a first photosensitive stack located on the substrate and arranged alternately along a first direction parallel to a first top surface of the substrate; the first photosensitive stack comprises at least three sub-photosensitive layers alternately stacked along a second direction away from the substrate; A plurality of second photosensitive stacks are included directly above the plurality of first photosensitive stacks, and a plurality of second isolation stacks are included directly above the plurality of first isolation stacks; the cross section of the second photosensitive stack parallel to the second direction is in an inverted trapezoid; the second photosensitive stack includes at least two sub-photosensitive layers alternately stacked along the second direction; the second photosensitive stack and the adjacent second isolation stack are used to form a PN junction; the sub-photosensitive layers adjacent along the second direction contain different pentavalent elements; A plurality of grid stacks are located directly above the plurality of second isolation stacks, and filters are located between the grid stacks adjacent to each other along the first direction.

8. The back-illuminated image sensor according to claim 7, characterized in that: The first isolation stack includes an isolation layer and a dielectric layer stacked along the second direction; The first photosensitive stack includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer sequentially stacked along the second direction; The first semiconductor layer includes a P element; The second semiconductor layer includes a SiAs layer; The third semiconductor layer includes a P element.

9. The back-illuminated image sensor according to claim 7, characterized in that: The second photosensitive stack includes a fourth semiconductor layer and a fifth semiconductor layer sequentially stacked along the second direction; The second isolation stack includes a dielectric layer and an isolation film layer located on the outer sidewall and bottom surface of the dielectric layer; Wherein, the cross section of the second photosensitive stack parallel to the second direction is in an inverted trapezoidal shape; The fourth semiconductor layer includes a SiSb layer; and the fifth semiconductor layer includes a P element.

Images