A total dose radiation resistant transistor and its preparation method

Abstract

This invention discloses a total dose radiation-resistant transistor and its fabrication method, belonging to the field of radiation hardening technology for bipolar devices. The fabrication method of the total dose radiation-resistant transistor provided by this invention eliminates the STI shallow trench isolation structure above the interface between the base-well region and the emitter-well region, replacing it with a double-layer protective structure of oxide layer and polysilicon. Since the thickness of the oxide layer is much smaller than that of the STI shallow trench isolation structure, under the same total dose irradiation, the number of oxide layer fixed charges and interface states generated by the oxide layer is greatly reduced, which can effectively reduce the excess base current of the transistor, reduce the degree of current gain damage, and improve the transistor's total dose radiation resistance.

Description

Technical Field

[0001] This invention belongs to the field of radiation hardening technology for bipolar devices, and specifically relates to a total dose radiation-resistant triode and its preparation method. Background Technology

[0002] In existing advanced node technologies, such as the 0.18μm BCD process, shallow trench isolation structures are commonly used for transistor devices, and their fabrication process is as follows: Figures 1-3 As shown, a second type of buried layer (2), a second type of collector deep well region (3), and a first type of base deep well region (6) are first formed on a first type of conductive semiconductor substrate (1). Then, photolithography and STI etching are performed on the upper surfaces of the second type of collector deep well region (3) and the first type of base deep well region (6) to deposit SiO2 or other filling materials in the trenches. Chemical mechanical polishing is then performed to form an STI shallow trench isolation region (11). Photolithography and doped ion implantation are then performed on the surfaces of the second type of collector deep well region (3) and the first type of base deep well region (6) to form a second type of collector well region (4), a second type of collector implantation region (5), a first type of base well region (7), a first type of base implantation region (8), a second type of emitter well region (9), and a second type of emitter implantation region (10), thus forming a complete radiation-hardened bipolar device structure. This type of transistor device performs poorly under total dose irradiation because the emitter-base junction of the transistor is located directly below the STI isolation structure. The total dose irradiation effect forms an oxide layer that fixes the charge in the STI isolation structure and generates interface states at the SiO2 / Si interface of the STI, resulting in an excess base current I of the transistor. B As the gain increases, the gain coefficient β decreases.

[0003] Therefore, existing methods for manufacturing transistors need to be improved to enhance their resistance to total dose radiation. Summary of the Invention

[0004] In view of the shortcomings of the existing transistor structure described above, the purpose of this invention is to provide a total dose radiation resistant transistor and its preparation method.

[0005] The technical solution for achieving the objective of this invention is as follows: a total dose radiation-resistant transistor, comprising, from bottom to top, a first conductivity type substrate, a second conductivity type buried layer, a second conductivity type collector deep well region, a second conductivity type collector well region above the periphery of the second conductivity type collector well region, a second conductivity type collector injection region above the second conductivity type collector well region, a first conductivity type base deep well region above the interior of the second conductivity type collector deep well region, a first conductivity type base well region above the periphery of the first conductivity type base deep well region, and a first conductivity type base injection region above the first conductivity type base well region. A second conductivity type emitter well region is disposed above the interior of the first conductivity type base deep well region. A second conductivity type emitter injection region is disposed above the second conductivity type emitter well region. A first conductivity type base injection region and a second conductivity type collector injection region are disposed between the first conductivity type base injection region and the second conductivity type collector injection region. A second conductivity type collector injection region is disposed outside the second conductivity type collector injection region and above the periphery of the second conductivity type collector deep well region. An oxide layer is disposed between the first conductivity type base injection region and the second conductivity type emitter injection region. The oxide layer covers the first conductivity type base well region and the second conductivity type emitter well region. Polycrystalline silicon is disposed on the oxide layer.

[0006] A method for fabricating a total dose radiation resistant transistor includes the following steps:

[0007] Step 1: Provide a silicon substrate of the first conductivity type, perform photolithography and doping ion implantation on its upper surface, and anneal to form a buried layer of the second conductivity type; grow a collector deep well region of the second conductivity type on the upper surface of the buried layer of the second conductivity type; perform photolithography and doping ion implantation on the upper surface of the collector deep well region of the second conductivity type, and anneal to form a base deep well region of the first conductivity type.

[0008] Step 2: An oxide layer is grown and a SiN layer is deposited on the upper surface of the collector deep well region of the second conductivity type and the base deep well region of the first conductivity type. Active region photolithography is performed, and STI etching is performed to form STI trenches. SiO2 or other filling materials are deposited in the STI trenches to ensure electrode isolation. Then, chemical mechanical polishing is performed to form the first STI shallow trench isolation region and the second STI shallow trench isolation region.

[0009] Step 3: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector deep well region and the first conductivity type base deep well region to form the second conductivity type collector well region, the first conductivity type base well region, and the second conductivity type emitter well region.

[0010] Step 4: A thin oxide layer is grown on the upper surface of the collector well region of the second conductivity type, the base well region of the first conductivity type, and the emitter well region of the second conductivity type. Polysilicon is deposited on the surface of the thin oxide layer. Photolithography and etching are performed on the polysilicon to form a double-layer protective structure of oxide layer and polysilicon above the interface of the base well region of the first conductivity type and the emitter well region of the second conductivity type.

[0011] Step 5: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector well region, the first conductivity type base well region, and the second conductivity type emitter well region to form the second conductivity type collector implantation region, the first conductivity type base implantation region, and the second conductivity type emitter implantation region, thus forming a complete total dose radiation resistant transistor structure.

[0012] Compared with the prior art, the significant advantages of the present invention are as follows: the transistor is formed by using the total dose radiation-resistant transistor fabrication method of the present invention, which eliminates the STI shallow trench isolation structure above the interface between the base well region and the emitter well region, and replaces it with an oxide layer and a polysilicon double-layer structure; since the thickness of the oxide layer is much smaller than the thickness of the STI shallow trench isolation structure, under the same total dose irradiation, the number of oxide layer fixed charges and interface states generated by the oxide layer is greatly reduced, which can effectively reduce the excess base current of the transistor and reduce the degree of current gain damage. Attached Figure Description

[0013] Figures 1-3 This is a flowchart illustrating the fabrication method of transistor devices commonly used in existing advanced node processes.

[0014] Figure 1 This is a schematic cross-sectional view of the structure formed by photolithography and doping ion implantation on a silicon wafer 1 of the first conductivity type, followed by annealing to form a buried layer 2 of the second conductivity type; photolithography and doping ion implantation on the upper surface of the buried layer 2 of the second conductivity type, followed by annealing to form a collector deep well region 3 of the second conductivity type; and photolithography and doping ion implantation on the upper surface of the collector deep well region 3 of the second conductivity type to form a base deep well region 6 of the first conductivity type.

[0015] Figure 2 The diagram shows the cross-sectional view of the structure after growing an oxide layer and depositing a SiN layer on the upper surfaces of the collector deep well region 3 (second conductivity type) and the base deep well region 6 (first conductivity type), performing active region photolithography, performing STI etching to form STI trenches, depositing SiO2 or other filling materials in the STI trenches to ensure electrode isolation, and then performing chemical mechanical polishing to form the STI shallow trench isolation region 11.

[0016] Figure 3Photolithography and doping ion implantation are performed on the upper surfaces of the second conductivity type collector deep well region 3 and the first conductivity type base deep well region 6 to form the second conductivity type collector well region 4, the second conductivity type collector implantation region 5, the first conductivity type base well region 7, the first conductivity type base implantation region 8, the second conductivity type emitter well region 9, and the second conductivity type emitter implantation region 10, forming a schematic diagram of a complete radiation-hardened bipolar device structure.

[0017] Figures 4-8 The diagram shown is a cross-sectional flow chart illustrating the method for preparing the total dose radiation-resistant transistor of the present invention.

[0018] Figure 4 This is a schematic cross-sectional view of the structure formed by performing photolithography and doping ion implantation on a first conductivity type substrate silicon wafer 110, followed by annealing to form a second conductivity type buried layer 120; performing photolithography and doping ion implantation on the upper surface of the second conductivity type buried layer 120, followed by annealing to form a second conductivity type collector deep well region 130; and performing photolithography and doping ion implantation on the upper surface of the second conductivity type collector deep well region 130 to form a first conductivity type base deep well region 160.

[0019] Figure 5 The diagram shows the cross-sectional view of the structure formed by growing an oxide layer and depositing a SiN layer on the surface of the collector deep well region 130 of the second conductivity type and the base deep well region 160 of the first conductivity type, performing active region photolithography, performing STI etching to form STI trenches, depositing SiO2 or other filling materials in the STI trenches to ensure electrode isolation, and then performing chemical mechanical polishing to form the STI shallow trench isolation regions 210 and 220.

[0020] Figure 6 This is a schematic cross-sectional view of the structure formed by photolithography and doped ion implantation on the upper surfaces of the second conductivity type collector deep well region 130 and the first conductivity type base deep well region 160, resulting in the formation of the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190.

[0021] Figure 7 This is a cross-sectional view of the structure after a thin oxide layer is grown on the upper surface of the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190, polysilicon is deposited on the surface of the thin oxide layer, and photolithography and etching are performed on the polysilicon to form a double-layer protective structure of oxide layer 230 and polysilicon 240 above the interface of the first conductivity type base well region 170 and the second conductivity type emitter well region 190.

[0022] Figure 8The upper surfaces of the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190 are photolithographically etched and doped with ions to form the second conductivity type collector implantation region 150, the first conductivity type base implantation region 180, and the second conductivity type emitter implantation region 200, ultimately forming a complete cross-sectional schematic diagram of the total dose-resistant transistor structure.

[0023] Figure 9 This is a simplified flowchart of the method for preparing the total dose radiation-resistant transistor of the present invention.

[0024] Label Explanation:

[0025] 1: Substrate of the first conductivity type of traditional transistor

[0026] 2: Buried Layer, Second Conductivity Type of Traditional Transistor

[0027] 3: The second conductivity type of traditional transistors has a deep collector well region.

[0028] 4: Collector well region of the second conductivity type of traditional transistors

[0029] 5: Collector injection region of the second conduction type of traditional transistor

[0030] 6: Traditional transistor first conduction type: deep well region at the base

[0031] 7: Base well region, the first conductivity type of a traditional transistor

[0032] 8: Base injection region, the first conductivity type of a traditional transistor

[0033] 9: Emitter-well region of the second conduction type in traditional transistors

[0034] 10: Second conductivity type of conventional transistor, emitter injection region

[0035] 11: Traditional shallow trench isolation structure for transistors

[0036] 110: Substrate of the first conductivity type of the transistor of the present invention

[0037] 120: Buried layer of the second conductivity type of the transistor of this invention

[0038] 130: The collector deep well region of the second conductivity type of the transistor of this invention

[0039] 140: The collector well region of the second conductivity type of the transistor of this invention

[0040] 150: Collector injection region of the second conductivity type of the transistor of this invention

[0041] 160: The first conductivity type of the transistor in this invention is the base deep well region.

[0042] 170: The base well region of the first conductivity type of the transistor in this invention

[0043] 180: Base injection region of the first conductivity type of the transistor of this invention

[0044] 190: Emitter-well region of the second conductivity type of the transistor in this invention

[0045] 200: Emitter injection region of the second conductivity type of the transistor of this invention

[0046] 210: Shallow trench isolation structure between the base injection region and emitter injection region of the transistor of the present invention

[0047] 220: Shallow trench isolation structure outside the collector injection region of the transistor of the present invention

[0048] 230: The thin oxide layer above the emitter-base junction of the transistor of the present invention

[0049] 240: Polycrystalline silicon above the emitter-base junction of the transistor of this invention Detailed Implementation

[0050] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the method for fabricating a total dose radiation-resistant transistor according to the present invention. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0051] Figures 1-3 This is a flowchart illustrating the fabrication method of transistor devices commonly used in existing advanced node processes.

[0052] Figure 1 This is a schematic cross-sectional view of the structure formed by photolithography and doping ion implantation on a silicon wafer 1 of the first conductivity type, followed by annealing to form a buried layer 2 of the second conductivity type; photolithography and doping ion implantation on the upper surface of the buried layer 2 of the second conductivity type, followed by annealing to form a collector deep well region 3 of the second conductivity type; and photolithography and doping ion implantation on the upper surface of the collector deep well region 3 of the second conductivity type to form a base deep well region 6 of the first conductivity type.

[0053] Figure 2 The diagram shows the cross-sectional view of the structure after growing an oxide layer and depositing a SiN layer on the upper surfaces of the collector deep well region 3 (second conductivity type) and the base deep well region 6 (first conductivity type), performing active region photolithography, performing STI etching to form STI trenches, depositing SiO2 or other filling materials in the STI trenches to ensure electrode isolation, and then performing chemical mechanical polishing to form the STI shallow trench isolation region 11.

[0054] Figure 3Photolithography and doping ion implantation are performed on the upper surfaces of the second conductivity type collector deep well region 3 and the first conductivity type base deep well region 6 to form the second conductivity type collector well region 4, the second conductivity type collector implantation region 5, the first conductivity type base well region 7, the first conductivity type base implantation region 8, the second conductivity type emitter well region 9, and the second conductivity type emitter implantation region 10, forming a schematic diagram of a complete radiation-hardened bipolar device structure.

[0055] Figures 4-8 The diagram shown is a cross-sectional flow chart illustrating the method for preparing the total dose radiation-resistant transistor of the present invention.

[0056] like Figure 8 As shown, a total dose radiation-resistant transistor includes, from bottom to top, a first conductivity type substrate 110, a second conductivity type buried layer 120, a second conductivity type collector deep well region 130, a second conductivity type collector well region 140 above the periphery of the second conductivity type collector well region 130, a second conductivity type collector injection region 150 above the second conductivity type collector well region 140, a first conductivity type base deep well region 160 above the interior of the second conductivity type collector deep well region 130, a first conductivity type base well region 170 above the periphery of the first conductivity type base deep well region 160, a first conductivity type base injection region 180 above the first conductivity type base deep well region 170, and a first conductivity type base injection region 180 within the first conductivity type base deep well region 160. A second conductivity type emitter well region 190 is provided above the first conductivity type emitter well region 190, a second conductivity type emitter injection region 200 is provided above the second conductivity type emitter well region 190, an STI isolation structure 210 is provided between the first conductivity type base injection region 180 and the second conductivity type collector injection region 150, an STI isolation structure 220 is provided outside the second conductivity type collector injection region 150 and above the periphery of the second conductivity type collector deep well region 130, an oxide layer 230 is provided between the first conductivity type base injection region 180 and the second conductivity type emitter injection region 200, the oxide layer 230 covers the first conductivity type base well region 170 and the second conductivity type emitter well region 190, and polysilicon 240 is covered on the oxide layer 230.

[0057] Furthermore, the second conductivity type collector injection region 150 is located inside the second conductivity type collector well region 140, with the former having a smaller area and a higher concentration than the latter.

[0058] The first conductivity type base injection region 180 is located inside the first conductivity type base well region 170, with the former having a smaller area and a higher concentration than the latter.

[0059] The second conductivity type emitter injection region 200 is located inside the second conductivity type emitter well region 190. The former has a smaller area and a higher concentration than the latter.

[0060] Furthermore, the edge of the second conductivity type collector injection region 150 is tangent to the STI structure, the outer edge of the first conductivity type base injection region 180 is tangent to the STI structure, the inner edge of the first conductivity type base injection region 180 is tangent to the oxide layer 230, and the edge of the second conductivity type emitter injection region 200 is tangent to the oxide layer 230.

[0061] Furthermore, the second conductivity type collector deep well region 130, the second conductivity type collector well region 140, and the second conductivity type collector injection region 150 together constitute the collector structure.

[0062] The first type of base deep well region 160, the first type of base well region 170, and the first type of base injection region 180 together constitute the base structure;

[0063] The second conductivity type emitter well region 190 and the first conductivity type emitter injection region 200 together constitute the emitter structure.

[0064] Furthermore, the collector well region 140 of the second conductivity type is not in direct contact with the base well region 170 of the first conductivity type; the base well region 170 of the first conductivity type is in direct contact with the emitter well region 190 of the second conductivity type or there is a certain gap between them. The gap means that the area of ​​170 is relatively small, as long as 160 can be connected to 180 through 170, the final connection potential is sufficient. In this case, 170 and 190 are separated by 160.

[0065] When the base well region 170 of the first conductivity type and the emitter well region 190 of the second conductivity type are tangent, the tangent plane is located below the oxide layer 230; when there is a certain distance between the base well region 170 of the first conductivity type and the emitter well region 190 of the second conductivity type, the two edges of the base well region 170 of the first conductivity type and the emitter well region 190 of the second conductivity type that are close to each other are both located below the oxide layer 230.

[0066] Furthermore, when the first conductivity type doped impurity in the device is acceptor type, the second conductivity type doped impurity is donor type; when the first conductivity type doped impurity is donor type, the second conductivity type doped impurity is acceptor type.

[0067] Furthermore, the polycrystalline silicon 240 has the same shape as the oxide layer 230.

[0068] Furthermore, depending on the requirements, one of the two, the base well region 170 of the first conductivity type and the emitter well region 190 of the second conductivity type, can be omitted; however, both cannot be omitted simultaneously.

[0069] If the base well region 170 of the first conductivity type is omitted and the emitter well region 190 of the second conductivity type is retained, then the edge of the emitter well region 190 of the second conductivity type should be below the interior of the oxide layer 230.

[0070] If the second conductivity type emitter well region 190 is omitted and the first conductivity type base well region 170 is retained, then the inner edge of the first conductivity type base well region 170 should be below the interior of the oxide layer 230.

[0071] Furthermore, the second conductive type buried layer 120 can be omitted as needed.

[0072] When the second conductivity type buried layer 120 is present, the first conductivity type base deep well region 160 can be in direct contact with the second conductivity type buried layer 120.

[0073] like Figures 4-8 , Figure 9 As shown, the present invention provides a method for preparing a total dose radiation resistant transistor, the method comprising the following steps:

[0074] Step 1: Provide a silicon substrate 110 of the first conductivity type, perform photolithography and doping ion implantation on its upper surface, and anneal to form a buried layer 120 of the second conductivity type; perform photolithography and doping ion implantation on the upper surface of the buried layer 120 of the second conductivity type, and anneal to form a collector deep well region 130 of the second conductivity type; perform photolithography and doping ion implantation on the upper surface of the collector deep well region 130 of the second conductivity type, and anneal to form a base deep well region 160 of the first conductivity type, as follows. Figure 4 As shown;

[0075] Step 2: An oxide layer and a SiN layer are grown and deposited on the upper surfaces of the collector deep well region 130 (second conductivity type) and the base deep well region 160 (first conductivity type). Active region photolithography is performed, followed by STI etching to form STI trenches. SiO2 or other filling materials are deposited within the STI trenches to ensure electrode isolation. Then, chemical mechanical polishing is performed to form STI shallow trench isolation regions 210 and 220. Figure 5 As shown;

[0076] Specifically, the first STI shallow trench isolation structure 210 is located only at the junction of the second conductivity type collector deep well region 130 and the first conductivity type base deep well region 160; the second STI shallow trench isolation structure 220 is located on the periphery of the second conductivity type collector deep well region 130; and there is no STI shallow trench isolation structure inside the first conductivity type base deep well region 160.

[0077] Step 3: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector deep well region 130 and the first conductivity type base deep well region 160 to form the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190, as shown below. Figure 6 As shown.

[0078] Specifically, the second conductivity type collector well region 140 is located outside the second conductivity type collector deep well region 130, between the first STI shallow trench isolation structure 210 and the second STI shallow trench isolation structure 220; the first conductivity type base well region 170 and the second conductivity type emitter well region 190 are located above the interior of the first conductivity type base deep well region 160; the first conductivity type base well region 170 is located outside the first conductivity type base deep well region 160, inside the first STI shallow trench isolation structure 210; the second conductivity type emitter well region 190 is located at the center above the first conductivity type base deep well region 160; the edges of the first conductivity type base well region 170 and the second conductivity type emitter well region 190 are tangent.

[0079] Step 4: A thin oxide layer is grown on the upper surface of the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190. Polysilicon is deposited on the surface of the thin oxide layer. Photolithography and etching are performed on the polysilicon to form a double-layer protective structure of oxide layer 230 and polysilicon 240 above the interface of the first conductivity type base well region 170 and the second conductivity type emitter well region 190, as shown below. Figure 7 As shown.

[0080] Step 5: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector well region 140, the first conductivity type base well region 170, and the second conductivity type emitter well region 190. Annealing is then performed to form the second conductivity type collector implantation region 150, the first conductivity type base implantation region 180, and the second conductivity type emitter implantation region 200, ultimately forming a complete total dose radiation resistant transistor structure, such as... Figure 8 As shown.

[0081] The total dose irradiation-hardened transistor prepared by the above method has an effective improvement in its total dose irradiation resistance, which can effectively solve the problem of current gain decrease after total dose irradiation.

[0082] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A total dose radiation resistant transistor, characterized in that, The structure includes, from bottom to top, a first conductivity type substrate (110), a second conductivity type buried layer (120), and a second conductivity type collector deep well region (130). A second conductivity type collector well region (140) is located above the periphery of the second conductivity type collector deep well region (130). A second conductivity type collector injection region (150) is located above the second conductivity type collector well region (140). A first conductivity type base deep well region (160) is located above the interior of the second conductivity type collector deep well region (130). A first conductivity type base well region (170) is located above the periphery of the first conductivity type base deep well region (160). A first conductivity type base injection region (180) is located above the first conductivity type base well region (170). A second conductivity type base deep well region (160) is located above the interior of the first conductivity type base deep well region (160). The emitter well region (190) is provided above the second conductivity type emitter well region (190), the first conductivity type base injection region (180) and the second conductivity type collector injection region (150) are provided with a first STI isolation structure (210), the second conductivity type collector injection region (150) is provided with a second STI isolation structure (220) located outside the second conductivity type collector injection region (150) and above the periphery of the second conductivity type collector deep well region (130), the first conductivity type base injection region (180) and the second conductivity type emitter injection region (200) are provided with a thin oxide layer (230), the oxide layer (230) covers the first conductivity type base well region (170) and the second conductivity type emitter well region (190), and polysilicon (240) is covered on the oxide layer (230).

2. The total dose radiation-resistant transistor according to claim 1, characterized in that, The second type of conductivity collector injection region (150) is located inside the second type of conductivity collector well region (140), the former has a smaller area and a higher concentration than the latter; The first conductivity type base injection region (180) is located inside the first conductivity type base well region (170), with the former having a smaller area and a higher concentration than the latter; The second type of emitter injection region (200) is located inside the second type of emitter well region (190), with a smaller area and higher concentration.

3. A total dose radiation-resistant transistor according to claim 1, characterized in that, The edge of the second conductivity type collector injection region (150) is tangent to the STI structure, the outer edge of the first conductivity type base injection region (180) is tangent to the STI structure, the inner edge of the first conductivity type base injection region (180) is tangent to the oxide layer (230), and the edge of the second conductivity type emitter injection region (200) is tangent to the oxide layer (230).

4. A total dose radiation-resistant transistor according to claim 1, characterized in that, The second type of conductivity collector deep well region (130), the second type of conductivity collector well region (140), and the second type of conductivity collector injection region (150) together constitute the collector structure; The first type of base deep well region (160), the first type of base well region (170), and the first type of base injection region (180) together constitute the base structure; The second conductivity type emitter well region (190) and the second conductivity type emitter injection region (200) together constitute the emitter structure.

5. A total dose radiation-resistant transistor according to claim 1, characterized in that: The collector well region (140) of the second conductivity type is not in direct contact with the base well region (170) of the first conductivity type; the base well region (170) of the first conductivity type is in direct contact with the emitter well region (190) of the second conductivity type or there is a gap between them.

6. A total dose radiation-resistant transistor according to claim 5, characterized in that, When the first conductivity type base well region (170) and the second conductivity type emitter well region (190) are tangent, the tangent plane is located below the oxide layer (230); when there is a gap between the first conductivity type base well region (170) and the second conductivity type emitter well region (190), the two edges of the first conductivity type base well region (170) and the second conductivity type emitter well region (190) that are close to each other are both located below the oxide layer (230).

7. A total dose radiation-resistant transistor according to claim 1, characterized in that, When the first conductivity type doped impurity in the device is acceptor type, the second conductivity type doped impurity is donor type; when the first conductivity type doped impurity is donor type, the second conductivity type doped impurity is acceptor type.

8. A total dose radiation-resistant transistor according to claim 1, characterized in that, The polycrystalline silicon (240) has the same shape as the oxide layer (230).

9. The method for preparing a total dose radiation-resistant transistor as described in any one of claims 1 to 8, characterized in that, Includes the following steps: Step 1: Provide a first conductivity type substrate silicon wafer (110), perform photolithography and doping ion implantation on its upper surface, and anneal to form a second conductivity type buried layer (120); grow a second conductivity type collector deep well region (130) on the upper surface of the second conductivity type buried layer (120); perform photolithography and doping ion implantation on the upper surface of the second conductivity type collector deep well region (130), and anneal to form a first conductivity type base deep well region (160). Step 2: An oxide layer is grown and a SiN layer is deposited on the surface of the collector deep well region (130) of the second conductivity type and the base deep well region (160) of the first conductivity type. Active region photolithography is performed, and STI etching is performed to form STI trenches. SiO2 or other filling materials are deposited in the STI trenches to ensure electrode isolation. Then chemical mechanical polishing is performed to form the first STI isolation structure (210) and the second STI isolation structure (220). Step 3: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector deep well region (130) and the first conductivity type base deep well region (160) to form the second conductivity type collector well region (140), the first conductivity type base well region (170), and the second conductivity type emitter well region (190). Step 4: A thin oxide layer is grown on the upper surface of the second conductivity type collector well region (140), the first conductivity type base well region (170), and the second conductivity type emitter well region (190). Polysilicon is deposited on the surface of the thin oxide layer. Photolithography and etching are performed on the polysilicon to form a double-layer protective structure of oxide layer (230) and polysilicon (240) above the interface between the first conductivity type base well region (170) and the second conductivity type emitter well region (190). Step 5: Photolithography and doped ion implantation are performed on the upper surfaces of the second conductivity type collector well region (140), the first conductivity type base well region (170), and the second conductivity type emitter well region (190) to form the second conductivity type collector implantation region (150), the first conductivity type base implantation region (180), and the second conductivity type emitter implantation region (200), thus forming a complete total dose radiation resistant transistor structure.

10. The method according to claim 9, characterized in that, One of the two, the base well region (170) of the first conductivity type and the emitter well region (190) of the second conductivity type, is omitted; If the base well region (170) of the first conductivity type is omitted and the emitter well region (190) of the second conductivity type is retained, then the edge of the emitter well region (190) of the second conductivity type should be below the interior of the oxide layer (230); If the second conductivity type emitter well region (190) is omitted and the first conductivity type base well region (170) is retained, then the inner edge of the first conductivity type base well region (170) should be below the interior of the oxide layer (230).

Images