Photon number resolving detection system and method

Abstract

The present application relates to a kind of photon number distinguishable detection system and method, BOOST boost circuit module is under the control of FPGA It provides the direct current voltage that satisfies the working of multiple-pixel photon counter in Geiger mode;The temperature control circuit module collects the temperature inside multiple-pixel photon counter, and controls temperature, so that multiple-pixel photon counter works at constant temperature;Signal amplification circuit module amplifies avalanche signal output by multiple-pixel photon counter and sends to signal processing module, signal processing module carries out extraction to the signal output by multiple-pixel photon counter, photon number distribution analysis, error analysis and optimization, real-time photon number judgment and output, FPGA receives error analysis and optimization result of signal processing module, adjusts signal and sends to BOOST boost circuit module.The system has high integration, temperature control is stable, includes error detection and optimization unit, can output photon number in real time, easy to operate, can be communicated with PC host computer through USB interface, flexible to use, can realize low-error photon number distinguishable detection.

Description

Technical Field

[0001] This invention relates to the field of multi-pixel photon counters, and particularly to a photon number-discriminable detection system and method. Background Technology

[0002] In recent years, multi-pixel photon counters, as high-sensitivity photodetectors, have attracted widespread attention in fields such as quantum communication, nuclear medicine imaging, photon imaging, and lidar. These devices possess advantages such as high temporal resolution, low noise levels, and high efficiency, enabling precise counting and measurement of single-photon events. In numerous applications, especially in quantum communication, the detection efficiency, time response, and anti-interference capabilities of multi-pixel photon counters directly affect the system's transmission quality and information security. To achieve effective capture of fast optical signals, the detection performance of multi-pixel photon counters and the design of subsequent signal processing circuits are crucial. Therefore, research on resolvable photon number detection has become an important technological direction in photon detection technology and its applications.

[0003] A conventional photon number-resolvable detection system includes N waveguide beamsplitters, N first single-photon detectors, an adjustable beamsplitter, a second single-photon detector, a cyclic waveguide, and a control module. The N waveguide beamsplitters are connected sequentially. The optical pulse to be measured is input to the first waveguide beamsplitter and then sequentially to each of the other waveguide beamsplitters. Simultaneously, the first single-photon detector connected to each waveguide beamsplitter detects and counts the received optical pulse and feeds the results back to the control module. The control module calculates the total count of each first single-photon detector in each cycle. The control module determines whether the cycle ends based on whether the total count in each cycle is zero. After the cycle ends, the control module accumulates the total count of the first single-photon detectors and the count of the second single-photon detector in each cycle, thus achieving photon number resolution of the optical pulse to be measured.

[0004] However, this photon number-resolvable detection system has a complex structure, requiring multiple waveguide beamsplitters, single-photon detectors, and adjustable beamsplitters to work together. The results are affected by the accuracy of each component, and it lacks error analysis and real-time resolution of photon number distribution, thus failing to guarantee the accuracy of the final detection results and limiting the application scope of this photon number-resolvable detection system. Summary of the Invention

[0005] To address the above problems, a photon number-resolvable detection system and method are proposed.

[0006] The technical solution of this invention is as follows: a photon count resolvable detection system, comprising an FPGA, a host computer, a BOOST boost circuit module, a temperature control circuit module, a signal amplification circuit module, and a signal processing module; the BOOST boost circuit module, under the control of the FPGA, provides a DC voltage sufficient for a multi-pixel photon counter to operate in Geiger mode; an external laser signal sequentially passes through an adjustable optical attenuator, a laser collimating lens, and an aspherical focusing lens to output light pulses to the multi-pixel photon counter; the temperature control circuit module acquires the internal temperature of the multi-pixel photon counter and controls its operating temperature to ensure it operates at a constant temperature; the signal amplification circuit module amplifies the avalanche signal output by the multi-pixel photon counter; the output signal of the signal amplification circuit module is sent to a data acquisition card through a low-pass filter; the data acquisition card and the signal processing module communicate via the PC of the host computer; the signal processing module extracts, analyzes, and optimizes the photon count distribution of the signal output by the multi-pixel photon counter, performs error analysis and optimization, and determines and outputs the real-time photon count; the FPGA receives the error analysis and optimization results from the signal processing module and adjusts the signal sent to the BOOST boost circuit module.

[0007] Preferably, the temperature control circuit module includes an error amplifier and an LED indicator. The error amplifier amplifies the acquired error signal and sends it to the semiconductor cooler built into the multi-pixel photon counter. The semiconductor cooler cools the device to change its temperature. The local monitoring temperature is collected in real time and generates a new error signal, forming a closed loop. At the same time, the error amplifier outputs a signal as a drive signal to the LED indicator, and the cooling status is displayed in real time by the illumination of the LED.

[0008] Preferably, the BOOST boost circuit module includes a voltage reference chip, a digital-to-analog converter (DAC), a voltage follower, and a professional power management chip connected in sequence. The voltage reference chip provides a reference DC voltage of 2.5V with an accuracy of ±0.5% to the DAC. The DAC is connected to the FPGA via SPI. The SCLK port of the DAC chip receives a synchronous clock signal from the FPGA to ensure correct data transmission and processing. The DIN port of the DAC changes the value of the output DC voltage by receiving a digital signal from the FPGA. The voltage follower receives the DC voltage output from the DAC and performs signal buffering and voltage regulation to provide a stable voltage signal for the subsequent boost circuit. The professional power management chip, together with external inductors, capacitors, and MOSFETs, forms a basic BOOST boost topology circuit, providing the MOSFETs with a PWM wave with a stable duty cycle and period. By changing the input voltage value, it amplifies the DC voltage and provides a stable bias voltage for the normal operation of the multi-pixel photon counter.

[0009] Preferably, the signal amplification circuit module is electrically connected to the multi-pixel photon counter to amplify the weak avalanche signal output by the multi-pixel photon counter. At the same time, it is used in conjunction with a filter module to filter and select the signal, so as to facilitate the subsequent acquisition and analysis of the avalanche signal output by the multi-pixel photon counter.

[0010] Preferably, the signal processing module acquires the avalanche signal of the multi-pixel photon counter, and uses the acquired signal to perform fitting analysis of the photon number distribution state, error analysis and optimization of the photon number distribution state, and real-time judgment and output of the photon number distribution state.

[0011] A photon number resolvable detection method, which uses the photon number resolvable detection system to collect photon numbers, and the detection includes fitting analysis of photon number distribution state, error analysis and optimization of photon number distribution state, and real-time photon number distribution state judgment;

[0012] The fitting of the photon number distribution state is as follows: the photon number distribution state of the multi-pixel photon counter is calculated by collecting and fitting data with a storage depth of 1M and a cycle number of 500.

[0013] Error analysis and optimization of photon number distribution: The error is determined by calculating the ratio of the overlapping area of ​​adjacent photon state waveforms to their respective waveform areas. The error threshold is set to 1%. When the actual error is higher than 1%, if the error is due to an excessive number of incident photons leading to increased detection error, the error is reduced by decreasing the bias voltage. If the error is due to an excessively low bias voltage leading to excessive dark noise and the signal being submerged in the dark noise, the error is reduced by increasing the bias voltage. The error optimization system communicates with the FPGA through timely feedback to change the digital signal input to the digital-to-analog converter in the BOOST boost circuit module, thereby changing the output voltage value to correct the output bias voltage and ensure that the photon number distribution error meets the error threshold.

[0014] After calculating the number of photons N that meets the error condition, N is input into the real-time photon number distribution state judgment. The real-time photon number distribution state judgment is based on the number of photons below the error threshold determined in the error analysis. The signal from the data acquisition card is input into the photon number judgment and output program. First, the peak information of the pulse signal is extracted, and then it is input into N comparison circuits. The comparison circuits consist of comparators and XOR gates. The reference voltage of the first comparator is the voltage value at the intersection of the 0 photon peak and the 1 photon peak, and the reference voltage of the second comparator is the voltage value at the intersection of the 1 photon peak and the 2 photon peak. The voltage value is calculated similarly. The reference voltage of the Nth comparator is the voltage value at the intersection of the N-1 photon peak and the Nth photon peak. After the signal passes through the comparator, if the amplitude is higher than or equal to the reference voltage, it will output "1"; if it is lower than the reference voltage, it will output "0". Finally, the output state of each channel comparator is sent to the XOR gate circuit of the next stage. By connecting with the next stage channel, an XOR operation is performed. The XOR gate circuit will only have an output when one channel outputs "1" and the other channel outputs "0". Different channel outputs correspond to different photon numbers, thereby realizing the judgment and output of different photon state information.

[0015] The beneficial effects of the present invention are as follows: Compared with the existing photon number resolvable detection systems, the photon number resolvable detection system and method of the present invention have high integration, stable temperature control, include error detection and optimization units, can output photon numbers in real time, are easy to operate, can communicate with a PC host computer via USB interface, are flexible in use, and can achieve low-error photon number resolvable detection. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the system structure of the present invention;

[0017] Figure 2 This is a circuit connection diagram of the present invention;

[0018] Figure 3 This is a schematic diagram of the signal processing module program of the present invention;

[0019] Figure 4 This is a schematic diagram illustrating the selection of the reference voltage value in the comparator program of the present invention. Detailed Implementation

[0020] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments are based on the technical solution of the present invention and provide detailed implementation methods and specific operating procedures. However, the scope of protection of the present invention is not limited to the following embodiments.

[0021] This invention provides a low-error photon number-resolved detection system. For example... Figure 1As shown, the system includes: an FPGA, an EEPROM of a host computer, a BOOST boost circuit module, a temperature control circuit module, a signal amplification circuit module, and a signal processing module. The FPGA is electrically connected to the EEPROM, the BOOST boost circuit module, and the temperature control circuit module. The BOOST boost circuit module, the temperature control circuit module, and the signal amplification circuit module are in turn electrically connected to a multi-pixel photon counter. Under the control of the FPGA, the BOOST boost circuit module provides a DC voltage sufficient for the multi-pixel photon counter to operate in Geiger mode. An external laser signal sequentially passes through an adjustable optical attenuator, a laser collimating lens, and an aspherical focusing lens to output light pulses to the multi-pixel photon counter. The device includes a temperature control circuit module that collects the internal temperature of the multi-pixel photon counter and controls its operating temperature to ensure it operates at a constant temperature. A signal amplification circuit module amplifies the avalanche signal output by the multi-pixel photon counter. The output signal of the signal amplification circuit module is sent to a data acquisition card via a low-pass filter. The data acquisition card communicates with the signal processing module via a PC. The signal processing module extracts, analyzes, and optimizes the photon count distribution of the signal output by the multi-pixel photon counter, performs error analysis and optimization, and determines and outputs the real-time photon count. The FPGA receives the error analysis and optimization results from the signal processing module and adjusts the signal sent to the BOOST boost circuit module.

[0022] See Figure 1 and Figure 2 To achieve photon number resolvability in this invention, the following guarantees are required:

[0023] 1) Temperature control: The temperature control circuit module controls the temperature of the multi-pixel photon counter, so that the multi-pixel photon counter works at a constant temperature, ensuring that its dark count rate is at a low level and remains stable.

[0024] 2) High-voltage bias is provided: The BOOST boost circuit module includes a voltage reference chip, a digital-to-analog converter (DAC), a voltage follower, and a professional power management chip connected in sequence. The voltage reference chip generates a high-precision reference voltage for the subsequent DAC. The DAC is electrically connected to the FPGA via SPI. The FPGA generates a signal and sends it to the digital signal receiver of the DAC chip. By changing the value of the digital signal input to the FPGA, the value of the output analog voltage is changed. The voltage follower is used for signal buffering and voltage regulation, providing a stable output voltage for the subsequent boost circuit. The professional power management chip amplifies the input DC voltage, providing a stable bias voltage for the normal operation of the multi-pixel photon counter.

[0025] 3) Signal amplification: The signal amplification circuit module is electrically connected to the multi-pixel photon counter to amplify the weak avalanche signal output by the multi-pixel photon counter with a fixed gain. It can also be used with a filter module to filter and select the signal, which facilitates the subsequent acquisition and analysis of the avalanche signal output by the multi-pixel photon counter.

[0026] 4) Signal processing: The signal amplified in step 3) communicates with the PC via the data acquisition card. The signal output from the multi-pixel photon counter is extracted, the photon number distribution is analyzed, the error is analyzed and optimized, and the real-time photon number is determined. The error and optimization signals are returned to the FPGA to adjust the input voltage signal of the BOOST boost circuit module, thereby achieving stable photon number output and real-time photon number detection.

[0027] The BOOST boost circuit module is as follows: Figure 2 As shown, the circuit includes a voltage reference chip, a digital-to-analog converter (DAC), a voltage follower, and a professional power management chip connected in sequence. The voltage reference chip provides a 2.5V reference DC voltage with an accuracy of ±0.5% to the DAC. The DAC is a high-precision 16-bit DAC that connects to an FPGA via SPI. The DAC chip's SCLK port receives a synchronous clock signal from the FPGA to ensure correct data transmission and processing. The DAC's DIN port changes the output DC voltage value by receiving digital signals from the FPGA. The voltage follower receives the DC voltage output from the DAC and performs signal buffering and voltage regulation to provide a stable voltage signal for the subsequent boost circuit. The professional power management chip, together with external inductors, capacitors, and MOSFETs, forms a basic BOOST boost topology circuit. It provides the MOSFETs with a PWM wave with a stable duty cycle and period. By changing the input voltage value, it amplifies the DC voltage, with an output voltage range of 40–68V and adjustable in 0.01V steps, providing a stable bias voltage for the normal operation of the multi-pixel photon counter.

[0028] The temperature control circuit module is as follows Figure 2As shown, the system includes a voltage reference chip, an error amplifier, a digital-to-analog converter, and LED indicators. The temperature control module includes two modes: manual setting and digital control setting. In manual setting mode, the voltage reference chip generates a 4.096V reference voltage, which is applied to the manual setting resistor and the thermistor built into the multi-pixel photon counter. The two resistors are divided by a resistor of the same resistance value. The voltage value of the manual setting resistor is used as the reference voltage value, and the resistance value of the manual setting resistor is selected from the temperature-resistance characteristic curve of the multi-pixel photon counter. The manual setting resistor and the thermistor built into the multi-pixel photon counter are connected to the IN+ and IN- pins of the error amplifier, respectively, to generate an error signal. The error signal is amplified by the error amplifier and sent to the TEC (thermal cooler) built into the multi-pixel photon counter. The TEC then cools the device to change its temperature, and the local monitoring temperature changes accordingly to complete the cycle. The cooling process is observed in real time by the illumination of LEDs; an illuminated LED indicates that cooling is in progress, and an off LED indicates that the cooling process is complete. In the numerical control setting mode, the digital-to-analog converter chip is electrically connected to the FPGA via SPI. The FPGA generates a signal and sends it to the digital signal receiver of the digital-to-analog converter chip. By changing the value of the digital signal input to the FPGA, the value of the output analog voltage is changed and connected to the IN-pin of the error amplifier. The working principle is the same as in the manual setting mode. The TEC temperature is adjusted through a closed-loop control to ensure that the multi-pixel photon counter operates at a constant temperature.

[0029] The signal amplification circuit module is as follows Figure 2 As shown, it is electrically connected to a multi-pixel photon counter to stably amplify the weak avalanche signal output by the multi-pixel photon counter by a gain of 40dB. At the same time, it can be paired with a filter module to filter and screen the signal, which facilitates the subsequent acquisition and analysis of the avalanche signal output by the multi-pixel photon counter.

[0030] The signal processing module is as follows Figure 3As shown, this includes the acquisition of avalanche signals from a multi-pixel photon counter, the fitting analysis of the signal photon number distribution, the error analysis and optimization of the photon number distribution, and the real-time judgment and output of the photon number distribution. Generally, the photon number distribution state is fitted by acquiring and fitting data from a multi-pixel photon counter with a storage depth of 1M and a cycle count of 500 periods to calculate the photon number distribution state of the multi-pixel photon counter. The error analysis of the photon number distribution state is judged by calculating the ratio of the overlapping area of ​​adjacent photon state waveforms to the area of ​​their respective waveforms. The error threshold is usually set at 1%. When the actual error is higher than 1%, it may be because the number of incident photons is too large, resulting in an increased detection error. This error can be reduced by decreasing the bias voltage. Alternatively, it may be because the bias voltage is too low, resulting in too much dark noise, and the signal is submerged in the dark noise. This error can be reduced by increasing the bias voltage. The error optimization system communicates with the FPGA through timely feedback to change the digital signal input to the digital-to-analog converter in the BOOST boost circuit module, thereby changing the output voltage value to correct the output bias voltage of the professional power management chip, so that the photon number distribution error can meet the error threshold. After calculating the number of photons N that meets the error condition, N is input into the real-time photon number distribution state judgment. The real-time photon number distribution state judgment is based on the number of photons below the error threshold determined in the error analysis. The signal from the data acquisition card is input into the photon number judgment and output program. First, the peak information of the pulse signal is extracted, and then input into N-channel comparison circuits. The comparison circuits consist of comparators and XOR gates. The reference voltage value of the comparators is selected as follows... Figure 4 As shown, the reference voltage of the first comparator is the voltage value at the intersection of the 0 photon peak and the 1 photon peak, the reference voltage of the second comparator is the voltage value at the intersection of the 1 photon peak and the 2 photon peak, and so on. The reference voltage of the Nth comparator is the voltage value at the intersection of the N-1 photon peak and the N photon peak. After the signal passes through the comparator, if the amplitude is higher than or equal to the reference voltage, it will output "1", and if it is lower than the reference voltage, it will output "0". Finally, the output state of each channel comparator will be sent to the XOR gate circuit of the next stage. By connecting with the next stage channel, an XOR operation is performed. The XOR gate circuit will only have an output when one channel outputs "1" and the other channel outputs "0". Different channel outputs correspond to different photon numbers, thereby realizing the judgment and output of different photon state information.

[0031] In addition, the system includes a host computer connected to the FPGA, where the operating voltage and temperature of the circuit can be set. The host computer communicates with the FPGA via RS232 serial port to control the BOOST boost circuit module and temperature control circuit module of the multi-pixel photon counter.

[0032] The photon number resolvable detection system of the present invention has the ability to quickly judge and optimize errors, has real-time photon number resolution capability, stable output voltage of BOOST boost circuit, and stable operation of temperature control circuit module. It can enable multi-pixel photon counter to work in a stable temperature environment. It is simple to operate, flexible to use, and can achieve low-error photon number resolvable detection.

[0033] The embodiments described above merely illustrate specific implementations of the present invention, and while the descriptions are detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A photon count-resolvable detection system, comprising an FPGA, a host computer, a BOOST boost circuit module, a temperature control circuit module, a signal amplification circuit module, a signal processing module, and a multi-pixel photon counter; the BOOST boost circuit module, under the control of the FPGA, provides a DC voltage sufficient for the multi-pixel photon counter to operate in Geiger mode; an external laser signal sequentially passes through an adjustable optical attenuator, a laser collimating lens, and an aspherical focusing lens to output light pulses to the multi-pixel photon counter; the temperature control circuit module acquires the internal temperature of the multi-pixel photon counter and controls its operating temperature to ensure it operates at a constant temperature; the signal amplification circuit module amplifies the avalanche signal output by the multi-pixel photon counter; the output signal of the signal amplification circuit module is sent to a data acquisition card via a low-pass filter, and the data acquisition card communicates with the signal processing module via a PC on the host computer; Its features are, The signal processing module acquires avalanche signals from the multi-pixel photon counter and uses the acquired signals to perform fitting analysis of the photon number distribution state, error analysis and optimization of the photon number distribution state, and real-time judgment and output of the photon number distribution state. The fitting analysis of the photon number distribution state is as follows: by collecting and fitting data of the multi-pixel photon counter with a storage depth of 1M and a cycle number of 500, the photon number distribution state of the multi-pixel photon counter is calculated. Error analysis and optimization of photon number distribution state: Error analysis of photon number distribution state is determined by calculating the proportion of the overlapping area of ​​adjacent photon state waveforms to the area of ​​their respective waveforms. The error threshold is set to 1%. When the actual error of photon number distribution is higher than 1%, if the actual error is caused by an excessive number of incident photons, leading to an increase in detection error, the error is reduced by decreasing the bias voltage. If the actual error is caused by an excessively low bias voltage, resulting in too much dark noise and the signal being submerged in the dark noise, the error is reduced by increasing the bias voltage. The optimization is specifically implemented by communicating with the FPGA to change the digital signal input to the digital-to-analog converter in the BOOST boost circuit module, thereby changing the output voltage value to correct the output bias voltage, so that the photon number distribution detection error can meet the error threshold, thus achieving optimization. Real-time photon number distribution state judgment and output: After calculating the number of photons N that meets the error threshold, N is input into the real-time photon number distribution state judgment. The signal from the data acquisition card is input into the photon number judgment and output program. First, the peak information of the pulse signal is extracted, and then input into N-channel comparison circuits. The comparison circuits include comparators and XOR gates. The reference voltage of the first comparator is the voltage value at the intersection of the 0 photon peak and the 1 photon peak. The reference voltage of the second comparator is the voltage value at the intersection of the 1 photon peak and the 2 photon peak, and so on, for the Nth comparator. The comparator's reference voltage is the voltage value at the intersection of the N-1 photon peak and the N photon peak. After the signal passes through the comparator, if the amplitude is higher than or equal to the reference voltage, it will output "1", and if it is lower than the reference voltage, it will output "0". Finally, the output state of each channel comparator is sent to the XOR gate circuit of the next stage. By connecting with the next stage channel, an XOR operation is performed. The XOR gate circuit will only have an output when one channel outputs "1" and the other channel outputs "0". Different channel outputs correspond to different photon numbers, thereby realizing the judgment and output of different photon state information.

2. The photon number-resolvable detection system according to claim 1, characterized in that, The temperature control circuit module includes a voltage reference chip, an error amplifier, and an LED indicator. The voltage reference chip generates a 4.096V reference voltage, which is applied to the manually set resistor and the thermistor built into the multi-pixel photon counter. The two resistors are divided by a resistor of the same resistance value. The voltage value of the manually set resistor is used as the reference voltage value, and the resistance value of the manually set resistor is selected to reference the temperature-resistance characteristic curve of the multi-pixel photon counter. The manually set resistor and the thermistor built into the multi-pixel photon counter are connected to the IN+ and IN- pins of the error amplifier, respectively, to generate an error signal. The error amplifier amplifies this error signal and sends it to the semiconductor cooler built into the multi-pixel photon counter. The semiconductor cooler cools the device to change its temperature. The local monitoring temperature is collected in real time and generates a new error signal, forming a closed loop. At the same time, the output signal of the error amplifier is used as a drive signal to the LED indicator, and the cooling status is displayed in real time by the illumination of the LED.

3. The photon number-resolvable detection system according to claim 1, characterized in that, The BOOST boost circuit module includes a voltage reference chip, a digital-to-analog converter (DAC), a voltage follower, and a power management chip connected in sequence. The voltage reference chip provides a reference DC voltage of 2.5V with an accuracy of ±0.5% to the DAC. The DAC is connected to the FPGA via SPI. The SCLK port of the DAC chip receives the synchronous clock signal from the FPGA to ensure correct data transmission and processing. The DIN port of the DAC changes the value of the output DC voltage by receiving digital signals from the FPGA. The voltage follower receives the DC voltage output from the DAC and performs signal buffering and voltage regulation to provide a stable voltage signal for the subsequent boost circuit. The power management chip, together with external inductors, capacitors, and MOSFETs, forms a basic BOOST boost topology circuit, providing the MOSFETs with a PWM wave with a stable duty cycle and period. By changing the input voltage value, it amplifies the DC voltage and provides a stable bias voltage for the normal operation of the multi-pixel photon counter.

4. The photon number-resolvable detection system according to claim 1, characterized in that, The signal amplification circuit module is electrically connected to the multi-pixel photon counter to amplify the weak avalanche signal output by the multi-pixel photon counter. At the same time, it is used in conjunction with a filter module to filter and select the signal, so as to facilitate the subsequent acquisition and analysis of the avalanche signal output by the multi-pixel photon counter.

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