Silicon wafer edge grinding method and apparatus
By detecting edge defects in silicon wafers and redetermining the grinding center, the problem of unremovable edge chipping defects in silicon wafer edge grinding was solved, thus improving the yield of silicon wafers.
Patent Information
- Application Number
- CN202411869137.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2026-11-06
- Estimated Expiration
- 2044-12-18
AI Technical Summary
In existing technologies, edge grinding of silicon wafers cannot effectively remove edge chipping defects, resulting in low silicon wafer yield.
By inspecting the wire-cut silicon wafers, the location and size information of edge chipping defects are obtained, the grinding center is redefined, and edge grinding is performed according to the target radius.
It effectively removes edge chipping defects on silicon wafers, improving the yield of silicon wafers.
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Figure CN119550153B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a method and apparatus for grinding the edges of silicon wafers. Background Technology
[0002] The main process for processing silicon wafers includes: wire cutting the silicon wafer, edge grinding of the wire-cut silicon wafer, double-sided grinding of the edge-ground silicon wafer, etching of the double-sided ground silicon wafer, double-sided polishing of the etched silicon wafer, and cleaning of the double-sided polished silicon wafer to obtain the processed silicon wafer.
[0003] In the above-mentioned process of edge grinding of wire-cut silicon wafers, the radius of the edge grinding is generally set, then the wire-cut silicon wafer is obtained, the silicon wafer is positioned using the notch, the original center of the silicon wafer is used as the radius, and the edge grinding of the silicon wafer is performed according to the set radius of the edge grinding. After grinding, the silicon wafer is cleaned and dried.
[0004] However, after wire cutting the silicon wafer, there are often some chipping defects near the edge of the silicon wafer. These chipping defects often cannot be completely removed by the edge grinding process described above, which causes the silicon wafer to break in subsequent processes.
[0005] Therefore, edge chipping defects need to be removed during the edge grinding process of silicon wafers to ensure the quality of subsequent silicon wafers. However, the existing edge grinding methods often cannot effectively remove edge chipping defects, resulting in the silicon wafer being scrapped and the yield of silicon wafers being low. Summary of the Invention
[0006] This invention provides a silicon wafer edge grinding method and apparatus to solve the problem that existing technologies cannot effectively grind away chipped edge defects when grinding the edges of silicon wafers.
[0007] To address the aforementioned technical problems, embodiments of the present invention provide the following technical solutions:
[0008] This invention provides a method for grinding the edge of a silicon wafer, comprising:
[0009] The silicon wafer after wire cutting is inspected to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer.
[0010] Based on the location and size information of the chipped edge defect, the grinding center for edge grinding of the silicon wafer is determined;
[0011] The silicon wafer is edge-ground according to the grinding center and the target radius, wherein the target radius is the radius of the silicon wafer after edge grinding.
[0012] In some embodiments, the silicon wafer after wire cutting is inspected to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer, including:
[0013] The surface of the wire-cut silicon wafer is scanned using a laser beam to obtain the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0014] Based on the reflection intensity, the location and size information of the chipping defects on the silicon wafer surface are obtained.
[0015] In some embodiments, a laser beam is used to scan the surface of the wire-cut silicon wafer to obtain the reflection intensity of the laser beam at different locations on the silicon wafer surface, including:
[0016] Control the rotation of the silicon wafer;
[0017] During the rotation of the silicon wafer, the laser beam is controlled to move radially from the center of the surface of the wire-cut silicon wafer to the edge of the surface of the wire-cut silicon wafer, thereby obtaining the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0018] In some embodiments, a grinding center for edge grinding of the silicon wafer is determined based on the location and size information of the chipped edge defect, including:
[0019] Based on the location information and the size information, determine the coordinates of the first position on the edge chipping defect that is closest to the center of the surface of the wire-cut silicon wafer;
[0020] The grinding center for edge grinding of the silicon wafer is determined based on the first position coordinates.
[0021] In some embodiments, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes:
[0022] When there are two edge chipping defects, obtain the first position coordinates corresponding to the first edge chipping defect and the first position coordinates corresponding to the second edge chipping defect.
[0023] The first pre-selected center coordinates are determined based on the first position coordinates corresponding to the first edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0024] The second pre-selected center coordinates are determined based on the first position coordinates corresponding to the second edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0025] The grinding center for edge grinding of the silicon wafer is determined based on the first pre-selected center coordinates and the second pre-selected center coordinates.
[0026] In some embodiments, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes:
[0027] If the number of chipped edge defects is greater than or equal to 3, the third chipped edge defect, the fourth chipped edge defect, and the center chipped edge defect are determined based on the location information and the size information.
[0028] Obtain the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect;
[0029] The grinding center for edge grinding of the silicon wafer is determined based on the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect.
[0030] In some embodiments, determining the third edge chipping defect, the fourth edge chipping defect, and the center edge chipping defect among the edge chipping defects based on the location information and the size information includes:
[0031] Among the chipping defects, the chipping defect that is closest to the notch on the silicon wafer in a clockwise direction along the circumference of the silicon wafer is identified as the third chipping defect;
[0032] Among the chipping defects, the chipping defect that is closest to the notch on the silicon wafer in the counterclockwise direction along the circumference of the silicon wafer is identified as the fourth chipping defect;
[0033] Among the chipping defects, the chipping defect that is farthest from the notch on the silicon wafer along the circumferential direction is identified as the central chipping defect.
[0034] In some embodiments, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect includes:
[0035] A first line segment is generated between the first position coordinates corresponding to the third edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0036] A second line segment is generated between the first position coordinates corresponding to the fourth edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0037] The intersection of the perpendicular bisector of the first line segment and the perpendicular bisector of the second line segment is used as the grinding center for edge grinding of the silicon wafer.
[0038] In some embodiments, edge grinding of the silicon wafer is performed according to the grinding center and the target radius, including:
[0039] Based on the location information and the size information, determine the coordinates of the second position on the chipped edge defect that is closest to the grinding center;
[0040] If the distance between the second position coordinate and the grinding center is greater than the target radius, the silicon wafer is edge-ground according to the grinding center and the target radius.
[0041] This invention also provides a silicon wafer edge grinding apparatus, comprising:
[0042] The first processing module is used to inspect the silicon wafer after wire cutting to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer;
[0043] The first determining module is used to determine the grinding center for edge grinding of the silicon wafer based on the location and size information of the chipped edge defect;
[0044] The second processing module is used to perform edge grinding on the silicon wafer according to the grinding center and the target radius, wherein the target radius is the radius of the silicon wafer after edge grinding.
[0045] The embodiments of the present invention have the following beneficial effects:
[0046] The silicon wafer edge grinding method provided in this invention involves inspecting a wire-cut silicon wafer to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer. Considering the location and size information of the edge chipping defects, a grinding center is determined for edge grinding of the silicon wafer. This grinding center is not the center of the surface of the cut silicon wafer. Based on this grinding center and a pre-set target radius for grinding the silicon wafer, edge grinding is performed on the silicon wafer. In this way, edge defects of the silicon wafer can be ground off more effectively during the edge grinding process, reducing the number of silicon wafers that are scrapped and improving the yield of silicon wafers. Attached Figure Description
[0047] Figure 1 This is one of the schematic diagrams illustrating the edge grinding of a silicon wafer provided in an embodiment of the present invention;
[0048] Figure 2 A flowchart illustrating the silicon wafer edge polishing method provided in an embodiment of the present invention;
[0049] Figure 3 This is a second schematic diagram illustrating the edge grinding of a silicon wafer according to an embodiment of the present invention;
[0050] Figure 4 One of the schematic diagrams of the grinding center provided in the embodiment of the present invention;
[0051] Figure 5 A second schematic diagram illustrating the grinding center provided in an embodiment of the present invention;
[0052] Figure 6 Schematic diagram three illustrating the grinding center provided in the embodiments of the present invention;
[0053] Figure 7 This is a schematic diagram of the silicon wafer edge grinding device provided in an embodiment of the present invention. Detailed Implementation
[0054] To make the technical problems, technical solutions and advantages of the embodiments of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.
[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.
[0056] Before describing the specific embodiments of the present invention, the following will be explained first:
[0057] Please see Figure 1 The diameter of the wire-cut silicon wafer is 301 mm. After edge grinding, the diameter of the resulting silicon wafer is 300.5 mm. The edge removal amount is 500 μm on one diameter and 250 μm on the radius. Figure 1 As shown, three chipping defects exist on the edge of the silicon wafer. Among the three chipping defects, the largest radial dimension is 300 μm. Using the center of the surface of the wire-cut silicon wafer as the processing center, the edge of the silicon wafer is ground to obtain the edge-ground silicon wafer as shown. Figure 1 As shown, the chipping defects cannot be effectively ground away, resulting in the silicon wafer being scrapped.
[0058] To address the problem that existing technologies cannot effectively grind away chipped edges when grinding silicon wafers, this invention provides a silicon wafer edge grinding method and apparatus.
[0059] like Figure 2 As shown, an embodiment of the present invention provides a method for grinding the edge of a silicon wafer, comprising:
[0060] Step 201: Inspect the silicon wafer after wire cutting to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer.
[0061] In this step, a coordinate system can be established on the surface of the pre-cut silicon wafer. The coordinate center of this coordinate system is the center of the surface circle of the wire-cut silicon wafer. Connect the center of the surface circle of the silicon wafer with the notch of the silicon wafer. Establish the vertical axis on the straight line where the line is connected, and establish the horizontal axis on the straight line perpendicular to the line where the line is connected.
[0062] The wire-cut silicon wafer is inspected to obtain the location and size information of edge chipping defects in the edge region of the wafer. The edge region of the silicon wafer can be defined as the area in the radial direction where the distance from the edge of the silicon wafer is less than a preset distance.
[0063] The location information includes the coordinates of the location of the chipped edge defect, which can be the coordinates of the center of the chipped edge defect.
[0064] The size information includes the position coordinates of the edge of the chipped edge defect, that is, the shape and size of the chipped edge defect can be reflected by the position coordinates of the edge of the chipped edge defect.
[0065] Based on the position coordinates of the edge of the chipped edge defect, the center position coordinates of the chipped edge defect can be calculated. Specifically, based on the position coordinates of the edge of the chipped edge defect, the first position coordinates of the two farthest edge points on the chipped edge defect in the radial direction are obtained, and the second position coordinates of the two farthest edge points on the chipped edge defect in the circumferential direction are obtained. The intersection of the two first position coordinates and the two second position coordinates is the center position coordinate of the chipped edge defect.
[0066] It is understood that the location information is used to indicate the location of the chipping defect on the silicon wafer, and the size information is used to indicate the shape and size of the chipping defect.
[0067] It should be noted that the number of edge chipping defects is at least one.
[0068] If edge chipping defects occur in the non-edge area of the silicon wafer, i.e., the central area of the silicon wafer, no further edge polishing steps are required, and the silicon wafer is deemed unusable.
[0069] Step 202: Determine the grinding center for edge grinding of the silicon wafer based on the location and size information of the chipped edge defect.
[0070] In this step, taking into account the location and size information of each chipping defect, the grinding center of the silicon wafer is re-determined based on the location and size information. The grinding center is different from the surface center of the silicon wafer, and the grinding center of the silicon wafer can also be represented in coordinate form in the above coordinate system.
[0071] Step 203: Perform edge grinding on the silicon wafer according to the grinding center and the target radius, wherein the target radius is the radius of the silicon wafer after edge grinding.
[0072] It should be noted that the radius of the silicon wafer after edge grinding is preset. For example, if the diameter of the silicon wafer to be obtained after edge grinding is 300.5mm, then the target radius is 150.25mm.
[0073] After obtaining the grinding center using the above steps, the grinding center is used as the processing center for edge grinding. After grinding the silicon wafer to the target radius, the grinding stops, and the edge grinding process is completed.
[0074] For example, the above-mentioned Figure 1 Taking the wire-cut silicon wafer shown as an example, and the wafer exhibiting three edge chipping defects, after determining the grinding center of the wafer using the above steps, the wafer is then edge-ground according to this grinding center, resulting in the ground silicon wafer as shown. Figure 3 As shown, the silicon wafer edge grinding method provided by this invention redetermines the grinding center of the silicon wafer, which can more effectively grind away all edge chipping defects on the silicon wafer, reduce the number of silicon wafers that are scrapped, and improve the yield of silicon wafers.
[0075] In some embodiments, the silicon wafer after wire cutting is inspected to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer, including:
[0076] The surface of the wire-cut silicon wafer is scanned using a laser beam to obtain the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0077] Specifically, a laser beam is used to scan the surface of a silicon wafer, ensuring that the laser beam can be projected onto all positions on the silicon wafer surface. The laser beam is reflected from the silicon wafer surface. When the laser beam encounters particles or other defects on the silicon wafer surface, the particles or defects will scatter part of the laser beam. The scattered laser beam enters the silicon wafer, and the particle or defect structure will become brighter. The parts of the silicon wafer without particles or defects are relatively darker. A photomultiplier tube (PMT) or a charge-coupled device (CCD) is used to electronically record the light intensity at different positions on the silicon wafer surface, and the reflection intensity on the silicon wafer surface is generated based on the light intensity.
[0078] Based on the reflection intensity, the location and size information of chipped defects on the silicon wafer surface are obtained. That is, the reflection intensity is used to indicate particle or defect patterns on the silicon wafer surface.
[0079] Furthermore, the laser beam is used to scan the surface of the wire-cut silicon wafer to obtain the reflection intensity of the laser beam at different positions on the silicon wafer surface, including:
[0080] By controlling the rotation of the silicon wafer, the silicon wafer can be placed on a silicon wafer carrier platform, and the silicon wafer can be rotated by rotating the silicon wafer carrier platform.
[0081] During the rotation of the silicon wafer, the laser beam is controlled to move radially from the center of the surface of the wire-cut silicon wafer to the edge of the surface of the wire-cut silicon wafer, thereby obtaining the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0082] That is, by controlling the silicon wafer to perform high-precision and repeatable rotational motion, and controlling the laser beam to perform high-precision linear motion, the reflection intensity at different positions on the silicon wafer surface is scanned and obtained, where different positions on the silicon wafer surface can be indicated in the form of coordinates.
[0083] It should be noted that, when controlling the laser beam to move radially from the center of the surface of the wire-cut silicon wafer to the edge of the surface of the wire-cut silicon wafer, the laser beam can be moved a small distance after the silicon wafer rotates once or several times, and then the silicon wafer can be rotated once or several times again, so as to ensure that the laser beam fully scans the surface of the silicon wafer.
[0084] In some embodiments, a grinding center for edge grinding of the silicon wafer is determined based on the location and size information of the chipped edge defect, including:
[0085] Based on the location information and the size information, the first position coordinates of the chipped edge defect that are closest to the center of the surface of the wire-cut silicon wafer are determined. Specifically, based on the location information and the size information, the distance between each position point in the chipped edge defect and the center of the surface of the wire-cut silicon wafer (i.e., the center of the coordinate system) is determined in the above coordinate system, and the coordinates of the closest position point are taken as the first position coordinates.
[0086] When there are multiple edge chipping defects, the first position coordinates corresponding to each edge chipping defect are obtained sequentially according to the above process.
[0087] The grinding center for edge grinding of the silicon wafer is determined based on the first position coordinates.
[0088] In an optional embodiment, when the number of edge chipping defects is one, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes:
[0089] like Figure 4 As shown, the center of the surface of the wire-cut silicon wafer is set as P, with coordinates P(0, 0). The first position coordinate of the chipping defect is set as (x1, y1). Based on the surface radius R of the wire-cut silicon wafer and the first position coordinates, the eccentricity is calculated according to the following formula to calculate the grinding center P(a1, b2):
[0090]
[0091] In one optional embodiment, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes:
[0092] When there are two edge chipping defects, obtain the first position coordinates corresponding to the first edge chipping defect and the first position coordinates corresponding to the second edge chipping defect.
[0093] The first pre-selected center coordinates are determined based on the first position coordinates corresponding to the first edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0094] The second pre-selected center coordinates are determined based on the first position coordinates corresponding to the second edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0095] Based on the first pre-selected center coordinates and the second pre-selected center coordinates, a grinding center for edge grinding of the silicon wafer is determined. Specifically, the midpoint coordinates of the first pre-selected center coordinates and the second pre-selected center coordinates are used as the grinding center.
[0096] Specifically, such as Figure 5As shown, the center of the wire-cut silicon wafer is set to P, with coordinates P(0, 0). The first position coordinates corresponding to the first edge chipping defect are set to (x1, y1), and the first position coordinates corresponding to the second edge chipping defect are set to (x2, y2). Based on the surface radius R of the wire-cut silicon wafer and the first position coordinates corresponding to the first edge chipping defect, the eccentricity is calculated according to the following formula to obtain the coordinates of the first pre-selected center:
[0097]
[0098] Where a1 represents the x-coordinate of the first pre-selected center and b1 represents the y-coordinate of the first pre-selected center.
[0099] Based on the surface radius R of the wire-cut silicon wafer and the first position coordinates corresponding to the second edge chipping defect, the eccentricity is calculated according to the following formula to obtain the coordinates of the second pre-selected center:
[0100]
[0101] Where a2 represents the x-coordinate of the second pre-selected center and b2 represents the y-coordinate of the second pre-selected center.
[0102] Then, the grinding center P' for edge grinding of the silicon wafer is calculated according to the following formula:
[0103]
[0104] In one optional embodiment, determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes:
[0105] When the number of edge chipping defects is greater than or equal to 3, the third edge chipping defect, the fourth edge chipping defect, and the center edge chipping defect are determined according to the location information and the size information. That is, when the number of edge chipping defects is greater than or equal to 3, three edge chipping defects are selected from multiple edge chipping defects, namely the third edge chipping defect, the fourth edge chipping defect, and the center edge chipping defect; wherein, the third edge chipping defect and the fourth edge chipping defect are the two edge chipping defects at the edge with respect to the maximum distribution angle of the silicon wafer notch.
[0106] Obtain the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect;
[0107] Based on the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the central edge chipping defect, the grinding center for edge grinding of the silicon wafer is determined. That is, the grinding center for edge grinding of the silicon wafer can be calculated using only the first position coordinates corresponding to the three edge chipping defects selected above.
[0108] Specifically, determining the third edge chipping defect, the fourth edge chipping defect, and the center edge chipping defect among the edge chipping defects based on the location information and the size information includes:
[0109] Among the chipping defects, the chipping defect closest to the notch on the silicon wafer in a clockwise direction along the circumference of the silicon wafer is identified as the third chipping defect. Figure 6 As shown, the first position coordinates corresponding to the third edge chipping defect are (x1, y1);
[0110] Among the chipping defects, the one closest to the notch on the silicon wafer in a counter-clockwise direction along the circumference of the wafer is identified as the fourth chipping defect. Figure 6 As shown, the first position coordinates corresponding to the third edge chipping defect are (x3, y3);
[0111] Among the chipping defects, the one furthest from the notch on the silicon wafer along the circumferential direction is identified as the center chipping defect. Figure 6 As shown, the first position coordinates corresponding to the central edge chipping defect are (x2, y2).
[0112] The process of determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates corresponding to the third edge chipping defect, the fourth edge chipping defect, and the center edge chipping defect includes:
[0113] Continue as Figure 6 As shown, a first line segment is generated between the first position coordinates corresponding to the third edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0114] A second line segment is generated between the first position coordinates corresponding to the fourth edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0115] The intersection of the perpendicular bisector of the first line segment and the perpendicular bisector of the second line segment is used as the grinding center for edge grinding of the silicon wafer.
[0116] Specifically, such as Figure 6As shown, let P be the center of the surface of the wire-cut silicon wafer, and let P(0, 0). Calculate the slope m1 of the perpendicular bisector of the first line segment and the slope m2 of the perpendicular bisector of the second line segment according to the following formula:
[0117]
[0118] Next, calculate the grinding center according to the following formula:
[0119]
[0120] Where a1 represents the horizontal coordinate of the grinding center and b1 represents the vertical coordinate of the grinding center.
[0121] This invention detects defects in wire-cut silicon wafers to obtain the location and size information of chipped edges. Based on the location and size information, a reasonable processing center (i.e., grinding center) is calculated, which can more effectively remove edge defects and improve product yield.
[0122] like Figure 7 As shown, this embodiment of the invention also provides a silicon wafer edge grinding apparatus, comprising:
[0123] The first processing module 701 is used to inspect the silicon wafer after wire cutting to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer.
[0124] The first determining module 702 is used to determine the grinding center for edge grinding of the silicon wafer based on the location and size information of the chipped edge defect;
[0125] The second processing module 703 is used to perform edge grinding on the silicon wafer according to the grinding center and the target radius, wherein the target radius is the radius of the silicon wafer after edge grinding.
[0126] In some embodiments, the first processing module 701 includes:
[0127] The first processing unit is used to scan the surface of the wire-cut silicon wafer with a laser beam to obtain the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0128] The second processing unit is used to obtain the location and size information of the chipping defects on the surface of the silicon wafer based on the reflection intensity.
[0129] In some embodiments, the first processing unit is specifically used for:
[0130] Control the rotation of the silicon wafer;
[0131] During the rotation of the silicon wafer, the laser beam is controlled to move radially from the center of the surface of the wire-cut silicon wafer to the edge of the surface of the wire-cut silicon wafer, thereby obtaining the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
[0132] In some embodiments, the first determining module 702 includes:
[0133] The first determining unit is used to determine, based on the position information and the size information, the coordinates of the first position on the edge chipping defect that is closest to the center of the surface of the wire-cut silicon wafer;
[0134] The second determining unit is used to determine the grinding center for edge grinding of the silicon wafer based on the first position coordinates.
[0135] In some embodiments, the second determining unit is specifically used for:
[0136] When there are two edge chipping defects, obtain the first position coordinates corresponding to the first edge chipping defect and the first position coordinates corresponding to the second edge chipping defect.
[0137] The first pre-selected center coordinates are determined based on the first position coordinates corresponding to the first edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0138] The second pre-selected center coordinates are determined based on the first position coordinates corresponding to the second edge chipping defect and the surface radius of the silicon wafer after wire cutting.
[0139] The grinding center for edge grinding of the silicon wafer is determined based on the first pre-selected center coordinates and the second pre-selected center coordinates.
[0140] In some embodiments, the second determining unit is specifically used for:
[0141] If the number of chipped edge defects is greater than or equal to 3, the third chipped edge defect, the fourth chipped edge defect, and the center chipped edge defect are determined based on the location information and the size information.
[0142] Obtain the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect;
[0143] The grinding center for edge grinding of the silicon wafer is determined based on the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect.
[0144] In some embodiments, the second determining unit is specifically used for:
[0145] Among the chipping defects, the chipping defect that is closest to the notch on the silicon wafer in a clockwise direction along the circumference of the silicon wafer is identified as the third chipping defect;
[0146] Among the chipping defects, the chipping defect that is closest to the notch on the silicon wafer in the counterclockwise direction along the circumference of the silicon wafer is identified as the fourth chipping defect;
[0147] Among the chipping defects, the chipping defect that is farthest from the notch on the silicon wafer along the circumferential direction is identified as the central chipping defect.
[0148] In some embodiments, the second determining unit is specifically used for:
[0149] A first line segment is generated between the first position coordinates corresponding to the third edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0150] A second line segment is generated between the first position coordinates corresponding to the fourth edge chipping defect and the first position coordinates corresponding to the center edge chipping defect;
[0151] The intersection of the perpendicular bisector of the first line segment and the perpendicular bisector of the second line segment is used as the grinding center for edge grinding of the silicon wafer.
[0152] In some embodiments, the second processing module 703 includes:
[0153] The third processing unit is used to determine the coordinates of the second position on the chipped edge defect that is closest to the grinding center, based on the position information and the size information.
[0154] The fourth processing unit is used to perform edge grinding on the silicon wafer according to the grinding center and the target radius when the distance between the second position coordinate and the grinding center is greater than the target radius.
[0155] It should be noted that the silicon wafer edge polishing apparatus provided in the embodiments of the present invention is an apparatus capable of performing the above-described silicon wafer edge polishing method. Therefore, all embodiments of the above-described silicon wafer edge polishing method are applicable to this apparatus and can achieve the same or similar technical effects.
[0156] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for grinding the edge of a silicon wafer, characterized in that, include: The silicon wafer after wire cutting is inspected to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer. Based on the location and size information of the chipped edge defect, the grinding center for edge grinding of the silicon wafer is determined; The silicon wafer is edge-polished according to the polishing center and the target radius, wherein the target radius is the radius of the silicon wafer after edge polishing; The process of determining a grinding center for edge grinding of the silicon wafer based on the location and size information of the chipped edge defect includes: Based on the location information and the size information, determine the coordinates of the first position on the edge chipping defect that is closest to the center of the surface of the wire-cut silicon wafer; The grinding center for edge grinding of the silicon wafer is determined based on the first position coordinates; The process of determining the grinding center for edge grinding of the silicon wafer based on the first position coordinates includes: When the number of chipped edges is greater than or equal to 3, the third, fourth, and center chipped edges are determined based on the location and size information. This includes: determining the chipped edge defect closest to the notch on the silicon wafer in a clockwise direction along the circumference of the silicon wafer as the third chipped edge defect; determining the chipped edge defect closest to the notch on the silicon wafer in a counterclockwise direction along the circumference of the silicon wafer as the fourth chipped edge defect; and determining the chipped edge defect farthest from the notch on the silicon wafer in a circumferential direction as the center chipped edge defect. Obtain the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect; generate a first line segment between the first position coordinates corresponding to the third edge chipping defect and the first position coordinates corresponding to the center edge chipping defect; generate a second line segment between the first position coordinates corresponding to the fourth edge chipping defect and the first position coordinates corresponding to the center edge chipping defect; and use the intersection of the perpendicular bisector of the first line segment and the perpendicular bisector of the second line segment as the grinding center for edge grinding of the silicon wafer. The edge grinding of the silicon wafer, based on the grinding center and the target radius, includes: Based on the location information and the size information, determine the coordinates of the second position on the chipped edge defect that is closest to the grinding center; If the distance between the second position coordinate and the grinding center is greater than the target radius, the silicon wafer is edge-ground according to the grinding center and the target radius.
2. The method according to claim 1, characterized in that, The silicon wafers after wire cutting are inspected to obtain the location and size information of edge chipping defects in the edge region of the silicon wafers, including: The surface of the wire-cut silicon wafer is scanned using a laser beam to obtain the reflection intensity of the laser beam at different positions on the surface of the silicon wafer. Based on the reflection intensity, the location and size information of the chipping defects on the silicon wafer surface are obtained.
3. The method according to claim 2, characterized in that, The laser beam is used to scan the surface of the wire-cut silicon wafer to obtain the reflection intensity of the laser beam at different positions on the silicon wafer surface, including: Control the rotation of the silicon wafer; During the rotation of the silicon wafer, the laser beam is controlled to move radially from the center of the surface of the wire-cut silicon wafer to the edge of the surface of the wire-cut silicon wafer, thereby obtaining the reflection intensity of the laser beam at different positions on the surface of the silicon wafer.
4. A silicon wafer edge grinding device, characterized in that, include: The first processing module is used to inspect the silicon wafer after wire cutting to obtain the location and size information of edge chipping defects in the edge region of the silicon wafer; The first determining module is used to determine the grinding center for edge grinding of the silicon wafer based on the location and size information of the chipped edge defect; The second processing module is used to perform edge grinding on the silicon wafer according to the grinding center and the target radius, wherein the target radius is the radius of the silicon wafer after edge grinding; The first determining module includes: The first determining unit is used to determine, based on the position information and the size information, the coordinates of the first position on the edge chipping defect that is closest to the center of the surface of the wire-cut silicon wafer; The second determining unit is used to determine the grinding center for edge grinding of the silicon wafer based on the first position coordinates; The second determining unit is specifically used for: When the number of chipped edges is greater than or equal to 3, the third, fourth, and center chipped edges are determined based on the location and size information. This includes: determining the chipped edge defect closest to the notch on the silicon wafer in a clockwise direction along the circumference of the silicon wafer as the third chipped edge defect; determining the chipped edge defect closest to the notch on the silicon wafer in a counterclockwise direction along the circumference of the silicon wafer as the fourth chipped edge defect; and determining the chipped edge defect farthest from the notch on the silicon wafer in a circumferential direction as the center chipped edge defect. Obtain the first position coordinates corresponding to the third edge chipping defect, the first position coordinates corresponding to the fourth edge chipping defect, and the first position coordinates corresponding to the center edge chipping defect; generate a first line segment between the first position coordinates corresponding to the third edge chipping defect and the first position coordinates corresponding to the center edge chipping defect; generate a second line segment between the first position coordinates corresponding to the fourth edge chipping defect and the first position coordinates corresponding to the center edge chipping defect; and use the intersection of the perpendicular bisector of the first line segment and the perpendicular bisector of the second line segment as the grinding center for edge grinding of the silicon wafer. Specifically, the second processing module is used to determine the second position coordinates on the edge chipping defect that are closest to the grinding center based on the position information and the size information; and to perform edge grinding on the silicon wafer based on the grinding center and the target radius when the distance between the second position coordinates and the grinding center is greater than the target radius.
Citation Information
Patent Citations
Removal device and method for removing wafer edge breakage in targeted mode and wafer thinning device
CN118720867A
Edge polishing detection device and edge polishing equipment
CN219901507U
Re-grinding method for wafer
JP2021158153A
