Semiconductor pressure sensor

Abstract

A semiconductor pressure sensor for measuring an external pressure applied on the sensor, the semiconductor pressure sensor comprising: a membrane as part of a semiconductor substrate for deforming due to the external pressure; a first set of adjacent resistors comprising a sense resistor pair and a compensation resistor pair; and a second set of adjacent resistors comprising a sense resistor pair and a compensation resistor pair, wherein the sense resistor pairs are located on or adjacent to a membrane edge, and wherein the compensation resistor pairs are at least partially located on an outside of the membrane or on a zero stress region of the membrane, and wherein the resistors in each resistor pair are orthogonal, and wherein the resistors are connected in a Wheatstone bridge configuration.

Description

Technical Field

[0001] This invention relates to the field of pressure sensors. More specifically, this invention relates to a pressure sensor comprising a piezoelectric resistor mounted on a diaphragm. Background Technology

[0002] Generally, pressure sensors provide output signals using piezoelectric resistors configured together, typically in a Wheatstone bridge configuration. The piezoelectric resistors are placed on the edges of the membrane in both the transverse and longitudinal directions relative to the membrane stress, which is proportional to the applied pressure. When a pressure difference is applied to the membrane, it bends, creating stress at the membrane edges. This stress changes the resistance of the piezoelectric resistors, and therefore the output voltage varies depending on the stress. In summary: the pressure difference between the top and bottom sides of the membrane will produce an output voltage on the Wheatstone bridge that indicates the applied pressure difference.

[0003] Problems arise when a piezoelectric resistor changes due to a source different from the pressure difference (e.g., external stress or temperature gradient). Changes in the piezoelectric resistor due to a source different from the pressure difference can affect the sensor output and give an unwanted signal.

[0004] When a piezoelectric resistor is placed in a Wheatstone bridge configuration, it is robust to sources that affect certain combinations of piezoelectric resistors. When the differential output of the Wheatstone bridge remains unchanged, there are no unwanted signals (ignoring some minor effects such as the piezoelectric resistor's self-heating and its impact on the amplifier's common-mode voltage).

[0005] Figure 1 shows the prior art layout of piezoelectric resistors R1, R2, R3 and R4 on a film. Figure 2 The electronic circuit shown illustrates the arrangement of piezoelectric resistors R1, R2, R3, and R4 in a Wheatstone bridge layout. Supply voltage V 电桥 (V bridge A voltage is applied to the node between R1 and R3, and ground is connected to the node between R2 and R4. The output voltage is the voltage (V) at the node between R1 and R2. inm ) and the node (V) between R3 and R4 inp ) is measured between.

[0006] The first example demonstrating the robustness of the Wheatstone bridge is when all resistors R1, R2, R3, and R4 are changed by the same percentage. In this case, the output V inm and V inp No change. This example illustrates how the common-mode effects of temperature on, for example, a piezoelectric resistor can be compensated for.

[0007] The second example is when all resistors in one branch of a Wheatstone bridge change by the same percentage. In this case, the output V inm and V inp It doesn't change. However, this is not ideal because the current through the different branches of the Wheatstone bridge is different, which could be the cause of some imbalances (e.g., the different self-heating of resistors may cause them to have different sensitivities).

[0008] The third example involves two piezoelectric resistors connected to the same supply voltage that are changed by the same percentage. This will change the single-ended output in exactly the same way, leaving the differential output unchanged. However, this is also undesirable because the common-mode output will indeed change and may affect the amplifier's amplification.

[0009] In the fourth example, there are two pairs of piezoelectric resistors. Each pair is changed by the same percentage, but these pairs are changed by different percentages. The piezoelectric resistor pair (R1, R3) can be changed by the same first percentage, and the piezoelectric resistor pair (R2, R4) can be changed by the same second percentage. In another case, the piezoelectric resistor pair (R1, R2) can be changed by the same first percentage, and (R3, R4) can be changed by the same second percentage. The differential output remains unchanged, and thus the Wheatstone bridge configuration is robust to such changes, such as stress or temperature gradients on the film of the Wheatstone bridge.

[0010] Undesirable signals are generated when the resistance of a piezoelectric resistor changes due to a source of stress different from that affecting the differential output of a Wheatstone bridge. For example, it is possible for a stress source to create an irregular stress gradient on the chip, as indicated by the arrow in Figure 1. The arrow represents a stress gradient. For instance, the stress source could be positioned at the beginning of the arrow, resulting in high stress at the start and low stress at the end. This could be due to packaging stress or metal stress on one side of the die, for example. Therefore, the piezoelectric resistors will not experience the same stress, and the output signal will have errors. In this example, the piezoelectric resistor R2 experiences a much greater stress from the stress source than the other three resistors, and this alters the Wheatstone bridge output.

[0011] Another external factor could be a temperature gradient or localized hotspot causing one resistor in the Wheatstone bridge to heat up more than the others. This can also produce an incorrect Wheatstone bridge output signal.

[0012] Basically, a symmetrical Wheatstone bridge configuration laid on a specific area or membrane area compensates for linear stress gradients and linear temperature gradients in that area, but not for nonlinear stress or temperature gradients.

[0013] Conventional piezoelectric stress sensors can only partially compensate for the effects of external stress or temperature. When the gradient is nonlinear or when the stress or temperature change is very localized, conventional piezoelectric stress sensors typically do not compensate for stress or temperature.

[0014] Therefore, there is a need for semiconductor pressure sensors that can compensate for irregularly changing disturbances. Summary of the Invention

[0015] The purpose of embodiments of the present invention is to provide a good semiconductor pressure sensor.

[0016] The above objectives are achieved by the method and apparatus according to the present invention.

[0017] Embodiments of the present invention relate to a semiconductor pressure sensor for measuring external pressure applied to a sensor.

[0018] A semiconductor pressure sensor includes a membrane that serves as part of a semiconductor substrate and is designed to deform under external pressure.

[0019] In addition, the semiconductor pressure sensor includes: a first set of adjacent resistors and a second set of adjacent resistors, the first set of adjacent resistors including a sensing resistor pair (first resistor pair R1a, R2a) and a compensation resistor pair (third resistor pair R1b, R2b), and the second set of adjacent resistors including a sensing resistor pair (second resistor pair R3a, R4a) and a compensation resistor pair (fourth resistor pair R3b, R4b).

[0020] The sensing resistor pair is located on or adjacent to the edge of the membrane, and the compensation resistor pair is located at least partially outside the membrane or in the zero-stress region of the membrane. The resistors in each resistor pair are orthogonal and are connected in a Wheatstone bridge configuration.

[0021] In a Wheatstone bridge configuration, the first resistor (R1a) of the first resistor pair and the first resistor (R1b) of the third resistor pair are connected in series at the first bias node (V). 电桥 ) and the first output node (V inm Between; the second resistor (R2a) of the first resistor pair and the second resistor (R2b) of the third resistor pair are connected in series to the first output node (V). inm Between the first resistor (R3a) of the second resistor pair and the first resistor (R3b) of the fourth resistor pair, the first resistor (R3a) of the second resistor pair and the first resistor (R3b) of the fourth resistor pair are connected in series to the first bias node (V). 电桥 ) and the second output node (V inp Between; the second resistor (R4a) of the second resistor pair and the second resistor (R4b) of the fourth resistor pair are connected in series to the second output node (V).inp Between the second bias node (GND) and the second bias node (GND).

[0022] In an embodiment of the present invention, the first resistor (R1a) in the first resistor pair and the first resistor (R1b) in the third resistor pair are orthogonal, the first resistor (R3a) in the second resistor pair and the first resistor (R3b) in the fourth resistor pair are orthogonal, the second resistor (R2a) in the first resistor pair and the second resistor (R2b) in the third resistor pair are orthogonal, and the second resistor (R4a) in the second resistor pair and the second resistor (R4b) in the fourth resistor pair are orthogonal.

[0023] In embodiments of the present invention, the membrane has a square or rectangular shape.

[0024] In an embodiment of the invention, a first group of adjacent resistors is arranged on a first side of the membrane, and a second group of adjacent resistors is arranged on a second side of the membrane.

[0025] In an embodiment of the present invention, the first side is adjacent to the second side.

[0026] In an embodiment of the present invention, the first side is opposite to the second side.

[0027] In embodiments of the present invention, the membrane has a circular or elliptical shape.

[0028] In an embodiment of the present invention, the first group and the second group have an angular interval of 90°.

[0029] In an embodiment of the present invention, the voltage difference between the first output node and the second output node is used as a measurement of the pressure on the membrane.

[0030] Specific and preferred aspects of the invention are set forth in the appended independent and dependent claims. Features from the dependent claims may be suitably combined with features of the independent claims and other dependent claims, and not merely as expressly set forth in the claims.

[0031] These and other aspects of the invention will be apparent from the following description of one or more embodiments, and are illustrated by reference to the following description of one or more embodiments. Attached Figure Description

[0032] Figure 1 shows a prior art layout of a piezoelectric resistor on a membrane.

[0033] Figure 2 The electronic circuit in which the piezoelectric resistor of Figure 1 is arranged in a Wheatstone bridge layout is shown.

[0034] Figure 3 The layout of the piezoelectric resistors in a semiconductor pressure sensor, including two sets of adjacent piezoelectric resistors on a square membrane, is shown.

[0035] Figure 4 The layout of the piezoelectric resistors in a semiconductor pressure sensor, which includes two sets of adjacent piezoelectric resistors on a circular diaphragm, is shown.

[0036] Figure 5 The layout of the piezoelectric resistors of a semiconductor pressure sensor, comprising two sets of adjacent piezoelectric resistors on a square membrane, is shown, wherein the compensation resistors are positioned in the zero-stress region of the membrane.

[0037] Figure 6 A possible Wheatstone bridge configuration of piezoelectric resistors arranged in a layout according to an embodiment of the present invention is shown.

[0038] Figure 7 The effects of stress gradient and load stress concentration on a semiconductor pressure sensor according to an embodiment of the present invention are illustrated.

[0039] Any reference numerals in the claims should not be construed as limiting the scope.

[0040] In different accompanying drawings, the same reference numerals refer to the same or similar elements. Detailed Implementation

[0041] The invention will be described with reference to specific embodiments and particular drawings, but the invention is not limited thereto but is defined only by the claims. The described drawings are merely illustrative and not restrictive. In the drawings, some elements may be enlarged and not drawn to scale for illustrative purposes. Dimensions and relative dimensions do not correspond to an actual reduction in scale for the practice of the invention.

[0042] The terms "first," "second," etc., used in the specification and claims are used to distinguish between similar elements and are not necessarily used to describe a temporal, spatial, hierarchical, or any other order. It should be understood that the terms thus used are interchangeable where appropriate, and the embodiments of the invention described herein can operate in an order different from that described or illustrated herein.

[0043] Furthermore, terms such as top, bottom, etc., in the specification and claims are for descriptive purposes and not necessarily for describing relative positions. It should be understood that such terms are interchangeable where appropriate, and embodiments of the invention described herein can operate in orientations different from those described or illustrated herein.

[0044] It should be noted that the term "comprising" as used in the claims should not be construed as limiting itself to the means listed thereafter; it does not exclude other elements or steps. Therefore, the term should be interpreted as specifying the presence of the features, integers, steps, or components stated as mentioned, but does not exclude the presence or addition of one or more other features, integers, steps, or components, or groups thereof. Thus, the scope of the statement "an apparatus comprising means A and B" should not be limited to an apparatus consisting solely of components A and B. It means that, for the purposes of this invention, the only relevant components of the apparatus are A and B.

[0045] Throughout this specification, the reference to "an embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. Therefore, the phrase "in one embodiment" or "in an embodiment" appearing in various places throughout this specification does not necessarily refer to all of the same embodiment, but may refer to the same embodiment. Furthermore, in one or more embodiments, as will be apparent to those skilled in the art from this disclosure, particular features, structures, or characteristics may be combined in any suitable manner.

[0046] Similarly, it should be understood that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, drawing, or description for the purpose of simplification and to aid in understanding one or more of the various inventive aspects. However, this method of disclosure should not be construed as reflecting an intention to claim more features than are expressly recited in each claim. Rather, as reflected in the appended claims, the inventive aspect lies in fewer features than all the features of a single foregoing disclosed embodiment. Thus, the claims appended to the Detailed Description are thereby explicitly incorporated into this Detailed Description, wherein each claim itself represents a separate embodiment of the invention.

[0047] Furthermore, while some embodiments described herein include features found in other embodiments but not in those other embodiments, combinations of features from different embodiments are intended to fall within the scope of the invention and form different embodiments as will be understood by those skilled in the art. For example, any embodiment of the claimed embodiments in the appended claims may be used in any combination.

[0048] Numerous specific details are set forth in the specification provided herein. However, it should be understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0049] In embodiments of the present invention, the reference to a zero-stress region of the membrane refers to a region in which the stress does not change significantly with the pressure difference between the top and bottom sides of the membrane. Compared to piezoelectric resistors on the sides of the membrane, piezoelectric resistors at least partially located in the zero-stress region are insensitive or less sensitive to pressure differences.

[0050] In embodiments of the invention, piezoelectric resistors form sets of adjacent piezoelectric resistors. Adjacent piezoelectric resistors may, for example, be present in the portion between two lines passing through the center of the film and having a 90° angle between them. In such embodiments, adjacent piezoelectric resistors are present in one-quarter of the film. In some embodiments, the angle may be less than 90°, or even less than 80°, or even less than 70°, or even less than 60°, or even less than 50°, or even less than 40°, or even less than 30°.

[0051] A semiconductor pressure sensor 100 according to an embodiment of the present invention is disposed in a substrate 105.

[0052] The semiconductor pressure sensor 100 includes a membrane 110. In embodiments of the invention, the membrane 110 is obtained by fabricating a cavity in a substrate. The membrane 110 is supported by an edge 120 located at the edge of the membrane 110. The substrate may be, for example, a silicon substrate.

[0053] A semiconductor pressure sensor 100 according to an embodiment of the present invention includes a plurality of groups of adjacent resistors. Each group includes two resistor pairs. One resistor pair is positioned such that it is sensitive to pressure applied to the sensor, and an adjacent resistor pair is positioned such that it is significantly less sensitive to applied pressure. This is achieved by positioning the significantly less sensitive resistor at least partially outside the membrane or at least partially on a zero-stress region of the membrane, and positioning the piezoresistor at least partially on the membrane. In embodiments of the invention, these groups are positioned in separate regions. In each region, the piezoresistor is oriented to be sensitive to stress induced by pressure. In embodiments of the invention, the piezoelectric resistor is oriented such that the stress in the direction of the piezoelectric resistor is higher than the stress in other directions. The orientation of the piezoelectric resistor may be different for different groups.

[0054] In embodiments of the invention, the resistors in these resistor pairs are piezoelectric resistors. If the sensor comprises a membrane with different sides and angles between these sides, the resistors can be located on different sides of the membrane. If the sensor comprises a membrane with continuous membrane edges (no angles), the adjacent sets of piezoelectric resistors can be separated by a distance greater than the distance between the piezoelectric resistors within a set. These sets may exist on adjacent sides of the membrane, but this is not strictly required. For example, they may also exist on opposite sides of the membrane. They may also exist on the same side of the membrane. Figure 3 The middle figure illustrates an exemplary embodiment of the invention, wherein two sets of adjacent piezoelectric resistors are present. The figure shows a schematic diagram of a pressure sensor. In this example, the membrane is square, and the first set of piezoelectric resistors (R1a, R2a, R1b, R2b) is present on a first side of the membrane, and the second set of piezoelectric resistors (R3a, R4a, R3b, R4b) is present on a second side of the membrane adjacent to the first side. Other membrane shapes (such as rectangular, circular, or elliptical) are also possible. However, the invention is not limited thereto.

[0055] An example of a semiconductor pressure sensor comprising a circular diaphragm according to an embodiment of the present invention is provided by Figure 4 A schematic diagram is shown. In the case of circular or elliptical membranes, the groups (Group 1: R1a, R2a, R1b, R2b; Group 2: R3a, R4a, R3b, R4b) can, for example, have angular spacing of 90° on the circle or ellipse. This is in Figure 4 The diagram illustrates a circular membrane. It shows a first group of varistors R1a and R2a, and a first group of resistors R1b and R2b, with the first group's resistors R1b and R2b located outside the membrane and therefore insensitive to pressure on the membrane. The second group includes varistors R3a and R4a, and pressure-insensitive resistors R3b and R4b. In this example, the angular spacing between the two groups is 90°. This is the angle between a first line passing through the center of the circle and the center of the first group, and a second line passing through the center of the circle and the center of the second group.

[0056] Therefore, in embodiments of the present invention, the first group of adjacent piezoelectric resistors includes a first resistor pair R1a, R2a and a third resistor pair R1b, R2b, and the second group of adjacent piezoelectric resistors includes a second resistor pair R3a, R4a and a fourth resistor pair R3b, R4b. The first group of adjacent piezoelectric resistors and the second group of adjacent piezoelectric resistors are located in different stress regions.

[0057] The first resistor pair R1a and R2a are located on or adjacent to the edge of the membrane, at a position on the membrane where stress is caused by a pressure difference above the membrane. The second resistor pair R3a and R4a are separate from the first resistor pair and are located on or adjacent to the edge of the membrane, at a position on the membrane where stress is caused by a pressure difference above the membrane. The first and second resistor pairs are sensing resistors. Therefore, the first and second resistor pairs are sensitive to stress caused by pressure on the membrane.

[0058] The third and fourth resistor pairs are positioned where the stress caused by the pressure difference is lower or negligible compared to the stress caused at the locations of the first and third resistor pairs. Therefore, the third resistor pairs R1b and R2b and the fourth resistor pair R3b and R4b can be located at least partially outside the membrane or at least partially within the zero-stress region of the membrane. The third and fourth resistor pairs are compensating resistors.

[0059] The third and fourth resistor pairs can be positioned, for example, such that the piezoelectric resistors of these pairs are 50%, or even 70%, or even 90%, or even 95% less sensitive to the applied pressure than the piezoelectric resistors of the first and second resistor pairs near the edge of the membrane.

[0060] The piezoresistive elements of the first resistor pair R1a, R2a and the second resistor pair R3a, R4a of the piezoelectric resistor can be substantially located on the film. For example, at least 50%, or even at least 60%, or even at least 70%, or even at least 80%, or 90% of the piezoelectric resistor surface area can be located on the film. A portion of it can be located at the edge of the film because that edge may be subjected to relatively high stress when a pressure difference is applied to the film.

[0061] In embodiments of the invention, when the piezoelectric resistors in the third and fourth resistor pairs are substantially located outside the membrane, for example, at least 90% of the surface area of ​​the piezoelectric resistors may be located outside the membrane. In embodiments of the invention, when the piezoelectric resistors in the third and fourth resistor pairs are outside the membrane edge, they may be located near the membrane edge to better match the piezoelectric resistors in the first and second resistor pairs, respectively; however, they may be located further away from the membrane edge than the piezoelectric resistors in the first and second resistor pairs.

[0062] Figure 3 The middle diagram shows an example with a compensation resistor on the outside of the membrane. Resistor “a” is a sensing resistor, and resistor “b” is a compensation resistor. Figure 5 The middle figure shows an example of a compensating resistor on the zero-stress region 115 of the membrane 110.

[0063] In embodiments of the invention, the resistors in each resistor pair are orthogonal. In embodiments of the invention, the resistors are connected in a Wheatstone bridge configuration designed such that variations in the resistor signal caused by interference (such as, for example, stress or temperature gradients on the sensor) are significantly reduced or even completely eliminated.

[0064] In embodiments of the present invention, the resistors can be connected in the following Wheatstone bridge configuration:

[0065] The first resistor R1a in the first resistor pair and the first resistor R1b in the third resistor pair are connected in series at the first bias node V. 电桥 With the first output node V inm between;

[0066] The second resistor R2a in the first resistor pair and the second resistor R2b in the third resistor pair are connected in series at the first output node V. inm Between and the second bias node GND;

[0067] The first resistor R3a in the second resistor pair and the first resistor R3b in the fourth resistor pair are connected in series at the first bias node V. 电桥 With the second output node V inp between;

[0068] The second resistor R4a in the second resistor pair and the second resistor R4b in the fourth resistor pair are connected in series at the second output node V. inp Between and the second bias node GND.

[0069] Given the series connection of the measuring and compensating resistors, a particularly advantageous configuration is achieved because it enables efficient wiring, even when the number of metals in the microelectromechanical system design is limited to one. Furthermore, this particular Wheatstone bridge configuration has the advantage of limiting the number of bonding pads.

[0070] In embodiments of the present invention, the piezoelectric resistors can be positioned in a point-symmetrical arrangement:

[0071] The first resistor R1a in the first resistor pair is orthogonal to the first resistor R1b in the third resistor pair, and

[0072] The second resistor R2a in the first resistor pair is orthogonal to the second resistor R2b in the third resistor pair, and

[0073] The first resistor (R3a) in the second resistor pair is orthogonal to the first resistor (R3b) in the fourth resistor pair, and

[0074] The second resistor R4a in the second resistor pair is orthogonal to the second resistor R4b in the fourth resistor pair.

[0075] When the substrate has a silicon surface with (100) orientation, for a p-type substrate, the varistor is preferably oriented along... <110> The orientation is determined, and for an n-type substrate, the varistor is preferably positioned as follows: <100> The orientation is determined. The reference resistor should be in the same family of orientations as the varistor (e.g., ...). <110> This allows for compensation for packaging stress.

[0076] In embodiments of the invention where the membrane has a square or rectangular shape, a first set of adjacent resistors can be arranged on a first side of the membrane, and a second set of adjacent resistors can be arranged on a second side of the membrane. The first side may be adjacent to the second side. Figure 3 An example is shown in the diagram. Alternatively, the first side can be opposite the second side.

[0077] like Figure 6 The Wheatstone configuration shown in the figure is suitable for, for example Figure 3 , Figure 4 and Figure 5 The diagram illustrates the layout of a semiconductor pressure sensor. A compensation resistor is connected to a piezoresistor in a single Wheatstone configuration by placing them in series.

[0078] In an embodiment of the present invention, the first output node V inm With the second output node V inp Voltage difference V between 输出 (V out This sensor is used to measure the pressure on the membrane. The voltage difference can be detected at the analog input interface. The signal can be converted to digital using an analog-to-digital converter. Sensor calibration can be performed digitally using the ADC value for the voltage difference and a calibration constant in a polynomial equation.

[0079] for Figure 6 For the Wheatstone bridge configuration, the following equation holds:

[0080]

[0081] To calculate the sensitivity, it is assumed that all compensation resistors are set to R and no encapsulation stress is applied. In this case, the following equation can be obtained:

[0082] R 1a =R 4a =R l and

[0083] R 2a =R 3a =R t ,and

[0084] R 1b =R 2b =R 4b =R 3b =R

[0085] Assume the original resistors are of the same value. Furthermore, assume the piezoresistive coefficients are also the same: α1 = α4 = β2 = β3 = γ.

[0086]

[0087] Replace R1 with R+γPR, and replace R with R-γPR. t Where P is the pressure on the membrane, the equation becomes:

[0088]

[0089]

[0090] The piezoelectric resistor will also change with temperature, and therefore the piezoelectric resistor will also change when there is a temperature gradient on the semiconductor pressure sensor.

[0091] When stress is applied to a piezoelectric resistor in the same direction as the current, the change in resistance will be different from the change in resistance when stress is applied perpendicularly to the current in the piezoelectric resistor.

[0092] The effect of stress on sensors Figure 7 As illustrated in the diagram. If a stress gradient exists where the stress is higher on the left and lower on the right, then the stress on R1 and R2 is higher than the stress on R3 and R4 (see Figure 1). Figure 7 (See the left figure). The stress on R1a is the same as the stress on R1b, and the stress on R2a is the same as the stress on R2b. The effect of stress on the piezoelectric coefficient of a piezoelectric resistor depends on the orientation of the piezoelectric resistor. For p-type resistors, the coefficient is almost the same, but for quadrature piezoelectric resistors, the opposite is true.

[0093] Because resistors R1a and R1b, as well as resistors R2a and R2b, have different orientations, stress is significantly compensated, and the output voltage V inm and V inp There was no significant change, and consequently, the differential voltage did not change significantly when the sensor was subjected to a stress gradient. The same was true for R3a and R3b, as well as R4a and R4b.

[0094] for Figure 7 The same reasoning can be applied to the diagram on the right, which illustrates localized stress concentrations. For each stress, compensation is applied individually. For example, if the first piezoelectric resistor R1a and the second piezoelectric resistor R1b are subjected to the same stress, the stress is locally and significantly compensated. Similarly, if the third piezoelectric resistor R2a and the fourth piezoelectric resistor R2b are subjected to the same stress, this stress is also locally and significantly compensated, and the output voltage will remain substantially constant.

[0095] Temperature compensation is achieved by providing adjacent resistors within each group. Temperature has a similar effect on resistors R1a and R1b in the first group. They will both increase or decrease with temperature changes. Therefore, having only resistors R1a and R1b will not compensate for the temperature effects on the resistors due to temperature changes. Therefore, resistors R2a and R2b are positioned close to resistors R1a and R1b so that they experience substantially the same temperature. By doing so, the temperature effects on the resistors are compensated, making the measured pressure substantially independent of temperature gradients or hot spots.

Claims

1. A semiconductor pressure sensor for measuring external pressure applied to the sensor, the semiconductor pressure sensor comprising: A membrane, as part of a semiconductor substrate, is designed to deform under said external pressure, the membrane having a membrane edge and a membrane thickness; The first group of adjacent resistors includes a first resistor pair (R1a, R2a) and a third resistor pair (R1b, R2b), and the second group of adjacent resistors includes a second resistor pair (R3a, R4a) and a fourth resistor pair (R3b, R4b). Wherein, the first resistor pair (R1a, R2a) is located on or adjacent to the edge of the membrane, and wherein the second resistor pair (R3a, R4a) is separate from the first resistor pair and is located on or adjacent to the edge of the membrane; Furthermore, the third resistor pair (R1b, R2b) is at least partially located outside the membrane or at least partially located in the zero-stress region of the membrane, and the fourth resistor pair (R3b, R4b) is at least partially located outside the membrane or at least partially located in the zero-stress region of the membrane. In this configuration, the resistors in each resistor pair are orthogonal. Furthermore, the first resistor (R1a) of the first resistor pair and the first resistor (R1b) of the third resistor pair are connected in series to the first bias node (V). 电桥 ) and the first output node (V inm )between; The second resistor (R2a) of the first resistor pair and the second resistor (R2b) of the third resistor pair are connected in series at the first output node (V). inm Between the second bias node (GND) and the second bias node; The first resistor (R3a) of the second resistor pair and the first resistor (R3b) of the fourth resistor pair are connected in series at the first bias node (V). 电桥 ) and the second output node (V inp )between; The second resistor (R4a) of the second resistor pair and the second resistor (R4b) of the fourth resistor pair are connected in series at the second output node (V). inp Between the second bias node (GND) and the second bias node.

2. The semiconductor pressure sensor according to claim 1, wherein, The first resistor (R1a) in the first resistor pair and the first resistor (R1b) in the third resistor pair are orthogonal, and the first resistor (R3a) in the second resistor pair and the first resistor (R3b) in the fourth resistor pair are orthogonal, and the second resistor (R2a) in the first resistor pair and the second resistor (R2b) in the third resistor pair are orthogonal, and the second resistor (R4a) in the second resistor pair and the second resistor (R4b) in the fourth resistor pair are orthogonal.

3. The semiconductor pressure sensor according to claim 1, wherein, The membrane has a square or rectangular shape.

4. The semiconductor pressure sensor according to claim 3, wherein, The first group of adjacent resistors is arranged on the first side of the membrane, and the second group of adjacent resistors is arranged on the second side of the membrane.

5. The semiconductor pressure sensor according to claim 4, wherein, The first side is adjacent to the second side.

6. The semiconductor pressure sensor according to claim 4, wherein, The first side is opposite to the second side.

7. The semiconductor pressure sensor according to claim 1, wherein, The membrane has a circular or elliptical shape.

8. The semiconductor pressure sensor according to claim 7, wherein, The first group and the second group have an angular interval of 90°.

9. The semiconductor pressure sensor according to claim 1, wherein, The voltage difference between the first output node and the second output node is used as a measurement of the pressure on the membrane.

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