Delay correction method and device and display system

Abstract

The invention relates to a delay correction method and device and a display system. The method comprises the following steps: acquiring an output signal of target equipment; the output signal is obtained based on a test signal input into the target equipment, and the test signal comprises a changing test mark; detecting first time information when the test mark changes in the output signal; acquiring second time information of the change of the test mark in the test signal; and performing delay adjustment on the target equipment based on a comparison result of the second time information and the first time information, thereby solving the problem of complex delay correction, simplifying the delay measurement and adjustment method, reducing the implementation requirements of the corresponding equipment, and improving the delay correction efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of delay correction, and in particular to a delay correction method, device and display system. Background Art

[0002] With the development of TV curtain wall related technologies such as embedded hardware splicing technology, multi-screen image processing technology, small pitch LED technology, etc., image display and control equipment, video matrix and other display and control equipment as the central controller of splicing curtain wall, have developed rapidly with their functions of displaying various computer analog / digital signals, composite video signals, color difference signals, etc. on the large screen and realizing free switching, superposition, combination of signals. However, the requirements for display and control equipment to process delay and synchronization when splicing multiple images are getting higher and higher.

[0003] The existing technology relies on the PTP precise time protocol. The delay measurement and correction processing methods on the display and control equipment are relatively complex, and have high requirements on the software and hardware implementation of the display and control equipment itself. Summary of the invention

[0004] In this embodiment, a delay correction method, device and display system are provided to solve the problem of complex delay correction in related technologies.

[0005] In a first aspect, a delay correction method is provided in this embodiment, the method comprising: Acquire an output signal of a target device; the output signal is obtained based on a test signal input to the target device, the test signal including a changing test mark; detecting first time information when the test mark changes in the output signal; Acquire second time information of the test mark changing in the test signal; Based on the comparison result of the second time information and the first time information, delay adjustment is performed on the target device.

[0006] In some of the embodiments, before obtaining the output signal output by the target device, the method further includes: Acquire an initial video signal generated by a signal source; Based on preset test information, a changing test mark is superimposed on the initial video signal to obtain the test signal; the test information includes superimposed position information and changing time information; The test signal is input to the target device.

[0007] In some embodiments, obtaining second time information of the test mark changing in the test signal includes: Acquiring the test signal; Based on the superimposed position information, the test mark in the test signal is detected to obtain second time information of the change of the test mark.

[0008] In some of the embodiments, detecting the first time information when the test mark changes in the output signal includes: Based on the superimposed position information, first time information when the test mark changes is detected in the output signal.

[0009] In some embodiments, based on the comparison result between the second time information and the first time information, delay adjustment is performed on the target device, including: For each of the target devices, calculating a delay difference based on the second time information and the first time information; Calculating a delay average based on the delay differences of the plurality of target devices; Based on the magnitude relationship between the delay difference and the delay mean of the current target device, the delay of the current target device is adjusted.

[0010] In some of these embodiments, the test mark includes a periodically changing test mark; The delay difference is obtained based on the second time information and the first time information in multiple cycles.

[0011] In some embodiments, based on the magnitude relationship between the delay difference and the delay mean of the current target device, delay adjustment is performed on the current target device, including: When the delay difference of the current target device is greater than the delay average, speed up the pixel clock of the target device; or, when the delay difference of the current target device is less than the delay average, slow down the pixel clock of the target device; Based on the adjusted target device, the comparison result between the second time information and the first time information is repeatedly calculated and the delay adjustment is performed until the delay difference of the target device is equal to the delay mean.

[0012] In a second aspect, a delay correction device is provided in this embodiment, and the device includes: A signal acquisition module, used for acquiring an output signal output by a target device; the output signal is obtained based on a test signal input to the target device, the test signal including a changing test mark; A first time acquisition module, used for detecting first time information when the test mark changes in the output signal; A second time acquisition module, used for acquiring second time information of the test mark changing in the test signal; A delay adjustment module is used to adjust the delay of the target device based on the comparison result of the second time information and the first time information.

[0013] In a third aspect, a display system is provided in this embodiment, including a display screen, at least two target devices, and a delay correction device; The display screen is connected to each of the target devices, and each of the target devices is used to drive a local display area in the display screen; The delay correction device is connected to each of the target devices and is used to execute the steps of any one of the methods in the first aspect.

[0014] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the delay correction method described in the first aspect is implemented.

[0015] Compared with the related art, the delay correction method, device and display system provided in the present embodiment obtain the output signal of the target device; the output signal is obtained based on the test signal input to the target device, and the test signal includes a changing test mark; first time information when the test mark changes is detected in the output signal; second time information when the test mark changes in the test signal is obtained; based on the comparison result of the second time information and the first time information, the delay of the target device is adjusted, which solves the problem of complex delay correction, can simplify the delay measurement and adjustment method, reduce the requirements for corresponding device implementation, and improve the efficiency of delay correction.

[0016] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1 A hardware structure block diagram of a terminal of a delay correction method in one embodiment; Figure 2 A schematic diagram of a delay correction method in one embodiment; Figure 3 A schematic diagram of setting a delay mark in one embodiment; Figure 4A schematic diagram showing the structure of a system in one embodiment; Figure 5 It is a structural schematic diagram of a video delay correction device in a preferred embodiment; Figure 6 FIG. 4 is a structural block diagram of a delay correction device in an embodiment.

[0018] Attached figure numbers: 102, processor; 104, memory; 106, transmission device; 108, input and output device; 41, target device; 42, delay correction device; 43, display screen; 61, signal acquisition module; 62, first time acquisition module; 63, second time acquisition module; 64, delay adjustment module. DETAILED DESCRIPTION

[0019] In order to more clearly understand the purpose, technical solutions and advantages of the present application, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0020] Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the general meaning understood by people with general skills in the technical field to which this application belongs. The words "one", "a", "the", "these" and the like in this application do not indicate a quantitative limitation, and they may be singular or plural. The terms "include", "comprise", "have" and any variants thereof involved in this application are intended to cover non-exclusive inclusions; for example, a process, method and system, product or device comprising a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" may mean: A exists alone, A and B exist at the same time, and B exists alone. Generally, the character " / " indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", "third", etc. in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.

[0021] The method embodiment provided in this embodiment can be executed in a terminal, a computer or a similar computing device. For example, running on a terminal, Figure 1 FIG. 1 is a hardware structure diagram of a terminal of the delay correction method of this embodiment. Figure 1 As shown, the terminal may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 and a memory 104 for storing data, wherein the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA. The above terminal may also include a transmission device 106 and an input and output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above terminal. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations shown.

[0022] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the delay correction method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0023] The transmission device 106 is used to receive or send data via a network. The above network includes a wireless network provided by the communication provider of the terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (Radio Frequency, referred to as RF) module, which is used to communicate with the Internet wirelessly.

[0024] In this embodiment, a delay correction method is provided. Figure 2 is a flow chart of the delay correction method of this embodiment. Figure 2 As shown, the process includes the following steps: Step S210 , obtaining an output signal of the target device 41 ; the output signal is obtained based on a test signal input to the target device 41 , and the test signal includes a changing test mark.

[0025] Specifically, the target device 41 includes but is not limited to an audio playback device and a video processing device, etc. The test signal selects the corresponding audio signal or video signal based on the type of the target device 41. In one embodiment, the target device 41 is a display control device with the functions of video input, video processing (mainly including video scaling, video splicing, video fusion) and video output. The display control device generally has the ability to collect and output multiple channels of video, and is used in application scenarios such as large-scale conferences and exhibitions. Specifically, the test mark includes but is not limited to being implanted into the original signal in a superimposed or spliced ​​manner to obtain the test signal. Among them, the target device 41 often has a certain delay, and the delay of each target device 41 is not uniform, resulting in the output signal processed by the target device 41. The accuracy in time is affected, especially when multiple target devices 41 need to output jointly at the same time, the synchronization of the output between each target device 41 is reduced. Therefore, in this embodiment, there is a delay between the test signal input to the target device 41 and its output signal, and the delay can be calculated based on the test mark.

[0026] Step S220: Detecting first time information when the test mark changes in the output signal.

[0027] Step S230, obtaining second time information of the test mark changing in the test signal.

[0028] Specifically, the second time information can be detected from the test signal, that is, the moment when the test mark changes in the test signal is detected. When the test mark changes periodically, multiple sets of time information can be detected and obtained as the second time information. In addition, the second time information can also be obtained based on a preset test time, that is, the test signal sets the change of the test mark based on the preset test time, and the preset test time can be directly obtained for delay analysis.

[0029] Step S240: Based on the comparison result between the second time information and the first time information, delay adjustment is performed on the target device 41.

[0030] Specifically, the time difference between the output signal and the test signal is obtained by comparison, and the target device 41 is adjusted based on the time difference. Multiple target devices 41 can be adjusted to a uniform delay time difference, thereby improving the synchronization accuracy of each target device 41. In one embodiment, the clock of the target device 41 is preliminarily adjusted based on the time difference, and based on the adjusted target device 41, the output signal is re-collected, and the comparison result of the second time information and the first time information is calculated. After multiple rounds of feedback adjustment, the comparison result is made to approach the target value. In other embodiments, a corresponding relationship table of the comparison result and the degree of clock adjustment is pre-calculated. After the comparison result of the second time information and the first time information is calculated, the clock of the target device 41 is adjusted by looking up the table.

[0031] In this embodiment, the output signal of the target device 41 is obtained; the output signal is obtained based on the test signal input to the target device 41, and the test signal includes a changing test mark; the first time information when the test mark changes is detected in the output signal; the second time information when the test mark changes in the test signal is obtained; based on the comparison result of the second time information and the first time information, the delay of the target device 41 is adjusted, which solves the problem of complex delay correction, simplifies the delay measurement and adjustment method, reduces the requirements for the corresponding device implementation, and improves the efficiency of delay correction.

[0032] In some of the embodiments, before obtaining the output signal output by the target device 41 in step S220, the method further includes: Step S221, obtaining an initial video signal generated by a signal source.

[0033] Step S222: Based on preset test information, a changing test mark is superimposed on the initial video signal to obtain a test signal; the test information includes superimposed position information and changing time information.

[0034] For details, see Figure 3 , the test mark is superimposed on the specified area of ​​the initial video signal (the specified position is determined based on the superimposed position information). The specified area can be fixed or flexibly configured, but the superimposed position and the detection position must remain consistent. The specified area is generally selected as the upper left corner or upper right corner of the video. The changing test mark is a changing test pattern, including but not limited to changes between pure colors, color bars, horizontal stripes, vertical stripes and other patterns. The changing time information can be set to periodic changes, and the changing period is generally set to be greater than the processing delay period of the display and control device.

[0035] Step S223 , input the test signal into the target device 41 .

[0036] Specifically, the video (ie, the test signal) with the test pattern superimposed thereon is input to the display control device to be calibrated (ie, the target device 41 ), and is configured to be output and displayed at one or more output ports of the display control device.

[0037] In some embodiments, based on step S230, obtaining second time information of the test mark changing in the test signal includes: Step S231, obtaining a test signal.

[0038] Step S232: Based on the superimposed position information, the test mark in the test signal is detected to obtain second time information of the test mark change.

[0039] Specifically, when detecting the test pattern in the output signal or test signal, the recognition accuracy can be set. For example, RGB is 8-bit image data respectively. When pure red data is input, if the R value is greater than a certain threshold (typical value is 192), it is considered that the red data is detected, and if the GB component is less than a certain threshold (typical value is 64), it is considered that the blue and green data are not detected, thereby improving the recognition efficiency of the test mark.

[0040] In some of the embodiments, detecting the first time information when the test mark changes in the output signal includes: detecting the first time information when the test mark changes in the output signal based on the superimposed position information.

[0041] Specifically, based on the overlay position information, the test mark is detected in the specified area to ensure that the overlay position and the detection position remain consistent, thereby improving detection efficiency and accuracy.

[0042] In some embodiments, step S240, based on the comparison result of the second time information and the first time information, delay adjustment is performed on the target device 41, including: Step S241 : for each target device 41 , a delay difference is calculated based on the second time information and the first time information.

[0043] Step S242 , calculating the delay average based on the delay differences of multiple target devices 41 .

[0044] Step S243 , based on the magnitude relationship between the delay difference and the delay mean of the current target device 41 , the delay of the current target device 41 is adjusted.

[0045] Specifically, in a scenario involving multiple target devices 41 , delay adjustment is performed based on the delay averages of the multiple target devices 41 , thereby improving delay adjustment efficiency and adjustment reliability.

[0046] In some of the embodiments, the test mark includes a test mark that changes periodically; and the delay difference is obtained based on the second time information and the first time information in multiple periods.

[0047] Specifically, a test mark is periodically superimposed in the video signal source, and accurate delay measurement is achieved through the periodic change of the test mark in the test signal and the periodic change of the test mark in the output signal.

[0048] In some embodiments, based on step S243, based on the magnitude relationship between the delay difference and the delay mean of the current target device 41, the delay of the current target device 41 is adjusted, including: Step S310, when the delay difference of the current target device 41 is greater than the delay average, the pixel clock of the target device 41 is increased; or when the delay difference of the current target device 41 is less than the delay average, the pixel clock of the target device 41 is decreased.

[0049] Step S320: Based on the adjusted target device 41, repeatedly calculate the comparison result between the second time information and the first time information and perform delay adjustment until the delay difference of the target device 41 is equal to the delay mean.

[0050] Specifically, according to the delay difference ΔTn calculated for different target devices 41, the average delay ΔTavg of all target devices 41 is calculated, and the difference ΔTn-ΔTavg is calculated. If the difference is equal to 0, the corresponding target device 41 does not need to be adjusted; if the difference is greater than 0, the corresponding display control device needs to speed up the pixel clock of the output screen; if the difference is less than 0, the corresponding display control device needs to slow down the pixel clock of the output screen; and continue to execute from the first step so that the delay difference of all display control devices is equal to ΔTavg in the end, ensuring the synchronization of the output screens of all display control devices. It should be noted that the above-defined case where the delay difference ΔTn is equal to the delay average ΔTavg includes the case where there is an accuracy compensation value, that is, the difference ΔTn-ΔTavg is within the range of the accuracy compensation value.

[0051] In this embodiment, the pixel clock of the target device 41 is gradually adjusted through closed-loop feedback to achieve accurate adjustment of the delay.

[0052] In this embodiment, a display system is provided. Figure 4 The system includes at least two target devices 41 and a delay correction device 42. The delay correction device 42 is connected to each of the target devices 41 and is used to execute the steps of any one of the methods in the above embodiments.

[0053] The system further includes a display screen 43 ; the display screen 43 is connected to each of the target devices 41 , and each of the target devices 41 is used to drive a local display area in the display screen 43 .

[0054] In this embodiment, the delay correction and dynamic adjustment of the output image are automatically completed in real time by the delay correction device 42 and the target device 41, which can achieve a very high-precision synchronous display effect.

[0055] The present embodiment is described and illustrated below through preferred embodiments.

[0056] The delay correction method proposed in this preferred embodiment is applicable to the video delay correction scenario and is applied to the video delay correction device 42. The video delay correction device 42 is connected to at least two display control devices. The delay correction method of this preferred embodiment is implemented by the video delay correction device 42. Figure 5 The device includes a signal source superposition generation module, a test result acquisition module, a video discrimination module, a delay calculation module and a correction feedback adjustment module.

[0057] The video source superposition module is used to execute: step S1, periodically generate a test pattern Pt, and superimpose the test pattern Pt on the video source Vin to generate Vsrc, Vsrc is finally connected to the video input port of the display control device to be calibrated, and Vsrc is output to the subsequent video discrimination module.

[0058] The test result acquisition module is used to execute: Step S2, acquiring the delayed test video Vdst from the output port of the display control device to be calibrated.

[0059] The video discrimination module is used to execute: step S3, detecting the change of the test pattern Pt in the test video Vsrc according to the superimposed position information, and generating an interrupt INT0; step S4, detecting the change of the test pattern in Vdst according to the superimposed position information, and generating an interrupt INT1; step S5, outputting the INT0 and INT1 interrupt signals to the subsequent delay calculation module.

[0060] The delay calculation module is used to execute: step S6, generate a timer according to the local timing clock (typical value: 100Mhz, timing accuracy 10ns), the higher the local clock, the higher the timing accuracy; save the current value of the timer when the interrupt signal output by the video discrimination module is detected, and obtain T0 and T1 respectively when INT0 and INT1 interrupts arrive; step S7, obtain the result ΔT of the video processing delay of the display and control device to be corrected according to the difference between T1 and T0; Note: The periodic measurement result ΔT is obtained based on the superposition of periodic test patterns.

[0061] The delay correction feedback adjustment module is used to execute: step S8, based on the ΔTn calculated for different display and control devices, calculate the average value ΔTavg of the delay of all devices, and calculate the difference of ΔTn-ΔTavg. If the difference is equal to 0, notify the corresponding device that no adjustment is required; if the difference is greater than 0, notify the corresponding display and control device that the pixel clock of the output screen needs to be increased; if the difference is less than 0, notify the corresponding display and control device that the pixel clock of the output screen needs to be decreased. After adjusting the pixel clock, continue to execute from step S1 so that the delay of all display and control devices is finally close to ΔTavg, ensuring the synchronization of the output screens of all display and control devices.

[0062] In this preferred embodiment, a test pattern is superimposed on the video source, and accurate delay measurement and correction feedback to the device are achieved through input changes and detection, and output changes and detection of the test pattern, which solves the complex problem of delay correction and can simplify the delay measurement and adjustment methods. Compared with traditional solutions, this preferred embodiment has a closed-loop solution from signal source generation to delay measurement and correction feedback, which reduces the requirements for display and control equipment and improves the wide applicability of delay correction.

[0063] In this embodiment, a delay correction device 42 is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and will not be repeated hereafter. The terms "module", "unit", "subunit", etc. used below can implement a combination of software and / or hardware for a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0064] Figure 6 is a block diagram of the delay correction device 42 of this embodiment, as shown in Figure 6 As shown, the device includes: a signal acquisition module 61, a first time acquisition module 62, a second time acquisition module 63 and a delay adjustment module 64.

[0065] The signal acquisition module 61 is used to obtain an output signal output by the target device 41; the output signal is obtained based on a test signal input to the target device 41, and the test signal includes a changing test mark.

[0066] The first time acquisition module 62 is used to detect the first time information when the test mark changes in the output signal.

[0067] The second time acquisition module 63 is used to acquire second time information when the test mark changes in the test signal.

[0068] The delay adjustment module 64 is used to adjust the delay of the target device 41 based on the comparison result of the second time information and the first time information.

[0069] In some embodiments, before obtaining the output signal output by the target device 41, the method further includes: Acquire an initial video signal generated by a signal source; based on preset test information, superimpose a changing test mark on the initial video signal to obtain the test signal; the test information includes superimposed position information and changing time information; input the test signal into a target device 41.

[0070] In some embodiments, obtaining second time information of the test mark changing in the test signal includes: obtaining the test signal; and detecting the test mark in the test signal based on the superimposed position information to obtain second time information of the test mark changing.

[0071] In some of the embodiments, detecting the first time information when the test mark changes in the output signal includes: detecting the first time information when the test mark changes in the output signal based on the superimposed position information.

[0072] In some of the embodiments, based on the comparison result of the second time information and the first time information, the delay of the target device 41 is adjusted, including: for each of the target devices 41, based on the second time information and the first time information, calculating the delay difference; based on the delay differences of multiple target devices 41, calculating the delay average; based on the size relationship between the delay difference and the delay average of the current target device 41, adjusting the delay of the current target device 41.

[0073] In some of the embodiments, the test mark includes a test mark that changes periodically; and the delay difference is obtained based on the second time information and the first time information in multiple periods.

[0074] In some of the embodiments, based on the size relationship between the delay difference and the delay mean of the current target device 41, the delay of the current target device 41 is adjusted, including: when the delay difference of the current target device 41 is greater than the delay mean, speeding up the pixel clock of the target device 41; or, when the delay difference of the current target device 41 is less than the delay mean, slowing down the pixel clock of the target device 41; based on the adjusted target device 41, repeatedly calculating the comparison result of the second time information and the first time information and performing the delay adjustment until the delay difference of the target device 41 is equal to the delay mean.

[0075] It should be noted that the above modules can be functional modules or program modules, and can be implemented by software or hardware. For modules implemented by hardware, the above modules can be located in the same processor; or the above modules can be located in different processors in any combination.

[0076] In this embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0077] Optionally, the computer device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0078] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation modes, and will not be repeated in this embodiment.

[0079] In addition, in combination with the delay correction method provided in the above embodiments, a storage medium may be provided in this embodiment to implement the delay correction method. The storage medium stores a computer program; when the computer program is executed by a processor, any delay correction method in the above embodiments is implemented.

[0080] It should be understood that the specific embodiments described herein are only used to explain the application, rather than to limit it. Based on the embodiments provided in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of this application.

[0081] Obviously, the drawings are only some examples or embodiments of the present application. For ordinary technicians in the field, the present application can also be applied to other similar situations based on these drawings without creative work. In addition, it is understandable that although the work done in this development process may be complicated and lengthy, for ordinary technicians in the field, certain changes in design, manufacturing or production based on the technical content disclosed in this application are only conventional technical means and should not be regarded as insufficient content disclosed in this application.

[0082] The term "embodiment" in this application refers to a specific feature, structure or characteristic described in conjunction with the embodiment that can be included in at least one embodiment of the present application. The appearance of this phrase in various locations in the specification does not necessarily mean the same embodiment, nor does it mean that it is mutually exclusive with other embodiments and is independent or optional. It is clearly or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.

[0083] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of patent protection. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the attached claims.

Claims

1. A delay correction method, characterized in that: The method comprises: Acquire an output signal of a target device; the output signal is obtained based on a test signal input to the target device, the test signal including a changing test mark; detecting first time information when the test mark changes in the output signal; Acquire second time information of the test mark changing in the test signal; Based on the comparison result of the second time information and the first time information, delay adjustment is performed on the target device.

2. The delay correction method according to claim 1, characterized in that: Before obtaining the output signal output by the target device, it also includes: Acquire an initial video signal generated by a signal source; Based on preset test information, a changing test mark is superimposed on the initial video signal to obtain the test signal; the test information includes superimposed position information and changing time information; The test signal is input to the target device.

3. The delay correction method according to claim 2, characterized in that: Acquiring second time information of the test mark changing in the test signal includes: Acquiring the test signal; Based on the superimposed position information, the test mark in the test signal is detected to obtain second time information of the change of the test mark.

4. The delay correction method according to claim 2, characterized in that: The first time information when the test mark changes is detected in the output signal, comprising: Based on the superimposed position information, first time information when the test mark changes is detected in the output signal.

5. The delay correction method according to claim 1, characterized in that: Based on the comparison result of the second time information and the first time information, delay adjustment is performed on the target device, including: For each of the target devices, calculating a delay difference based on the second time information and the first time information; Calculating a delay average based on the delay differences of the plurality of target devices; Based on the magnitude relationship between the delay difference and the delay mean of the current target device, the delay of the current target device is adjusted.

6. The delay correction method according to claim 5, characterized in that: The test mark includes a periodically changing test mark; The delay difference is obtained based on the second time information and the first time information in multiple cycles.

7. The delay correction method according to claim 5, characterized in that: Based on the magnitude relationship between the delay difference and the delay mean of the current target device, delay adjustment is performed on the current target device, including: When the delay difference of the current target device is greater than the delay average, speed up the pixel clock of the target device; or, when the delay difference of the current target device is less than the delay average, slow down the pixel clock of the target device; Based on the adjusted target device, the comparison result between the second time information and the first time information is repeatedly calculated and the delay adjustment is performed until the delay difference of the target device is equal to the delay mean.

8. A delay correction device, characterized in that: The device comprises: A signal acquisition module, used for acquiring an output signal output by a target device; the output signal is obtained based on a test signal input to the target device, the test signal including a changing test mark; A first time acquisition module, used for detecting first time information when the test mark changes in the output signal; A second time acquisition module, used for acquiring second time information of the test mark changing in the test signal; A delay adjustment module is used to adjust the delay of the target device based on the comparison result of the second time information and the first time information.

9. A display system, characterized in that: It includes a display screen, at least two target devices and a delay correction device; The display screen is connected to each of the target devices, and each of the target devices is used to drive a local display area in the display screen; The delay correction device is connected to each of the target devices and is used to execute the steps of any one of the methods of claim 1 to claim 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

Images