Pixel circuit, driving method thereof, display panel and display device

Abstract

Embodiments of the present application disclose a pixel circuit, a driving method thereof, a display panel and a display device. The pixel circuit comprises a driving module, a voltage control module and a light emitting module. The driving module and the voltage control module are connected between a first power supply line and a first end of the light emitting module. A second end of the light emitting module is connected to a second power supply line. The driving module is configured to drive the light emitting module to emit light. The voltage control module is configured to control a voltage at a connection end of the driving module and the voltage control module when a display gray scale is less than a preset gray scale. The technical solution provided by the embodiments can improve display brightness at a low gray scale, and is beneficial to improving display effect.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, a display panel and a display device. Background Technology

[0002] With the continuous development of display technology, people have increasingly higher requirements for display quality.

[0003] Currently, the display panels in related technologies suffer from poor display quality. Summary of the Invention

[0004] This invention provides a pixel circuit and its driving method, a display panel, and a display device to improve display performance.

[0005] According to one aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a voltage control module, and a light-emitting module;

[0006] The driving module and the voltage control module are connected between the first power line and the first end of the light-emitting module. The second end of the light-emitting module is connected to the second power line. The driving module is used to drive the light-emitting module to emit light. The voltage control module is used to control the voltage at one end of the connection between the driving module and the voltage control module when the displayed grayscale is less than the preset grayscale.

[0007] Optionally, when the displayed grayscale is less than the preset grayscale, the transistors included in the voltage control module are in the subthreshold region;

[0008] Optionally, the preset grayscale is 32 grayscale levels;

[0009] Optionally, the preset grayscale is 16 grayscale levels;

[0010] Optionally, when displaying a black screen, the transistors included in the voltage control module are in the cutoff region;

[0011] Optionally, the display grayscale corresponding to the black screen is 0 grayscale.

[0012] Optionally, when the displayed grayscale is greater than or equal to the preset grayscale, the transistors included in the voltage control module are in the linear region or the saturation region.

[0013] Optionally, the control terminal of the voltage control module is connected to the first voltage signal line, which is used to transmit the first voltage.

[0014] When the displayed grayscale is less than the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is less than the absolute value of the threshold voltage of the voltage control module. One end of the driving module is the end connected to the voltage control module.

[0015] When the displayed grayscale is greater than or equal to the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is greater than or equal to the absolute value of the threshold voltage of the voltage control module, and one end of the driving module is the end connected to the voltage control module.

[0016] Optionally, the first voltage is a DC voltage.

[0017] Optionally, the pixel circuit further includes a first light-emitting control module and a second light-emitting control module, wherein the control terminal of the first light-emitting control module is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module is connected to a second light-emitting control signal line.

[0018] The first end of the first light-emitting control module is connected to the first power line, the second end of the first light-emitting control module is connected to the first end of the drive module, the second end of the drive module is connected to the first end of the voltage control module, the second end of the voltage control module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting control module is connected to the first end of the light-emitting module.

[0019] Alternatively, the first end of the first light-emitting control module is connected to the first power line, the second end of the first light-emitting control module is connected to the first end of the driving module, the second end of the driving module is connected to the first end of the second light-emitting control module, the second end of the second light-emitting control module is connected to the first end of the voltage control module, and the second end of the voltage control module is connected to the first end of the light-emitting module.

[0020] Optionally, the driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the second light-emitting control module includes a fourth transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to a first light-emitting control signal line, the first electrode of the third transistor is connected to a first power supply line, the first electrode of the first transistor serves as the first terminal of the driving module and is connected to the second electrode of the third transistor, the second electrode of the first transistor serves as the second terminal of the driving module and is connected to the first electrode of the second transistor, the second electrode of the second transistor is connected to the first electrode of the fourth transistor, the second electrode of the fourth transistor is connected to the first electrode of the light-emitting diode, the second electrode of the light-emitting diode is connected to a second power supply line, the gate of the second transistor is connected to a first voltage signal line, and the gate of the fourth transistor is connected to a second light-emitting control signal line.

[0021] Alternatively, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the third transistor is connected to the first power supply line, the first terminal of the first transistor is connected to the second terminal of the third transistor as the first end of the driving module, the second terminal of the first transistor is connected to the first terminal of the fourth transistor as the second end of the driving module, the second terminal of the fourth transistor is connected to the first terminal of the second transistor, the second terminal of the second transistor is connected to the first terminal of the light-emitting diode, and the second terminal of the light-emitting diode is connected to the second power supply line.

[0022] Optionally, the first transistor is a P-type transistor or an N-type transistor, and the second transistor is a P-type transistor;

[0023] Optionally, when the first transistor is a P-type transistor, the first light-emitting control signal line is multiplexed as the second light-emitting control signal line.

[0024] Optionally, the pixel circuit further includes a first light-emitting control module and a second light-emitting control module, wherein the control terminal of the first light-emitting control module is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module is connected to a second light-emitting control signal line.

[0025] The first end of the first light-emitting control module is connected to the first power supply line, the second end of the first light-emitting control module is connected to the first end of the voltage control module, the second end of the voltage control module is connected to the first end of the drive module, the second end of the drive module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting control module is connected to the first end of the light-emitting module.

[0026] Alternatively, the first end of the voltage control module is connected to the first power line, the second end of the voltage control module is connected to the first end of the first light-emitting control module, the second end of the first light-emitting control module is connected to the first end of the drive module, the second end of the drive module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting module is connected to the first end of the light-emitting module.

[0027] Optionally, the driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the second light-emitting control module includes a fourth transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to a first light-emitting control signal line, the first electrode of the third transistor is connected to a first power supply line, the second electrode of the third transistor is connected to the first electrode of the second transistor, the first electrode of the first transistor serves as the first terminal of the driving module and is connected to the second electrode of the second transistor, the second electrode of the first transistor serves as the second terminal of the driving module and is connected to the first electrode of the fourth transistor, the second electrode of the fourth transistor is connected to the first electrode of the light-emitting diode, the second electrode of the light-emitting diode is connected to a second power supply line, the gate of the second transistor is connected to a first voltage signal line, and the gate of the fourth transistor is connected to a second light-emitting control signal line.

[0028] Alternatively, the first terminal of the second transistor is connected to the first power line, the second terminal of the second transistor is connected to the first terminal of the third transistor, the first terminal of the first transistor is connected to the second terminal of the third transistor as the first end of the driving module, the second terminal of the first transistor is connected to the first terminal of the fourth transistor as the second end of the driving module, the second terminal of the fourth transistor is connected to the first terminal of the light-emitting diode, and the second terminal of the light-emitting diode is connected to the second power line.

[0029] Optionally, the first transistor is an N-type transistor, and the second transistor is an N-type transistor;

[0030] Optionally, the first control terminal of the voltage control module is connected to the second light emission control signal line, and the second control terminal of the voltage control module is connected to the control terminal of the drive module.

[0031] Optionally, the pixel circuit further includes a first light emission control module, the control terminal of the first light emission control module is connected to a first light emission control signal line, the first end of the first light emission control module is connected to a first power supply line, the second end of the first light emission control module is connected to the first end of the driving module, the second end of the driving module is connected to the first end of the voltage control module, and the second end of the voltage control module is connected to the first end of the light emission module.

[0032] Optionally, the driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to the first light-emitting control signal line, the first electrode of the third transistor is connected to the first power supply line, the first electrode of the first transistor serves as the first terminal of the driving module and is connected to the second electrode of the third transistor, the second electrode of the first transistor serves as the second terminal of the driving module and is connected to the first electrode of the second transistor, the second electrode of the second transistor is connected to the first electrode of the light-emitting diode, the second electrode of the light-emitting diode is connected to the second power supply line, the first gate of the second transistor is connected to the second light-emitting control signal line, and the second gate of the second transistor is connected to the gate of the first transistor.

[0033] Optionally, the first gate of the second transistor is a top gate, and the second gate of the second transistor is a bottom gate;

[0034] Optionally, the channel type of the first transistor is the same as the channel type of the second transistor;

[0035] Optionally, both the first transistor and the second transistor are P-type transistors;

[0036] Optionally, the first light emission control signal line is multiplexed as the second light emission control signal line.

[0037] Optionally, the first control terminal of the voltage control module is connected to the second light emission control signal line, and the second control terminal of the voltage control module is connected to the control terminal of the drive module.

[0038] Optionally, the pixel circuit further includes a first light emission control module, the control terminal of the first light emission control module is connected to a first light emission control signal line, the first terminal of the voltage control module is connected to a first power supply line, the second terminal of the voltage control module is connected to the first terminal of the driving module, the second terminal of the driving module is connected to the first terminal of the first light emission control module, and the second terminal of the first light emission control module is connected to the first terminal of the light emission module.

[0039] Optionally, the driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the light-emitting module includes a light-emitting diode, the first gate of the second transistor is connected to a second light-emitting control signal line, the second gate of the second transistor is connected to the gate of the first transistor, the first electrode of the second transistor is connected to a first power supply line, the first electrode of the first transistor serves as the first terminal of the driving module and is connected to the second electrode of the second transistor, the second electrode of the first transistor serves as the second terminal of the driving module and is connected to the first electrode of the third transistor, the second electrode of the third transistor is connected to the first electrode of the light-emitting diode, and the second electrode of the light-emitting diode is connected to the second power supply line;

[0040] Optionally, the first gate of the second transistor is a top gate, and the second gate of the second transistor is a bottom gate;

[0041] Optionally, the channel type of the first transistor is the same as the channel type of the second transistor;

[0042] Optionally, both the first transistor and the second transistor are N-type transistors;

[0043] Optionally, the first light emission control signal line is multiplexed as the second light emission control signal line.

[0044] Optionally, the first transistor is a P-type transistor, and the pixel circuit further includes a first initialization module. The control terminal of the first initialization module is connected to the first scan signal line, the first terminal of the first initialization module is connected to the second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module.

[0045] Optionally, the first initialization module includes a fifth transistor, the gate of which is connected to a first scan signal line, the first terminal of which is connected to a second voltage signal line, and the second terminal of which is connected to the first terminal of a light-emitting diode.

[0046] Optionally, the pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the first terminal of the drive module. The data writing module is used to write data voltage to the control terminal of the drive module.

[0047] Optionally, the pixel circuit also includes a compensation module. The control terminal of the compensation module is connected to the second scan signal line. The compensation module is connected between the second terminal of the driving module and the control terminal. The compensation module is used to compensate the threshold voltage of the driving module.

[0048] Optionally, the pixel circuit further includes a storage module, which is connected between the control terminal of the drive module and the first power line;

[0049] Optionally, the data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor and the gate of the seventh transistor are both connected to the second scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the first terminal of the driving module, the first terminal of the seventh transistor is connected to the second terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first power line and the control terminal of the driving module.

[0050] Optionally, the pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to the third scan signal line, the first terminal of the second initialization module is connected to the third voltage signal line, and the second terminal of the second initialization module is connected to the control terminal of the drive module.

[0051] Optionally, the second initialization module includes an eighth transistor, the gate of which is connected to a third scan signal line, the first terminal of which is connected to a third voltage signal line, and the second terminal of which is connected to the control terminal of the drive module.

[0052] Optionally, the second or third scan signal line can be multiplexed as the first scan signal line.

[0053] Optionally, the first transistor is an N-type transistor, and the pixel circuit further includes a first initialization module. The control terminal of the first initialization module is connected to a first scan signal line, the first terminal of the first initialization module is connected to a second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module.

[0054] Optionally, the first initialization module includes a fifth transistor, the gate of which is connected to the first scan signal line, the first terminal of which is connected to the second voltage signal line, and the second terminal of which is connected to the first terminal of the light-emitting diode;

[0055] Optionally, the pixel circuit further includes a data writing module, the control terminal of which is connected to the second scan signal line, and the data writing module is connected to the second terminal of the driving module. The data writing module is used to write data voltage to the control terminal of the driving module.

[0056] Optionally, the pixel circuit further includes a compensation module, the control terminal of which is connected to the first scan signal line, and the compensation module is connected between the first terminal and the control terminal of the driving module. The compensation module is used to compensate the threshold voltage of the driving module.

[0057] Optionally, the pixel circuit further includes a storage module, which is connected between the control terminal of the driving module and the first terminal of the light-emitting module;

[0058] Optionally, the data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor is connected to the second scan signal line, the gate of the seventh transistor is connected to the first scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the second terminal of the driving module, the first terminal of the seventh transistor is connected to the first terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first terminal of the light-emitting module and the control terminal of the driving module.

[0059] Optionally, the voltage control module includes a first sub-control module and a second sub-control module. The control terminal of the first sub-control module is connected to a first light-emitting control signal line, and the control terminal of the second sub-control module is connected to a second light-emitting control signal line. The first end of the first sub-control module is connected to a first power supply line, and the second end of the first control module is connected to the first end of the drive module. The second end of the drive module is connected to the first end of the second sub-control module, and the second end of the second control module is connected to the first end of the light-emitting module.

[0060] When the displayed gray level is less than the preset gray level, the transistors included in the first sub-control module and / or the second sub-control module are in the subthreshold region.

[0061] Optionally, the driving module includes a first transistor, the first sub-control module includes a ninth transistor, the second sub-control module includes a tenth transistor, and the light-emitting module includes a light-emitting diode. The gate of the ninth transistor is connected to a first light-emitting control signal line, the first terminal of the ninth transistor is connected to a first power supply line, the second terminal of the ninth transistor is connected to the first terminal of the first transistor, the second terminal of the first transistor is connected to the first terminal of the tenth transistor, the second terminal of the tenth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to a second power supply line, and the gate of the tenth transistor is connected to a second light-emitting control signal line.

[0062] Optionally, the pixel circuit further includes a first initialization module, the control terminal of the first initialization module is connected to the first scan signal line, the first terminal of the first initialization module is connected to the second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module.

[0063] Optionally, the first initialization module includes a fifth transistor, the gate of which is connected to a first scan signal line, the first terminal of which is connected to a second voltage signal line, and the second terminal of which is connected to the first terminal of a light-emitting diode.

[0064] Optionally, the absolute value of the effective level of the first light-emitting control signal transmitted on the first light-emitting control signal line is less than the absolute value of the effective level of the first scan signal transmitted on the first scan signal line; and / or,

[0065] The absolute value of the effective level of the second light emission control signal transmitted on the second light emission control signal line is less than the absolute value of the effective level of the first scan signal transmitted on the first scan signal line.

[0066] Optionally, the ninth transistor and the tenth transistor have the same channel type;

[0067] Optionally, the first light emission control signal line is multiplexed as the second light emission control signal line.

[0068] Optionally, the pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the drive module and is used to write data voltage to the control terminal of the drive module.

[0069] The pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the drive module and is used to write data voltage to the control terminal of the drive module.

[0070] The pixel circuit further includes a compensation module. The control terminal of the compensation module is connected to the second scan signal line. The compensation module is connected between the second terminal and the control terminal of the driving module. Alternatively, the control terminal of the compensation module is connected to the first scan signal line. The compensation module is connected between the first terminal and the control terminal of the driving module. The compensation module is used to compensate the threshold voltage of the driving module.

[0071] Optionally, the pixel circuit also includes a storage module, which is connected to the control terminal of the drive module;

[0072] Optionally, the first transistor is a P-type transistor; the data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor and the gate of the seventh transistor are both connected to the second scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the first terminal of the driving module, the first terminal of the seventh transistor is connected to the second terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first power line and the control terminal of the driving module.

[0073] Optionally, the pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to the third scan signal line, the first terminal of the second initialization module is connected to the third voltage signal line, and the second terminal of the second initialization module is connected to the control terminal of the drive module.

[0074] Optionally, the second initialization module includes an eighth transistor, the gate of which is connected to a third scan signal line, the first terminal of which is connected to a third voltage signal line, and the second terminal of which is connected to the control terminal of the drive module.

[0075] Optionally, the third scan signal line is multiplexed as the first scan signal line.

[0076] Optionally, the first transistor is an N-type transistor; the data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor is connected to the second scan signal line, the gate of the seventh transistor is connected to the first scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the second terminal of the driving module, the first terminal of the seventh transistor is connected to the first terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first terminal of the light-emitting module and the control terminal of the driving module.

[0077] According to another aspect of the present invention, a driving method for a pixel circuit is provided, the pixel circuit including a driving module, a voltage control module, and a light-emitting module; the driving method for the pixel circuit includes:

[0078] During the light-emitting stage, the control driving module drives the light-emitting module to emit light; wherein, when the displayed gray level is less than the preset gray level, the control voltage control module controls the voltage at one end of the connection between the driving module and the voltage control module.

[0079] Optionally, the voltage control module includes a transistor, and controlling the voltage at the end of the drive module connected to the voltage control module includes:

[0080] The transistor in the control voltage control module responds to the signal at the control terminal of the control voltage control module in the subthreshold region.

[0081] Preferably, controlling the voltage at the end of the drive module connected to the voltage control module by the voltage control module includes:

[0082] When the displayed grayscale is greater than 0 grayscale and less than the preset grayscale, the transistor in the voltage control module is controlled to respond to the signal at the control terminal of the voltage control module and be in the subthreshold region.

[0083] When the displayed grayscale is 0, the transistor in the voltage control module is controlled to be in the cutoff region in response to the signal at the control terminal of the voltage control module.

[0084] Optionally, the driving method for the pixel circuit further includes:

[0085] During the non-light-emitting phase, the transistors in the control voltage control module are in the cutoff region in response to the signal at the control terminal of the control voltage control module.

[0086] According to another aspect of the present invention, a display panel is provided, the display panel comprising:

[0087] Substrate;

[0088] The active layer is located on one side of the substrate;

[0089] A multilayer conductive layer is stacked on the side of the active layer away from the substrate;

[0090] At least one pixel circuit, the pixel circuit including a driving module, a voltage control module and a light-emitting module, wherein the driving module includes a first transistor, the voltage control module includes a second transistor, and the light-emitting module includes a light-emitting diode;

[0091] The multilayer conductive layer includes a first conductive layer, the gate of the first transistor and the gate of the second transistor are both located in the first conductive layer, and the orthogonal projection of the gate of the second transistor on the substrate is located between the orthogonal projection of the gate of the first transistor on the substrate and the orthogonal projection of the first electrode of the light-emitting diode on the substrate.

[0092] Optionally, the active layer includes a first active layer, the channel region of the first transistor is located in the first active layer, and the orthogonal projection of the gate of the first transistor on the substrate at least partially covers the orthogonal projection of the channel region of the first transistor on the substrate.

[0093] Optionally, the pixel circuit further includes a first light-emitting control module and a second light-emitting control module. The first light-emitting control module includes a third transistor, and the second light-emitting control module includes a fourth transistor. The active layer further includes a second active layer and a third active layer. The channel region of the third transistor is located in the second active layer, and the channel region of the fourth transistor is located in the third active layer. The orthogonal projection of the gate of the third transistor on the substrate at least partially covers the orthogonal projection of the channel region of the third transistor on the substrate, and the orthogonal projection of the gate of the fourth transistor on the substrate at least partially covers the orthogonal projection of the channel region of the fourth transistor on the substrate.

[0094] Optionally, the first active layer, the second active layer, and the third active layer are on the same layer and connected.

[0095] Optionally, the second active layer extends along the second direction, and the third active layer extends along the second direction, with the second active layer and the third active layer located on different sides of the first active layer;

[0096] Optionally, the orthogonal projection of the gate of the second transistor onto the substrate is located on the side where the orthogonal projection of the gate of the fourth transistor onto the substrate is away from the orthogonal projection of the gate of the first transistor onto the substrate.

[0097] The display panel also includes a first voltage signal line located in the first conductive layer, and the orthographic projection of the first voltage signal line on the substrate at least partially covers the orthographic projection of the channel region of the second transistor on the substrate.

[0098] Optionally, the channel region of the second transistor is located in the third active layer;

[0099] Optionally, the orthographic projection of the first voltage signal line on the substrate does not overlap with the orthographic projection of the second active layer on the substrate;

[0100] Optionally, the first voltage signal line extends along a first direction, which intersects with a second direction.

[0101] Optionally, the display panel further includes a first light emission control signal line, which is intersected with the second active layer and the third active layer;

[0102] Optionally, the orthographic projection of the first light-emitting control signal line on the substrate is located between the orthographic projection of the first voltage signal line on the substrate and the orthographic projection of the gate of the first transistor on the substrate.

[0103] Optionally, the first light-emitting control signal line extends along a first direction;

[0104] Optionally, the pixel circuit further includes a first initialization module, which includes a fifth transistor, the channel region of which is located in the third active layer. The display panel also includes a first scan signal line, the orthographic projection of which on the substrate at least partially covers the orthographic projection of the channel region of the fifth transistor on the substrate.

[0105] Optionally, the display panel further includes a second voltage signal line and a connecting line. The multilayer conductive layer further includes a second conductive layer and a third conductive layer. The second voltage signal line is located on the second conductive layer, and the connecting line is located on the third conductive layer. The second voltage signal line is connected to one end of the connecting line through a via, and the third active layer is connected to the other end of the connecting line through a via.

[0106] Optionally, the second voltage signal line extends along the first direction, and the connecting line extends along the second direction;

[0107] Optionally, the orthogonal projection of the first scan signal line on the substrate is located between the orthogonal projection of the first voltage signal line on the substrate and the orthogonal projection of the second voltage signal line on the substrate, and the orthogonal projection of the first scan signal line on the substrate is located on the side of the orthogonal projection of the first voltage signal line on the substrate that is far from the orthogonal projection of the gate of the first transistor on the substrate.

[0108] According to another aspect of the present invention, a display device is provided, the display device including the display panel provided in any embodiment of the present invention.

[0109] The technical solution provided by this invention adds a voltage control module to the connection path between the driving module and the light-emitting module to cut off the direct connection between the driving module and the light-emitting module. The voltage control module controls the voltage at the connection point between the driving module and the voltage control module when the displayed grayscale is lower than a preset grayscale. This raises the voltage at the connection point, thereby reducing the voltage difference between the first and second terminals of the driving module. This reduces leakage current in the driving module at low grayscale levels, limits the current flowing to the light-emitting module, and improves the display brightness at low grayscale levels, thus enhancing the display effect.

[0110] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0111] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0112] Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0113] Figure 2 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0114] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0115] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0116] Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0117] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0118] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0119] Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0120] Figure 9 A schematic diagram of the driving timing of a pixel circuit provided in an embodiment of the present invention;

[0121] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0122] Figure 11 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0123] Figure 12 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention;

[0124] Figure 13 A schematic diagram of grayscale expansion provided in an embodiment of the present invention;

[0125] Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0126] Figure 15 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0127] Figure 16 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0128] Figure 17 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0129] Figure 18 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0130] Figure 19 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0131] Figure 20 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention;

[0132] Figure 21 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0133] Figure 22 This invention provides another schematic diagram of the structure of a display panel for an embodiment of the invention;

[0134] Figure 23 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0135] Figure 24 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0136] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0137] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0138] Display panels typically include pixel circuits, which consist of a driving module and light-emitting devices (LEDs). The driving module drives the LEDs to emit light, and the driving current directly affects the brightness of the LEDs. In recent years, with the emergence of high-voltage LEDs such as multilayer LEDs and quantum dot LEDs, the difference in anode voltage between the LEDs in black and bright states has become significant. When displaying low grayscale levels, the anode voltage of the LEDs is very low, resulting in a large voltage difference across the driving module. This leads to increased leakage current in the driving module, which in turn affects the brightness of low grayscale levels and reduces the display effect.

[0139] To address the aforementioned problems, embodiments of the present invention provide a pixel circuit to improve black state brightness, thereby achieving a black state display effect. Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, with reference to... Figure 1 The pixel circuit provided in this embodiment of the invention includes a driving module 110, a voltage control module 120, and a light-emitting module 130. The driving module 110 and the voltage control module 120 are connected between a first power line L1 and a first end of the light-emitting module 130. The second end of the light-emitting module 130 is connected to a second power line L2. The driving module 110 is used to drive the light-emitting module 130 to emit light. The voltage control module 120 is used to control the voltage at one end of the connection between the driving module 110 and the voltage control module 120 when the displayed gray level is less than a preset gray level, so as to limit the current flowing to the light-emitting module 130.

[0140] Specifically, the preset grayscale can be used to divide low grayscale and medium-high grayscale. For example, when the currently displayed grayscale is less than the preset grayscale, it can be characterized as the currently displayed grayscale being low grayscale; when the currently displayed grayscale is greater than or equal to the preset grayscale, it can be characterized as the currently displayed grayscale being medium-high grayscale.

[0141] The pixel circuit also includes a data writing module 140, which is used to transmit data voltage Vdata to the driving module 110. Different display gray levels correspond to different data voltages Vdata.

[0142] When the grayscale level is medium to high, the data voltage Vdata corresponding to the current grayscale level is written to the control terminal of the drive module 110 through the data writing module 140. The drive module 110 generates a large drive current. The voltage control module 120 remains in the conducting state under the voltage of the second terminal N2 of the drive module 110. The drive module 110 drives the light-emitting module 130 to emit light, thereby realizing the medium to high grayscale display.

[0143] When the grayscale level is low, the data voltage Vdata corresponding to the current grayscale level is written to the control terminal of the drive module 110 through the data writing module 140. The drive module 110 generates a small drive current, and the voltage control module 120 is turned off or semi-conducted under the voltage of the second terminal N2 of the drive module 110, so as to realize the low grayscale display.

[0144] The technical solution provided by this invention adds a voltage control module 120 to the connection path between the driving module 110 and the light-emitting module 130 to cut off the direct connection between the driving module 110 and the light-emitting module 130. The voltage control module 120 controls the voltage at the connection point between the driving module 110 and the voltage control module 120 when the displayed grayscale is less than a preset grayscale. This raises the voltage at the connection point, thereby reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110. This reduces leakage current in the driving module 110 at low grayscale levels, limits the current flowing to the light-emitting module 130, and improves the display brightness at low grayscale levels, thus enhancing the display effect.

[0145] Figure 2 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 2Based on the above embodiments, optionally, when the displayed grayscale is less than a preset grayscale, the transistors included in the voltage control module are in the cutoff region or subthreshold region. For example, the driving module 110 includes a first transistor M1, the voltage control module 120 includes a second transistor M2, and the light-emitting module 130 includes a light-emitting diode D1. The second terminal of the first transistor M1 is connected to the first terminal of the second transistor M2, and the second terminal of the second transistor M2 is connected to the first terminal (anode) of the light-emitting diode D1. Taking the example that both the first transistor M1 and the second transistor M2 are P-type transistors, the first terminal is the source, and the second terminal is the drain.

[0146] The control terminal of the voltage control module 120 is connected to the first voltage signal line, which transmits the first voltage V1. When the displayed grayscale is less than a preset grayscale, the first voltage V1 is greater than the voltage at the first terminal of the light-emitting module 130. The absolute value of the difference between the first voltage V1 and the voltage at one end of the driving module 110 is less than the absolute value of the threshold voltage of the voltage control module 120. One end of the driving module 110 is the end connected to the voltage control module 120. That is, by setting the first voltage V1, the voltage difference between the first voltage V1 and the voltage at the second terminal N2 of the driving module 110 is less than the threshold voltage Vth2 of the second transistor M2, thereby making the second transistor M2 in the subthreshold region. At low grayscale, the gate voltage of the second transistor M2 is fixed at the first voltage V1. Due to the inherent characteristics of the subthreshold region, the voltage of the first terminal (source) of the second transistor M2 is limited to a relatively stable range. Therefore, the change in the voltage of the first terminal of the second transistor M2 (i.e., the voltage of the second terminal N2 of the driving module 110) is less than V1-Vth2. Even if the voltage of the first terminal of the light-emitting diode D1 is small at low grayscale, it will not significantly lower the voltage of the first terminal of the second transistor M2, thereby increasing the voltage of the second terminal N2 of the driving module 110, and further reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, which is beneficial to reducing the leakage current of the driving module 110.

[0147] Optionally, in this embodiment, the preset grayscale can be 16 grayscale or 32 grayscale. When the displayed grayscale is 0, a black screen is displayed, i.e., it is in a black state.

[0148] The technical solution provided in this embodiment sets a first voltage V1 connected to the control terminal of the voltage control module 120. When the displayed grayscale is less than a preset grayscale, the second transistor included in the voltage control module 120 is placed in the subthreshold region. This limits the voltage of the second terminal N2 of the driving module 110 to a relatively stable range, preventing it from dropping to the voltage of the first electrode of the light-emitting diode D1. This, in turn, increases the voltage of the second terminal N2 of the driving module 110, reduces the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, and lowers the leakage current of the driving module 110. When displaying a black screen, the low leakage current of the driving module 110 ensures the display effect and prevents the black from being insufficiently black.

[0149] Optionally, when a black screen is displayed, the second transistor M2 included in the voltage control module 120 can also be in the cutoff region, which can also increase the voltage of the second terminal N2 of the drive module 120. The principle is similar to that of the second transistor M2 being in the subthreshold region, and will not be described in detail here.

[0150] Optionally, when the displayed grayscale is greater than or equal to the preset grayscale, the transistors included in the voltage control module 120 are in the linear region or saturation region, the absolute value of the difference between the first voltage V1 and the voltage at one end of the driving module 110 is greater than or equal to the absolute value of the threshold voltage of the voltage control module 120, and one end of the driving module 110 is the end connected to the voltage control module 120.

[0151] Specifically, when the displayed grayscale is greater than or equal to the preset grayscale, the driving current generated by the driving module 110 is larger, and the voltage of the second terminal N2 of the driving module 110 is larger, so that the absolute value of the gate-source voltage of the second transistor M2 included in the voltage control module 120 is much larger than the absolute value of the threshold voltage Vth2 of the second transistor M2, and the second transistor M2 is in a fully conducting state, which will not affect the normal display process.

[0152] Optionally, in this embodiment, the first voltage V1 can be a DC voltage. By reasonably configuring the voltage value of the first voltage V1, the second transistor M2 can be placed in the subthreshold region during low grayscale display, thereby increasing the voltage of the second terminal N2 of the driving module 110. Furthermore, it can be placed in the linear region or saturation region during medium-to-high grayscale display, without affecting the normal display of medium-to-high grayscale levels.

[0153] Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 3Based on the above embodiments, optionally, the pixel circuit further includes a first light-emitting control module 150 and a second light-emitting control module 160. The control terminal of the first light-emitting control module 150 is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module 160 is connected to a second light-emitting control signal line. A first terminal of the first light-emitting control module 150 is connected to a first power supply line L1, a second terminal of the first light-emitting control module 150 is connected to a first terminal N1 of a driving module 110, a second terminal N2 of the driving module 110 is connected to a first terminal of a voltage control module 120, a second terminal of the voltage control module 120 is connected to a first terminal of the second light-emitting control module 160, and a second terminal of the second light-emitting control module 160 is connected to a first terminal of the light-emitting module 130. The first light-emitting control signal line is used to transmit a first light-emitting control signal EM1, and the second light-emitting control signal line is used to transmit a second light-emitting control signal EM2. The first light-emitting control module 150 and the second light-emitting control module 160 are turned on during the light-emitting phase to control the light-emitting module 130 to emit light.

[0154] Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 4 The voltage control module 120 can also be connected between the second light-emitting control module 160 and the light-emitting module 130. Specifically, the first end of the first light-emitting control module 150 is connected to the first power line L1, the second end of the first light-emitting control module 150 is connected to the first end N1 of the drive module 110, the second end N2 of the drive module 110 is connected to the first end of the second light-emitting control module 160, the second end of the second light-emitting control module 160 is connected to the first end of the voltage control module 120, and the second end of the voltage control module 120 is connected to the first end of the light-emitting module 130.

[0155] in, Figure 3 The pixel circuit shown is Figure 4 The pixel circuits shown all operate on the same principle: when displaying low grayscale, the voltage at the second terminal N2 of the driving module 110 is increased by adjusting the first voltage V1, thereby reducing leakage current in the driving module 110. Figure 3 and Figure 4 In the pixel circuit shown, the first transistor M1 included in the driving module 110 is either a P-type transistor or an N-type transistor, and the second transistor M2 included in the voltage control module 120 is a P-type transistor. When the first transistor M1 is a P-type transistor, the first terminal N1 of the driving module 110 is the source of the first transistor M1, and the second terminal N2 of the driving module 110 is the drain of the first transistor M1. When the first transistor M1 is an N-type transistor, the first terminal N1 of the driving module 110 is the drain of the first transistor M1, and the second terminal N2 of the driving module 110 is the source of the first transistor M1.

[0156] Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 5 and Figure 6 The second transistor M2 included in the voltage control module 120 can also be an N-type transistor. When the second transistor M2 is an N-type transistor, the second voltage control module 120 is connected between the first power supply line L1 and the first terminal N1 of the drive module 110. For example, as Figure 5 As shown, the first terminal of the first light-emitting control module 150 is connected to the first power supply line L1, the second terminal of the first light-emitting control module 150 is connected to the first terminal of the voltage control module 120, the second terminal of the voltage control module 120 is connected to the first terminal N1 of the drive module 110, the second terminal N2 of the drive module 110 is connected to the first terminal of the second light-emitting control module 160, and the second terminal of the second light-emitting control module 160 is connected to the first terminal of the light-emitting module 130. For example, as... Figure 6 As shown, the first end of the voltage control module 120 is connected to the first power line L1, the second end of the voltage control module 120 is connected to the first end of the first light-emitting control module 150, the second end of the first light-emitting control module 150 is connected to the first end N1 of the drive module 110, the second end of the drive module 110 is connected to the first end of the second light-emitting control module 160, and the second end of the second light-emitting control module 160 is connected to the first end of the light-emitting module 130.

[0157] When the second transistor M2 is an N-type transistor, the first transistor M1 is also an N-type transistor. In this case, the first terminal N1 of the driving module 110 is the drain of the first transistor M1, and the second terminal N2 of the driving module 110 is the source of the first transistor M1.

[0158] In this embodiment, when the second transistor M2 is connected between the first power line L1 and the first terminal N1 of the driving module 110, since the second transistor M2 is an N-type transistor, the first voltage V1 is positive. Furthermore, at low grayscale, the difference between the first voltage V1 and the voltage at the first terminal N1 of the driving module 110 is less than the threshold voltage Vth2 of the second transistor M2, ensuring that the second transistor M2 is in the subthreshold region. By adjusting the first voltage V1, the voltage change at the second terminal (source) of the second transistor M2 can be less than V1 + Vth2, preventing the voltage at the second terminal of the second transistor M2 from rising to the first power supply voltage VDD. That is, the voltage at the first terminal N1 of the driving module 110 is less than the first power supply voltage VDD, which helps reduce the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, thereby reducing leakage current in the driving module 110 and achieving low grayscale display. This also avoids the phenomenon of insufficient black levels.

[0159] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Figure 8 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention, which corresponds to the overall structure of the pixel circuit when the first transistor M1 is a P-type transistor. (Refer to...) Figure 7 and Figure 8 The pixel circuit provided in this embodiment also includes a first initialization module 170. The control terminal of the first initialization module 170 is connected to a first scan signal line, the first terminal of the first initialization module 170 is connected to a second voltage signal line, and the second terminal of the first initialization module 170 is connected to the first terminal of the light-emitting module 130. The first scan signal line is used to transmit a first scan signal S1, and the first initialization module 170 is used to transmit a second initialization voltage Vref2 transmitted on the second voltage signal line to the first terminal of the light-emitting module 130 in response to the first scan signal S1, thereby initializing the light-emitting module 130.

[0160] The pixel circuit also includes a data writing module 140. The control terminal of the data writing module 140 is connected to the second scan signal line. The data writing module 140 is connected to the driving module 110 and is used to write the data voltage Vdata to the control terminal G of the driving module 110. The pixel circuit also includes a compensation module 160. The control terminal of the compensation module 160 is connected to the second scan signal line and is connected between the second terminal N2 of the driving module 110 and the control terminal G. The compensation module 160 is used to compensate the threshold voltage of the driving module 110. The data writing module 140 is connected to the first terminal N1 of the driving module 110, and the second scan signal line is used to transmit the second scan signal S2.

[0161] The pixel circuit also includes a storage module 150, which is connected to the control terminal G of the drive module 110.

[0162] The pixel circuit also includes a second initialization module 190. The control terminal of the second initialization module 190 is connected to the third scan signal line, the first terminal of the second initialization module 190 is connected to the third voltage signal line, and the second terminal of the second initialization module 190 is connected to the control terminal G of the drive module 110. The third scan signal line is used to transmit the third scan signal S3, and the second initialization module 190 is used to transmit the first initialization voltage Vref1 on the third voltage signal line to the control terminal G of the drive module 110 in response to the third scan signal S3.

[0163] Specifically, the first light-emitting control module 150 includes a third transistor M3, and the second light-emitting control module 160 includes a fourth transistor M4. The gate of the third transistor M3 is connected to the first light-emitting control signal line, and the first terminal of the third transistor M3 is connected to the first power supply line L1. The first terminal of the first transistor M1 serves as the first terminal N1 of the driving module 110 and is connected to the second terminal of the third transistor M3. The second terminal of the first transistor M1 serves as the second terminal N2 of the driving module 110 and is connected to the first terminal of the second transistor M2 (e.g., ...). Figure 7 As shown), the second terminal of the second transistor M2 is connected to the first terminal of the fourth transistor M4, the second terminal of the fourth transistor M4 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to the second power supply line L2, the gate of the second transistor M2 is connected to the first voltage signal line, and the gate of the fourth transistor M4 is connected to the second light-emitting control signal line. Alternatively, the second terminal of the first transistor M1 serves as the second terminal N2 of the driving module 110 and is connected to the first terminal of the fourth transistor M4 (as shown). Figure 8 As shown, the second terminal of the fourth transistor M4 is connected to the first terminal of the second transistor M2, and the second terminal of the second transistor M2 is connected to the first terminal of the light-emitting diode D1.

[0164] The first initialization module 170 includes a fifth transistor M5. The gate of the fifth transistor M5 is connected to the first scan signal line, the first terminal of the fifth transistor M5 is connected to the second voltage signal line, and the second terminal of the fifth transistor M5 is connected to the first terminal of the light-emitting diode D1. The data writing module 140 includes a sixth transistor M6, the compensation module 180 includes a seventh transistor M7, and the storage module 150 includes a storage capacitor C1. The gates of both the sixth transistor M6 and the seventh transistor M7 are connected to the second scan signal line. The first terminal of the sixth transistor M6 is connected to the data line, and the second terminal of the sixth transistor M6 is connected to the first terminal N1 of the driving module 110. The first terminal of the seventh transistor M7 is connected to the second terminal N2 of the driving module 110, and the second terminal of the seventh transistor M7 is connected to the control terminal G of the driving module 110. The storage capacitor C1 is connected between the first power supply line L1 and the control terminal G of the driving module 110. The second initialization module 190 includes an eighth transistor M8. The gate of the eighth transistor M8 is connected to the third scan signal line, the first terminal of the eighth transistor M8 is connected to the third voltage signal line, and the second terminal of the eighth transistor M8 is connected to the control terminal G of the driving module 110.

[0165] Optionally, in this embodiment, as Figure 8 As shown, the first light emission control signal line can be multiplexed as the second light emission control signal line, and the first light emission control signal EM1 can be multiplexed as the second light emission control signal EM2. The second scan signal line or the third scan signal line can be multiplexed as the first scan signal line, and the second scan signal S2 or the third scan signal S3 can be multiplexed as the first scan signal S1.

[0166] Figure 9 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention, which can be applied to... Figures 7-8 The pixel circuit shown, exemplarily, refers to Figure 8 Taking the third scanning signal S3 multiplexed as the first scanning signal S1 and the first light emission control signal EM1 multiplexed as the second light emission control signal EM2 as an example, the working process of the pixel circuit provided in this embodiment includes an initialization stage T1, a data writing stage T2 and a light emission stage T3.

[0167] During the initialization phase T1, the second scan signal S2 is at a high level, the third scan signal S3 is at a low level, the first light emission control signal EM1 is at a high level, the fifth transistor M5 and the eighth transistor M8 are turned on, the second initialization voltage Vref2 is transmitted to the first terminal of the light emission diode D1 through the fifth transistor M5 to initialize the first terminal of the light emission diode D1; the first initialization voltage Vref1 is transmitted to the gate of the first transistor M1 through the eighth transistor M8 to initialize the gate of the first transistor M1 and turn on the first transistor M1.

[0168] During the data writing phase T2, the second scan signal S2 is low, the third scan signal S3 is high, the first light emission control signal EM1 is high, and the sixth transistor M6 and the seventh transistor M7 are turned on. The data voltage Vdata is transmitted to the gate of the first transistor M1 via the sixth transistor M6, the first transistor M1, and the seventh transistor M7 until the gate voltage of the first transistor M1 reaches Vdata + Vth1, at which point the first transistor M1 is turned off. Here, Vth1 is the threshold voltage of the first transistor. Simultaneously with writing the data voltage Vdata to the gate of the first transistor M1, the threshold voltage Vth1 of the first transistor M1 is compensated.

[0169] During the light-emitting stage T3, the second scan signal S2 is at a low level, the third scan signal S3 is at a low level, the first light-emitting control signal EM1 is at a low level, the third transistor M3 and the fourth transistor M4 are turned on, and the first transistor M1 generates a driving current to drive the light-emitting diode D1 to emit light.

[0170] When the displayed grayscale is lower than the preset grayscale, the driving current generated by the first transistor M1 is relatively small, and the voltage at the first terminal (anode voltage) of the light-emitting diode D1 is low. Under the action of the first voltage V1, the second transistor M2 is in the subthreshold region. Therefore, the voltage at the first terminal of the second transistor M2 is greater than V1-Vth2. Since the absolute value of the first voltage V1 is greater than the anode voltage at this time, the voltage at the second terminal N2 of the driving module 110 can be increased by configuring the first voltage V1 so that the absolute value of V1-Vth2 is still greater than the anode voltage, thereby reducing the leakage current of the first transistor M1. Especially when displaying a black screen, this can prevent the black state from being insufficiently black.

[0171] When the displayed grayscale is higher than the preset grayscale, the driving current generated by the first transistor M1 is larger, which makes the voltage of the second terminal N2 of the driving module 110 larger. The second transistor M2 is in the linear region or saturation region and will not affect the light emission of the light-emitting diode D1.

[0172] Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Figure 11 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Figure 10 and Figure 11 The difference in the structures shown lies in the connection relationship and channel type of the second transistor M2. Figure 10 In the pixel circuit shown, the second transistor M2 is a P-type transistor, connected between the second terminal N2 of the driving module 110 and the first terminal of the light-emitting module 130; Figure 11 In the pixel circuit shown, the second transistor M2 is an N-type transistor, connected between the first power line L1 and the first terminal N1 of the driving module 110. (Reference) Figure 10 and Figure 11This corresponds to the overall structure of the pixel circuit when the first transistor M1 is an N-type transistor. The compensation module 180 is connected between the first terminal N1 and the control terminal G of the driving module 110. The control terminal of the compensation module 180 is connected to the first scan signal line. The data writing module 140 is connected between the data line and the second terminal N2 of the driving module 110. The control terminal of the data writing module 140 is connected to the second scan signal line. The storage module 150 is connected between the control terminal G of the driving module 110 and the first terminal of the light-emitting module 130. Here, there is no need to set a third initialization module 190; the initialization of the control terminal G of the driving module 110 can be achieved through the first power supply voltage VDD. In this configuration, the gate of the sixth transistor M6 is connected to the second scan signal line, the gate of the seventh transistor M7 is connected to the first scan signal line, the first electrode of the sixth transistor M6 is connected to the data line, the second electrode of the sixth transistor M6 is connected to the second terminal N2 of the driving module 110, the first electrode of the seventh transistor M7 is connected to the first terminal N1 of the driving module 110, the second electrode of the seventh transistor M7 is connected to the control terminal G of the driving module 110, and the storage capacitor C1 is connected between the first terminal of the light-emitting module 130 and the control terminal G of the driving module 110.

[0173] Figure 12 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 10 and Figure 11 The pixel circuit shown is for reference. Figures 10-12 In the initialization phase T1, the second scan signal S2 is high, the first scan signal S1 is low, the first light emission control signal EM1 is low, the second light emission control signal EM2 is high, and the third transistor M3, the fifth transistor M5, and the seventh transistor M7 are turned on. The second initialization voltage Vref2 is transmitted to the first terminal of the light-emitting diode D1 through the fifth transistor M5 to initialize the first terminal of the light-emitting diode D1. The first power supply voltage VDD is transmitted to the gate of the first transistor M1 through the third transistor M3 and the seventh transistor M7 to initialize the gate of the first transistor M1 and turn on the first transistor M1. When the first light emission control signal EM1 transitions from low to high, the third transistor M3 is turned off. The data writing phase T2 and the light emission phase T3 are similar to those described in the above embodiments and will not be repeated. In this embodiment, when the first transistor M1 is an N-type transistor, the second transistor M2 is preferably selected as an N-type transistor, which is beneficial for the stable operation of the pixel circuit under full grayscale.

[0174] Figure 13 This is a grayscale unfolding diagram provided in an embodiment of the present invention, which can correspond to Figure 8 The pixel circuit shown, from Figure 13As can be seen, at low gray levels (i.e., the displayed gray level is less than the preset gray level), the gray levels can be expanded well (e.g., 32 gray levels, 16 gray levels, 8 gray levels, 4 gray levels, 2 gray levels, 1 gray level, etc.). At medium to high gray levels (i.e., the displayed gray level is greater than or equal to the preset gray level), the displayed gray levels can also be expanded well (e.g., 255 gray levels, 128 gray levels, 64 gray levels, etc.).

[0175] Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 14 ,exist Figure 1 Based on the pixel circuit shown, the first control terminal of the voltage control module 120 is connected to the second light emission control signal line, and the second control terminal of the voltage control module 120 is connected to the control terminal G of the drive module 110. The threshold voltage of the voltage control module 120 is adjusted by regulating the voltage at its second control terminal, thereby adjusting the conduction state of the voltage control module 120. For example, when the displayed grayscale is less than a preset grayscale, the voltage control module 120 is adjusted to a semi-conducting state, thereby increasing the voltage at the second terminal N2 of the drive module 110. This reduces the voltage difference between the first terminal N1 and the second terminal N2 of the drive module 110, which helps reduce the leakage current of the drive module 110, especially when displaying a black screen, preventing the black from being insufficiently dark.

[0176] Continue to refer to Figure 14 The pixel circuit also includes a first light-emitting control module 150. The control terminal of the first light-emitting control module 150 is connected to the first light-emitting control signal line. The first end of the first light-emitting control module 150 is connected to the first power supply line L1. The second end of the first light-emitting control module 150 is connected to the first end N1 of the driving module 110. The second end N2 of the driving module 110 is connected to the first end of the voltage control module 120. The second end of the voltage control module 120 is connected to the first end of the light-emitting module 130.

[0177] The first light-emitting control signal line is used to transmit the first light-emitting control signal EM1, and the second light-emitting control signal line is used to transmit the second light-emitting control signal EM2. The first light-emitting control signal line can be multiplexed as the second light-emitting control signal line.

[0178] Figure 15 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 15Based on the above embodiments, optionally, the driving module 110 includes a first transistor M1, the voltage control module 120 includes a second transistor M2, the first light-emitting control module 150 includes a third transistor M3, the light-emitting module 130 includes a light-emitting diode D1, the gate of the third transistor M3 is connected to a first light-emitting control signal line, the first terminal of the third transistor M3 is connected to a first power supply line L1, the first terminal of the first transistor M1 serves as the first terminal N1 of the driving module 110 and is connected to the second terminal of the third transistor M3, the second terminal of the first transistor M1 serves as the second terminal N2 of the driving module 110 and is connected to the first terminal of the second transistor M2, the second terminal of the second transistor M2 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to a second power supply line L2, the first gate of the second transistor M2 is connected to a second light-emitting control signal line, and the second gate of the second transistor M2 is connected to the gate of the first transistor M1.

[0179] Specifically, taking the example where both the first transistor M1 and the second transistor M2 are P-type transistors, the first gate of the second transistor M2 is the top gate, and the second gate of the second transistor M2 is the bottom gate. During the data writing stage, the data voltage Vdata is written to the gate of the first transistor M1 via the data writing module 140. During the display stage, when the displayed grayscale is less than the preset grayscale, for example, when displaying a black screen, the gate voltage of the first transistor M1 is positive. Under the influence of the gate voltage of the first transistor M1, the threshold voltage Vth2 of the second transistor M2 is negatively biased. With the second light-emitting control signal EM2 connected to the first gate of the second transistor M2 fixed, the conduction level of the second transistor M2 can be reduced, and the second transistor M2 operates in the subthreshold region. Therefore, the voltage at the first terminal of the second transistor M2 is limited to a relatively stable range and will not drop to the voltage at the first terminal of the light-emitting diode D1, thereby increasing the voltage at the second terminal N2 of the driving module 110, reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, and reducing the leakage current of the driving module 110.

[0180] Optionally, in this embodiment, the second transistor M2 is a vertical dual-gate transistor, and the channel type of the first transistor M1 is the same as that of the second transistor M2.

[0181] Of course, in other embodiments, both the first transistor M1 and the second transistor M2 may be N-type transistors. Figure 16 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 16The control terminal of the first light-emitting control module 150 is connected to the first light-emitting control signal line. The first terminal of the voltage control module 120 is connected to the first power supply line L1. The second terminal of the voltage control module 120 is connected to the first terminal N1 of the drive module 110. The second terminal of the drive module 110 is connected to the first terminal of the first light-emitting control module 150. The second terminal of the first light-emitting control module 150 is connected to the first terminal of the light-emitting module 130. The first control terminal of the voltage control module 120 is connected to the second light-emitting control signal line. The second control terminal of the voltage control module 120 is connected to the control terminal G of the drive module 110.

[0182] Specifically, the driving module 110 includes a first transistor N1, the voltage control module 120 includes a second transistor M2, the first light-emitting control module 150 includes a third transistor M3, and the light-emitting module 130 includes a light-emitting diode D1. The first gate of the second transistor M2 is connected to a second light-emitting control signal line, the second gate of the second transistor M2 is connected to the gate of the first transistor M1, the first electrode of the second transistor M2 is connected to a first power supply line L1, the first electrode of the first transistor M1 serves as the first terminal N1 of the driving module 110 and is connected to the second electrode of the second transistor M2, the second electrode of the first transistor M1 serves as the second terminal N2 of the driving module 110 and is connected to the first electrode of the third transistor M3, the second electrode of the third transistor M3 is connected to the first electrode of the light-emitting diode D1, and the second electrode of the light-emitting diode D1 is connected to the second power supply line L2. The first light-emitting control signal line can be multiplexed as the second light-emitting control signal line. The specific working principle of this circuit is similar to that of the first transistor M1 being a P-type transistor, and will not be described in detail here.

[0183] Figure 17 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 17 The connection relationship between the data writing module 140, storage module 150, compensation module 180, first initialization module 170, and second initialization module 190 is as follows: Figure 7 The structures shown are the same. Figure 17 The pixel circuit shown is also applicable to Figure 9 The specific working process of the initialization phase and data writing phase shown in the driving timing diagram will not be elaborated further.

[0184] During the light-emitting stage, when the displayed grayscale is lower than the preset grayscale, the gate voltage of the first transistor M1 is relatively large, which is a positive voltage, causing the threshold voltage of the second transistor M2 to be negatively biased. In conjunction with the first light-emitting control signal EM1, the second transistor M2 is placed in the subthreshold region. Therefore, the voltage at the first terminal of the second transistor M2 is greater than V2-Vth2, where the second voltage V2 is the effective level of the first light-emitting control signal EM1. The absolute value of the second voltage V2 is greater than the anode voltage at this time. By configuring the second voltage V2, the absolute value of V2-Vth2 can still be greater than the anode voltage, thereby increasing the voltage at the second terminal N2 of the driving module 110, and thus reducing the leakage current of the first transistor M1. Especially when displaying a black screen, this can prevent the black from being insufficiently black.

[0185] When the displayed grayscale is higher than the preset grayscale, the gate voltage of the first transistor M1 is smaller and is a negative voltage, which makes the threshold voltage of the second transistor M2 positively biased. The second transistor M2 is in the linear region or saturation region and will not affect the light emission of the light-emitting diode D1.

[0186] Of course, in other embodiments, when the first transistor M1 and the second transistor M2 are N-type transistors (the first light-emitting control signal EM1 and the second light-emitting control signal EM2 are independent of each other), the connection relationship of the data writing module 140, the storage module 150, the compensation module 180, and the first initialization module 170 is the same as... Figure 11 The architecture shown is the same. The operation of this pixel circuit is similar to that of the second transistor M2, which is a P-type transistor, except that the conduction level and the data voltage Vdata are opposite.

[0187] exist Figure 17 In the pixel circuit shown, the level of the first light emission control signal E1 is different from the levels of the first scan signal S1, the second scan signal S2, and the third scan signal S3. By cooperating with the independent level of the first light emission control signal E1 and the bottom gate of the second transistor M2, the switching state of the second transistor M2 in low grayscale and medium-high grayscale can be optimized.

[0188] Figure 18 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 18 ,exist Figure 1Based on the described embodiments, optionally, the voltage control module 120 includes a first sub-control module 121 and a second sub-control module 122. The control terminal of the first sub-control module 121 is connected to a first light-emitting control signal line, and the control terminal of the second sub-control module 122 is connected to a second light-emitting control signal line. The first end of the first sub-control module 121 is connected to a first power line L1, and the second end of the first sub-control module 121 is connected to the first end N1 of the drive module 110. The second end N2 of the drive module 110 is connected to the first end of the second sub-control module 122, and the second end of the second sub-control module 122 is connected to the first end of the light-emitting module 110.

[0189] When the displayed grayscale is less than the preset grayscale, the transistors included in the first sub-control module 121 and / or the second sub-control module 122 are in the subthreshold region to raise the voltage of the second terminal N2 of the driving module 110, thereby reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, reducing the leakage current of the driving module 110, ensuring good display effect at low grayscale, and avoiding the phenomenon that the black state is not black enough.

[0190] Figure 19 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 19 Based on the above embodiments, optionally, the driving module 110 includes a first transistor M1, the first sub-control module 121 includes a ninth transistor M9, the second sub-control module 122 includes a tenth transistor M10, the light-emitting module 130 includes a light-emitting diode D1, the gate of the ninth transistor M9 is connected to a first light-emitting control signal line, the first terminal of the ninth transistor M9 is connected to a first power supply line L1, the second terminal of the ninth transistor M9 is connected to the first terminal of the first transistor M1, the second terminal of the first transistor M1 is connected to the first terminal of the tenth transistor M10, the second terminal of the tenth transistor M10 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to a second power supply line L2, and the gate of the tenth transistor M10 is connected to a second light-emitting control signal line.

[0191] The pixel circuit also includes a first initialization module 170. The control terminal of the first initialization module 170 is connected to a first scan signal line, the first terminal of the first initialization module 170 is connected to a second voltage signal line, and the second terminal of the first initialization module 170 is connected to the first terminal of the light-emitting module 130. The first initialization module 170 includes a fifth transistor M5. The gate of the fifth transistor M5 is connected to the first scan signal line, the first electrode of the fifth transistor M5 is connected to the second voltage signal line, and the second electrode of the fifth transistor M5 is connected to the first electrode of the light-emitting diode D1.

[0192] The absolute value of the effective level of the first light emission control signal EM1 transmitted on the first light emission control signal line is less than the absolute value of the effective level of the first scan signal S1 transmitted on the first scan signal line; and / or, the absolute value of the effective level of the second light emission control signal EM2 transmitted on the second light emission control signal line is less than the absolute value of the effective level of the first scan signal S1 transmitted on the first scan signal line.

[0193] Specifically, the ninth transistor M9 and the tenth transistor M10 have the same channel type, for example, both are P-type transistors. The fifth transistor M5 is also a P-type transistor. The fifth transistor M5, the ninth transistor M9, and the tenth transistor M10 are all turned on at low level and turned off at high level. In this embodiment, the absolute value of the effective level (low level) of the first light-emitting control signal EM1 is less than the absolute value of the effective level (low level) of the first scan signal S1; or, the absolute value of the effective level (low level) of the second light-emitting control signal EM2 is less than the absolute value of the effective level (low level) of the first scan signal S1; or, the absolute value of the effective level (low level) of the first light-emitting control signal EM1 is less than the absolute value of the effective level (low level) of the first scan signal S1, and the absolute value of the effective level (low level) of the second light-emitting control signal EM2 is less than the absolute value of the effective level (low level) of the first scan signal S1. Therefore, at low grayscale, the conduction level of the ninth transistor M9 and / or the tenth transistor M10 can be lower than that of the fifth transistor M5. That is, the ninth transistor M9 and / or the tenth transistor M10 are in the subthreshold region, which can also raise the voltage of the second terminal N2 of the driving module 110 or lower the voltage of the first terminal N1 of the driving module 110, thereby reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, which is beneficial to reducing the leakage current of the driving module 110.

[0194] The pixel circuit also includes a data writing module 140, whose control terminal is connected to the second scan signal line and is connected to the driving module 110. The data writing module 140 is used to write the data voltage Vdata to the control terminal G of the driving module 110. The pixel circuit also includes a compensation module 180, whose control terminal is connected to the second scan signal line and is connected between the second terminal N2 and the control terminal G of the driving module 110. The compensation module 180 is used to compensate the threshold voltage of the driving module 110.

[0195] The absolute value of the effective level of the second scanning signal S2 is the same as the absolute value of the effective level of the second light-emitting control signal EM2 transmitted on the second light-emitting control signal line, or the absolute value of the effective level of the second scanning signal S2 is the same as the absolute value of the effective level of the first light-emitting control signal EM1 transmitted on the first light-emitting control signal line.

[0196] Specifically, setting the absolute value of the effective level of the second scanning signal S2 to be the same as the absolute value of the effective level of the first light emission control signal EM1 or the second light emission control signal EM2 can avoid the phenomenon of excessive coupling of the seventh transistor M7 included in the compensation module 180 due to the jump of the second scanning signal S2 caused by the effective level of the second scanning signal S2 being too low. This is beneficial to improving the stability of the voltage at the control terminal G of the drive module 110 and improving the uniformity of the display.

[0197] The pixel circuit also includes a storage module 150, which is connected to the control terminal G of the driving module 110; the data writing module 140 includes a sixth transistor M6, the compensation module 180 includes a seventh transistor M7, the storage module 150 includes a storage capacitor C1, the gates of the sixth transistor M6 and the seventh transistor M7 are both connected to the second scan signal line, the first terminal of the sixth transistor M6 is connected to the data line, the second terminal of the sixth transistor M6 is connected to the first terminal N1 of the driving module 110, the first terminal of the seventh transistor M7 is connected to the second terminal N2 of the driving module 110, the second terminal of the seventh transistor M7 is connected to the control terminal G of the driving module 110, and the storage capacitor C1 is connected between the first power line L1 and the control terminal G of the driving module 110.

[0198] The pixel circuit also includes a second initialization module 190. The control terminal of the second initialization module 190 is connected to the third scan signal line, the first terminal of the second initialization module 190 is connected to the third voltage signal line, and the second terminal of the second initialization module 190 is connected to the control terminal G of the drive module 110. The second initialization module 190 includes an eighth transistor M8. The gate of the eighth transistor M8 is connected to the third scan signal line, the first terminal of the eighth transistor M8 is connected to the third voltage signal line, and the second terminal of the eighth transistor M8 is connected to the control terminal G of the drive module 110. The first scan signal S1 can be multiplexed into a third scan signal S3.

[0199] Figure 20 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 19 The pixel circuit shown is for reference. Figure 20 The operation of the pixel circuit includes an initialization stage T1, a data writing stage T2, and a light emission stage T3. The operation of the initialization stage T1 and the data writing stage T2 is the same as that described in the above embodiments, and will not be repeated here.

[0200] In this embodiment, during the light-emitting stage T3, the first scan signal S1, the second scan signal S2, and the third scan signal S3 are at high levels, while the first light-emitting control signal EM1 and the second light-emitting control signal EM2 are at low levels. The ninth transistor M9 and the tenth transistor M10 are turned on. When the displayed grayscale is less than a preset grayscale, the driving current generated by the first transistor M1 is relatively small. By adjusting the effective level of the second light-emitting control signal EM2 to VGL (VGL is greater than the effective level of the third scan signal S3, VGLL), the tenth transistor M10 can be configured to operate in the subthreshold region, thereby increasing the voltage at the second terminal N2 of the driving module 110 to reduce the leakage current of the driving module 110.

[0201] Of course, in other embodiments, the effective level of the first light emission control signal EM1 can be adjusted, or the effective levels of the first light emission control signal EM1 and the second light emission control signal EM2 can be adjusted simultaneously, achieving the same beneficial effects as the above embodiments, which will not be elaborated here.

[0202] Optionally, the first transistor M1 can also be an N-type transistor. In this case, the connection relationship between the data writing module 140, the storage module 150, the compensation module 180, and the first initialization module 170 is the same as... Figure 11 The architecture shown is the same.

[0203] Optionally, in Figure 19 In the pixel circuit shown, the first light emission control signal EM1 can be multiplexed into the second light emission control signal EM2, and the third scan signal S3 can be multiplexed into the first scan signal S1. That is, the first light emission control signal line is multiplexed into the second light emission control signal line, and the third scan signal line is multiplexed into the first scan signal line, which helps to save the number of signal lines and thus improve the PPI.

[0204] Optionally, the effective level of the second scan signal S2 can be the same as the effective level of the third scan signal S3, both being VGLL. Alternatively, the effective level of the second scan signal S2 can also be the same as the effective level of the first light emission control signal EM1, both being VGL.

[0205] Optionally, the technical solutions provided by the embodiments of the present invention can be applied not only to the pixel circuit based on the LTPS 7T1C architecture in the above embodiments, but also to the pixel circuit based on the 8T1C (adding a transistor that applies a bias voltage to the source of the driving transistor on the basis of 7T1C) or the LTPO 7T1C architecture, and have the same beneficial effects.

[0206] Optionally, embodiments of the present invention provide a driving method for a pixel circuit, combined with Figure 1 The pixel circuit driving method provided in this embodiment includes:

[0207] During the light-emitting stage, the control driving module drives the light-emitting module to emit light; when the displayed gray level is less than the preset gray level, the control voltage control module controls the voltage at the end connected to the driving module and the voltage control module.

[0208] The technical solution provided by this invention adds a voltage control module to the connection path between the driving module and the light-emitting module to cut off the direct connection between the driving module and the light-emitting module. When the displayed grayscale is less than a preset grayscale, the voltage control module controls the voltage at the end connected to the driving module and the voltage control module, thereby increasing the voltage at the end connected to the driving module and the voltage control module, thereby reducing the voltage difference between the first and second ends of the driving module, and thus reducing the leakage current of the driving module at low grayscale, thereby improving the display brightness at low grayscale and improving the display effect.

[0209] Optionally, combined Figure 2 The voltage control module 120 includes transistors, such as a second transistor M2. The specific steps for controlling the voltage control module 120 to turn off include:

[0210] The transistor in the control voltage control module responds to the signal at the control terminal of the control voltage control module in the subthreshold region.

[0211] Optionally, the pixel circuit driving method provided in this embodiment further includes:

[0212] During the non-light-emitting phase, the transistors in the control voltage control module are in the cutoff region in response to the signal at the control terminal of the control voltage control module.

[0213] Specifically, in combination Figure 2The control terminal of the voltage control module 120 is connected to the first voltage signal line, which is used to transmit the first voltage V1. When the displayed grayscale is less than the preset grayscale, the first voltage V1 is greater than the voltage at the first terminal of the light-emitting module 130. The absolute value of the difference between the first voltage V1 and the voltage at one end of the driving module 110 is less than the absolute value of the threshold voltage of the voltage control module 120. One end of the driving module 110 is the end connected to the voltage control module 120. That is, by setting the first voltage V1, the voltage difference between the first voltage V1 and the voltage at the second terminal N2 of the driving module 110 is less than the threshold voltage Vth2 of the second transistor M2, thereby making the second transistor M2 in the subthreshold region. At low grayscale, the gate voltage of the second transistor M2 is fixed at the first voltage V1. Due to the inherent characteristics of the subthreshold region, the voltage of the first terminal (source) of the second transistor M2 is limited to a relatively stable range. Therefore, the change in the voltage of the first terminal of the second transistor M2 (i.e., the voltage of the second terminal N2 of the driving module 110) is less than V1-Vth2. Even if the voltage of the first terminal of the light-emitting diode D1 is small at low grayscale, it will not significantly lower the voltage of the first terminal of the second transistor M2, thereby increasing the voltage of the second terminal N2 of the driving module 110, and further reducing the voltage difference between the first terminal N1 and the second terminal N2 of the driving module 110, which is beneficial to reducing the leakage current of the driving module 110.

[0214] When the displayed grayscale is greater than or equal to the preset grayscale, the driving current generated by the driving module 110 is large, and the voltage of the second terminal N2 of the driving module 110 is large. This makes the absolute value of the gate-source voltage of the second transistor M2 included in the voltage control module 120 much larger than the absolute value of the threshold voltage Vth2 of the second transistor M2. The second transistor M2 is in a fully conducting state and will not affect the normal display process.

[0215] Optionally, when the displayed gray level is greater than 0 and less than the preset gray level, the transistor in the control voltage control module responds to the signal at the control terminal of the control voltage control module in the subthreshold region.

[0216] When the grayscale level is 0, the transistor in the control voltage control module is in the cutoff region in response to the signal at the control terminal of the control voltage control module.

[0217] Optionally, embodiments of the present invention also provide a display panel, which includes the pixel circuit provided in any embodiment of the present invention, and therefore the display panel also has the beneficial effects described in any of the above embodiments. Figure 21 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, with reference to... Figure 2 and Figure 21 The display panel provided in this embodiment includes:

[0218] Substrate (not shown in the figure);

[0219] Active layer 60 is located on one side of the substrate;

[0220] A multilayer conductive layer is stacked on the side of the active layer 60 away from the substrate;

[0221] At least one pixel circuit, the pixel circuit including a driving module 110, a voltage control module 120 and a light-emitting module 130, wherein the driving module 110 includes a first transistor M1, the voltage control module 120 includes a second transistor M2, and the light-emitting module 130 includes a light-emitting diode D1.

[0222] The multilayer conductive layer includes a first conductive layer. The gate G1 of the first transistor M1 and the gate of the second transistor M2 are both located in the first conductive layer. The orthogonal projection of the gate of the second transistor M2 on the substrate is located between the orthogonal projection of the gate G1 of the first transistor M1 on the substrate and the orthogonal projection of the first electrode 51 of the light-emitting diode D1 on the substrate.

[0223] In this embodiment, the first terminal 51 of the light-emitting diode D1 is connected to the second terminal of the second transistor M2 through a via 52. Placing the second transistor M2 close to the first terminal 51 of the light-emitting diode D1 helps reduce parasitic capacitance and optimizes the layout.

[0224] Figure 22 This invention provides another schematic diagram of the structure of a display panel for an embodiment of the invention. Figure 23 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, wherein, Figure 23 Specifically Figure 22 The cross-sectional structure of the display panel shown is obtained along the section line AA', for reference. Figure 8 , Figure 22 and Figure 23 Based on the above embodiments, optionally, the active layer 60 includes a first active layer 601, the channel region of the first transistor M1 is located in the first active layer 601, and the orthogonal projection of the gate G1 of the first transistor M1 on the substrate 10 at least partially covers the orthogonal projection of the channel region of the first transistor M1 on the substrate 10.

[0225] The pixel circuit also includes a storage module 150, which includes a storage capacitor C1 connected to the gate G1 of the first transistor M1. Therefore, the gate G1 of the first transistor M1 can serve as one plate of the storage capacitor C1. For example, the storage capacitor C1 includes a first plate 31 and a second plate 32, and the gate G1 of the first transistor M1 is reused as the first plate 31 of the storage capacitor C1. The first plate 31 and the second plate 32 of the storage capacitor C1 are located on different conductive layers.

[0226] Optionally, the pixel circuit further includes a first light-emitting control module 150 and a second light-emitting control module 160. The first light-emitting control module 150 includes a third transistor M3, and the second light-emitting control module 160 includes a fourth transistor M4. The active layer 60 further includes a second active layer 602 and a third active layer 603. The channel region of the third transistor M3 is located in the second active layer 602, and the channel region of the fourth transistor M4 is located in the third active layer 603. The orthogonal projection of the gate of the third transistor M3 onto the substrate 10 at least partially covers the orthogonal projection of the channel region of the third transistor M3 onto the substrate 10, and the orthogonal projection of the gate of the fourth transistor M4 onto the substrate 10 at least partially covers the orthogonal projection of the channel region of the fourth transistor M4 onto the substrate 10.

[0227] Optionally, continue to refer to Figures 21 to 23 The display panel also includes a first voltage signal line 22, which is located in the first conductive layer. The first voltage signal line 22 overlaps with the third active layer 603 to form a second transistor M2. The orthogonal projection of the first voltage signal line 22 on the substrate 10 at least partially covers the orthogonal projection of the channel region of the second transistor M2 on the substrate 10.

[0228] Specifically, the display panel provided in this embodiment further includes a first light-emitting control signal line 21, which extends along a first direction X and intersects with the second active layer 602 and the third active layer 603. The first light-emitting control signal line 21 overlaps with the second active layer 602 to form a third transistor M3, and the first light-emitting control signal line 21 overlaps with the third active layer 603 to form a fourth transistor M4. The orthogonal projection of the gate of the second transistor M2 onto the substrate 10 is located on the side of the orthogonal projection of the gate of the fourth transistor M4 onto the substrate 10 that is away from the orthogonal projection of the gate G1 of the first transistor M1 onto the substrate 10.

[0229] Optionally, the orthographic projection of the first light-emitting control signal line 21 on the substrate 10 is located between the orthographic projection of the first voltage signal line 22 on the substrate 10 and the orthographic projection of the gate G1 of the first transistor M1 on the substrate 10. In this embodiment, the first voltage signal line 22 extends along the first direction X, and the second active layer 602 extends along the second direction Y, with the first direction X intersecting the second direction Y. By placing the second transistor M2 between the fourth transistor M4 and the first electrode 51 of the light-emitting diode D1, the first voltage signal line 22 does not need to cross the first active layer 601. That is, the orthographic projection of the first voltage signal line 22 on the substrate 10 does not overlap with the orthographic projection of the second active layer 602 on the substrate 10, thus avoiding any adverse effects on the layout of the third transistor M3 and the fourth transistor M4, which is beneficial for optimizing the layout.

[0230] Optionally, the pixel circuit further includes a first initialization module 170, which includes a fifth transistor M5. The channel region of the fifth transistor M5 is located in the third active layer 603. The display panel also includes a first scan signal line 23, the orthographic projection of the first scan signal line 23 on the substrate 10 at least partially covering the orthographic projection of the channel region of the fifth transistor M5 on the substrate 10. The first scan signal line 23 is located in the first conductive layer and extends along the first direction X. The first scan signal line 23 overlaps with the third active layer 603 to form the fifth transistor M5.

[0231] The display panel also includes a second voltage signal line 71 and a connecting line 72. The multilayer conductive layer also includes a second conductive layer and a third conductive layer. An interlayer insulating layer 13 is disposed between the second conductive layer and the third conductive layer. A capacitor dielectric layer is disposed between the second conductive layer and the first conductive layer. A gate insulating layer is disposed between the first conductive layer and the active layer 60. The second voltage signal line 71 is located on the second conductive layer, and the connecting line 72 is located on the third conductive layer. The second voltage signal line 71 is connected to one end of the connecting line 72 through a via, and the third active layer 603 is connected to the other end of the connecting line 72 through a via, thereby realizing the connection between the second voltage signal line 71 and the fifth transistor M5. The second voltage signal line 71 transmits the second initialization voltage Vref2, and transmits the second initialization voltage Vref2 to the first electrode 51 of the light-emitting diode D1 through the fifth transistor M5.

[0232] Optionally, the second voltage signal line 72 extends along the first direction X, and the connecting line 71 extends along the second direction Y.

[0233] Optionally, the orthogonal projection of the first scan signal line 23 on the substrate 10 is located between the orthogonal projection of the first voltage signal line 22 on the substrate 10 and the orthogonal projection of the second voltage signal line 71 on the substrate 10, and the orthogonal projection of the first scan signal line 23 on the substrate 10 is located on the side of the orthogonal projection of the first voltage signal line 22 on the substrate 10 that is far away from the orthogonal projection of the gate G1 of the first transistor M1 on the substrate 10.

[0234] In this embodiment, the channel region of the first transistor M1 is located in the first active layer 601, the channel region of the second transistor M2 is located in the third active layer 603, the channel region of the third transistor M3 is located in the second active layer 602, the channel region of the fourth transistor M4 is located in the third active layer 603, and the channel region of the fifth transistor M5 is located in the third active layer 603. The first active layer 601, the second active layer 602, and the third active layer 603 are on the same layer and connected. The second active layer 602 and the third active layer 603 both extend along the second direction Y, and the first active layer 601 extends along the first direction X. The second active layer 602 and the third active layer 603 are located on different sides of the first active layer 601 to facilitate layout.

[0235] Among them, Figure 23 In the second direction Y, the active layer 60 shown in the dashed box below the first light emission control signal line 21 is the channel region of the fourth transistor M4, the active layer 60 shown in the dashed box below the first voltage signal line 22 is the channel region of the second transistor M2, and the active layer 60 shown in the dashed box below the first scan signal line 23 is the channel region of the fifth transistor M5.

[0236] Optionally, continue to refer to Figure 22 The display panel provided in this embodiment also includes a data line 41 and a first power line L1, both of which are located on the third conductive layer. The layout of the sixth transistor M6 in the data writing module 140, the seventh transistor in the compensation module 180, and the eighth transistor M8 in the second initialization module 190 can be found in descriptions in related technologies and will not be repeated here.

[0237] Optionally, embodiments of the present invention also provide a display device, which includes the display panel provided in any embodiment of the present invention. Therefore, the display device also has the beneficial effects described in any of the above embodiments. Figure 24 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. In this embodiment, the display device 200 can be a mobile phone or any electronic product with display function, including but not limited to the following categories: display panels in products such as televisions, laptops, desktop monitors, tablets, digital cameras, smart bracelets, smart glasses, in-vehicle displays, medical devices, industrial control equipment, and touch interactive terminals. The present invention does not impose any special limitations on these.

[0238] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0239] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, include: The module consists of a driver module, a voltage control module, and a light-emitting module. The driving module and the voltage control module are connected between the first power line and the first end of the light-emitting module, and the second end of the light-emitting module is connected to the second power line. The driving module is used to drive the light-emitting module to emit light, and the voltage control module is used to control the voltage at one end of the driving module and the voltage control module when the displayed gray level is less than the preset gray level, so as to reduce the voltage difference between the two ends of the driving module. When the displayed grayscale is less than the preset grayscale, the transistors included in the voltage control module are in the subthreshold region; The control terminal of the voltage control module is connected to the first voltage signal line, and the first voltage signal line is used to transmit the first voltage. When the displayed grayscale is less than the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is less than the absolute value of the threshold voltage of the voltage control module, and one end of the driving module is the end connected to the voltage control module. When the displayed grayscale is greater than or equal to the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is greater than or equal to the absolute value of the threshold voltage of the voltage control module, and one end of the driving module is the end connected to the voltage control module; The first voltage is a DC voltage.

2. The pixel circuit according to claim 1, characterized in that, The preset grayscale is 32 grayscale levels.

3. The pixel circuit according to claim 1, characterized in that, The preset grayscale is 16 grayscale levels.

4. The pixel circuit according to claim 1, characterized in that, When displaying a black screen, the transistors included in the voltage control module are in the cutoff region; The grayscale corresponding to the black screen is 0 grayscale.

5. The pixel circuit according to claim 1, characterized in that, When the displayed grayscale is greater than or equal to the preset grayscale, the transistors included in the voltage control module are in the linear region or the saturation region.

6. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a first light-emitting control module and a second light-emitting control module. The control terminal of the first light-emitting control module is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting module is connected to a second light-emitting control signal line. The first end of the first light-emitting control module is connected to the first power line, the second end of the first light-emitting control module is connected to the first end of the driving module, the second end of the driving module is connected to the first end of the voltage control module, the second end of the voltage control module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting module is connected to the first end of the light-emitting module. Alternatively, the first end of the first light-emitting control module is connected to the first power line, the second end of the first light-emitting control module is connected to the first end of the driving module, the second end of the driving module is connected to the first end of the second light-emitting control module, the second end of the second light-emitting module is connected to the first end of the voltage control module, and the second end of the voltage control module is connected to the first end of the light-emitting module. The driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the second light-emitting control module includes a fourth transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the third transistor is connected to the first power supply line, the first terminal of the first transistor serves as the first terminal of the driving module and is connected to the second terminal of the third transistor, the second terminal of the first transistor serves as the second terminal of the driving module and is connected to the first terminal of the second transistor, the second terminal of the second transistor is connected to the first terminal of the fourth transistor, the second terminal of the fourth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply line, the gate of the second transistor is connected to the first voltage signal line, and the gate of the fourth transistor is connected to the second light-emitting control signal line. Alternatively, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the third transistor is connected to the first power supply line, the first terminal of the first transistor is connected to the second terminal of the third transistor as the first terminal of the driving module, the second terminal of the first transistor is connected to the first terminal of the fourth transistor as the second terminal of the driving module, the second terminal of the fourth transistor is connected to the first terminal of the second transistor, the second terminal of the second transistor is connected to the first terminal of the light-emitting diode, and the second terminal of the light-emitting diode is connected to the second power supply line.

7. The pixel circuit according to claim 6, characterized in that, The first transistor is a P-type transistor or an N-type transistor, and the second transistor is a P-type transistor.

8. The pixel circuit according to claim 7, characterized in that, When the first transistor is a P-type transistor, the first light emission control signal line is multiplexed as the second light emission control signal line.

9. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a first light-emitting control module and a second light-emitting control module. The control terminal of the first light-emitting control module is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting module is connected to a second light-emitting control signal line. The first end of the first light-emitting control module is connected to the first power line, the second end of the first light-emitting control module is connected to the first end of the voltage control module, the second end of the voltage control module is connected to the first end of the drive module, the second end of the drive module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting module is connected to the first end of the light-emitting module. Alternatively, the first end of the voltage control module is connected to the first power line, the second end of the voltage control module is connected to the first end of the first light-emitting control module, the second end of the first light-emitting control module is connected to the first end of the driving module, the second end of the driving module is connected to the first end of the second light-emitting control module, and the second end of the second light-emitting module is connected to the first end of the light-emitting module. The driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the second light-emitting control module includes a fourth transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the third transistor is connected to the first power supply line, the second terminal of the third transistor is connected to the first terminal of the second transistor, the first terminal of the first transistor serves as the first terminal of the driving module and is connected to the second terminal of the second transistor, the second terminal of the first transistor serves as the second terminal of the driving module and is connected to the first terminal of the fourth transistor, the second terminal of the fourth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply line, the gate of the second transistor is connected to the first voltage signal line, and the gate of the fourth transistor is connected to the second light-emitting control signal line. Alternatively, the driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the second light-emitting control module includes a fourth transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the second transistor is connected to the first power supply line, the second terminal of the second transistor is connected to the first terminal of the third transistor, the first terminal of the first transistor serves as the first terminal of the driving module and is connected to the second terminal of the third transistor, the second terminal of the first transistor serves as the second terminal of the driving module and is connected to the first terminal of the fourth transistor, the second terminal of the fourth transistor is connected to the first terminal of the light-emitting diode, and the second terminal of the light-emitting diode is connected to the second power supply line.

10. The pixel circuit according to claim 9, characterized in that, The first transistor is an N-type transistor, and the second transistor is an N-type transistor.

11. The pixel circuit according to claim 1, characterized in that, The first control terminal of the voltage control module is connected to the second light emission control signal line, and the second control terminal of the voltage control module is connected to the control terminal of the drive module.

12. The pixel circuit according to claim 11, characterized in that, The pixel circuit further includes a first light-emitting control module. The control terminal of the first light-emitting control module is connected to a first light-emitting control signal line. The first end of the first light-emitting control module is connected to the first power line. The second end of the first light-emitting control module is connected to the first end of the driving module. The second end of the driving module is connected to the first end of the voltage control module. The second end of the voltage control module is connected to the first end of the light-emitting module.

13. The pixel circuit according to claim 12, characterized in that, The driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the light-emitting module includes a light-emitting diode, the gate of the third transistor is connected to the first light-emitting control signal line, the first terminal of the third transistor is connected to the first power supply line, the first terminal of the first transistor serves as the first end of the driving module and is connected to the second terminal of the third transistor, the second terminal of the first transistor serves as the second end of the driving module and is connected to the first terminal of the second transistor, the second terminal of the second transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply line, the first gate of the second transistor is connected to the second light-emitting control signal line, and the second gate of the second transistor is connected to the gate of the first transistor.

14. The pixel circuit according to claim 13, characterized in that, The first gate of the second transistor is a top gate, and the second gate of the second transistor is a bottom gate.

15. The pixel circuit according to claim 13, characterized in that, The channel type of the first transistor is the same as that of the second transistor.

16. The pixel circuit according to claim 13, characterized in that, Both the first transistor and the second transistor are P-type transistors.

17. The pixel circuit according to claim 13, characterized in that, The first light emission control signal line is multiplexed into the second light emission control signal line.

18. The pixel circuit according to claim 1, characterized in that, The first control terminal of the voltage control module is connected to the second light emission control signal line, and the second control terminal of the voltage control module is connected to the control terminal of the drive module.

19. The pixel circuit according to claim 18, characterized in that, The pixel circuit further includes a first light-emitting control module, the control terminal of the first light-emitting control module is connected to a first light-emitting control signal line, the first terminal of the voltage control module is connected to the first power supply line, the second terminal of the voltage control module is connected to the first terminal of the driving module, the second terminal of the driving module is connected to the first terminal of the first light-emitting control module, and the second terminal of the first light-emitting module is connected to the first terminal of the light-emitting module. The driving module includes a first transistor, the voltage control module includes a second transistor, the first light-emitting control module includes a third transistor, the light-emitting module includes a light-emitting diode, the first gate of the second transistor is connected to the second light-emitting control signal line, the second gate of the second transistor is connected to the gate of the first transistor, the first electrode of the second transistor is connected to the first power line, the first electrode of the first transistor serves as the first terminal of the driving module and is connected to the second electrode of the second transistor, the second electrode of the first transistor serves as the second terminal of the driving module and is connected to the first electrode of the third transistor, the second electrode of the third transistor is connected to the first electrode of the light-emitting diode, and the second electrode of the light-emitting diode is connected to the second power line.

20. The pixel circuit according to claim 19, characterized in that, The first gate of the second transistor is a top gate, and the second gate of the second transistor is a bottom gate.

21. The pixel circuit according to claim 19, characterized in that, The channel type of the first transistor is the same as that of the second transistor.

22. The pixel circuit according to claim 19, characterized in that, Both the first transistor and the second transistor are N-type transistors.

23. The pixel circuit according to claim 19, characterized in that, The first light emission control signal line is multiplexed into the second light emission control signal line.

24. The pixel circuit according to claim 6, characterized in that, The first transistor is a P-type transistor. The pixel circuit also includes a first initialization module. The control terminal of the first initialization module is connected to a first scan signal line, the first terminal of the first initialization module is connected to a second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module.

25. The pixel circuit according to claim 24, characterized in that, The first initialization module includes a fifth transistor, the gate of which is connected to the first scan signal line, the first terminal of which is connected to the second voltage signal line, and the second terminal of which is connected to the first terminal of the light-emitting diode.

26. The pixel circuit according to claim 25, characterized in that, The pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the first terminal of the driving module. The data writing module is used to write data voltage to the control terminal of the driving module. The pixel circuit further includes a compensation module. The control terminal of the compensation module is connected to the second scan signal line. The compensation module is connected between the second terminal and the control terminal of the driving module. The compensation module is used to compensate the threshold voltage of the driving module. The pixel circuit also includes a storage module, which is connected between the control terminal of the driving module and the first power line; The data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor and the gate of the seventh transistor are both connected to the second scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the first terminal of the driving module, the first terminal of the seventh transistor is connected to the second terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first power line and the control terminal of the driving module. The pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to a third scan signal line, the first terminal of the second initialization module is connected to a third voltage signal line, and the second terminal of the second initialization module is connected to the control terminal of the drive module. The second initialization module includes an eighth transistor, the gate of which is connected to the third scan signal line, the first terminal of which is connected to the third voltage signal line, and the second terminal of which is connected to the control terminal of the drive module.

27. The pixel circuit according to claim 26, characterized in that, The second scan signal line or the third scan signal line is multiplexed as the first scan signal line.

28. The pixel circuit according to claim 6 or 9, characterized in that, The first transistor is an N-type transistor. The pixel circuit also includes a first initialization module. The control terminal of the first initialization module is connected to a first scan signal line, the first terminal of the first initialization module is connected to a second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module.

29. The pixel circuit according to claim 28, characterized in that, The first initialization module includes a fifth transistor, the gate of which is connected to the first scan signal line, the first terminal of which is connected to the second voltage signal line, and the second terminal of which is connected to the first terminal of the light-emitting diode; The pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the second terminal of the driving module. The data writing module is used to write data voltage to the control terminal of the driving module. The pixel circuit further includes a compensation module. The control terminal of the compensation module is connected to the first scan signal line. The compensation module is connected between the first terminal and the control terminal of the driving module. The compensation module is used to compensate the threshold voltage of the driving module. The pixel circuit also includes a storage module, which is connected between the control terminal of the driving module and the first terminal of the light-emitting module; The data writing module includes a sixth transistor, the compensation module includes a seventh transistor, and the storage module includes a storage capacitor. The gate of the sixth transistor is connected to the second scan signal line, the gate of the seventh transistor is connected to the first scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the second terminal of the driving module, the first terminal of the seventh transistor is connected to the first terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first terminal of the light-emitting module and the control terminal of the driving module.

30. The pixel circuit according to claim 1, characterized in that, The voltage control module includes a first sub-control module and a second sub-control module. The control terminal of the first sub-control module is connected to a first light-emitting control signal line, and the control terminal of the second sub-control module is connected to a second light-emitting control signal line. The first end of the first sub-control module is connected to the first power line, and the second end of the first sub-control module is connected to the first end of the driving module. The second end of the driving module is connected to the first end of the second sub-control module, and the second end of the second sub-control module is connected to the first end of the light-emitting module. Wherein, when the displayed grayscale is less than the preset grayscale, the transistors included in the first sub-control module and / or the second sub-control module are in the subthreshold region.

31. The pixel circuit according to claim 30, characterized in that, The driving module includes a first transistor, the first sub-control module includes a ninth transistor, the second sub-control module includes a tenth transistor, the light-emitting module includes a light-emitting diode, the gate of the ninth transistor is connected to the first light-emitting control signal line, the first terminal of the ninth transistor is connected to the first power supply line, the second terminal of the ninth transistor is connected to the first terminal of the first transistor, the second terminal of the first transistor is connected to the first terminal of the tenth transistor, the second terminal of the tenth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply line, and the gate of the tenth transistor is connected to the second light-emitting control signal line.

32. The pixel circuit according to claim 31, characterized in that, The pixel circuit further includes a first initialization module, the control terminal of the first initialization module is connected to a first scan signal line, the first terminal of the first initialization module is connected to a second voltage signal line, and the second terminal of the first initialization module is connected to the first terminal of the light-emitting module. The first initialization module includes a fifth transistor, the gate of which is connected to the first scan signal line, the first terminal of which is connected to the second voltage signal line, and the second terminal of which is connected to the first terminal of the light-emitting diode.

33. The pixel circuit according to claim 32, characterized in that, The absolute value of the effective level of the first light emission control signal transmitted on the first light emission control signal line is less than the absolute value of the effective level of the first scan signal transmitted on the first scan signal line; and / or, The absolute value of the effective level of the second light emission control signal transmitted on the second light emission control signal line is less than the absolute value of the effective level of the first scan signal transmitted on the first scan signal line.

34. The pixel circuit according to claim 31, characterized in that, The ninth transistor and the tenth transistor have the same channel type; The first light emission control signal line is multiplexed into the second light emission control signal line.

35. The pixel circuit according to claim 32, characterized in that, The pixel circuit also includes a data writing module. The control terminal of the data writing module is connected to the second scan signal line. The data writing module is connected to the driving module and is used to write data voltage to the control terminal of the driving module. The pixel circuit further includes a compensation module. The control terminal of the compensation module is connected to the second scan signal line, and the compensation module is connected between the second terminal and the control terminal of the driving module. Alternatively, the control terminal of the compensation module is connected to the first scan signal line, and the compensation module is connected between the first terminal and the control terminal of the driving module. The compensation module is used to compensate the threshold voltage of the driving module.

36. The pixel circuit according to claim 35, characterized in that, The absolute value of the effective level of the second scan signal transmitted on the second scan signal line is the same as the absolute value of the effective level of the second light emission control signal transmitted on the second light emission control signal line, or the absolute value of the effective level of the second scan signal is the same as the absolute value of the effective level of the first light emission control signal transmitted on the first light emission control signal line.

37. The pixel circuit according to claim 36, characterized in that, The pixel circuit also includes a storage module, which is connected to the control terminal of the driving module.

38. The pixel circuit according to claim 37, characterized in that, The first transistor is a P-type transistor. The data writing module includes a sixth transistor, the compensation module includes a seventh transistor, and the storage module includes a storage capacitor. The gates of the sixth transistor and the seventh transistor are both connected to the second scan signal line. The first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the first terminal of the driving module, the first terminal of the seventh transistor is connected to the second terminal of the driving module, and the second terminal of the seventh transistor is connected to the control terminal of the driving module. The storage capacitor is connected between the first power line and the control terminal of the driving module.

39. The pixel circuit according to claim 38, characterized in that, The pixel circuit further includes a second initialization module, the control terminal of the second initialization module is connected to a third scan signal line, the first terminal of the second initialization module is connected to a third voltage signal line, and the second terminal of the second initialization module is connected to the control terminal of the drive module. The second initialization module includes an eighth transistor, the gate of which is connected to the third scan signal line, the first terminal of which is connected to the third voltage signal line, and the second terminal of which is connected to the control terminal of the drive module.

40. The pixel circuit according to claim 39, characterized in that, The third scan signal line is multiplexed as the first scan signal line.

41. The pixel circuit according to claim 37, characterized in that, The first transistor is an N-type transistor; the data writing module includes a sixth transistor, the compensation module includes a seventh transistor, the storage module includes a storage capacitor, the gate of the sixth transistor is connected to the second scan signal line, the gate of the seventh transistor is connected to the first scan signal line, the first terminal of the sixth transistor is connected to the data line, the second terminal of the sixth transistor is connected to the second terminal of the driving module, the first terminal of the seventh transistor is connected to the first terminal of the driving module, the second terminal of the seventh transistor is connected to the control terminal of the driving module, and the storage capacitor is connected between the first terminal of the light-emitting module and the control terminal of the driving module.

42. A driving method for a pixel circuit, characterized in that, The pixel circuit includes a driving module, a voltage control module, and a light-emitting module; The control terminal of the voltage control module is connected to the first voltage signal line, and the first voltage signal line is used to transmit the first voltage. The driving method for the pixel circuit includes: During the light-emitting phase, the driving module is controlled to drive the light-emitting module to emit light; wherein, when the displayed grayscale is less than a preset grayscale, the voltage control module is controlled to control the voltage at one end of the connection between the driving module and the voltage control module, such that the absolute value of the difference between the first voltage and the voltage at one end of the driving module is less than the absolute value of the threshold voltage of the voltage control module, thereby reducing the voltage difference across the driving module; when the displayed grayscale is greater than or equal to the preset grayscale, the voltage control module is controlled to control the voltage at one end of the connection between the driving module and the voltage control module, such that the absolute value of the difference between the first voltage and the voltage at one end of the driving module is greater than or equal to the absolute value of the threshold voltage of the voltage control module; The voltage control module includes a transistor, and controlling the voltage at one end of the drive module connected to the voltage control module includes: The transistors in the voltage control module are controlled to be in the subthreshold region in response to the signal from the control terminal of the voltage control module.

43. The driving method for the pixel circuit according to claim 42, characterized in that, Also includes: When the displayed grayscale is greater than 0 grayscale and less than the preset grayscale, the transistor in the voltage control module is controlled to respond to the signal at the control terminal of the voltage control module and be in the subthreshold region. When the displayed grayscale is 0, the transistor in the voltage control module is controlled to be in the cutoff region in response to the signal from the control terminal of the voltage control module.

44. The driving method for a pixel circuit according to claim 43, characterized in that, The driving method for the pixel circuit further includes: During the non-light-emitting phase, the transistors in the voltage control module are in the cutoff region in response to the signal from the control terminal of the voltage control module.

45. A display panel, characterized in that, include: Substrate; An active layer is located on one side of the substrate; A multilayer conductive layer is stacked on the side of the active layer away from the substrate; At least one pixel circuit, the pixel circuit including a driving module, a voltage control module and a light-emitting module, the driving module being used to drive the light-emitting module to emit light, the voltage control module being used to control the voltage at one end of the connection between the driving module and the voltage control module when the displayed grayscale is less than a preset grayscale, so as to reduce the voltage difference between the two ends of the driving module; wherein, the control terminal of the voltage control module is connected to a first voltage signal line, the first voltage signal line being used to transmit a first voltage; When the displayed grayscale is less than the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is less than the absolute value of the threshold voltage of the voltage control module, and one end of the driving module is the end connected to the voltage control module; when the displayed grayscale is greater than or equal to the preset grayscale, the absolute value of the difference between the first voltage and the voltage at one end of the driving module is greater than or equal to the absolute value of the threshold voltage of the voltage control module, and one end of the driving module is the end connected to the voltage control module; the first voltage is a DC voltage; The driving module includes a first transistor, the voltage control module includes a second transistor, and the light-emitting module includes a light-emitting diode; when the display grayscale is less than the preset grayscale, the second transistor is in the subthreshold region. The multilayer conductive layer includes a first conductive layer, the gate of the first transistor and the gate of the second transistor are both located in the first conductive layer, and the orthogonal projection of the gate of the second transistor on the substrate is located between the orthogonal projection of the gate of the first transistor on the substrate and the orthogonal projection of the first electrode of the light-emitting diode on the substrate.

46. ​​The display panel according to claim 45, characterized in that, The active layer includes a first active layer, the channel region of the first transistor is located in the first active layer, and the orthogonal projection of the gate of the first transistor on the substrate at least partially covers the orthogonal projection of the channel region of the first transistor on the substrate.

47. The display panel according to claim 46, characterized in that, The pixel circuit further includes a first light-emitting control module and a second light-emitting control module. The first light-emitting control module includes a third transistor, and the second light-emitting control module includes a fourth transistor. The active layer further includes a second active layer and a third active layer. The channel region of the third transistor is located in the second active layer, and the channel region of the fourth transistor is located in the third active layer. The orthogonal projection of the gate of the third transistor on the substrate at least partially covers the orthogonal projection of the channel region of the third transistor on the substrate, and the orthogonal projection of the gate of the fourth transistor on the substrate at least partially covers the orthogonal projection of the channel region of the fourth transistor on the substrate.

48. The display panel according to claim 47, characterized in that, The first active layer, the second active layer, and the third active layer are on the same layer and connected.

49. The display panel according to claim 47, characterized in that, The second active layer extends along the second direction, and the third active layer extends along the second direction. The second active layer and the third active layer are located on different sides of the first active layer.

50. The display panel according to claim 47, characterized in that, The orthogonal projection of the gate of the second transistor onto the substrate is located on the side where the orthogonal projection of the gate of the fourth transistor onto the substrate is away from the orthogonal projection of the gate of the first transistor onto the substrate.

51. The display panel according to claim 49, characterized in that, The display panel further includes a first voltage signal line located in the first conductive layer, wherein the orthographic projection of the first voltage signal line on the substrate at least partially covers the orthographic projection of the channel region of the second transistor on the substrate.

52. The display panel according to claim 47, characterized in that, The channel region of the second transistor is located in the third active layer.

53. The display panel according to claim 51, characterized in that, The orthographic projection of the first voltage signal line on the substrate does not overlap with the orthographic projection of the second active layer on the substrate.

54. The display panel according to claim 51, characterized in that, The first voltage signal line extends along a first direction, which intersects with the second direction.

55. The display panel according to claim 54, characterized in that, The display panel further includes a first light emission control signal line, which is intersected with the second active layer and the third active layer.

56. The display panel according to claim 55, characterized in that, The orthographic projection of the first light-emitting control signal line on the substrate is located between the orthographic projection of the first voltage signal line on the substrate and the orthographic projection of the gate of the first transistor on the substrate.

57. The display panel according to claim 55, characterized in that, The first light emission control signal line extends along the first direction.

58. The display panel according to claim 55, characterized in that, The pixel circuit further includes a first initialization module, which includes a fifth transistor. The channel region of the fifth transistor is located in the third active layer. The display panel further includes a first scan signal line. The orthographic projection of the first scan signal line on the substrate at least partially covers the orthographic projection of the channel region of the fifth transistor on the substrate.

59. The display panel according to claim 58, characterized in that, The display panel further includes a second voltage signal line and a connecting line. The multilayer conductive layer further includes a second conductive layer and a third conductive layer. The second voltage signal line is located on the second conductive layer, and the connecting line is located on the third conductive layer. The second voltage signal line is connected to one end of the connecting line through a via, and the third active layer is connected to the other end of the connecting line through a via.

60. The display panel according to claim 59, characterized in that, The second voltage signal line extends along the first direction, and the connecting line extends along the second direction.

61. The display panel according to claim 60, characterized in that, The orthographic projection of the first scan signal line on the substrate is located between the orthographic projections of the first voltage signal line on the substrate and the orthographic projections of the second voltage signal line on the substrate, and the orthographic projection of the first scan signal line on the substrate is located on the side of the orthographic projection of the first voltage signal line on the substrate that is away from the orthographic projection of the gate of the first transistor on the substrate.

62. A display device, characterized in that, Includes the display panel as described in any one of claims 45-61.

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