A magnetic latching relay control circuit

Abstract

This invention provides a magnetic latching relay control circuit, which includes a power supply circuit, a level conversion circuit for converting external input signals into high and low levels, and a soft-start suppression circuit for preventing malfunctions. The key feature is that, like a regular relay, it only requires a closed or open signal to control the magnetic latching relay's on / off state. By adding a circuit logic and timing sequence—comprising a power supply circuit, energy storage circuit, soft-start suppression circuit, level conversion circuit, pulse generation circuit, and drive circuit—between the external signal and the magnetic latching relay's drive, it automatically identifies whether the external signal is closed or open. Then, a fixed-delay signal is provided through the two ports of the pulse generation circuit, amplified by the drive circuit, to control the magnetic latching relay's on / off state.

Description

Technical Field

[0001] This invention relates to the field of relay technology, and more specifically, to a magnetic latching relay control circuit. Background Technology

[0002] In the field of power electronics, magnetic latching relays are increasingly widely used. With their greater overcurrent capacity and extremely low power consumption, magnetic latching relays offer significant advantages over ordinary relays. They are well-suited for use as input / output switches at the power input / output terminals of chargers, energy storage devices, and battery formation equipment. However, their relatively complex control method is one of the important factors limiting their widespread adoption.

[0003] For example, the most common control method is software control, which outputs two timed signals through the I / O port, which are then amplified by external circuitry to drive the magnetic latching relay. Hardware control is another option, where two external signals are given as inputs, and the on / off state of the magnetic latching relay is controlled by strictly controlling the timing of the two drive signals; however, its feasibility is very low.

[0004] Software control has the following drawbacks: it requires a microcontroller, which involves cost, development difficulty and production cycle; it is difficult to apply to some circuits that do not have a microcontroller; and even if a microcontroller is available, it still requires two I / Os, which is a waste of resources. Hardware control has the following drawbacks: it requires two signals with fixed timing to be given manually, and it is difficult to control the time difference between the two signals.

[0005] Therefore, existing magnetic latching relay control methods often require two input signals. Whether it is software control or hardware control, the two signals are independent inputs, which is a great waste of the control port. Moreover, since the pulse width and timing of the two signals need to be strictly controlled, the magnetic latching relay may fail to respond properly or burn out if not handled carefully. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a magnetic latching relay control circuit that reduces the difficulty of using magnetic latching relays while improving circuit stability, in order to address the shortcomings of the above-mentioned technical solutions.

[0007] This invention provides a control circuit for a magnetic latching relay. The control circuit includes a power supply circuit, a level conversion circuit for converting an external input signal into a high-low level, a soft-start suppression circuit for preventing malfunctions, an energy storage circuit, a pulse generation circuit for generating a pulse signal from the differential level signal, a drive circuit, and a magnetic latching relay. The output terminal of the power supply circuit is electrically connected to the input terminals of the energy storage circuit and the soft-start suppression circuit; the output terminals of the energy storage circuit and the soft-start suppression circuit are electrically connected to the input terminal of the pulse generation circuit; the energy storage circuit is electrically connected to the drive circuit and the magnetic latching relay; the level conversion circuit is electrically connected to the soft-start suppression circuit and the pulse generation circuit; the output terminal of the drive circuit is electrically connected to the magnetic latching relay; the drive circuit amplifies the pulse signal to generate a drive signal, which controls the on / off state of the relay.

[0008] In the magnetic latching relay control circuit of this invention, the power supply circuit includes a rectifier bridge, a power chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and an inductor. The second AC input terminal of the rectifier bridge is connected to an AC power supply, and the third AC input terminal of the rectifier bridge is also electrically connected to an AC power supply. The first diode and the first resistor are connected in series, with one end electrically connected to the first AC output terminal of the rectifier bridge and the other end electrically connected to the second pin of the power chip. The first capacitor and the second resistor are connected in parallel, with one end electrically connected to the first resistor and the other end electrically connected to the second capacitor. One end of the third resistor is electrically connected to the second resistor and the other end is electrically connected to the second capacitor. The fourth AC output terminal of the rectifier bridge is connected to the common terminal of the second capacitor and the third resistor. One end of the fourth resistor is electrically connected to the third pin of the power chip, and the other end is electrically connected to the second pin of the power chip. Electrical connections: One end of the fifth resistor is electrically connected to the fourth pin of the power chip, and the other end is connected to the fourth AC output terminal of the rectifier bridge. The sixth, seventh, and third resistors are connected in series, with one end connected to the fifth resistor and the other end grounded. The eighth resistor and the fourth capacitor are connected in series, with one end connected to the first pin of the power chip and the other end connected to the eighth pin of the power chip. The seventh pin of the power chip is electrically connected to the third capacitor. One end of the fifth capacitor is electrically connected to the sixth pin of the power chip, and the other end is electrically connected to the sixth resistor. The second diode is connected in series with one end to the eighth pin of the power chip and the other end to the seventh pin of the power chip. The inductor, the third diode, and the ninth resistor are connected in series, with one end connected to the third capacitor and the other end connected to the second diode. The tenth and eleventh resistors are connected in series, with one end connected to a 24V voltage and the other end connected to the ninth resistor. One end of the sixth capacitor is connected to the second diode and the other end is connected to the common terminal of the tenth and eleventh resistors. The fifth pin of the power chip is connected to the tenth resistor.

[0009] In the magnetic latching relay control circuit of this invention, the energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode. The seventh capacitor and the twelfth resistor are connected in parallel, with one end grounded and the other end electrically connected to a 24V voltage. The fourth diode and the eighth capacitor are connected in series, with one end electrically connected to the seventh capacitor and the other end electrically connected to the twelfth resistor. The thirteenth, fourteenth, fifteenth, and sixteenth resistors are connected in parallel, with one end electrically connected to one end of the fifth diode and the other end electrically connected to the ninth capacitor. The other end of the fifth diode is connected to the twelfth resistor. The ninth and tenth capacitors are connected in parallel, with one end connected to the seventh capacitor and the other end connected to the sixteenth resistor. One end of the sixth diode is electrically connected to the 24V voltage and the other end is electrically connected to the tenth capacitor. The seventh diode and the seventeenth resistor are connected in series, with one end connected to the common terminal of the fourth and sixth diodes and the other end electrically connected to the tenth capacitor.

[0010] In the magnetic latching relay control circuit of this invention, the soft-start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twentieth resistor, and a first operational amplifier. One end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage. One end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier. One end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier. The nineteenth resistor and the eighth diode are connected in series, with one end connected to the 24V voltage and the other end electrically connected to the third pin of the first operational amplifier. One end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor. One end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier. The ninth diode and the twenty-first resistor are connected in series, with one end electrically connected to the twentieth resistor and the other end electrically connected to the second pin of the first operational amplifier. The first pin of the first operational amplifier is electrically connected to the level conversion circuit.

[0011] In the magnetic latching relay control circuit of this invention, the level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor, and a thirteenth capacitor. The tenth and eleventh diodes are connected in series, with one end electrically connected to the soft-start suppression circuit and the other end connected to a reset circuit. The thirteenth capacitor and the twenty-second resistor are connected in series, with one end connected to the common terminal of the tenth and eleventh diodes and the other end electrically connected to the base of the first transistor. The common terminal of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor. The emitter of the first transistor is grounded. The collector of the first transistor is electrically connected to the pulse generation circuit. One end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor. One end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to an external button. One end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

[0012] In the magnetic latching relay control circuit of the present invention, the pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit. One end of the first pulse generating circuit and the second pulse generating circuit are respectively electrically connected to the level conversion circuit, and the other end is respectively electrically connected to the driving circuit.

[0013] In the magnetic latching relay control circuit of the present invention, the driving circuit includes a first driving circuit and a second driving circuit. The first driving circuit includes a second transistor, a third transistor, and a twenty-fifth resistor. One end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series connection point between the base of the second transistor and the base of the third transistor. The second driving circuit includes a fourth transistor, a fifth transistor, and a twenty-sixth resistor. One end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit. The series connection point between the emitter of the second transistor and the emitter of the third transistor, and the series connection point between the emitter of the fourth transistor and the emitter of the fifth transistor, are connection points used to connect the two ends of the magnetic latching relay coil, respectively.

[0014] The magnetic latching relay control circuit of the present invention further includes a reset circuit, wherein the input terminal of the reset circuit is electrically connected to the power supply circuit, and the output terminal of the reset circuit is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

[0015] The magnetic latching relay control circuit of this invention only requires a closed or open signal, just like a regular relay, to control the on / off state of the magnetic latching relay. By adding a circuit logic and timing sequence formed by a reasonable design and combination of a power supply circuit, energy storage circuit, soft-start suppression circuit, level conversion circuit, pulse generation circuit, and drive circuit between the external signal and the drive of the magnetic latching relay, it can automatically identify whether the external signal is a closed or open signal. Then, a fixed-delay signal is given through the two ports of the pulse generation circuit, which is amplified by the drive circuit to control the conduction and opening of the magnetic latching relay. By simplifying the two signals that originally required strict timing control into one, the difficulty of using the magnetic latching relay is reduced, and the stability of the circuit is improved. At the same time, this application eliminates the need for an MCU. This design not only reduces costs but also reduces the software programming process. Attached Figure Description

[0016] Figure 1 This is a schematic block diagram of the magnetic latching relay control circuit of the present invention;

[0017] Figure 2 This is a schematic diagram of the power supply circuit in the magnetic latching relay control circuit of the present invention;

[0018] Figure 3 This is a circuit diagram of the level conversion circuit in the magnetic latching relay control circuit of the present invention;

[0019] Figure 4 This is a circuit diagram of the soft-start suppression circuit in the magnetic latching relay control circuit of the present invention;

[0020] Figure 5 This is a circuit diagram of the energy storage circuit in the magnetic latching relay control circuit of the present invention;

[0021] Figure 6 This is a circuit diagram of the pulse generation circuit in the magnetic latching relay control circuit of the present invention;

[0022] Figure 7 This is a circuit diagram of the drive circuit in the magnetic latching relay control circuit of the present invention;

[0023] Figure 8 This is a circuit diagram of the reset circuit in the magnetic latching relay control circuit of the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] like Figure 1 As shown, Figure 1-8 This is a schematic flowchart of an embodiment of a magnetic latching relay control circuit according to the present invention. A magnetic latching relay control circuit is provided, comprising a power supply circuit, a level conversion circuit for converting an external input signal into a high-low level, a soft-start suppression circuit for preventing malfunction, an energy storage circuit, a pulse generation circuit for generating a pulse signal from a differential level signal, a drive circuit, and a magnetic latching relay. The output terminal of the power supply circuit is electrically connected to the input terminals of the energy storage circuit and the soft-start suppression circuit; the output terminals of the energy storage circuit and the soft-start suppression circuit are electrically connected to the input terminal of the pulse generation circuit; the energy storage circuit is electrically connected to the drive circuit and the magnetic latching relay; the level conversion circuit is electrically connected to the soft-start suppression circuit and the pulse generation circuit; the output terminal of the drive circuit is electrically connected to the magnetic latching relay; the drive circuit amplifies the pulse signal to generate a drive signal, which controls the on / off state of the relay.

[0027] In one embodiment, the power supply circuit includes a rectifier bridge, a power chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and an inductor; the second AC input terminal of the rectifier bridge is connected to an AC power supply, the third AC input terminal of the rectifier bridge is electrically connected to an AC power supply, the first diode and the first resistor are connected in series, one end of which is electrically connected to the first AC output terminal of the rectifier bridge, and the other end is electrically connected to the second pin of the power chip; the first capacitor and the second resistor are connected in parallel, one end of which is electrically connected to the first resistor, and the other end is electrically connected to the second capacitor; one end of the third resistor is electrically connected to the second resistor, and the other end is electrically connected to the second capacitor; the fourth AC output terminal of the rectifier bridge is connected to the common terminal of the second capacitor and the third resistor, one end of the fourth resistor is electrically connected to the third pin of the power chip, and the other end is electrically connected to the second pin of the power chip; One end of the fifth resistor is electrically connected to the fourth pin of the power supply chip, and the other end is connected to the fourth AC output terminal of the rectifier bridge. The sixth and seventh resistors and the third capacitor are connected in series, with one end connected to the fifth resistor and the other end grounded. The eighth resistor and the fourth capacitor are connected in series, with one end connected to the first pin of the power supply chip and the other end connected to the eighth pin of the power supply chip. The seventh pin of the power supply chip is connected to the third capacitor. One end of the fifth capacitor is connected to the sixth pin of the power supply chip and the other end is connected to the sixth resistor. One end of the second diode is connected to the eighth pin of the power supply chip and the other end is connected to the seventh pin of the power supply chip. The inductor, the third diode, and the ninth resistor are connected in series, with one end connected to the third capacitor and the other end connected to the second diode. The tenth and eleventh resistors are connected in series, with one end connected to a 24V voltage and the other end connected to the ninth resistor. One end of the sixth capacitor is connected to the second diode, and the other end is connected to the common terminal of the tenth and eleventh resistors. The fifth pin of the power supply chip is connected to the tenth resistor.

[0028] In one embodiment, the energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode. The seventh capacitor and the twelfth resistor are connected in parallel, with one end grounded and the other end electrically connected to a 24V voltage. The fourth diode and the eighth capacitor are connected in series, with one end electrically connected to the seventh capacitor and the other end electrically connected to the twelfth resistor. The thirteenth, fourteenth, fifteenth, and sixteenth resistors are connected in parallel, with one end electrically connected to one end of the fifth diode and the other end electrically connected to the ninth capacitor. The other end of the fifth diode is connected to the twelfth resistor. The ninth and tenth capacitors are connected in parallel, with one end connected to the seventh capacitor and the other end connected to the sixteenth resistor. One end of the sixth diode is electrically connected to the 24V voltage and the other end is electrically connected to the tenth capacitor. The seventh diode and the seventeenth resistor are connected in series, with one end connected to the common terminal of the fourth and sixth diodes and the other end electrically connected to the tenth capacitor.

[0029] In one embodiment, the soft-start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twentieth resistor, and a first operational amplifier; one end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier; one end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; the nineteenth resistor and the eighth diode are connected in series, one end of which is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier; one end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor; one end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier; the ninth diode and the twenty-first resistor are connected in series, one end of which is electrically connected to the twentieth resistor, and the other end is electrically connected to the second pin of the first operational amplifier; the first pin of the first operational amplifier is electrically connected to the level conversion circuit.

[0030] In one embodiment, the level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor, and a thirteenth capacitor. The tenth and eleventh diodes are connected in series, with one end electrically connected to the soft-start suppression circuit and the other end connected to a reset circuit. The thirteenth capacitor and the twenty-second resistor are connected in series, with one end connected to the common terminal of the tenth and eleventh diodes and the other end electrically connected to the base of the first transistor. The common terminal of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor. The emitter of the first transistor is grounded. The collector of the first transistor is electrically connected to the pulse generation circuit. One end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor. One end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to an external button. One end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

[0031] In one embodiment, the pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit, one end of which is electrically connected to the level conversion circuit, and the other end of which is electrically connected to the driving circuit.

[0032] In one embodiment, the driving circuit includes a first driving circuit and a second driving circuit. The first driving circuit includes a second transistor, a third transistor, and a twenty-fifth resistor. One end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series connection point between the base of the second transistor and the base of the third transistor. The second driving circuit includes a fourth transistor, a fifth transistor, and a twenty-sixth resistor. One end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit. The series connection point between the emitters of the second and third transistors and the series connection point between the emitters of the fourth and fifth transistors are connection points used to connect the two ends of the magnetic latching relay coil, respectively.

[0033] In one embodiment, a reset circuit is further included, the input terminal of which is electrically connected to the power supply circuit, and the output terminal of which is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

[0034] Specifically, the main function of the power supply circuit is to transform the unstable external input voltage into a stable voltage, ensuring the reliable operation of the subsequent circuits; the function of the energy storage circuit is to store a portion of electrical energy, so that it can maintain normal operation for a short period of time after the power is cut off, allowing the circuit to be effectively reset; the function of the soft-start suppression circuit is to prevent the circuit from malfunctioning before the voltage is fully established after power-on; the function of the reset circuit is to restore the magnetic latching relay to its default state (usually open, but can be selected to be open or closed depending on the circuit scheme) after power-off; the level conversion circuit converts the external input on / off signal into high and low levels and also acts as a signal filter; the pulse generation circuit generates two fixed-delay levels and generates a pulse signal from the differential signal of these two levels; the function of the drive circuit is to amplify the pulse signal generated by the pulse generation circuit so that it can drive the magnetic latching relay.

[0035] The pulse width of the drive signal in the magnetic latching relay control circuit provided by this invention is determined during circuit design and will not be affected by external factors, resulting in a pulse width that is too wide or too narrow. The principle is to add a pulse generating circuit between the external signal and the drive of the magnetic latching relay. This circuit automatically identifies whether the external signal is a closed or open signal. Then, it outputs fixed-delay signals through its two ports. After amplification by the drive circuit, these signals control the conduction and disconnection of the magnetic latching relay.

[0036] In actual use, after power-on, the power supply circuit converts the input power into a stable power supply. Part of it is stored in the capacitor of the energy storage circuit for backup, and the other part is supplied to other circuits. During the power-on and power stabilization process, the downstream circuits cannot operate, otherwise unpredictable consequences may occur due to incomplete power-on. Therefore, the soft-start suppression circuit will output a signal during power-on to prevent the downstream circuits from operating. After the power supply stabilizes, this signal will disappear.

[0037] When the external button is closed, the level conversion circuit converts the on / off signal into a high / low level. After receiving this high / low level, the two input terminals of the pulse generation circuit pass through two RC circuits with different time constants and are compared with the voltage of the hysteresis comparator. Therefore, after inputting a signal, the pulse generation circuit will output two signals in succession. The difference between these two signals is used to obtain a set of pulse signals. Then, this pulse signal is amplified by the drive circuit and controls the magnetic latching relay to turn on and off.

[0038] In practical use, it is desirable for the magnetic latching relay to automatically disconnect after the power is turned off. However, since the magnetic latching relay requires a pulse signal to activate, it will remain in its current state without additional triggering circuitry, which is not in line with expectations. Therefore, a reset circuit is implemented. When the power supply voltage drops, the reset circuit detects a falling edge and sends a high / low level signal to the pulse generation circuit, thereby controlling the magnetic latching relay to disconnect. During this process, since the input power supply has been disconnected, the normal operation of the circuit cannot be guaranteed. At this time, the electrical energy stored in the energy storage circuit will be released to maintain the energy required for the magnetic latching relay to disconnect.

[0039] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0040] Therefore, the above description is only a preferred embodiment of the present invention, and the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. The scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A magnetic latching relay control circuit, characterized in that, The control circuit includes a power supply circuit, a level conversion circuit for converting external input signals into high and low levels, a soft-start suppression circuit for preventing malfunctions, an energy storage circuit, a pulse generation circuit for generating pulse signals from differential level signals, a drive circuit, and a magnetic latching relay. The output terminal of the power supply circuit is electrically connected to the input terminals of the energy storage circuit and the soft-start suppression circuit, and the output terminals of the energy storage circuit and the soft-start suppression circuit are electrically connected to the input terminal of the pulse generation circuit. The energy storage circuit is electrically connected to the drive circuit and the magnetic latching relay, the level conversion circuit is electrically connected to the soft-start suppression circuit and the pulse generation circuit, and the output terminal of the drive circuit is electrically connected to the magnetic latching relay. The drive circuit amplifies the pulse signal to generate a drive signal, which controls the on / off state of the relay. The power supply circuit includes a rectifier bridge, a power chip, a first diode, a second diode, a third diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and an inductor. The second AC input terminal of the rectifier bridge is connected to an AC power supply, and the third AC input terminal of the rectifier bridge is also electrically connected to an AC power supply. The first diode and the first resistor are connected in series, with one end electrically connected to the first AC output terminal of the rectifier bridge and the other end electrically connected to the second pin of the power chip. The first capacitor and the second resistor are connected in parallel, with one end electrically connected to the first resistor and the other end electrically connected to the second capacitor. The third resistor is connected with the second resistor and the second capacitor at one end. The fourth AC output terminal of the rectifier bridge is connected to the common terminal of the second capacitor and the third resistor. One end of the fourth resistor is electrically connected to the third pin of the power chip and the other end is electrically connected to the second pin of the power chip. The fifth diode... One end of the resistor is electrically connected to the fourth pin of the power chip, and the other end is connected to the fourth AC output terminal of the rectifier bridge. The sixth resistor, the seventh resistor, and the third capacitor are connected in series, with one end connected to the fifth resistor and the other end grounded. The eighth resistor and the fourth capacitor are connected in series, with one end connected to the first pin of the power chip and the other end connected to the eighth pin of the power chip. The seventh pin of the power chip is connected to the third capacitor. One end of the fifth capacitor is connected to the sixth pin of the power chip and the other end is connected to the sixth resistor. One end of the second diode is connected to the eighth pin of the power chip and the other end is connected to the seventh pin of the power chip. The inductor, the third diode, and the ninth resistor are connected in series, with one end connected to the third capacitor and the other end connected to the second diode. The tenth resistor and the eleventh resistor are connected in series, with one end connected to a 24V voltage and the other end connected to the ninth resistor. One end of the sixth capacitor is connected to the second diode, and the other end is connected to the common terminal of the tenth and eleventh resistors. The fifth pin of the power chip is connected to the tenth resistor. The energy storage circuit includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a fourth diode, a fifth diode, a sixth diode, and a seventh diode. The seventh capacitor and the twelfth resistor are connected in parallel, with one end grounded and the other end electrically connected to a 24V voltage. The fourth diode and the eighth capacitor are connected in series, with one end electrically connected to the seventh capacitor and the other end electrically connected to the twelfth resistor. The thirteenth, fourteenth, fifteenth, and sixteenth resistors are connected in parallel, with one end electrically connected to one end of the fifth diode and the other end electrically connected to the ninth capacitor. The other end of the fifth diode is connected to the twelfth resistor. The ninth and tenth capacitors are connected in parallel, with one end connected to the seventh capacitor and the other end connected to the sixteenth resistor. One end of the sixth diode is electrically connected to the 24V voltage, and the other end is electrically connected to the tenth capacitor. The seventh diode and the seventeenth resistor are connected in series, with one end connected to the common terminal of the fourth and sixth diodes and the other end electrically connected to the tenth capacitor. The soft-start suppression circuit includes an eighth diode, a ninth diode, an eleventh capacitor, a twelfth capacitor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, and a first operational amplifier. One end of the eleventh capacitor is connected to the second pin of the first operational amplifier, and the other end is electrically connected to the 24V voltage. One end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the second pin of the first operational amplifier. One end of the eighteenth resistor is connected to the 24V voltage, and the other end is electrically connected to the third pin of the first operational amplifier. The nineteenth resistor and the eighth diode are connected in series, with one end connected to the 24V voltage and the other end electrically connected to the third pin of the first operational amplifier. One end of the twelfth capacitor is grounded, and the other end is electrically connected to the eighteenth resistor. One end of the twentieth resistor is grounded, and the other end is electrically connected to the second pin of the first operational amplifier. The ninth diode and the twenty-first resistor are connected in series, with one end connected to the twenty-first resistor and the other end electrically connected to the second pin of the first operational amplifier. The first pin of the first operational amplifier is electrically connected to the level conversion circuit.

2. The magnetic latching relay control circuit according to claim 1, characterized in that, The level conversion circuit includes a tenth diode, an eleventh diode, a thirteenth diode, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a first transistor, and a thirteenth capacitor. The tenth and eleventh diodes are connected in series, one end of which is electrically connected to the soft-start suppression circuit, and the other end is connected to a reset circuit. The thirteenth capacitor and the twenty-second resistor are connected in series, one end of which is connected to the common terminal of the tenth and eleventh diodes, and the other end is electrically connected to the base of the first transistor. The common terminal of the thirteenth capacitor and the twenty-second resistor is electrically connected to the emitter of the first transistor. The emitter of the first transistor is grounded. The collector of the first transistor is electrically connected to the pulse generation circuit. One end of the twenty-third resistor is connected to the 24V voltage, and the other end is connected to the collector of the first transistor. One end of the twenty-fourth resistor is electrically connected to the thirteenth capacitor, and the other end is connected to an external button. One end of the thirteenth diode is electrically connected to the twenty-fourth resistor, and the other end is electrically connected to the base of the first transistor.

3. The magnetic latching relay control circuit according to claim 2, characterized in that, The pulse generating circuit includes a first pulse generating circuit and a second pulse generating circuit. One end of the first pulse generating circuit and the second pulse generating circuit are electrically connected to the level conversion circuit, and the other end is electrically connected to the driving circuit.

4. The magnetic latching relay control circuit according to claim 3, characterized in that, The driving circuit includes a first driving circuit and a second driving circuit. The first driving circuit includes a second transistor, a third transistor, and a twenty-fifth resistor. One end of the twenty-fifth resistor is electrically connected to the first pulse generating circuit, and the other end is connected to the series connection point between the base of the second transistor and the base of the third transistor. The second driving circuit includes a fourth transistor, a fifth transistor, and a twenty-sixth resistor. One end of the twenty-sixth resistor is electrically connected to the second pulse generating circuit. The series connection point between the emitters of the second and third transistors and the series connection point between the emitters of the fourth and fifth transistors are connection points used to connect the two ends of the magnetic latching relay coil, respectively.

5. The magnetic latching relay control circuit according to claim 4, characterized in that, It also includes a reset circuit, the input of which is electrically connected to the power supply circuit, and the output of which is electrically connected to the first pulse generating circuit and the second pulse generating circuit.

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