A Schottky diode with a lateral structure, an in-situ sample preparation method and fabrication process

Abstract

This invention discloses a lateral Schottky diode, an in-situ sample preparation method, and a fabrication process. The anode and cathode of the Schottky diode are in the same plane. The outer periphery of the structure is a cathode ohmic contact layer, and the center is an anode Schottky metal layer. The material structures between these layers are, sequentially, an AlGaN barrier layer and a GaN substrate layer. The in-situ sample preparation method of this invention uses FIB sample preparation technology and selected area disconnection (SID) to connect the sample to the chip, allowing real-time observation of device failure behavior under a transmission electron microscope. The fabrication process of this invention effectively isolates the anode and the two-dimensional electron device using silicon oxide during sample preparation. Simultaneously, silicon oxide isolation prevents power supply short circuits, shortens the current path, and increases efficiency, effectively preventing damage to the sample surface and underlying metal functional regions during ion beam operations. This solves problems such as low device power conversion efficiency and electrode short circuits.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and further relates to a lateral Schottky diode, an in-situ sample preparation method, and its fabrication process within the field of wide bandgap semiconductor devices. This invention can be applied to high-power devices, switching power supplies, and rectifier circuits. Background Technology

[0002] Schottky diodes are important rectifiers in semiconductor devices. Fast recovery Schottky diodes, in particular, offer advantages such as wide bandgap, high switching frequency, low reverse leakage current, and short reverse leakage time, making them widely used in power, electronics, and communications. By increasing their breakdown voltage, Schottky diodes can be used in high-voltage applications; by reducing their leakage current, they can be used in communications and other fields, mitigating the risks associated with high temperatures. To further improve rectification efficiency, reduce static power consumption, and meet the requirements of high-voltage applications, Schottky diodes need to simultaneously possess low turn-on voltage, low reverse leakage current, and high breakdown voltage. Currently, the reverse withstand voltage of vertical-structure Schottky diodes is generally low, typically not exceeding 100V. Although technological advancements have enabled some diodes to achieve a maximum reverse bias withstand voltage of 200V, the reverse withstand voltage capability of vertical-structure diodes remains limited compared to other diodes. This restricts the use of vertical-structure Schottky diodes in applications requiring high voltage. Secondly, the reverse leakage current of vertical Schottky diodes exhibits a positive temperature characteristic, meaning that the reverse leakage current increases sharply with rising temperature. This could lead to thermal breakdown of the device and pose a risk of thermal runaway. Furthermore, the design of the circuitry during the prototyping process of vertical diodes can cause significant damage to the sample, making it more fragile.

[0003] In their dissertation "Research on GaN Quasi-Vertical Schottky Diodes and Planar Complementary Logic Inverters" (Xi'an University of Electronic Science and Technology, Doctoral Dissertation, June 2022), Chen Jiabo et al. proposed a GaN-based power electronic device using a Schottky diode. This diode is a GaN quasi-vertical Schottky diode structure combining a sidewall cathode structure and an F-ion implantation field-limiting ring structure. This structure improves breakdown voltage and power while reducing resistance, all while maintaining a constant turn-on voltage. However, this structure still has three shortcomings: First, the sidewall cathode structure and the F-ion implantation field-limiting ring structure face reliability issues under long-term operating conditions. For example, F-ion implantation may alter material properties, and the sidewall cathode structure may degrade under high temperature or high voltage conditions. Second, while the F-ion implantation field-limiting ring structure helps improve the breakdown voltage, the introduced sidewall cathode structure affects this, and it may also increase forward conduction resistance, thus reducing the device's power conversion efficiency. Third, the complexity of the fabrication process and reliability issues lead to a high cost for this structure, limiting its application in certain low-cost fields.

[0004] Dexing Yifa Power Semiconductor Co., Ltd. proposed a planar Schottky diode and its fabrication method in its patent application "A Planar Schottky Diode and Its Fabrication Method" (Application No. 202211646174.6, Publication No. CN 11577828 A). Since this diode is a Schottky diode device with an N-type substrate, its fabrication method involves setting doped regions to improve its reverse surge current capability. The shortcomings of this fabrication method are: firstly, during the high-energy ion implantation of boron, excessively high ion beam energy can easily damage the sample structure; secondly, the reliability of the sample fabrication process cannot be analyzed in real time, and the performance failure of the device cannot be directly linked to microstructural damage. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of the prior art by proposing a lateral Schottky diode and an in-situ sample preparation method, which solves the problems of low power conversion efficiency of Schottky diode devices and difficulties in connecting electrodes to MEMS chips and short circuits of electrodes during the sample preparation process of in-situ electrically charged Schottky diode samples.

[0006] To achieve the above objectives, the present invention employs a lateral structure in its Schottky diode, where the anode and cathode are in the same plane. The outer periphery of the structure is a cathode ohmic contact layer, and the center is an anode Schottky metal layer. Between these layers, the material structures are sequentially an AlGaN barrier layer and a GaN substrate layer. By optimizing the metal layer ratio and thickness of the cathode ohmic electrode, the contact resistance can be effectively reduced. The barrier layer uses AlGaN material, whose two-dimensional electron gas is formed by spontaneous polarization and piezoelectric polarization, making the carrier migration rate less affected by temperature and even increasing it at low temperatures, thus achieving a higher carrier migration speed. These two special features result in a lateral structure diode with lower contact resistance and higher carrier migration speed. Lower contact resistance reduces energy loss at the contact interface, allowing current to flow more smoothly through the diode, while the higher carrier migration speed increases the transport speed of carriers within the diode. This solves the problem of low power conversion efficiency in existing Schottky diode devices. The in-situ sample preparation method of this invention employs FIB sample preparation technology and selected area disconnection to complete the connection between the sample and the chip. This allows for real-time observation of the device's failure behavior under a transmission electron microscope (TEM), improving device reliability and overcoming the limitation of existing technologies that cannot perform real-time reliability analysis during sample preparation. A direct link is established between device performance failure and material microstructure damage. This technology enables atomic-scale morphological observation of the device under real-time power-on operation, directly identifying the physical causes of electrical property degradation, such as material structural damage and element diffusion, providing guidance for further development of high-performance diode devices. The fabrication method of this invention, by depositing a Pt protective layer on top of the device, can block ion beams from directly bombarding the sample surface, significantly reducing ion beam damage and protecting the device. The fabrication method of this invention uses silicon oxide isolation to isolate metal layers between different layers, preventing current leakage and short circuits. It can control current flow and effectively prevent short circuits caused by contact between metal functional areas and electrodes during subsequent connection processes. This invention also describes the fabrication process of a lateral structure Schottky diode. During sample preparation, silicon oxide isolation is designed to effectively isolate the anode and the two-dimensional electron, while simultaneously preventing short circuits between the chip and the electrodes. Silicon oxide isolation prevents power supply short circuits, resulting in shorter current paths and higher efficiency. It also effectively prevents damage to the sample surface and underlying metal functional regions during ion beam operation. This solves problems such as low device power conversion efficiency and electrode short circuits.

[0007] The Schottky diode with a lateral structure of the present invention includes an ohmic metal layer and a Schottky metal layer, both of which are disposed in the same plane. The outer periphery of the structure is an ohmic contact layer, and the center is a Schottky metal layer. The material structure of each layer between the two is an AlGaN barrier layer and a GaN substrate layer in sequence. The effect of reducing resistance is achieved by optimizing the thickness and ratio of each metal layer.

[0008] Furthermore, the anode radius of the Schottky metal layer is 100 μm, and the distance between the cathode of the ohmic contact layer and the anode of the Schottky metal layer is 15 μm.

[0009] Furthermore, the barrier layer is made of AlGaN material with a thickness of 25nm.

[0010] Furthermore, the substrate layer is made of GaN material and has a thickness of 200 nm.

[0011] The present invention provides an in-situ sample preparation method for a lateral Schottky diode, which employs FIB sample preparation technology and a selected area disconnection method to connect the sample to the chip, thereby enabling real-time observation of the failure behavior of the device's electrical characteristics under a transmission electron microscope.

[0012] Furthermore, the FIB sample preparation technology involves fixing the AlGaN / GaN heterojunction Schottky diode and the DENS thermoelectric chip and then placing them in a vacuum environment for in-situ sample preparation. The sampling position is determined by adjusting the working distance and the concentric height.

[0013] Furthermore, the selected area disconnection method refers to transferring a portion of the sample onto the chip by a robotic arm using a U-cutting method, thereby completing the connection between the sample and the chip.

[0014] The in-situ sample preparation process of the lateral structure Schottky diode of the present invention includes the following steps:

[0015] Step 1: Take samples and determine the sampling location;

[0016] Step 2, Deposit a Pt protective layer:

[0017] Using an electron beam, a Pt protective layer is deposited between the ohmic metal layer and the Schottky metal layer; a groove is fabricated next to the anode Pt protective layer using an ion beam, with the groove depth reaching the GaN substrate layer; silicon oxide is deposited in the groove.

[0018] Step 3, U-shaped cutting of the sample:

[0019] The sample is cut using a U-cutting method; after complete cutting, the robotic arm is adjusted to be close to the sample, and a Pt layer is deposited to connect the robotic arm and the sample. The other side of the sample is completely cut off, and the sample is extracted by the robotic arm and connected to the chip. The Pt deposition connects the Schottky metal layer of the device to electrode 1 of the chip and the Ohmic metal layer to electrode 2.

[0020] Step 4, cut the Pt thinned sample:

[0021] Using an ion beam, the Pt layer between the anode and cathode is cut off, and the thickness of the diode sample is reduced by real-time observation in the electron beam until the thickness of the sample in the observation area in the electron beam is less than 100 nm.

[0022] Furthermore, the sampling and sampling location determination refers to fixing the AlGaN / GaN heterojunction Schottky diode and the DENS thermoelectric chip, placing them in a vacuum environment for in-situ sample preparation, and adjusting the working distance and concentric height to place the Schottky diode device at the center of the field of view.

[0023] Furthermore, the size of the Pt protective layer is determined by the length, width, and height of the Pt protective layer based on the sample dimensions of the ohmic metal layer and the Schottky metal layer.

[0024] Compared with the prior art, the present invention has the following advantages:

[0025] First, the Schottky diode of this invention adopts a lateral structure, overcoming the low power conversion efficiency of existing Schottky diode devices. This results in a lateral structure diode with lower contact resistance and higher carrier migration speed, thus improving device performance. This structure allows for high on-current and low reverse leakage current while maintaining a relatively small Schottky metal width, achieved by controlling current flow through silicon oxide deposition for isolation, thereby obtaining a higher on-current. In addition to high on-current, it also offers the advantage of high breakdown voltage resistance. Furthermore, the lateral structure diode is easier to fabricate using specific doping and processing techniques.

[0026] Secondly, the in-situ sample preparation method for Schottky diodes of the present invention overcomes the shortcomings of existing technologies that cannot perform real-time analysis of reliability during the sample preparation process. This invention enables real-time observation of the preparation process of lateral structure Schottky diode samples, thereby improving the reliability of the device.

[0027] Third, the Schottky diode fabrication process of this invention, by depositing a Pt protective layer on top of the device, can significantly reduce the damage to the sample caused by the ion beam, thus protecting the device. Furthermore, the device failure behavior can be observed in real time under a transmission electron microscope (TEM), allowing this invention to fully establish the link between device performance failure and material microstructure damage.

[0028] Fourth, the Schottky diode processing technology of the present invention uses silicon oxide isolation to control the current flow direction and prevent short circuits caused by contact between the functional area and the electrode during subsequent connection, thereby further optimizing the performance of the Schottky diode device.

[0029] Fifth, the transverse structure sample preparation method of the present invention is not only applicable to transverse structure sample preparation which is more difficult to operate, but also applicable to longitudinal vertical structure device sample preparation. Moreover, it causes less damage to the sample structure, reduces research and sample preparation costs, has a wider range of applications, and is more universal. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the lateral Schottky diode used in this invention;

[0031] Figure 2 This is a schematic diagram of the in-situ sample preparation method for the lateral structure Schottky diode of the present invention;

[0032] Figure 3 This is a process flow diagram of the lateral structure Schottky diode of the present invention. Detailed Implementation

[0033] To enable those skilled in the art to better understand and implement the technical solutions of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0034] Reference Figure 1 The structure of the lateral Schottky diode according to an embodiment of the present invention will be further described.

[0035] The lateral Schottky diode of the present invention includes a cathode on the periphery of the structure, an anode (Schottky metal layer) in the center, a functional region at the bottom (including AlGaN and GaN), and a GaN substrate layer.

[0036] Taking in-situ sample preparation of AlGaN / GaN heterojunction Schottky diodes and DENS thermoelectric chips as an example, refer to Figure 2 The in-situ sample preparation method of the lateral structure Schottky diode of the present invention will be further described below.

[0037] Step 1, sample injection.

[0038] Step 1.1: Confirm that both the electron beam source and ion beam source of the FIB-SEM are turned off. In the control software, click the Vent button and wait for the venting to complete.

[0039] Step 1.2: Open the FIB-TEM chamber door horizontally, insert the nail station containing the AlGaN / GaN heterojunction Schottky diode and DENS thermoelectric chip into the FIB-TEM chamber stage, and confirm that it is fixed.

[0040] Step 1.3: Click the Pump button in the control software and wait for the chamber pressure to drop below 5×10-3 Pa to obtain a vacuum environment.

[0041] Step 2: Determine the sampling location.

[0042] Step 2.1, Working distance adjustment: After vacuuming, turn on the electron beam and ion beam Beam keys, position the sample preparation area, adjust the Focus key at 5000x or higher and click the Link key, adjust the sample stage height multiple times, gradually raising it to a working distance of 4mm between the sample and the ion beam source.

[0043] Step 2.2, Concentric Height Adjustment: With the sample stage at 0°, move the sample preparation position to the center of the electron beam window, tilt the sample stage to 15°, and use the StageZ up / down keys in the software to adjust the sample preparation position to the center of the electron beam observation window. Then tilt it to 52° and further adjust the sample preparation position to the center.

[0044] Step 2.3: Move the FIB-SEM sample stage and place the Schottky diode device at the center of the field of view.

[0045] Reference Figure 3 The following describes in more detail the steps of the fabrication process for a Schottky diode with a lateral structure according to an embodiment of the present invention.

[0046] Step 1, deposit a Pt layer.

[0047] Step 1.1: A Pt protective layer with dimensions of 10 μm × 2 μm × 0.5 μm is deposited between the cathode (ohmic contact) and the anode (Schottky contact) using an electron beam (2 kV, 1.6-3.2 nA). The size of this layer can be adjusted according to the sample size. This results in a short circuit between the anode and cathode. Figure 2 As shown in (a).

[0048] Step 1.2: A groove is fabricated next to the Pt protective layer of the anode using an ion beam, such as... Figure 2 As shown in (b), the groove depth should reach the GaN substrate layer.

[0049] Step 2, deposit silicon oxide for isolation.

[0050] Silicon oxide is deposited within the groove, such as Figure 2 As shown in (c), it can prevent short circuits caused by direct contact between the functional area (anode metal) and the channel electron region. Silica isolation can also better protect the sample structure and reduce the damage to the sample caused by the ion beam and electron beam during FIB-SEM processing, thus greatly reducing sample damage.

[0051] Silicon oxide is deposited in the groove, almost covering the entire groove, and then filled using Si gas needles in the chamber during the ion beam.

[0052] Step 3, U-shaped cut.

[0053] The sample is cut using a U-cut (30kV, 2.4-5.0nA) method, ensuring the U-cut area completely encompasses the silicon oxide isolation region. Figure 2 As shown in (d). The ion beam is used to cut the sample from a distance of approximately 0.5–1 μm from the sample surface to ensure the sample retains its complete device structure. After complete cutting, the robotic arm is adjusted to approach the sample, and Pt deposition is used to connect the robotic arm and the sample. The other side of the sample is then completely cut off, and the sample is extracted using the robotic arm, as shown in [image / description]. Figure 2 As shown in (e), and connected to the chip, Pt deposition connects the anode of the device to electrode 1 of the chip and the cathode to electrode 2, as follows. Figure 2 As shown in (f), the purpose is to allow for real-time observation of its electrical properties in a transmission electron microscope (TEM). The connection between the robotic arm and the sample using deposited Pt refers to using the robotic arm integrated with the TEM to extract the sample and transfer it onto the chip, thus facilitating subsequent verification of its electrical properties.

[0054] Step 4: Cut off Pt to thin the sample.

[0055] Step 4.1: Using an ion beam (30 kV, 2.4-3.0 nA), the size of the ion beam can be adjusted as needed to cut the Pt layer between the anode and cathode, such as... Figure 2 As shown in (g), the Pt layer is cut off to prevent the device from losing its original electrical characteristics due to short circuits between the anode and cathode.

[0056] Step 4.2 involves thinning using an ion beam, which can be observed in real-time during electron beam observation. The required ion beam thinning values ​​can be adjusted sequentially as follows: 30 kV, 0.44-0.26 nA / 30 kV, 46-90 pA / 5 kV, 63 pA / 2 kV, and 44 pA, until the thickness of the observation area is less than 100 nm, meeting the requirements for transmission electron microscopy observation. The final result is as follows. Figure 2 As shown in (h).

[0057] Thinning a sample refers to cutting the extracted sample into a wedge-shaped part that is thinner at the top and thicker at the bottom using an ion beam. The purpose of thinning a sample is to meet the requirements of real-time observation in transmission electron microscopy. The thickness must be less than 100 nm so that it can be observed in real time in the transmission electron microscope when studying its electrical properties.

Claims

1. A fabrication process for a lateral Schottky diode, characterized in that, Both the ohmic metal layer and the Schottky metal layer are disposed in the same plane. The structure has an ohmic metal layer on the periphery and a Schottky metal layer in the center. The material structures between them are, in sequence, an AlGaN barrier layer and a GaN substrate layer. The resistance is reduced by optimizing the thickness and ratio of each metal layer. The processing steps include the following: Step 1, sampling and determining the sampling location: After fixing the AlGaN / GaN heterojunction Schottky diode and the DENS thermoelectric chip, place them in a vacuum environment for in-situ sample preparation. By adjusting the working distance and concentric height, place the Schottky diode device at the center of the field of view. Step 2, Deposit a Pt protective layer: Using an electron beam, a Pt protective layer is deposited between an ohmic metal layer and a Schottky metal layer; the Pt protective layer covers part of the Schottky metal layer and the ohmic metal layer; at the anode of the Pt protective layer, an ion beam is used to process a groove, the depth of which reaches the GaN substrate layer; silicon oxide is deposited in the groove. Step 3, U-shaped cut of the sample: The sample is cut using a selective area disconnection method. After complete cutting, the robotic arm is adjusted to approach the sample. A Pt protective layer is deposited to connect the robotic arm and the sample, completely cutting off the other side of the sample. The sample is then extracted by the robotic arm and connected to the chip. Pt deposition connects the Schottky metal layer of the device to electrode 2 of the chip and the Ohm metal layer to electrode 1. The cut sample contains silicon oxide in the trench. Step 4, cut the Pt thinned sample: Using an ion beam, the Pt protective layer between the anode and cathode is cut off. The thickness of the diode sample is reduced by real-time observation in the electron beam until the thickness of the sample in the observation area in the electron beam is less than 100 nm.

2. The fabrication process for a lateral Schottky diode according to claim 1, characterized in that, The anode radius of the Schottky metal layer is 100 μm, and the distance between the anode of the Schottky metal layer and the cathode of the ohmic metal layer is 15 μm.

3. The fabrication process for a lateral Schottky diode according to claim 1, characterized in that, The barrier layer is made of AlGaN material and has a thickness of 25 nm.

4. The fabrication process for a lateral Schottky diode according to claim 1, characterized in that, The substrate layer is made of GaN material and has a thickness of 200 nm.

5. The fabrication process for a lateral Schottky diode according to claim 1, characterized in that, The size of the Pt protective layer is set according to the sample dimensions of the ohmic metal layer and the Schottky metal layer, including its length, width, and height.

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