Enhancement signaling of sei processing order in video bitstreams

Abstract

A mechanism for processing video data is disclosed. A conversion between visual media data and a bitstream is performed based on a rule that includes a bitstream conformance requirement that requires a supplemental enhancement information (SEI) processing order SEI message shall include an SEI payload type syntax element with at least a first entry and a second entry.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to U.S. Provisional Patent Application No. 63 / 392,779, filed July 27, 2022, which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to the generation, storage, and consumption of digital audio and video media information in file formats. Background Technology

[0004] Digital video accounts for the largest share of bandwidth used on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, the bandwidth demand for digital video is likely to continue to grow. Summary of the Invention

[0005] The first aspect relates to a method for processing video data, the method comprising: performing a conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules include bitstream consistency requirements, the bitstream consistency requirements requiring that Supplemental Enhancement Information (SEI) processing order SEI messages should include SEI payload type syntax elements having at least a first entry and a second entry.

[0006] Optionally, in any of the foregoing aspects, another implementation of the aspect specifies that the SEI payload type syntax element is po_sei_payload_type, the first entry of the SEI payload type syntax element is po_sei_payload_type[0], and the second entry of the SEI payload type syntax element is po_sei_payload_type[1].

[0007] Alternatively, in any of the foregoing aspects, another implementation of that aspect specifies that the bitstream consistency requirement requires that the SEI processing order SEI messages should include preferred order syntax elements having at least a first entry and a second entry.

[0008] Optionally, in any of the foregoing aspects, another implementation of the aspect specifies that the preferred order syntax element is po_sei_processing_order, the first entry of the preferred order syntax element is po_sei_processing_order[0], and the second entry of the preferred order syntax element is po_sei_processing_order[1].

[0009] Optionally, in any of the foregoing aspects, another implementation of the aspect specifies that within the SEI processing order SEI message, each of po_sei_payload_type[0] and po_sei_payload_type[1] is paired with po_sei_processing_order[0] and po_sei_processing_order[1], respectively, wherein po_sei_processing_order[i] indicates the preferred order for processing SEI messages having a payload type equal to po_sei_payload_type[i].

[0010] The second aspect relates to a method for processing video data, the method comprising: performing a conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules specify the processing order of Supplemental Enhancement Information (SEI) processing order in the SEI message, and that zero values ​​of SEI payload type syntax element entries are processed in a manner similar to one value.

[0011] Optionally, in any of the foregoing aspects, another implementation of that aspect specifies that the SEI payload type syntax element is po_sei_payload_type and the entry for the SEI payload type syntax element is po_sei_payload_type[i].

[0012] Optionally, in any of the foregoing aspects, another implementation of that aspect specifies that po_sei_payload_type[i] is defined as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI message having a payloadType equal to po_sei_payload_type[i]; and for any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] being less than po_sei_processing_order[n] indicates that any SEI message having a payloadType equal to po_sei_payload_type[m], if present, should be processed before any SEI message having a payloadType equal to po_sei_payload_type[n], if present.

[0013] Alternatively, in any of the foregoing aspects, another implementation of that aspect specifies that the conversion includes encoding visual media data into a bitstream.

[0014] Alternatively, in any of the foregoing aspects, another implementation of that aspect specifies that the conversion includes decoding visual media data from a bitstream.

[0015] The third aspect relates to an apparatus for processing visual media data, the apparatus comprising: a processor; and a non-transitory memory having instructions thereon, wherein when the instructions are executed by the processor, they cause the processor to perform any of the foregoing aspects.

[0016] The fourth aspect relates to a non-transitory computer-readable medium including a computer program product for use by an apparatus for processing visual media data, the computer program product including computer-executable instructions stored on the non-transitory computer-readable medium, such that when executed by a processor, the instructions are used by the apparatus for processing visual media data to perform any of the methods of the foregoing aspects.

[0017] The fifth aspect relates to a non-transitory computer-readable recording medium storing a bitstream of visual media data, the visual media data being generated by a method performed by an apparatus for processing visual media data, wherein the method includes: generating the bitstream of visual media data based on rules, wherein the rules include bitstream consistency requirements, the bitstream consistency requirements requiring that Supplemental Enhancement Information (SEI) processing order SEI messages should include SEI payload type syntax elements having at least a first entry and a second entry.

[0018] The sixth aspect relates to a method for storing a bitstream of visual media data, the method comprising: generating a bitstream of visual media data based on rules; and storing the bitstream in a non-transitory computer-readable recording medium, wherein the rules include bitstream consistency requirements that require that Supplemental Enhancement Information (SEI) processing order SEI messages should include SEI payload type syntax elements having at least a first entry and a second entry.

[0019] The seventh aspect relates to the methods, apparatus, or systems described in this document.

[0020] For clarity, any of the foregoing embodiments may be combined with any one or more other foregoing embodiments to create new embodiments within the scope of this disclosure.

[0021] These and other features will become clearer from the following detailed description, taken in conjunction with the accompanying drawings and claims, and from the claims themselves. Attached Figure Description

[0022] To gain a more complete understanding of this disclosure, reference is now made to the following brief description in conjunction with the accompanying drawings and detailed description, wherein like reference numerals denote like parts.

[0023] Figure 1This is a block diagram illustrating an example video processing system.

[0024] Figure 2 This is a block diagram of an example video processing device.

[0025] Figure 3 This is a flowchart of an example video processing method.

[0026] Figure 4 This is a block diagram illustrating an example video codec system.

[0027] Figure 5 This is a block diagram showing an example encoder.

[0028] Figure 6 This is a block diagram showing an example decoder.

[0029] Figure 7 This is a schematic diagram of an example encoder. Detailed Implementation

[0030] First, it should be understood that although illustrative implementations of one or more embodiments are provided below, the disclosed systems and / or methods can be implemented using any number of techniques, whether currently known or yet to be developed. This disclosure should not be limited in any way to the exemplary implementations, drawings, and techniques shown below, including the exemplary designs and implementations shown and described herein, but modifications can be made within the scope of the appended claims and their full equivalents.

[0031] Chapter headings are used in this document for ease of understanding, and the applicability of the techniques and embodiments disclosed in each chapter is not limited to that chapter alone. Furthermore, H.266 technical terminology is used in some descriptions merely for ease of understanding and not to limit the scope of the disclosed techniques. Therefore, the techniques described herein are also applicable to other video codec protocols and designs. In this document, textual editing changes are indicated by bold italics to represent canceled text and bold underlines to represent added text, in contrast to drafts of the Multi-Functional Video Codec (VVC) specification or the International Organization for Standardization (ISO) Basic Media File Format (ISOBMFF) file format specification.

[0032] 1. Preliminary Discussion

[0033] This document relates to image and / or video codec technologies. Specifically, this disclosure relates to signaling notification of the processing order of Supplemental Enhancement Information (SEI). These examples can be applied individually or in various combinations to video bitstreams encoded and decoded by any codec, such as the VVC standard and / or the Multifunctional Supplemental Enhancement Information (VSEI) standard for encoded and decoded video bitstreams.

[0034] 2. Abbreviation

[0035] Adaptive Parameter Set (APS), Access Unit (AU), Codec Layer Video Sequence (CLVS), Codec Layer Video Sequence Start (CLVSS), Cyclic Redundancy Check (CRC), Codec Video Sequence (CVS), Finite Impulse Response (FIR), Intra-Frame Random Access Point (IRAP), Network Abstraction Layer (NAL), Picture Parameter Set (PPS), Picture Unit (PU), Random Access Skip Preamble (RASL), Supplemental Enhancement Information (SEI), Stepped Time Sublayer Access (STSA), Video Codec Layer (VCL), Universal Supplemental Enhancement Information (VSEI) as described in Rec. ITU-T H.274 | ISO / IEC 23002-7, Video Availability Information (VUI), and Multifunctional Video Codec (VVC) as described in Rec. ITU-T H.266 | ISO / IEC 23090-3.

[0036] 3. Further discussion

[0037] 3.1 Video codec standards

[0038] Video codec standards have primarily evolved through the development of standards by the International Telecommunication Union (ITU) Telecommunication Standardization Sector (ITU-T) and the ISO / IEC. ITU-T developed the H.261 and H.263 standards, while ISO / IEC developed the Moving Picture Experts Group (MPEG)-1 and MPEG-4 Visual standards. The two organizations jointly developed the H.262 / MPEG-2 video standard, the H.264 / MPEG-4 Advanced Video Coding (AVC) standard, and the H.265 / High Efficiency Video Coding (HEVC) standard. Starting with H.262, video codec standards are based on a hybrid video codec architecture, utilizing temporal prediction plus transform coding. To explore future video codec technologies beyond HEVC, the Video Codec Experts Group (VCEG) and MPEG jointly established the Joint Video Exploration Group (JVET). JVET adopted numerous methods and incorporated them into reference software called the Joint Exploration Model (JEM). When the Multi-Functional Video Codec (VVC) project was officially launched, JVET was later renamed the Joint Video Experts Team (JVET). VVC is a codec standard that aims to reduce the bit rate by 50% compared to HEVC.

[0039] The Multi-Functional Video Coding (VVC) standard (ITU-T H.266|ISO / IEC 23090-3) and the related Multi-Functional Supplemental Enhancement Information (VSEI) standard (ITU-T H.274|ISO / IEC 23002-7) are designed for the widest range of applications, including traditional uses (e.g., television broadcasting, video conferencing, or playback from storage media) as well as newer and more advanced use cases (e.g., adaptive bitrate streaming, video region extraction, compositing and merging of content from multiple codec video bitstreams, multi-view video, scalable layered codecs, and viewport-adaptive 360° immersive media).

[0040] The Basic Video Codec (EVC) standard (ISO / IEC 23094-1) is another video codec standard developed by MPEG.

[0041] 3.2 SEI Messages in General and VVC

[0042] SEI messages are helpful in processes related to decoding, display, or other purposes. However, constructing luminance or chrominance samples during the decoding process does not require SEI messages. The consistency decoder does not need to process this information to achieve output order consistency. Checking bitstream consistency and output timing decoder consistency requires some SEI messages. Checking bitstream consistency does not require additional SEI messages.

[0043] Appendix D of VVC specifies the syntax and semantics of SEI message payloads for some SEI messages, and specifies the use of SEI messages and VUI parameters whose syntax and semantics are specified in ITU-T H.SEI ISO / IEC 23002-7.

[0044] 3.3 SEI Processing Order SEI Messages

[0045] JVET-AA0102 proposes an SEI message called the SEI Processing Order SEI message. The SEI Processing Order SEI message carries information indicating the preferred processing order for different types of SEI messages that may exist in the bitstream, as determined by the encoder (e.g., the content producer). One implementation of the syntax and semantics of this SEI message is as follows.

[0046] 3.3.1 SEI Processing Order SEI Message Syntax

[0047]

[0048] 3.3.2 SEI Processing Order and SEI Message Semantics

[0049] SEI processing order messages carry information indicating the preferred processing order for different types of SEI messages that may exist in the bitstream, determined by the encoder (e.g., the content producer). When an SEI processing order message exists in any access unit of the CVS, it should exist in the first access unit of the CVS. The SEI processing order message persists from the current access unit in decoding order until the end of the CVS. When multiple SEI processing order messages exist in the CVS, they should have the same content.

[0050] po_sei_payload_type[i] specifies the value of the payloadType for the i-th SEI message in the SEI processing order, providing information about it. When m is not equal to n, the values ​​of po_sei_payload_type[m] and po_sei_payload_type[n] should not be the same.

[0051] `po_sei_processing_order[i]` indicates the preferred order for processing any SEI message with a payloadType equal to `po_sei_payload_type[i]`. `po_sei_processing_order[m]` is greater than 0 and less than `po_sei_processing_order[n]`, indicating that any SEI message with a payloadType equal to `po_sei_payload_type[m]`, if present, should be processed before any SEI message with a payloadType equal to `po_sei_payload_type[n]`, if present. `po_sei_processing_order[i]` being equal to 0 indicates that the preferred order for processing SEI messages with a payloadType equal to `po_sei_payload_type[i]` is unknown or unspecified, or determined by an external mechanism not specified in this specification.

[0052] 4. The technical problem solved by the disclosed technical solution

[0053] The example design for SEI processing order SEI messages has the following problem. The syntax allows signaling notification for only one entry in the syntax elements po_sei_processing_order[i] and po_sei_payload_type[i] within a loop. However, this approach is only meaningful when signaling notification for two or more entries in those syntax elements, because only in this case can the relative processing order in multiple types of SEI messages be signaled.

[0054] In the semantics of SEI message processing order, a value of 0 for po_sei_processing_order[i] is defined as special processing. A po_sei_processing_order[i] of 0 indicates that the preferred order for processing SEI messages with payloadType equal to po_sei_payload_type[i] is unknown or unspecified, or determined by an external mechanism. However, this special processing with a po_sei_payload_type[i] value of 0 is neither necessary nor useful, but rather introduces a lack of clarity and even operational problems. For example, if the preferred processing order is unknown or unspecified, a clearer approach would not include that payload type value in the SEI message. If the preferred processing order is determined by an external mechanism, it becomes unclear how the externally determined order should interact with the signaling notification order in the SEI message.

[0055] 5. List of Solutions and Implementation Examples

[0056] To address the problems described above, the following summarized methods are disclosed. These examples should be considered as illustrations of general concepts, not as narrow interpretations. Furthermore, these examples can be applied individually or in combination in any way.

[0057] Example 1

[0058] In one example, to address the first problem, the SEI processing order is required. SEI messages should include at least two entries for the syntax elements po_sei_processing_order[i] and po_sei_payload_type[i], respectively, for i equal to 0 and 1.

[0059] Example 2

[0060] In one example, the following constraints are specified. The requirement for bitstream consistency is that the SEI processing order SEI message should include at least two entries for the syntax elements po_sei_processing_order[i] and po_sei_payload_type[i], respectively, for i equal to 0 and 1.

[0061] Example 3

[0062] In another example, the following constraints are specified. The requirement for bitstream consistency is that, within the SEI processing order SEI message, there should be at least two entries of the syntax elements po_sei_processing_order[i] and po_sei_payload_type[i]. For example, there should be syntax elements po_sei_processing_order[0], po_sei_payload_type[0], po_sei_processing_order[1], and po_sei_payload_type[1].

[0063] Example 4

[0064] To address the second issue, a value of 0 for po_sei_processing_order[i] is treated as the same as any other value in the syntax element.

[0065] Example 5

[0066] In one example, the semantics of po_sei_processing_order[i] are defined as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI message with a payloadType equal to po_sei_payload_type[i]. For any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n], indicating that any SEI message with a payloadType equal to po_sei_payload_type[m], if present, should be processed before any SEI message with a payloadType equal to po_sei_payload_type[n], if present.

[0067] 6. Example

[0068] The following are some example embodiments of some of the public projects outlined in Examples 1 to 5 of Section 5 above.

[0069] 6.1 First Embodiment

[0070] Most of the added or modified parts are shown in bold, and some deleted parts are shown in italics and bold.

[0071] There may be other changes that are editable and therefore not highlighted.

[0072]

[0073] 6.1.2 SEI Processing Order and SEI Message Semantics

[0074] SEI processing order messages carry information indicating the preferred processing order for different types of SEI messages that may exist in the bitstream, determined by the encoder (e.g., the content producer). When an SEI processing order message exists in any access unit of the CVS, it should exist in the first access unit of the CVS. The SEI processing order message persists from the current access unit in decoding order until the end of the CVS. When multiple SEI processing order messages exist in the CVS, they should have the same content.

[0075] The requirement for bitstream consistency is that, within the SEI processing order SEI message, there should be at least two entries of the syntax elements po_sei_processing_order[i] and po_sei_payload_type[i]. For example, there should be the syntax elements po_sei_processing_order[0], po_sei_payload_type[0], po_sei_processing_order[1], and po_sei_payload_type[1].

[0076] po_sei_payload_type[i] specifies the value of the payloadType for the i-th SEI message in the SEI processing order, providing information about it. When m is not equal to n, the values ​​of po_sei_payload_type[m] and po_sei_payload_type[n] should not be the same.

[0077] `po_sei_processing_order[i]` indicates the preferred order for processing any SEI message with a payloadType equal to `po_sei_payload_type[i]`. For any two distinct integer values ​​`m` and `n` greater than or equal to 0, `po_sei_processing_order[m]` is greater than 0 and less than `po_sei_processing_order[n]`, indicating that any SEI message with a payloadType equal to `po_sei_payload_type[m]`, if present, should be processed before any SEI message with a payloadType equal to `po_sei_payload_type[n]`, if present. `po_sei_processing_order[i]` being equal to 0 indicates that the preferred order for processing SEI messages with a payloadType equal to `po_sei_payload_type[i]` is unknown or unspecified, or determined by external means not specified in this specification. ...

[0079] Figure 1 This is a block diagram illustrating an example video processing system 4000 in which various techniques disclosed herein may be implemented. Various implementations may include some or all of the components of system 4000. System 4000 may include an input 4002 for receiving video content. The video content may be received in a raw or uncompressed format, such as 8 or 10-bit multi-component pixel values, or it may be in a compressed or encoded format. Input 4002 may represent a network interface, a peripheral bus interface, or a storage interface. Examples of network interfaces include wired interfaces such as Ethernet, Passive Optical Network (PON), etc., and wireless interfaces such as Wi-Fi or cellular interfaces.

[0080] System 4000 may include an encoding / decoding component 4004 capable of implementing the various encoding / decoding or coding methods described in this document. Encoding / decoding component 4004 can reduce the average bit rate of the video from input 4002 to the output of encoding / decoding component 4004 to produce an encoded / decoded representation of the video. Encoding / decoding techniques are therefore sometimes referred to as video compression or video transcoding techniques. The output of encoding / decoding component 4004 may be stored or transmitted via a communication connection as indicated by component 4006. The bitstream (or encoded / decoded) representation of the video received at input 4002, whether stored or communicated, can be used by component 4008 to generate pixel values ​​or transmit as displayable video to display interface 4010. The process of generating user-visible video from the bitstream representation is sometimes referred to as video decompression. Furthermore, although some video processing operations are referred to as “encoding / decoding” operations or tools, it will be understood that encoding / decoding tools or operations are used at the encoder, and the corresponding decoding tools or operations that inversely represent the encoding / decoding results will be performed by the decoder.

[0081] Examples of peripheral bus interfaces or display interfaces may include Universal Serial Bus (USB), High Definition Multimedia Interface (HDMI), or DisplayPort. Examples of storage interfaces include Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect (PCI), Integrated Drive Electronics (IDE), etc. The technologies described in this document can be embodied in a variety of electronic devices, such as mobile phones, laptops, smartphones, or other devices capable of performing digital data processing and / or video display.

[0082] Figure 2 This is a block diagram of an example video processing apparatus 4100. Apparatus 4100 can be used to implement one or more methods described herein. Apparatus 4100 can be embodied in a smartphone, tablet, computer, Internet of Things (IoT) receiver, etc. Apparatus 4100 may include one or more processors 4102, one or more memories 4104, and video processing circuitry 4106. The processors(multiple) 4102 may be configured to implement one or more methods described herein. The memories(multiple) 4104 may be used to store data and code for implementing the methods and techniques described herein. The video processing circuitry 4106 may be used to implement some of the techniques described herein in a hardware circuit system. In some embodiments, the video processing circuitry 4106 may be at least partially included in the processor 4102 (e.g., a graphics coprocessor).

[0083] Figure 3This is a flowchart of an example method 4200 for video processing. Method 4200 includes performing a conversion between visual media data and a bitstream of the visual media data based on a rule at step 4202. The rule includes a bitstream consistency requirement that requires the Supplemental Enhancement Information (SEI) processing order SEI message to include an SEI payload type syntax element with at least a first entry and a second entry. In the example, the SEI payload type syntax element in step 4202 is po_sei_payload_type, the first entry is po_sei_payload_type[0], and the second entry is po_sei_payload_type[1]. In another example, the bitstream consistency requirement in step 4202 requires the SEI processing order SEI message to include a preferred order syntax element with at least a first entry and a second entry. In yet another example, the preferred order syntax element is po_sei_processing_order, the first entry is po_sei_processing_order[0], and the second entry is po_sei_processing_order[1].

[0084] It should be noted that method 4200 can be implemented in an apparatus for processing video data, the apparatus including a processor and a non-transitory memory having instructions thereon, such as a video encoder 4400, a video decoder 4500, and / or an encoder 4600. In this case, the instructions, when executed by the processor, cause the processor to perform method 4200. Furthermore, method 4200 can be executed by a non-transitory computer-readable medium comprising a computer program product for use by a video codec device. The computer program product includes computer-executable instructions stored on the non-transitory computer-readable medium, causing the video codec device to perform method 4200 when executed by a processor.

[0085] Figure 4 This is a block diagram illustrating an example video encoding / decoding system 4300 that can utilize the techniques disclosed herein. The video encoding / decoding system 4300 may include a source device 4310 and a destination device 4320. The source device 4310 generates encoded video data, and this source device 4310 may be referred to as a video encoding device. The destination device 4320 can decode the encoded video data generated by the source device 4310, and this destination device 4320 may be referred to as a video decoding device.

[0086] Source device 4310 may include video source 4312, video encoder 4314, and input / output (I / O) interface 4316. Video source 4312 may include a source, such as a video capture device, an interface for receiving video data from a video content provider, and / or a computer graphics system for generating video data, or a combination of these sources. Video data may include one or more pictures. Video encoder 4314 encodes the video data from video source 4312 to generate a bitstream. The bitstream may include a sequence of bits forming a codec representation of the video data. The bitstream may include codec pictures and related data. Codec pictures are codec representations of pictures. Related data may include sequence parameter sets, picture parameter sets, and other syntax structures. I / O interface 4316 may include a modulator / demodulator (modem) and / or a transmitter. Encoded video data may be transmitted directly to destination device 4320 via network 4330 through I / O interface 4316. Encoded video data may also be stored on storage medium / server 4340 for access by destination device 4320.

[0087] Destination device 4320 may include I / O interface 4326, video decoder 4324, and display device 4322. I / O interface 4326 may include a receiver and / or a modem. I / O interface 4326 may acquire encoded video data from source device 4310 or storage medium / server 4340. Video decoder 4324 may decode the encoded video data. Display device 4322 may display the decoded video data to a user. Display device 4322 may be integrated with destination device 4320 or may be external to destination device 4320, which may be configured to interface with an external display device.

[0088] The video encoder 4314 and the video decoder 4324 can operate according to video compression standards, such as the High Efficiency Video Codec (HEVC) standard, the Multi-Functional Video Codec (VVC) standard, and other current and / or additional standards.

[0089] Figure 5 This is a block diagram illustrating an example of a video encoder 4400, which can be in... Figure 4 The system 4300 shown includes a video encoder 4314. The video encoder 4400 can be configured to perform any or all of the techniques disclosed herein. The video encoder 4400 includes multiple functional components. The techniques described in this disclosure can be shared among the various components of the video encoder 4400. In some examples, a processor can be configured to perform any or all of the techniques described in this disclosure.

[0090] The functional components of the video encoder 4400 may include a segmentation unit 4401, a prediction unit 4402 (which may include a mode selection unit 4403, a motion estimation unit 4404, a motion compensation unit 4405, and an intra-frame prediction unit 4406), a residual generation unit 4407, a transform processing unit 4408, a quantization unit 4409, an inverse quantization unit 4410, an inverse transform unit 4411, a reconstruction unit 4412, a buffer 4413, and an entropy encoding / decoding unit 4414.

[0091] In other examples, the video encoder 4400 may include more, fewer, or different functional components. In one example, the prediction unit 4402 may include an intra-block copy (IBC) unit. The IBC unit can perform prediction in IBC mode, where at least one reference picture is the picture containing the current video block.

[0092] Furthermore, for example, some components of the motion estimation unit 4404 and the motion compensation unit 4405 can be highly integrated, but for illustrative purposes, they are shown separately in the example of the video encoder 4400.

[0093] The segmentation unit 4401 can segment an image into one or more video blocks. The video encoder 4400 and the video decoder 4500 can support various video block sizes.

[0094] The mode selection unit 4403 can select one of the encoding / decoding modes (e.g., intra-frame or inter-frame) based on the error result, and provide the resulting intra-frame or inter-frame codec block to the residual generation unit 4407 to generate residual block data, and to the reconstruction unit 4412 to reconstruct the coded block for use as a reference picture. In some examples, the mode selection unit 4403 can select a combination of intra-frame and inter-frame prediction modes (CIIP), where the prediction is based on the inter-frame prediction signal and the intra-frame prediction signal. In the case of inter-frame prediction, the mode selection unit 4403 can also select the resolution of the block's motion vector (e.g., sub-pixel or integer pixel precision).

[0095] To perform inter-frame prediction on the current video block, motion estimation unit 4404 can generate motion information for the current video block by comparing one or more reference frames from buffer 4413 with the current video block. Motion compensation unit 4405 can determine the predicted video block for the current video block based on the motion information and decoded samples of images from buffer 4413 other than the image associated with the current video block.

[0096] The motion estimation unit 4404 and the motion compensation unit 4405 can perform different operations on the current video block, for example, depending on whether the current video block is in an I-strip, P-strip, or B-strip.

[0097] In some examples, motion estimation unit 4404 can perform unidirectional prediction on the current video block, and can search for reference images in list 0 or list 1 for reference video blocks of the current video block. Motion estimation unit 4404 can then generate a reference index indicating the reference image in list 0 or list 1, which includes the reference video block and a motion vector indicating the spatial displacement between the current video block and the reference video block. Motion estimation unit 4404 can output the reference index, prediction direction indicator, and motion vector as motion information for the current video block. Motion compensation unit 4405 can generate a predicted video block for the current block based on the reference video block indicated by the motion information of the current video block.

[0098] In other examples, motion estimation unit 4404 can perform bidirectional prediction on the current video block. Motion estimation unit 4404 can search for a reference video block for the current video block in the reference images in list 0, and can also search for another reference video block for the current video block in list 1. Motion estimation unit 4404 can then generate a reference index indicating the reference images in lists 0 and 1 that include the reference video blocks, as well as a motion vector indicating the spatial displacement between the reference video blocks and the current video block. Motion estimation unit 4404 can output the reference index and motion vector of the current video block as motion information for the current video block. Motion compensation unit 4405 can generate a predicted video block for the current video block based on the reference video blocks indicated by the motion information of the current video block.

[0099] In some examples, the motion estimation unit 4404 may output a complete set of motion information for use in the decoder's decoding process. In other examples, the motion estimation unit 4404 may not output a complete set of motion information for the current video. Instead, the motion estimation unit 4404 may signal the motion information of the current video block by referencing the motion information of another video block. For example, the motion estimation unit 4404 may determine that the motion information of the current video block is sufficiently similar to the motion information of neighboring video blocks.

[0100] In one example, the motion estimation unit 4404 may indicate a value in the syntax structure associated with the current video block that indicates to the video decoder 4500 that the current video block has the same motion information as another video block.

[0101] In another example, motion estimation unit 4404 can identify another video block and motion vector difference (MVD) in the syntax structure associated with the current video block. The motion vector difference indicates the difference between the motion vector of the current video block and the motion vector of the indicated video block. Video decoder 4500 can use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.

[0102] As discussed above, the video encoder 4400 can predictively signal motion vectors. Two examples of predictive signaling notification techniques that can be implemented by the video encoder 4400 include Advanced Motion Vector Prediction (AMVP) and Merge Pattern Signaling Notification.

[0103] Intra-prediction unit 4406 can perform intra-prediction on the current video block. When intra-prediction unit 4406 performs intra-prediction on the current video block, it can generate prediction data for the current video block based on decoded samples of other video blocks in the same frame. The prediction data for the current video block can include the predicted video block and various syntax elements.

[0104] The residual generation unit 4407 can generate residual data for the current video block by subtracting (or more) predicted video blocks from the current video block. The residual data for the current video block may include residual video blocks corresponding to different sample components of the samples in the current video block.

[0105] In other examples, such as in skip mode, there may be no residual data for the current video block, and the residual generation unit 4407 may not perform the subtraction operation.

[0106] The transform processing unit 4408 can generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to the residual video blocks associated with the current video block.

[0107] After the transform processing unit 4408 generates a transform coefficient video block associated with the current video block, the quantization unit 4409 can quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values ​​associated with the current video block.

[0108] The inverse quantization unit 4410 and the inverse transform unit 4411 can apply inverse quantization and inverse transform to the transform coefficient video block, respectively, to reconstruct the residual video block from the transform coefficient video block. The reconstruction unit 4412 can add the reconstructed residual video block to the corresponding sample from one or more predicted video blocks generated by the prediction unit 4402 to produce a reconstructed video block associated with the current block, which is stored in the buffer 4413.

[0109] After the video block is reconstructed by reconstruction unit 4412, a loop filtering operation can be performed to reduce video block artifacts in the video block.

[0110] The entropy encoding / decoding unit 4414 can receive data from other functional components of the video encoder 4400. When the entropy encoding / decoding unit 4414 receives data, it can perform one or more entropy encoding operations to generate entropy-encoded data and output a bitstream including the entropy-encoded data.

[0111] Figure 6 This is a block diagram illustrating an example of a video decoder 4500, which can be in... Figure 4 The system 4300 shown includes a video decoder 4324. The video decoder 4500 can be configured to perform any or all of the techniques disclosed herein. In the illustrated example, the video decoder 4500 includes multiple functional components. The techniques described in this disclosure can be shared among the various components of the video decoder 4500. In some examples, a processor can be configured to perform any or all of the techniques described in this disclosure.

[0112] In the example shown, the video decoder 4500 includes an entropy decoding unit 4501, a motion compensation unit 4502, an intra-frame prediction unit 4503, an inverse quantization unit 4504, an inverse transform unit 4505, a reconstruction unit 4506, and a buffer 4507. In some examples, the video decoder 4500 may perform a decoding process that is typically the reverse of the encoding passes described for the video encoder 4400.

[0113] The entropy decoding unit 4501 can retrieve the encoded bitstream. The encoded bitstream may include entropy-coded video data (e.g., encoded blocks of video data). The entropy decoding unit 4501 can decode the entropy-coded video data, and from the entropy-coded video data, the motion compensation unit 4502 can determine motion information including motion vectors, motion vector precision, reference image list index, and other motion information. The motion compensation unit 4502 can determine such information, for example, by executing AMVP and Merge modes.

[0114] The motion compensation unit 4502 can generate motion compensation blocks and can perform interpolation based on an interpolation filter. The identifier of the interpolation filter to be used at sub-pixel precision can be included in the syntax element.

[0115] The motion compensation unit 4502 can use an interpolation filter, such as that used by the video encoder 4400 during the encoding of a video block, to calculate the interpolation of sub-integer pixels of the reference block. The motion compensation unit 4502 can determine the interpolation filter used by the video encoder 4400 based on the received syntax information, and use the interpolation filter to generate the prediction block.

[0116] The motion compensation unit 4502 may use some syntax information to determine the size of the blocks used to encode (multiple) frames and / or (multiple) stripes of the encoded video sequence, segmentation information describing how each macroblock of the image of the encoded video sequence is segmented, a mode indicating how each segment is encoded, one or more reference frames (and a list of reference frames) for each inter-frame codec block, and other information used to decode the encoded video sequence.

[0117] Intra-prediction unit 4503 can use, for example, an intra-prediction mode received in the bitstream to form prediction blocks from spatially adjacent blocks. Inverse quantization unit 4504 performs inverse quantization, i.e., dequantization, on the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 4501. Inverse transform unit 4505 applies the inverse transform.

[0118] The reconstruction unit 4506 can add the residual block to the corresponding prediction block generated by the motion compensation unit 4502 or the intra-frame prediction unit 4503 to form a decoded block. If necessary, a deblocking filter can also be applied to the decoded block to remove block artifacts. The decoded video block is then stored in a buffer 4507 to provide a reference block for subsequent motion compensation / intra-frame prediction, and also generates decoded video for presentation on a display device.

[0119] Figure 7 This is a schematic diagram of an example encoder 4600. Encoder 4600 is suitable for implementing VVC technology. Encoder 4600 includes three loop filters: a deblocking filter (DF) 4602, a sample adaptive offset (SAO) 4604, and an adaptive loop filter (ALF) 4606. Unlike DF 4602, which uses predefined filters, SAO 4604 and ALF 4606 utilize the original samples of the current image and reduce the mean square error between the original and reconstructed samples by adding an offset and applying a finite impulse response (FIR) filter, respectively, using auxiliary information signaling from the encoder and decoder to inform the offset and filter coefficients. ALF 4606 is located in the final processing stage of each image and can be considered as a tool for attempting to capture and repair artifacts created by previous stages.

[0120] The encoder 4600 also includes an intra-frame prediction component 4608 and a motion estimation / compensation (ME / MC) component 4610, configured to receive input video. The intra-frame prediction component 4608 is configured to perform intra-frame prediction, while the ME / MC component 4610 is configured to perform inter-frame prediction using a reference image obtained from a reference image buffer 4612. Residual blocks from inter-frame or intra-frame prediction are fed into a transform (T) component 4614 and a quantization (Q) component 4616 to generate quantized residual transform coefficients, which are then fed into an entropy codec component 4618. The entropy codec component 4618 entropy codes the prediction results and the quantized transform coefficients and sends them to a video decoder (not shown). The quantization component output from the quantization component 4616 can be fed into an inverse quantization (IQ) component 4620, an inverse transform component 4622, and a reconstruction (REC) component 4624. REC component 4624 can output images to DF 4602, SAO 4604 and ALF 4606 for filtering before these images are stored in reference image buffer 4612.

[0121] The following is a list of preferred solutions through some examples.

[0122] The following solutions illustrate examples of the techniques discussed in this article.

[0123] The following solutions illustrate example embodiments of the techniques discussed in previous chapters (e.g., Project 1).

[0124] 1. A method for processing media data includes: performing a conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules include bitstream consistency requirements, the bitstream consistency requirements requiring that Supplemental Enhancement Information (SEI) processing order SEI messages should include SEI payload type syntax elements having at least a first entry and a second entry.

[0125] 2. The method according to claim 1, wherein the SEI payload type syntax element is po_sei_payload_type, the first entry of the SEI payload type syntax element is po_sei_payload_type[0], and the second entry of the SEI payload type syntax element is po_sei_payload_type[1].

[0126] 3. The method according to any one of claims 1 to 2, wherein the bitstream consistency requirement requires that the SEI processing order SEI message should include preferred order syntax elements having at least a first entry and a second entry.

[0127] 4. The method according to claim 3, wherein the preferred sequential syntax element is po_sei_processing_order, the first entry of the preferred sequential syntax element is po_sei_processing_order[0], and the second entry of the preferred sequential syntax element is po_sei_processing_order[1].

[0128] 5. The method according to any one of claims 1 to 4, wherein, within the SEI processing order SEI message, each of po_sei_payload_type[0] and po_sei_payload_type[1] is paired with po_sei_processing_order[0] and po_sei_processing_order[1], respectively, wherein po_sei_processing_order[i] indicates a preferred order for processing SEI messages having a payload type equal to po_sei_payload_type[i].

[0129] 6. A method for processing video data includes: performing a conversion between visual media data and a bitstream of the visual media data based on rules, wherein the rules specify the processing order of Supplemental Enhancement Information (SEI) processing order in the SEI message, and that zero values ​​of SEI payload type syntax element entries are processed in a manner similar to one value.

[0130] 7. The method of claim 6, wherein the SEI payload type syntax element is po_sei_payload_type, and the SEI payload type syntax element entry is po_sei_payload_type[i].

[0131] 8. The method according to any one of claims 1 to 7, wherein po_sei_payload_type[i] is specified as follows: po_sei_processing_order[i] indicates the preferred order for processing any SEI message having payloadType equal to po_sei_payload_type[i]; and for any two distinct integer values ​​m and n greater than or equal to 0, po_sei_processing_order[m] is less than po_sei_processing_order[n], indicating that any SEI message having payloadType equal to po_sei_payload_type[m], if present, should be processed before any SEI message having payloadType equal to po_sei_payload_type[n], if present.

[0132] 9. The method of any one of claims 1 to 8, wherein the conversion includes encoding visual media data into a bitstream.

[0133] 10. The method of any one of claims 1 to 8, wherein the conversion comprises decoding visual media data from a bitstream.

[0134] 11. An apparatus for processing visual media data, comprising: a processor; and a non-transitory memory having instructions thereon, wherein the instructions, when executed by the processor, cause the processor to perform the method according to any one of claims 1 to 10.

[0135] 12. A non-transitory computer-readable medium comprising a computer program product for use by an apparatus for processing visual media data, the computer program product comprising computer-executable instructions stored on the non-transitory computer-readable medium, such that the instructions, when executed by a processor, are used by the apparatus for processing visual media data to perform the method according to any one of claims 1 to 10.

[0136] 13. A non-transitory computer-readable recording medium storing a bitstream of visual media data, the visual media data being generated by a method performed by an apparatus for processing visual media data, wherein the method includes: generating the bitstream of visual media data based on rules, wherein the rules include bitstream consistency requirements, the bitstream consistency requirements requiring that Supplemental Enhancement Information (SEI) processing order SEI messages should include SEI payload type syntax elements having at least a first entry and a second entry.

[0137] 14. A method for storing a bitstream of visual media data, comprising: generating a bitstream of visual media data based on rules; and storing the bitstream in a non-transitory computer-readable recording medium, wherein the rules include bitstream consistency requirements that require a Supplemental Enhancement Information (SEI) processing order SEI message to include an SEI payload type syntax element having at least a first entry and a second entry.

[0138] 15. The methods, apparatus or systems described in this document.

[0139] In the solution described in this paper, the encoder can conform to the format rules by generating a codec representation based on those rules. In the solution described in this paper, the decoder can parse the syntax elements in the codec representation using the format rules, knowing whether or not the syntax elements exist, to generate the decoded video.

[0140] In this document, the term "video processing" can refer to video encoding, video decoding, video compression, or video decompression. For example, a video compression algorithm can be applied during the conversion from the pixel representation of a video to the corresponding bitstream representation, and vice versa. As defined in the syntax, the bitstream representation of the current video block can, for example, correspond to bits juxtaposed or scattered in different places within the bitstream. For example, a macroblock can be encoded according to the error residual values ​​of the transformation and encoding / decoding, and also using bits from the header and other fields in the bitstream. Furthermore, during the conversion, the decoder can, based on determination, parse the bitstream knowing that some fields may or may not be present, as described in the solutions above. Similarly, the encoder can determine whether to include or exclude certain syntax fields and generate the codec representation accordingly by including or excluding syntax fields from the codec representation.

[0141] The disclosed and other solutions, examples, embodiments, modules, and functional operations described in this document can be implemented in digital electronic circuits, or in computer software, firmware, or hardware (including the structures disclosed in this document and their equivalents), or in a combination of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer-readable medium for execution by or control of the operation of a data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a combination of substances influencing machine-readable propagation signals, or a combination of one or more of them. The term "data processing apparatus" includes all means, devices, and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the apparatus may also include code that creates an execution environment for the computer program in question, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. Propagation signals are artificially generated signals, such as machine-generated electrical signals, optical signals, or electromagnetic signals, generated to encode information for transmission to a suitable receiver device.

[0142] Computer programs (also known as programs, software, software applications, scripts, or code) can be written in any programming language (including compiled or interpreted languages) and can be deployed in any form, including as standalone programs or as modules, components, subroutines, or other units suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored as part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., a file storing one or more modules, subroutines, or code sections). A computer program can be deployed to execute on a single computer or on multiple computers located at a single site or distributed across multiple sites and interconnected via a communications network.

[0143] The processes and logic flows described in this document can be executed by one or more programmable processors that execute one or more computer programs to perform functions by manipulating input data and generating outputs. The processes and logic flows can also be executed by dedicated logic circuits, and the devices can be implemented as dedicated logic circuits, such as field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs).

[0144] Processors suitable for executing computer programs include, for example, general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, a processor receives instructions and data from read-only memory or random access memory, or both. The basic components of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data, or operatively coupled to receive data from, transfer data to, or receive data from and transfer data to such mass storage devices. However, a computer does not require such devices. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, including, for example, semiconductor memory devices such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and optical disc read-only memory (CD ROM) and digital universal disk read-only memory (DVD-ROM). Processors and memory can be supplemented by dedicated logic circuits or incorporated into dedicated logic circuits.

[0145] While this disclosure contains numerous details, these details should not be construed as limiting any subject matter or potentially claimed scope, but rather as descriptions of features specific to particular embodiments of a particular art. Certain features described in the context of individual embodiments in this disclosure may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually in multiple embodiments or in any suitable sub-combination. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, in some cases one or more features from a claimed combination may be excluded from the combination, and the claimed combination may be for sub-combinations or variations thereof.

[0146] Similarly, although operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring the operations to be performed in the specific order shown or in a sequential manner, or as performing all the shown operations to achieve the desired result. Furthermore, the separation of various system components in the embodiments described in this disclosure should not be construed as requiring such separation in all embodiments.

[0147] Only some implementation methods and examples are described, and other implementation methods, enhancements and variations can be made based on what is described and shown in this disclosure.

[0148] When there is no intermediate component between the first and second components other than a line, trace, or other medium, the first component is directly coupled to the second component. When there is an intermediate component between the first and second components other than a line, trace, or other medium, the first component is indirectly coupled to the second component. The term "coupled" and its variations include direct coupling and indirect coupling. The use of the term "approximately" means including a range of ±10% of the subsequent numerical value, unless otherwise specified.

[0149] While several embodiments have been provided in this disclosure, it should be understood that the disclosed systems and methods may be embodied in many other specific forms without departing from the spirit or scope of this disclosure. The present examples are intended to be illustrative rather than restrictive and are not intended to be limited to the details given herein. For example, various elements or components may be combined or integrated into another system, or certain features may be omitted or not implemented.

[0150] Furthermore, without departing from the scope of this disclosure, the technologies, systems, subsystems, and methods described and illustrated as discrete or separate in various embodiments may be combined or integrated with other systems, modules, technologies, or methods. Other items shown or discussed as coupled may be directly connected or indirectly coupled or communicated through some interface, device, or intermediate component, whether electrically, mechanically, or otherwise. Other examples of changes, substitutions, and modifications can be determined by those skilled in the art and may be made without departing from the spirit and scope of this disclosure.

Claims

1. A method for processing visual media data, comprising: The conversion between visual media data and its bitstream is performed based on rules. The rules include bitstream consistency requirements, which require that at least two pairs of syntax elements exist within the Supplemental Enhancement Information (SEI) processing order SEI message. One pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a first index and an SEI processing order syntax element, and the other pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a second index and an SEI processing order syntax element.

2. The method of claim 1, wherein, The bitstream consistency requirement also requires that, within the SEI processing order SEI message, at least two values ​​of the SEI processing order syntax elements in at least two pairs of syntax elements are not equal.

3. The method of claim 1, wherein, The SEI payload type syntax element is represented as po_sei_payload_type[i], where the index i is a non-negative integer, and po_sei_payload_type[i] specifies the payload type value for the i-th SEI message type that provides priority processing order information in the SEI processing order SEI message.

4. The method of claim 3, wherein, The SEI processing order syntax element is represented as po_sei_processing_order[j], where the index j is a non-negative integer, and po_sei_processing_order[j] specifies the priority processing order of the j-th SEI message type that provides priority processing order information in the SEI processing order SEI message.

5. The method of claim 4, wherein, For any two distinct integer values ​​m and n that are greater than or equal to 0, the fact that po_sei_processing_order[m] is less than po_sei_processing_order[n] indicates that any SEI message with a payload type equal to po_sei_payload_type[m] should be processed before any SEI message with a payload type equal to po_sei_payload_type[n].

6. The method of claim 3, wherein, For any two distinct integer values ​​P and Q, the values ​​of po_sei_payload_type[P] and po_sei_payload_type[Q] must be different when the condition is met.

7. The method of claim 1, wherein, The rule stipulates that when the SEI processing order SEI message exists in any access unit of the codec video sequence (CVS) of the bitstream, the SEI processing order SEI message must exist in the first access unit of the CVS.

8. The method of claim 1, wherein, The rule specifies that the SEI processing order is as follows: SEI messages persist from the current access unit in the decoding order until the CVS including the current access unit ends.

9. The method according to claim 1, wherein, The rule stipulates that when there are multiple SEI processing order SEI messages in CVS, the content of the multiple SEI processing order SEI messages must be the same.

10. The method according to claim 1, wherein, The conversion includes encoding the visual media data into the bitstream.

11. The method according to claim 1, wherein, The conversion includes decoding the visual media data from the bitstream.

12. An apparatus for processing visual media data, comprising: processor; and a non-transitory memory thereon containing instructions, wherein the instructions, when executed by the processor, cause the processor to perform: The conversion between visual media data and its bitstream is performed based on rules. The rules include bitstream consistency requirements, which require that at least two pairs of syntax elements exist within the Supplemental Enhancement Information (SEI) processing order SEI message. One of the at least two pairs of syntax elements includes an SEI payload type syntax element with a first index and an SEI processing order syntax element, and the other pair of syntax elements includes an SEI payload type syntax element with a second index and an SEI processing order syntax element.

13. The apparatus according to claim 12, wherein, The bitstream consistency requirement also requires that, within the SEI processing order SEI message, at least two values ​​of the SEI processing order syntax elements in at least two pairs of syntax elements are not equal.

14. The apparatus according to claim 12, wherein, The SEI payload type syntax element is represented as po_sei_payload_type[i], where the index i is a non-negative integer, and po_sei_payload_type[i] specifies the payload type value for the i-th SEI message type that provides priority processing order information in the SEI processing order SEI message.

15. The apparatus according to claim 13, wherein, The SEI processing order syntax element is represented as po_sei_processing_order[j], where the index j is a non-negative integer, and po_sei_processing_order[j] specifies the priority processing order of the j-th SEI message type that provides priority processing order information in the SEI processing order SEI message.

16. A method for storing a bitstream of visual media data, comprising: Generate the bitstream of the visual media data based on the rules; as well as The bitstream is stored in a non-transitory computer-readable recording medium. The rules include bitstream consistency requirements, which require that at least two pairs of syntax elements exist within the Supplemental Enhancement Information (SEI) processing order SEI message. One pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a first index and an SEI processing order syntax element, and the other pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a second index and an SEI processing order syntax element.

17. The method for storing a bitstream of visual media data according to claim 16, wherein, The bitstream consistency requirement also requires that, within the SEI processing order SEI message, at least two values ​​of the SEI processing order syntax elements in at least two pairs of syntax elements are not equal.

18. A non-transitory computer-readable storage medium storing instructions for a processor to execute: Bitstreams of visual media data generated based on rules in, The rules include bitstream consistency requirements, which require that at least two pairs of syntax elements exist within the Supplemental Enhancement Information (SEI) processing order SEI message. One pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a first index and an SEI processing order syntax element, and the other pair of the at least two pairs of syntax elements includes an SEI payload type syntax element with a second index and an SEI processing order syntax element.

19. The non-transitory computer-readable storage medium according to claim 18, wherein, The bitstream consistency requirement also requires that, within the SEI processing order SEI message, at least two values ​​of the SEI processing order syntax elements in at least two pairs of syntax elements are not equal.

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