Capacitance testers, methods, apparatus, electronic equipment and dielectrics
By designing a capacitance tester and method, automated and high-efficiency testing of aluminum electrolytic capacitors was achieved, solving the problems of low testing efficiency and accuracy affected by human factors, and improving testing accuracy and scalability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CRRC ZHUZHOU ELECTRIC LOCOMOTIVE RESEARCH INSTITUTE CO LTD
- Filing Date
- 2023-09-21
- Publication Date
- 2026-07-31
AI Technical Summary
Existing technologies for testing aluminum electrolytic capacitors are characterized by low efficiency and accuracy that is affected by the skill level of the testers, making it difficult to achieve efficient and accurate automated testing.
A capacitance tester was designed, including a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit. It uses a microcontroller to control the relay board and power supply board, and connects to the host computer through the MODBUS RTU communication protocol to realize automated testing and data calibration.
It enables automated and high-efficiency testing of aluminum electrolytic capacitors, improves testing accuracy and scalability, supports parameter testing with large sample sizes, and has good expandability.
Smart Images

Figure CN119667298B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power and signal measurement and control technology, and in particular to a capacitance tester, capacitance testing method, device, electronic equipment and medium. Background Technology
[0002] Capacitors are among the most fundamental components in circuit systems, serving functions such as DC power supply and filtering. Aluminum electrolytic capacitors, due to their high specific capacitance and other advantages, are widely used in automotive, photovoltaic, and home appliance devices, with a massive number of applications. Batch quality issues with aluminum electrolytic capacitors at the application end can cause significant economic losses and damage to a company's reputation. To minimize the risk of major quality problems, aluminum electrolytic capacitors must be tested and evaluated before being put into production. The speed and accuracy of testing key parameters of aluminum electrolytic capacitors directly determine the coverage and effectiveness of reliability assurance activities such as inspection, evaluation, and failure analysis. Typically, testing instruments are used to directly test individual capacitor parameters, and the results are manually recorded. This method suffers from low testing efficiency and accuracy issues due to the skill level of the testing personnel. Summary of the Invention
[0003] The main objective of this invention is to provide a capacitance tester, a capacitance testing method, an electronic device, and a dielectric, which enables automated and efficient testing of aluminum electrolytic capacitors and improves the accuracy of the tests.
[0004] One aspect of the present invention provides a capacitance tester, including a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit;
[0005] The host computer is connected to the testing unit, the testing selection unit, the sample selection unit, and the testing calibration unit, respectively; the testing selection unit is connected to both the testing unit and the sample selection unit.
[0006] The test selection unit is used to determine the type of the test unit connected to the test circuit, and the test unit is used to perform tests and record test data; the sample selection unit is used to connect the capacitors to be tested to the test circuit in sequence according to the test order of the capacitors to be tested.
[0007] The host computer is used to select the type of the test unit, switch the switch connecting the test selection unit to the test circuit, and collect the test data.
[0008] The test calibration unit is used to calibrate the test data.
[0009] According to the capacitance tester, the sample selection unit adopts a test frame, which includes a sample holder, a relay board, a main control board, and a power supply board.
[0010] The sample holder uses a snap ring as its main structure, and the snap ring is used to connect the positive and negative terminals of the aluminum electrolytic capacitor to be tested.
[0011] The relay board connects the test circuit and the positive and negative terminals of the aluminum electrolytic capacitor via main contacts. When the coil of the relay board is energized, the main contacts are closed; when the coil of the relay board is de-energized, the main contacts are open. The energization and de-energization of the coil of the relay board are controlled by the main control board.
[0012] The main control board uses a microcontroller. The main control board is connected to the coil of the relay on the relay board through the output port. The main control board is connected to the host computer through the MODBUS RTU communication protocol and RS485 half-duplex mode.
[0013] The power board and the main control board are located on the same PCB board. The power board is used to connect to 220V voltage and convert it into DC power to supply power to the microcontroller and relays.
[0014] According to the capacitance tester, it further includes:
[0015] At least two of the test fixtures are connected in parallel via RS485 and then connected to the host computer via an RS485 converter.
[0016] An embodiment of the present invention also discloses a capacitance testing method, comprising:
[0017] Based on the capacitance test request, first test data of the target capacitor is obtained, wherein the capacitance test request includes at least one of capacitance value, capacitance loss and capacitance ESR parameter.
[0018] Second test data of the target capacitor are collected at at least two of the sample holders;
[0019] The target capacitor is calibrated based on the line calibration resistance of each of the sample holders, and the third test data of the target capacitor is calibrated based on the first test data and the second test data, wherein the second test data is used to characterize the true test data of the target capacitor.
[0020] Based on the third test data, the test result of the target capacitor is determined, and a test report is generated.
[0021] According to the capacitance testing method, the acquisition of second test data for the target capacitance at at least two of the sample holders includes:
[0022] Acquire test data for at least two target capacitors at at least two sample holders, and calculate the average test value of the relay opening and closing action as the second test data.
[0023] According to the capacitance testing method, wherein the line calibration resistance of the target capacitor in each of the sample holders is determined based on the target capacitor, and the third test data of the target capacitor is calibrated based on the first test data and the second test data, the method includes:
[0024] Calculate the test circuit calibration resistance R for each sample holder. Ji The calculation formula is:
[0025]
[0026] Where i = 1 - k, k is the number of sample holders, n is the number of target capacitors, and R Cni The second test data is the average test value of relays opening and closing m times on k sample holders; RBn is the first test data, which represents the first test data obtained by directly collecting data from n capacitors.
[0027] According to the test circuit calibration resistor R Ji The third test data is calculated, wherein the third test data is...
[0028] C Yi =C Xi
[0029] R SYi =R SXi -R Ji
[0030] tanδ Yi =tanδ Xi -2π*f*C Xi *R Ji
[0031] Among them, the test results of the first test data of the target capacitance are C Xi R SXi and tanδ Xi The test result of the third test data of the target capacitor is C. Yi R SYi and tanδ SY Where C, R, and tanδ represent the capacitance value, capacitance loss, and capacitor ESR parameter, respectively.
[0032] According to the described capacitance testing method, the test request further includes testing the leakage current of the target capacitor, including:
[0033] Control at least two pairs of relays to open and close sequentially so that at least two capacitors are connected to the test circuit. After each relay opening and closing action, control the test unit to perform the test according to the preset test procedure and read the test results.
[0034] Another aspect of the present invention provides a capacitance testing apparatus, comprising:
[0035] The first module is used to obtain a capacitor test request and obtain the first test data of the target capacitor. The capacitor test request includes at least one of the following: capacitance value, capacitor loss and capacitor ESR parameter.
[0036] The second module is used to collect second test data of the target capacitor in at least two of the sample holders;
[0037] The third module is used to calibrate the resistance of the circuit in each of the sample holders according to the target capacitor, and to calibrate the third test data of the target capacitor according to the first test data and the second test data, wherein the second test data is used to characterize the true test data of the target capacitor.
[0038] The fourth module is used to determine the test result of the target capacitor based on the third test data and generate a test report.
[0039] Another aspect of the present invention provides an electronic device, including a processor and a memory;
[0040] The memory is used to store programs;
[0041] The processor executes the program to implement the method as described above.
[0042] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the methods described above.
[0043] The beneficial effects of this invention are as follows: By integrating a host computer with a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit, the invention enables automated testing of key parameters of aluminum capacitors. Furthermore, the capacitor test rack, which integrates a microcontroller for automated control, allows for the connection of capacitors to be tested at different locations to the test circuit. It possesses excellent expandability and can support simultaneous testing of large sample sizes of aluminum electrolytic capacitors, thus improving testing efficiency. Finally, by calibrating the automated testing device and using the host computer to calibrate the test results, the invention improves testing accuracy.
[0044] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0045] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0046] Figure 1 This is a schematic diagram of the overall structure of the capacitance tester according to an embodiment of the present invention.
[0047] Figure 2 This is a schematic diagram of the test fixture according to an embodiment of the present invention.
[0048] Figure 3a and Figure 3b This is a schematic diagram of the sample holder and sample holder retaining ring structure according to an embodiment of the present invention.
[0049] Figure 4a and Figure 4b This is a schematic diagram of a relay board according to an embodiment of the present invention.
[0050] Figure 5 This is a schematic diagram of the test fixture circuit according to an embodiment of the present invention.
[0051] Figure 6 This is a schematic diagram of the parallel circuit principle of multiple test fixtures according to an embodiment of the present invention.
[0052] Figure 7 This is a schematic diagram of the capacitance testing method according to an embodiment of the present invention.
[0053] Figure 8 This is a flowchart of the automated testing process for leakage current of aluminum electrolytic capacitors according to an embodiment of the present invention.
[0054] Figure 9 This is a schematic diagram of the resistance difference in the actual test circuit of the capacitor according to an embodiment of the present invention.
[0055] Figure 10 This is a diagram of a capacitance testing and analysis device according to an embodiment of the present invention. Detailed Implementation
[0056] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings. Throughout the description, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. In the following description, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" can be used interchangeably. Terms such as "first," "second," etc., are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the sequential relationship of the indicated technical features. In the following description, the consecutive reference numerals for method steps are for ease of review and understanding. Adjusting the implementation order of steps, in conjunction with the overall technical solution of the present invention and the logical relationship between the various steps, will not affect the technical effect achieved by the technical solution of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0057] Reference Figure 1 , Figure 1 A schematic diagram of the overall structure of the capacitor tester. It includes a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit, where C1, C2…Cn represent the aluminum electrolytic capacitors to be tested. The host computer is connected to the test unit, test selection unit, sample selection unit, and test calibration unit. The test selection unit is connected to both the test unit and the sample selection unit. The test selection unit determines the type of test unit to be connected to the test circuit, and the test unit performs the test and records the test data. The sample selection unit connects the capacitors to be tested sequentially to the test circuit according to the test order. The host computer selects the type of test unit, switches the connection of the test selection unit to the test circuit, and collects test data. The test calibration unit calibrates the test data and generates the final output.
[0058] In some embodiments, the test unit refers to a device used for testing, such as an LCR bridge and an insulation resistance tester, which reads and records test data via a host computer.
[0059] In some embodiments, the test selection unit can be a multi-way switch of various forms. Each test unit can be selectively connected to the test circuit through the selection module. The control of the switch can be manually switched or controlled by a host computer.
[0060] In some embodiments, the sample holder uses a snap ring as the main structure, and the snap ring is used to connect the positive and negative terminals of the aluminum electrolytic capacitor to be tested.
[0061] In some embodiments, the sample selection unit employs a test fixture, which includes a sample holder, a relay board, a main control board, and a power supply board. For example, refer to... Figure 2 The schematic diagram of the test fixture shown, and references Figure 3a and reference Figure 3b The schematic diagram of the sample holder and sample holder retaining ring structure shown is shown. The sample holder uses a pair of retaining rings as the main structure, which are respectively connected to the positive and negative terminals of the aluminum electrolytic capacitor. This allows for easy insertion and removal of the aluminum electrolytic capacitor leads, and provides good disassembly and stability.
[0062] In some embodiments, the sample holder size can be customized according to the size series of aluminum electrolytic capacitors being tested, and can enable testing of aluminum electrolytic capacitors with a wide range of pin sizes. For example, the sample holder is suitable for aluminum electrolytic capacitors with a pin pitch of 6-35 mm.
[0063] The relay board connects the test circuit and the positive and negative terminals of the aluminum electrolytic capacitor through the main contacts. When the coil of the relay board is energized, the main contacts are closed; when the coil of the relay board is de-energized, the main contacts are open. The energization and de-energization of the coil of the relay board are controlled by the main control board.
[0064] In some embodiments, reference Figure 4a and Figure 4b The relay board contains 10 pairs of relays. The main contacts of each relay pair are connected to the test circuit and the positive and negative terminals of an aluminum electrolytic capacitor, respectively. The connection of the capacitor to the test circuit is determined by the opening and closing of the relay's main contacts. When the relay coil is energized, the relay's main contacts are closed; when the relay coil is de-energized, the relay's main contacts are open. The energization of each relay pair's coil is controlled by the output contacts of the main control board.
[0065] In some embodiments, references Figure 5 The circuit diagram of the test fixture shown features a small microcontroller as its main control board, equipped with 12 output ports. Each output port is connected to one of 10 pairs of relay coils. The microcontroller controls the opening and closing of the output ports to energize and de-energize the relay coils. The main control board uses the MODBUS RTU communication protocol and communicates with the computer via RS485 half-duplex mode.
[0066] In some embodiments, the main control board uses a microcontroller. The main control board is connected to the coil of the relay on the relay board through the output port. The main control board is connected to the host computer through the MODBUS RTU communication protocol and RS485 half-duplex mode.
[0067] In some embodiments, the power supply board and the main control board are located on the same PCB board. The power supply board is used to connect to 220V voltage and convert it into DC power to power the microcontroller and relays.
[0068] Its power board converts the AC 220V input to DC 12V output to power the microcontroller and relays; here, in order to make full use of space, the power board and the main control board are integrated on the same PCB.
[0069] In some embodiments, reference Figure 6 The test fixture of this invention has expansion capabilities, see reference. Figure 3a It is known that multiple identical test fixtures can be connected in parallel through a parallel interface. In this embodiment of the invention, the test fixtures can connect the test circuits of multiple test fixtures in parallel to the test unit. After multiple test fixtures are connected in series via 485 communication, they are connected to the host computer through a converter. This enables the host computer to synchronously control multiple test fixtures and the test unit to test the sample parameters on multiple test fixtures.
[0070] In some embodiments, the test calibration unit improves the accuracy of test results by analyzing and eliminating systematic errors of the automated test device. The test calibration unit needs to calibrate the tests of ESR and loss parameters.
[0071] In some embodiments, reference Figure 7 A schematic diagram of the capacitance testing method, including but not limited to steps S100 to S400:
[0072] S100: Based on the capacitance test request, obtain the first test data of the target capacitor. The capacitance test request includes at least one of the following: capacitance value, capacitance loss, and capacitance ESR parameter.
[0073] In some embodiments, automated testing of leakage current of aluminum electrolytic capacitors is also included, the testing procedure of which is referenced. Figure 8 The diagram shows the automated test flowchart for leakage current of aluminum electrolytic capacitors. The leakage current test can ignore the influence of line impedance and does not require calibration. The host computer controls 10 pairs of relays in the test fixture to open and close sequentially, thus connecting the 10 capacitors to the test circuit accordingly. After each relay operation, the host computer controls the insulation resistance tester to perform the test according to the pre-set test procedure and read the test result LC. i Record and export the leakage current test results of aluminum electrolytic capacitors.
[0074] In some embodiments, when multiple parameters need to be tested, the tests can be performed on multiple test units in a time sequence.
[0075] S200 acquires second test data for the target capacitor at at least two sample holders.
[0076] In some embodiments of the present invention, the same test target is tested using different sample holders to obtain the average value to determine the second test data.
[0077] In some embodiments, reference Figure 9 The diagram shown illustrates the resistance difference in the actual test circuit for the capacitor. Because the paths for capacitors at different positions on the sample holder to access the test circuit are different, and the contact resistance of each pair of relay main contacts is also slightly different, the inherent resistance of the circuit differs for each capacitor position when connected to the test circuit. The test circuit resistance is illustrated below. Figure 7 As shown, the ESR parameters of an aluminum electrolytic capacitor are tested using an LCR bridge without calibration. The actual test data is the sum of the resistance of the test circuit, the resistance of the relay contacts, and the equivalent series resistance of the capacitor.
[0078]
[0079] Where i = 1-5, when i = 6-10, the actual measured ESR value is similar to the above formula.
[0080] Therefore, before automation, the test selection unit (test fixture) needs to be calibrated, including acquiring test data of at least two target capacitors in at least two sample holders, and calculating the average test value of relay opening and closing action as the second test data.
[0081] The calibration process is as follows: Use a bridge circuit to directly test the ESR parameters of the three aluminum electrolytic capacitors through the capacitor leads, assuming they are R... B1 R B2 R B3 The ESR parameters of three capacitors on ten sample holders were measured using a bridge circuit through a test fixture. Let RE be RE and RE be the values respectively. C1i R C2i R C3i (where i = 1-10, which is the average value obtained from three measurements of the relay's opening and closing action).
[0082] S300, calibrates the target capacitor's line calibration resistor in each sample holder according to the target capacitor, and calibrates the target capacitor's third test data according to the first test data and the second test data, the second test data being used to characterize the target capacitor's true test data.
[0083] For example, calculate the test line calibration resistance R for each sample holder. Ji (where i = 1 - 10), the calculation formula is as follows:
[0084]
[0085] Where i = 1-10.
[0086] Based on the above calibration results, when using this test fixture to test aluminum electrolytic capacitors, the capacitance, ESR, and...
[0087] damage
[0088] The test results for the consumption were C. Xi R SXi and tanδ Xi Therefore, the actual parameter of the capacitor should be C. Yi R SYi and tanδ SYi :
[0089] C Yi =C Xi
[0090] RSYi = RSXi - RJi
[0091] tanδ Yi =tanδ Xi -2π*f*C Xi *R Ji
[0092] Where i = 1-10, f is the selected test frequency, the above calibration process only needs to be executed once to perform continuous automated testing of the capacitor.
[0093] The host computer controls the 10 pairs of relays in the test fixture to open and close sequentially, thus connecting the 10 capacitors to the test circuit accordingly. 1-5 seconds after each relay operation, the host computer reads the LCR bridge test results. Five results are read consecutively at fixed time intervals. The two results with the highest and lowest ESR are discarded, and the average of the remaining three results is taken as the intermediate test result C. Xi R SXi and tanδ Xi The intermediate results are transformed according to the formula above to obtain the final test result C. Yi R SYi and tanδ SYi Record and export to an Excel report.
[0094] In some embodiments, the testing and calibration methods for using multiple test fixtures in parallel are similar to those for using a single fixture, and will not be described again here.
[0095] S400 determines the test results of the target capacitor based on the third test data and generates a test report.
[0096] Figure 10 This is a diagram of a capacitance testing and analysis device according to an embodiment of the present invention. The device includes a first module 1010, a second module 1020, a third module 1030, and a fourth module 1040.
[0097] The system comprises the following modules: a first module for acquiring a capacitance test request and obtaining first test data for the target capacitor, the capacitance test request including at least one of capacitance value, capacitance loss, and capacitance ESR parameter; a second module for acquiring second test data for the target capacitor at at least two sample holders; a third module for calibrating third test data for the target capacitor based on the line calibration resistor of the target capacitor at each sample holder and based on the first and second test data, the second test data being used to characterize the true test data of the target capacitor; and a fourth module for determining the test result of the target capacitor based on the third test data and generating a test report.
[0098] Exemplarily, with the cooperation of the first, second, third, and fourth modules in the device, the embodiment device can implement any of the aforementioned capacitance testing methods, namely, acquiring first test data of the target capacitor according to a capacitance test request, the capacitance test request including at least one of capacitance value, capacitance loss, and capacitance ESR parameter; collecting second test data of the target capacitor in at least two sample holders; calibrating the third test data of the target capacitor based on the line calibration resistance of the target capacitor in each sample holder, and calibrating the third test data of the target capacitor based on the first and second test data, the second test data being used to characterize the true test data of the target capacitor; determining the test result of the target capacitor based on the third test data, and generating a test report. The beneficial effects of this invention are as follows: By integrating a host computer with a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit, the invention enables automated testing of key parameters of aluminum capacitors. Furthermore, the capacitor test rack, which integrates a microcontroller for automated control, allows for the connection of capacitors to be tested at different locations to the test circuit. It possesses excellent expandability and can support simultaneous testing of large sample sizes of aluminum electrolytic capacitors, thus improving testing efficiency. Finally, by calibrating the automated testing device and using the host computer to calibrate the test results, the invention improves testing accuracy.
[0099] This invention also provides an electronic device, which includes a processor and a memory;
[0100] The memory stores the program;
[0101] The processor executes a program to perform the aforementioned capacitance testing method; the electronic device has the function of carrying and running the capacitance testing software system provided in the embodiments of the present invention, such as a computer, speed controller, and speed control device.
[0102] This invention also provides a computer-readable storage medium storing a program that is executed by a processor to implement the capacitance testing method described above.
[0103] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order shown in the operation diagrams. For example, depending on the functions / operations involved, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order. Furthermore, the embodiments presented and described in the flowcharts of this invention are provided by way of example to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and sub-operations described as part of a larger operation are executed independently.
[0104] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the aforementioned capacitance testing method.
[0105] Furthermore, although the invention has been described in the context of functional modules, it should be understood that, unless otherwise stated, one or more of the described functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the invention. Rather, given the properties, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of the module will be understood within the scope of conventional skill of an engineer. Therefore, those skilled in the art can implement the invention as set forth in the claims using ordinary techniques without excessive experimentation. It is also understood that the specific concepts disclosed are merely illustrative and not intended to limit the scope of the invention, which is determined by the full scope of the appended claims and their equivalents.
[0106] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0107] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.
[0108] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.
[0109] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0110] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0111] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
[0112] The above is a detailed description of the preferred embodiments of the present invention, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.
Claims
1. A capacitance testing method for a capacitance tester, characterized in that, The capacitance tester includes a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit. The host computer is connected to the test unit, the test selection unit, the sample selection unit, and the test calibration unit. The test selection unit is connected to both the test unit and the sample selection unit. The test selection unit determines the type of the test unit connected to the test circuit. The test unit performs tests and records test data. The sample selection unit sequentially connects the capacitors to be tested to the test circuit according to the testing order. The host computer selects the type of the test unit, switches the connection of the test selection unit to the test circuit, and collects the test data. The test calibration unit is used to calibrate the test data; The sample selection unit adopts a test rack, which includes a sample holder, a relay board, a main control board, and a power supply board. The sample holder uses a snap ring as its main structure, and the snap ring is used to connect the positive and negative terminals of the aluminum electrolytic capacitor to be tested. The relay board connects the test circuit and the positive and negative terminals of the aluminum electrolytic capacitor via main contacts. When the coil of the relay board is energized, the main contacts are closed; when the coil of the relay board is de-energized, the main contacts are open. The energization and de-energization of the coil of the relay board are controlled by the main control board. The main control board uses a microcontroller. The main control board is connected to the coil of the relay on the relay board through the output port. The main control board is connected to the host computer through the MODBUS RTU communication protocol and RS485 half-duplex mode. The power board and the main control board are located on the same PCB board. The power board is used to connect to 220V voltage and convert it into DC power to power the microcontroller and relay. The capacitance testing method includes: According to the capacitance test request, first test data of the target capacitor is obtained. The capacitance test request includes at least one of capacitance value test, capacitance loss test and capacitance ESR parameter test. The first test data is at least one of capacitance value, capacitance loss and capacitance ESR parameter. The second test data of the target capacitor is collected at at least two of the sample holders, including acquiring the test data of at least two target capacitors at at least two sample holders, and calculating the average test value of relay opening and closing action based on the test data as the second test data. The second test data is at least one of the following: average test value of capacitance value, average test value of capacitance loss, and average test value of capacitance ESR parameter. The target capacitor is calibrated based on the line calibration resistance of each of the sample holders, and the third test data of the target capacitor is calibrated based on the first test data and the second test data, wherein the second test data is used to characterize the true test data of the target capacitor. Based on the third test data, the test result of the target capacitor is determined, and a test report is generated.
2. The capacitance testing method according to claim 1, characterized in that, The capacitance tester also includes: At least two of the test fixtures are connected in parallel via RS485 and then connected to the host computer via an RS485 converter.
3. The capacitance testing method according to claim 1, characterized in that, The step of calibrating the resistance of the circuit in each of the sample holders based on the target capacitance, and calibrating the third test data of the target capacitance based on the first test data and the second test data, includes: Calculating the test line calibration resistance R for each sample seat Ji The calculation formula is Where i = 1, 2, ..., k, where k is the number of sample holders and n is the number of target capacitors. The second test data is used to represent the average test value of the relay being switched on and off m times on k sample holders. The average test value is the average test value of the capacitance value, the average test value of the capacitance loss, and the average test value of the capacitor ESR parameter. This is the first test data, used to represent the first test data obtained directly from n capacitors; According to the test line calibration resistance R Ji , the third test data is calculated, wherein the third test data is Wherein, the test results of the first test data of the target capacitor are C Xi , R SXi and tan δ Xi , the test results of the third test data of the target capacitor are C Yi , R SYi and tan δ Yi , wherein C, R and tan δ represent the capacitance value, the capacitance loss and the ESR parameter of the capacitor respectively.
4. The capacitance testing method according to claim 1, wherein the test request further includes testing the leakage current of the target capacitor, including: Control at least two pairs of relays to open and close sequentially so that at least two capacitors are connected to the test circuit. After each relay opening and closing action, control the test unit to perform the test according to the preset test procedure and read the test results.
5. A capacitance testing device, characterized in that, The system includes a capacitance tester, comprising a test unit, a test selection unit, a sample selection unit, a host computer, and a test calibration unit. The host computer is connected to the test unit, the test selection unit, the sample selection unit, and the test calibration unit. The test selection unit is connected to both the test unit and the sample selection unit. The sample selection unit uses a test rack, which includes a sample holder. The test selection unit determines the type of test unit to be connected to the test circuit. The test unit performs tests and records test data. The sample selection unit sequentially connects the capacitors to be tested to the test circuit according to the testing order. The host computer selects the type of test unit, switches the connection of the test selection unit to the test circuit, and collects the test data. The test calibration unit is used to calibrate the test data; The sample selection unit adopts a test rack, which includes a sample holder, a relay board, a main control board, and a power supply board. The sample holder uses a snap ring as its main structure, and the snap ring is used to connect the positive and negative terminals of the aluminum electrolytic capacitor to be tested. The relay board connects the test circuit and the positive and negative terminals of the aluminum electrolytic capacitor via main contacts. When the coil of the relay board is energized, the main contacts are closed; when the coil of the relay board is de-energized, the main contacts are open. The energization and de-energization of the coil of the relay board are controlled by the main control board. The main control board uses a microcontroller. The main control board is connected to the coil of the relay on the relay board through the output port. The main control board is connected to the host computer through the MODBUS RTU communication protocol and RS485 half-duplex mode. The power board and the main control board are located on the same PCB board. The power board is used to connect to 220V voltage and convert it into DC power to power the microcontroller and relay. The first module is used to obtain a capacitor test request and obtain first test data of the target capacitor. The capacitor test request includes at least one of capacitor value test, capacitor loss test and capacitor ESR parameter test. The first test data is at least one of capacitor value, capacitor loss and capacitor ESR parameter. The second module is used to collect second test data of the target capacitor in at least two sample holders, including acquiring test data of at least two target capacitors in at least two sample holders, and calculating the average test value of relay opening and closing action as the second test data based on the test data. The second test data is at least one of the following: average test value of capacitance value, average test value of capacitance loss, and average test value of capacitance ESR parameter. The third module is used to calibrate the resistance of the circuit in each of the sample holders according to the target capacitor, and to calibrate the third test data of the target capacitor according to the first test data and the second test data, wherein the second test data is used to characterize the true test data of the target capacitor. The fourth module is used to determine the test result of the target capacitor based on the third test data and generate a test report.
6. An electronic device, characterized in that, Including the processor and memory; The memory is used to store programs; The processor executes the program to implement the capacitance testing method as described in any one of claims 1-4.
7. A computer-readable storage medium, characterized in that, The storage medium stores a program, which is executed by a processor to implement the capacitance testing method as described in any one of claims 1-4.