A homoepitaxial phototransistor and a method for manufacturing the same

Abstract

The application discloses a homogenous heterostructure photoelectric transistor and a preparation method thereof, and belongs to the field of semiconductor photoelectric devices and photoelectric detection. The homogenous heterostructure photoelectric transistor comprises an SOI substrate and a heterostructure layer of the same material from bottom to top, wherein the heterostructure layer of the same material is composed of two-phase layers (phase I and phase II) or multi-phase layers (the number of phases is greater than 2), and can also be a periodic structure composed of two-phase layers or multi-phase layers as a unit. A gate electrode, a source electrode and a drain electrode are prepared on the lower surface of the SOI substrate and the upper surface of the heterostructure layer respectively, wherein the homogenous heterostructure layer serves as a conductive channel, and the preparation of the homogenous heterostructure photoelectric transistor based on the SOI substrate is completed. The application has the advantages of simple structure, strong light response waveband tuning, large light switch ratio, low dark current, high compatibility with Si-based CMOS process and application in an on-chip photoelectric integrated system.

Description

Technical Field

[0001] This invention relates to a homogeneous and heterogeneous thin-film phototransistor and its fabrication method, belonging to the field of semiconductor optoelectronic devices and photoelectric detection technology. Background Technology

[0002] With the rapid development of information technology, the demand for high-performance optoelectronic devices is increasing. Optotransistors, as devices that convert optical signals into electrical signals, have wide applications in optical communication, optical computing, and optical detection. Traditional optotransistors mostly use single-material or heterogeneous material systems. However, with the increasing performance requirements of devices, single-material optotransistors are unable to meet the performance demands, limiting their large-scale application. Heterogeneous material systems suffer from high complexity, low material matching, and poor structural compatibility, resulting in cumbersome fabrication processes and high costs. Therefore, the homogeneous-heterogeneous structure optotransistor used in this invention avoids the adverse effects of impurities between materials due to the identical source material, improving material purity and quality. Furthermore, it can be fabricated using the same methods, reducing the complexity of structural design. Simultaneously, the homogeneous-heterogeneous structure optotransistor brings flexibility, diversity, and operability to semiconductor band structure optimization and interface control, facilitating the realization of ultra-wideband photodetection, high photoelectric conversion efficiency, high on / off ratio, and fast response speed, making it a hot topic in high-performance photodetection research.

[0003] Compared to traditional bulk silicon technology, SOI is an advanced silicon wafer manufacturing technology with many advantages. SOI technology employs a fully dielectric isolation structure, introducing a buried oxide layer between the top silicon layer and the back substrate. This achieves dielectric isolation of components in integrated circuits, completely eliminating the parasitic latch-up effect found in bulk silicon CMOS circuits. Due to the reduction in parasitic capacitance, SOI substrates can improve the operating speed of integrated circuits, while also making it easier to increase clock frequencies and reduce current leakage, thus making integrated circuits more power-efficient. In terms of process, SOI technology can omit some photomasks, thereby saving costs. SOI substrates are also particularly suitable for low-voltage, low-power circuits and are expected to become the mainstream technology for deep submicron low-voltage, low-power integrated circuits. Therefore, the homogeneous-heterogeneous structure phototransistor based on an SOI substrate proposed in this invention provides a high-speed, high-integration, low-power photodetector method and solution, with advantages such as excellent photoelectric performance, simple structure, wafer-level manufacturing, and low fabrication cost. It is highly compatible with Si-based CMOS processes and can be used in on-chip optoelectronic integrated systems. Summary of the Invention

[0004] To address the aforementioned issues, this invention provides a homogeneous heterogeneous structure phototransistor and its fabrication method. The high-quality heterogeneous structure of the same material fabricated on an SOI substrate is applied to thin-film transistor-type photodetectors, aiming to achieve wafer-level manufacturing of phototransistors with excellent performance, simple process, and low cost.

[0005] To achieve the above objectives, one aspect of the present invention provides a homogeneous heterogeneous structure phototransistor, comprising an SOI substrate and a heterogeneous structure layer of the same material. The SOI substrate is a Si-on-insulator structure, consisting of a bottom Si layer, a buried oxide layer, and a top Si layer from bottom to top. A homogeneous heterogeneous structure is fabricated on the upper surface of the top Si layer of the SOI substrate. A gate electrode is fabricated on the lower surface of the bottom Si layer of the SOI substrate, and a source and drain electrode are fabricated on the upper surface of the homogeneous heterogeneous structure, wherein the homogeneous heterogeneous structure layer serves as a conductive channel, thus obtaining a homogeneous heterogeneous structure phototransistor based on an SOI substrate.

[0006] According to a preferred embodiment of the present invention, the heterogeneous structure layer of the same material is a material with the same chemical composition but different crystal structures (homogeneous heterogeneous phases), and is not limited to one type. It can be a semiconductor material with multiple phases such as gallium oxide (Ga2O3), zinc oxide (ZnO), and indium selenide (In2Se3).

[0007] According to a preferred embodiment of the present invention, the heterogeneous structure layer of the same material is composed of two-phase layers (phase I and phase II) or multi-phase layers (number of phases greater than 2), or it can be a periodic structure composed of two-phase layers or multi-phase layers as units.

[0008] According to a preferred embodiment of the present invention, the heterogeneous structure layer of the same material is n-type or p-type conductive.

[0009] According to a preferred embodiment of the present invention, the thickness of each single-phase layer in the heterogeneous structure layer of the same material is 1 nm to 10 μm.

[0010] According to a preferred embodiment of the present invention, the gate forms an ohmic contact with the lower surface of the SOI substrate, and the source and drain form ohmic contacts with the upper surface of the homogeneous structure.

[0011] According to a preferred embodiment of the present invention, the gate, source, and drain are metals such as titanium (Ti), aluminum (Al), nickel (Ni), gold (Au), silver (Ag), chromium (Cr), platinum (Pt), palladium (Pb), and metal alloys thereof, or transparent conductive electrodes such as indium tin oxide (ITO) and graphene.

[0012] Another aspect of the present invention provides a method for fabricating a homogeneous heterogeneous structure phototransistor, comprising the following steps: Step S1, sequentially fabricating a homogeneous phase I material layer on an SOI substrate; Step S2, fabricating a phase II material layer on the homogeneous phase I material layer; Step S3, fabricating a periodic homogeneous heterogeneous structure (number of periods ≥ 1) using the homogeneous phase I material layer and phase II material layer as units; Step S4, fabricating an electrode pattern on the upper surface of the homogeneous heterogeneous structure and depositing a source and a drain electrode; Step S5, fabricating an electrode pattern on the lower surface of the SOI substrate and depositing a gate electrode.

[0013] According to a preferred embodiment of the present invention, the preparation method in steps S1-S3 is metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), chemical vapor deposition (CVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), or magnetron sputtering, in which phase I material layer and phase II material layer are prepared sequentially from bottom to top to construct a homogeneous heterogeneous structure; alternatively, a top-down mechanical peeling and transfer method can be used to sequentially peel and transfer phase I material layer and phase II material layer to construct a homogeneous heterogeneous structure.

[0014] According to a preferred embodiment of the present invention, the electrode patterns of steps S4 and S5 are fabricated using optical lithography, laser direct-write lithography, electron beam direct-write lithography, or nanoimprint lithography, and the source, drain, and gate of steps S4 and S5 are deposited using electron beam evaporation, magnetron sputtering, or thermal evaporation methods.

[0015] The beneficial effects of this invention are as follows:

[0016] 1) The homogeneous and heterogeneous structure phototransistor provided by the present invention uses homogeneous and heterogeneous multilayer thin films as the conductive channel. The single material has high purity, avoiding the adverse effects of impurities between materials, improving the purity and quality of materials, and can be completed under the same preparation method, reducing the complexity and difficulty of semiconductor band structure design.

[0017] 2) The homogeneous heterogeneous structure phototransistor provided by the present invention has a simple structure, high photoelectric conversion efficiency, strong optical response band tuning, large optical on / off ratio, and low dark current. It is highly compatible with Si-based CMOS technology and can be used in on-chip optoelectronic integrated systems.

[0018] 3) This invention utilizes the high insulation properties and low parasitic capacitance of SOI substrates to provide a high-speed, high-integration, and low-power photoelectric detection method and solution.

[0019] 4) The method for fabricating the homogeneous heterogeneous structure phototransistor of the present invention is simple, has low production cost, and is suitable for large-scale wafer-level manufacturing. Attached Figure Description

[0020] Figure 1 These are the front view and top view of the homogeneous heterogeneous structure phototransistor of the present invention;

[0021] Figure 2 These are the front and top views of the homogeneous heterogeneous structure phototransistor (periodic structure ≥ 2) of the present invention;

[0022] Figure 3 This is a flowchart of the method for fabricating homogeneous and heterogeneous phototransistors according to the present invention;

[0023] Figure 4 These are the front and top views of the α-Ga2O3 / β-Ga2O3 bilayer heterogeneous structure phototransistor in Embodiment 1 of the present invention;

[0024] Figure 5 These are the front and top views of the α-Ga2O3 / β-Ga2O3 superlattice heterostructure phototransistor in Embodiment 2 of the present invention;

[0025] Figure 6 These are the front and top views of the α-ZnO / β-ZnO bilayer heterogeneous structure phototransistor in Embodiment 3 of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0027] Secondly, the present invention will be described in detail with reference to the schematic diagrams. When describing the embodiments of the present invention in detail, the schematic diagrams are only examples for ease of explanation and should not limit the scope of protection of the present invention.

[0028] Example 1

[0029] 1) Clean the four-inch SOI substrate by ultrasonic cleaning in acetone, alcohol and deionized water for 5 minutes in sequence, and then blow dry the residual moisture on the surface of the SOI substrate with high-purity nitrogen.

[0030] 2) Fix a 99.99% pure Ga2O3 target on the target stage inside the chamber. Fix the cleaned SOI substrate on the sample stage. Separate the target and substrate with a baffle. After placing the sample, close the chamber door. First, open the bypass valve to start the mechanical pump to evacuate. After the pressure drops below 1 Pa, close the bypass valve. Open the pre-vacuum valve and gate valve of the molecular pump to start the molecular pump to evacuate. Wait until the pressure reaches 10 Pa. -4Continue subsequent operations below Pa. Heat the SOI substrate to 450℃. After the temperature stabilizes, introduce high-purity argon gas into the vacuum chamber and adjust the bypass valve to maintain the pressure in the vacuum chamber at 0.7 Pa. Connect the RF circuit to the Ga2O3 target, turn on the RF power, and adjust the RF power to 100W. Pre-sputter for 5 minutes to remove impurities from the target surface. After 5 minutes, open the baffle between the target and the substrate and deposit a β-Ga2O3 film on the SOI substrate surface for 30 minutes, resulting in a 100 nm thick β-Ga2O3 film. After depositing the β-Ga2O3 film, turn off the RF power and change the substrate heating temperature to 350℃. After the temperature stabilizes, deposit another 100 nm thick α-Ga2O3 film on the β-Ga2O3 film using the same procedure. After both films are deposited, turn off the RF power, heating power, vacuum system, and gas path. After the sample cools naturally, remove the sample.

[0031] 3) Using ultraviolet lithography, source and drain patterns were fabricated on the upper surface of the α-Ga₂O₃ thin film with a source-drain spacing of 5µm. A 30nm / 40nm Ti / Au metal electrode was then deposited using electron beam evaporation. Similarly, a 30nm / 40nm Ti / Au metal electrode was deposited on the lower surface of the SOI substrate using photolithography, resulting in an α-Ga₂O₃ / β-Ga₂O₃ bilayer heterogeneous structure phototransistor based on an SOI substrate.

[0032] Example 2

[0033] 1) Clean the four-inch SOI substrate by ultrasonic cleaning in acetone, alcohol and deionized water for 5 minutes in sequence, and then blow dry the residual moisture on the surface of the SOI substrate with high-purity nitrogen.

[0034] 2) The cleaned SOI substrate was placed in the MOCVD reaction chamber. The chamber door was closed, and the pressure was reduced to a low level using a mechanical pump and a molecular pump. The reaction temperature was set to 750℃, and the reaction pressure to 100 Torr. After setting the reaction pressure and temperature, the precursors triethylgallium (TEGa) and triethanolamine (TEA) were introduced, with argon as the carrier gas. The flow rates of TEGa and TEA were set to 20 μmol / min, and the flow rate of O2 was set to 20 sccm. The MOCVD reactor was then started, and gas flow began. At 750℃, TEGa and O2 reacted chemically in the reaction chamber to form a β-Ga2O3 film. The deposition time was 1 min, resulting in a 5 nm thick β-Ga2O3 film on the SOI substrate surface. The reaction temperature was then adjusted to 400℃. After the temperature stabilized, other parameters were kept constant, and the same procedure was repeated to deposit a 5 nm thick α-Ga2O3 film on the surface of the β-Ga2O3 film. Using this as a cycle, 10 cycles of α-Ga2O3 / β-Ga2O3 superlattice thin films were prepared.

[0035] 3) Using ultraviolet lithography, source and drain patterns were fabricated on the top surface of the α-Ga₂O₃ thin film, with a source-drain spacing of 5µm. 30nm / 40nm Ti / Au metal electrodes were then deposited using electron beam evaporation. Similarly, 30nm / 40nm Ti / Au metal electrodes were deposited on the lower surface of the SOI substrate using photolithography, resulting in an α-Ga₂O₃ / β-Ga₂O₃ superlattice heterogeneous structure phototransistor based on an SOI substrate.

[0036] Example 3

[0037] 1) Clean the four-inch SOI substrate with acetone, alcohol and deionized water in sequence for 5 minutes, and then blow dry the residual moisture on the surface of the SOI substrate with high-purity nitrogen.

[0038] 2) Fix the 99.99% pure ZnO target on the target stage inside the chamber, and fix the cleaned SOI substrate on the sample stage. Separate the target and substrate with a baffle. After placing the sample, close the chamber door. First, open the bypass valve to start the mechanical pump to evacuate. After the pressure drops below 1 Pa, close the bypass valve and open the pre-vacuum valve and gate valve of the molecular pump to start the molecular pump to evacuate. Wait until the pressure reaches 10 Pa. -4Continue subsequent operations below Pa. Heat the SOI substrate to 500℃. After the temperature stabilizes, introduce high-purity argon gas into the vacuum chamber and adjust the gate valve to maintain the pressure in the vacuum chamber at 0.7 Pa. Connect the RF circuit to the ZnO target, turn on the RF power, and adjust the RF power to 100W. Pre-sputter for 5 minutes to remove impurities on the target surface. After 5 minutes, open the baffle between the target and the substrate and deposit a β-ZnO film on the SOI substrate surface for 30 minutes, resulting in a 100 nm thick β-ZnO film. After depositing the β-ZnO film, turn off the RF power and adjust the substrate heating temperature to 300℃. After the temperature stabilizes, deposit another 100 nm thick α-ZnO film on the β-ZnO film using the same procedure. After both films are deposited, turn off the RF power, heating power, vacuum system, and gas path. After the sample cools naturally, remove the sample.

[0039] 3) Using ultraviolet lithography, source and drain patterns were fabricated on the upper surface of the α-ZnO thin film with a source-drain spacing of 5µm. A 30nm / 40nm Ti / Au metal electrode was then deposited using electron beam evaporation. Similarly, a 30nm / 40nm Ti / Au metal electrode was deposited on the lower surface of the SOI substrate using photolithography, resulting in an α-ZnO / β-ZnO bilayer heterogeneous structure phototransistor based on an SOI substrate.

Claims

1. A homogeneous heterogeneous structure phototransistor, characterized in that, include: SOI substrate and heterogeneous structure layer of the same material; The SOI substrate is a silicon-on-insulator structure, consisting of a bottom layer of Si, a buried oxide layer, and a top layer of Si from bottom to top. A homogeneous structure was prepared on the top Si layer of the SOI substrate; The heterogeneous structure layer of the same material refers to materials with the same chemical composition but different crystal structures, i.e., homogeneous heterogeneous materials, and is not limited to one type, including multiphase semiconductor materials such as gallium oxide (Ga2O3), zinc oxide (ZnO), and indium selenide (In2Se3). The heterogeneous structure layer of the same material is composed of a two-phase layer of phase I and phase II or a multi-phase layer with more than 2 phases, or a periodic structure composed of two-phase layers or multi-phase layers as units; Specifically, a homogeneous phase I material layer is prepared on an SOI substrate; a phase II material layer is prepared on the homogeneous phase I material layer; a periodic homogeneous heterogeneous structure with a period number ≥ 1 is prepared using the homogeneous phase I material layer and phase II material layer as units; an electrode pattern is fabricated on the upper surface of the homogeneous heterogeneous structure, and a source and drain electrode are deposited; an electrode pattern is fabricated on the lower surface of the SOI substrate, and a gate electrode is deposited; the gate electrode forms an ohmic contact with the lower surface of the SOI substrate, and the source and drain electrodes form an ohmic contact with the upper surface of the homogeneous heterogeneous structure, thereby obtaining a homogeneous heterogeneous structure phototransistor based on an SOI substrate.

2. The homogeneous heterogeneous structure phototransistor as described in claim 1, characterized in that, The heterogeneous structure layers of the same material are either n-type or p-type conductive.

3. The homogeneous heterogeneous structure phototransistor as described in claim 1, characterized in that, The thickness of each single-phase layer in the heterogeneous structure layer of the same material is 1 nm to 10 μm.

4. The homogeneous heterogeneous structure phototransistor as described in claim 1, characterized in that, The gate, source, and drain electrodes are made of titanium (Ti), aluminum (Al), nickel (Ni), gold (Au), silver (Ag), chromium (Cr), platinum (Pt), palladium (Pb), or metal alloys thereof, or indium tin oxide (ITO) or graphene transparent conductive electrodes.

5. The method for fabricating a homogeneous and heterogeneous phototransistor according to any one of claims 1 to 4, characterized in that, Includes the following steps: Step S1: Prepare a homogeneous I-phase material layer on an SOI substrate; Step S2: Prepare a phase II material layer on the homogeneous phase I material layer; Step S3: Using the homogeneous phase I material layer and phase II material layer as units, prepare a periodic homogeneous heterogeneous structure with a period number ≥ 1; Step S4: Fabricate electrode patterns on the surface of the homogeneous and heterogeneous structure, and deposit source and drain electrodes; Step S5: Fabricate an electrode pattern on the lower surface of the SOI substrate and deposit a gate electrode.

6. The method for fabricating a homogeneous and heterogeneous phototransistor as described in claim 5, characterized in that, The preparation methods in steps S1-S3 include metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), chemical vapor deposition (CVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), and magnetron sputtering, which sequentially prepare phase I and phase II material layers from bottom to top to construct a homogeneous heterogeneous structure; alternatively, a top-down mechanical peeling and transfer method can be used to sequentially peel and transfer phase I and phase II material layers to construct a homogeneous heterogeneous structure.

7. The method for fabricating a homogeneous and heterogeneous phototransistor as described in claim 5, characterized in that, The electrode patterns of steps S4 and S5 are fabricated using optical lithography, laser direct-write lithography, electron beam direct-write lithography, or nanoimprint lithography, and the source, drain, and gate of steps S4 and S5 are deposited using electron beam evaporation, magnetron sputtering, or thermal evaporation methods.

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