Method for manufacturing semiconductor device

Abstract

The present application relates to a method for manufacturing a semiconductor device, including: providing a substrate, forming a dense barrier layer in a to-be-processed area within the substrate; forming a first gate oxide layer within the substrate on the dense barrier layer, and the bottom corner area of ​​the first gate oxide layer extends into the dense barrier layer, and the top corner area of ​​the dense barrier layer is rounded; removing part of the substrate to expose the first gate oxide layer; forming a second gate oxide layer on the first gate oxide layer, and the second gate oxide layer at least extends to cover the substrate on both sides of the first gate oxide layer. The present application prevents excessive diffusion of subsequently injected oxygen atoms by forming a dense barrier layer within the substrate; by forming a first gate oxide layer with a bottom corner area extending into the dense barrier layer, and making the top corner area of ​​the dense barrier layer smooth, it is beneficial to disperse the electric field and reduce the leakage current of the semiconductor device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for manufacturing a semiconductor device. Background Art

[0002] The 28V high voltage platform requires a variety of gate oxide thicknesses to meet the use requirements of devices with different voltages. Therefore, the thickness of the gate oxide layer required in different areas of the semiconductor device is not exactly the same. At the same time, a certain thickness of silicon material (Si) needs to be etched away from the area with a thicker gate oxide layer to ensure that the flatness of the entire chip meets the process requirements.

[0003] In the general process of thinning the thickness of the gate oxide layer, before the deposition process of the shallow trench isolation structure (STI), a layer of gate oxide layer (Linear oxide) with an angle is grown using the ISSG process to round the corner area (Corner) of the active area (Active Area, AA).

[0004] However, in the subsequent oxide layer thinning process, the rounded corners of the oxide layer will be etched away, and a sharper structure will be formed at the corners. When the semiconductor device is working, a strong electric field is easily formed at the sharp corners, increasing the probability of leakage of the semiconductor device. Summary of the invention

[0005] Based on this, it is necessary to provide a method for manufacturing a semiconductor device to disperse the electric field and reduce the leakage current of the semiconductor device.

[0006] The present application provides a method for manufacturing a semiconductor device, comprising:

[0007] Providing a substrate, and forming a dense barrier layer in a region to be processed within the substrate;

[0008] forming a first gate oxide layer in the substrate on the dense barrier layer, wherein a bottom corner region of the first gate oxide layer extends into the dense barrier layer, and a top corner region of the dense barrier layer is rounded;

[0009] removing a portion of the substrate to expose the first gate oxide layer;

[0010] A second gate oxide layer is formed on the first gate oxide layer, wherein the second gate oxide layer at least extends to cover the substrate on both sides of the first gate oxide layer.

[0011] In one embodiment, the process of forming a first gate oxide layer in the substrate on the dense barrier layer includes:

[0012] Implanting oxygen atoms into the substrate in the area to be processed by a first ion implantation process to form an oxygen atom implantation area on the dense barrier layer;

[0013] A second ion implantation process is used to implant oxygen atoms again in the bottom corner region of the oxygen atom implantation region, so that the bottom corner region of the oxygen atom implantation region forms an oxygen atom-enriched region, thereby forming the first gate oxide layer including the oxygen atom implantation region and the oxygen atom-enriched region.

[0014] In one embodiment, the implantation direction of the first ion implantation process is the same as the direction of vertical injection into the surface of the substrate, and the angle between the implantation direction of the second ion implantation process and the direction of vertical injection into the surface of the substrate is an acute angle.

[0015] In one of the embodiments, along a direction perpendicular to the surface of the substrate, a bottom corner region of the first gate oxide layer has a pointed shape extending into the dense barrier layer, and a top corner region of the dense barrier layer has a rounded shape.

[0016] In one embodiment, the process of forming a dense barrier layer in the substrate in the area to be processed includes:

[0017] Implanting silicon atoms into the substrate in the area to be processed;

[0018] An annealing process is performed to allow the silicon atoms to form the dense barrier layer in the substrate.

[0019] In one embodiment, the process of removing a portion of the substrate to expose the first gate oxide layer includes:

[0020] The substrate in the area to be processed is etched using a dry etching process to expose the first gate oxide layer.

[0021] In one embodiment, a mask layer is used to form the dense barrier layer in the substrate in the area to be processed, and the mask layer is removed before the step of forming the second gate oxide layer on the first gate oxide layer.

[0022] In one embodiment, the process of removing the mask layer includes:

[0023] removing the mask layer by an ashing process;

[0024] A wet cleaning process is used to remove impurities remaining on the substrate and the first gate oxide layer.

[0025] In one embodiment, a second gate oxide layer is formed on the substrate and the first gate oxide layer by a thermal oxidation deposition process.

[0026] In one embodiment, after forming a second gate oxide layer on the first gate oxide layer, the method for manufacturing a semiconductor device further includes:

[0027] An annealing process is performed to repair lattice defects in the first gate oxide layer.

[0028] The unexpected effects of the present application are: by forming a dense barrier layer in the substrate, excessive diffusion of subsequently injected oxygen atoms is prevented; by forming a first gate oxide layer extending from the bottom corner area to the dense barrier layer, and making the top corner area of ​​the dense barrier layer smooth, it is beneficial to disperse the electric field and reduce the leakage current of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0030] Figure 1 The present invention is a structural schematic diagram corresponding to the step of defining the region of the gate oxide layer in a process of thinning the gate oxide layer in a semiconductor device in a related art.

[0031] Figure 2 The present invention is a structural schematic diagram corresponding to the step of etching a portion of the substrate in a process of thinning the gate oxide layer in a semiconductor device in a related art.

[0032] Figure 3 The present invention is a structural schematic diagram corresponding to the step of removing the silicon nitride layer in a process of thinning the gate oxide layer in a semiconductor device in a related art.

[0033] Figure 4 The present invention is a structural schematic diagram corresponding to the step of forming a gate oxide layer in a gate oxide layer thinning process in a semiconductor device in a related art.

[0034] Figure 5 A flow chart of a method for manufacturing a semiconductor device provided in one of the embodiments of the present application.

[0035] Figure 6 A structural schematic diagram corresponding to the step of providing a substrate in a method for manufacturing a semiconductor device provided in one of the embodiments of the present application.

[0036] Figure 7 A schematic structural diagram corresponding to the step of forming a dense barrier layer in a substrate in a to-be-processed area in a method for manufacturing a semiconductor device according to one of the embodiments of the present application.

[0037] Figure 8 A schematic structural diagram corresponding to the step of forming an oxygen atom implantation region on a dense barrier layer in a method for manufacturing a semiconductor device according to one embodiment of the present application.

[0038] Fig. 9 A schematic structural diagram corresponding to the step of forming an oxygen atom-enriched region in the bottom corner area of ​​the oxygen atom implantation region in a method for manufacturing a semiconductor device provided in one of the embodiments of the present application.

[0039] Fig.10 A schematic structural diagram corresponding to the step of removing a portion of the substrate and exposing the first gate oxide layer in a method for manufacturing a semiconductor device provided in one of the embodiments of the present application.

[0040] Fig.11 A schematic structural diagram corresponding to the step of removing the mask layer in the method for manufacturing a semiconductor device provided in one of the embodiments of the present application.

[0041] Fig.12 A schematic structural diagram corresponding to the step of forming a second gate oxide layer on a first gate oxide layer in a method for manufacturing a semiconductor device according to one embodiment of the present application.

[0042] Among them, the figure marks include: 100-active area; 101-shallow trench isolation structure; 110-pad oxide layer; 120-silicon nitride layer; 130-photoresist layer; 140-gate oxide layer; 141-first gate oxide layer; 142-second gate oxide layer; 200-substrate; 201-mask layer; 202-STI structure; 210-dense barrier layer; 220-first gate oxide layer; 221-oxygen atom injection region; 222-oxygen atom enriched region; 230-second gate oxide layer. DETAILED DESCRIPTION

[0043] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0045] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0046] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0047] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0048] Generally, the process of reducing the thickness of the gate oxide layer can be referred to Figures 1 to 4 First, see Figure 1 , an active area 100 is provided, a pad oxide layer 110 (Pad Oxide) is formed on the active area 100, and a silicon nitride layer 120 and a patterned photoresist layer 130 are formed on the pad oxide layer 110 to expose the area where the gate oxide layer needs to be formed in the active area 100. Optionally, the pad oxide layer 110 is formed by an ISSG process to round the corner area of ​​the pad oxide layer 110.

[0049] See also Figure 1 and Figure 2 , the pad oxide layer 110 and the active area 100 are etched using the photoresist layer 130 as a mask to thin the area where the gate oxide layer is to be formed later; then, the photoresist layer 130 is removed. However, in the process of etching the pad oxide layer 110, the part of the corner area with rounded corners in the pad oxide layer 110 exposed by the photoresist layer 130 will also be etched away, making the corner of the remaining active area 100 sharper.

[0050] Next, see Figure 2 and Figure 3 The silicon nitride layer 120 is removed by a wet cleaning process, wherein the cleaning agent of the wet cleaning process includes hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 However, since the cleaning agent is also corrosive to silicon dioxide, the shallow trench isolation structure 101 disposed in the active area 100 will also be etched to a certain extent. In severe cases, a divot defect may even be formed in the shallow trench isolation structure 101, which may further increase the leakage current of the semiconductor device.

[0051] See also Figure 4 , a gate oxide layer 140 is formed on the active area 100 and the pad oxide layer 110. Optionally, the gate oxide layer 140 includes a first gate oxide layer 141 formed on the substrate and a second gate oxide layer 142 formed on the first gate oxide layer 141, and the second gate oxide layer 142 extends to cover the shallow trench isolation structure 101 and the pad oxide layer 110 on both sides of the first gate oxide layer 141. It can be seen that the corner area of ​​the gate oxide layer 140 formed by the above method is sharp, and when the semiconductor device is working, a strong electric field is easily formed at the sharp corner, which increases the leakage probability of the semiconductor device.

[0052] Based on this, it is necessary to provide a method for manufacturing a semiconductor device to disperse the electric field and reduce the leakage current of the semiconductor device.

[0053] Figure 5A flowchart of a method for manufacturing a semiconductor device provided in one embodiment of the present application. Figure 5 One embodiment of the present application provides a method for manufacturing a semiconductor device, including the following steps S01 to S04.

[0054] Step S01: forming a dense barrier layer in the area to be processed in the substrate.

[0055] It should be noted that the area to be processed is the area in the substrate that needs to be thinned for the gate oxide layer to be formed subsequently. In addition, the dense barrier layer is formed at a certain depth in the substrate to leave space for the first gate oxide layer to be formed in the substrate on the dense barrier layer.

[0056] Step S02: forming a first gate oxide layer in the substrate on the dense barrier layer, wherein a bottom corner region of the first gate oxide layer extends into the dense barrier layer, and a top corner region of the dense barrier layer is rounded.

[0057] It should be noted that the dense barrier layer can prevent excessive diffusion of oxygen atoms during the formation of the first gate oxide layer. At the same time, the bottom corner region of the first gate oxide layer extends into the dense barrier layer and makes the top corner region of the dense barrier layer smooth, which is conducive to dispersing the electric field in the bottom corner region, thereby reducing the leakage current of the semiconductor device.

[0058] Step S03: removing a portion of the substrate to expose the first gate oxide layer.

[0059] Step S04: forming a second gate oxide layer on the first gate oxide layer, wherein the second gate oxide layer at least extends to cover the substrate on both sides of the first gate oxide layer.

[0060] The method for manufacturing a semiconductor device as described above prevents excessive diffusion of subsequently injected oxygen atoms by forming a dense barrier layer in the substrate; forms a first gate oxide layer extending from the bottom corner area to the dense barrier layer, and makes the top corner area of ​​the dense barrier layer smooth, which is beneficial to dispersing the electric field and reducing the leakage current of the semiconductor device.

[0061] See also Figure 6 In one embodiment, a substrate 200 is provided, and a mask layer 201 is formed on the substrate 200, and the mask layer 201 exposes the area to be processed in the substrate 200. Optionally, the mask layer 201 is a photoresist layer. Optionally, an STI structure 202 is also formed in the substrate 200, and the material of the STI structure 202 includes silicon dioxide. In one embodiment, a pad oxide layer (not shown in the figure) is also formed on the substrate 200, and an anti-reflection layer (BARC, not shown in the figure) is also formed between the substrate 200 and the mask layer 201.

[0062] See also Figure 7 In one embodiment, the process of forming a dense barrier layer 210 in the substrate 200 in the area to be processed includes: implanting silicon (Si) atoms in the substrate 200 in the area to be processed; and performing an annealing process to allow the silicon atoms to form a dense barrier layer 210 in the substrate 200. Optionally, the silicon atoms are implanted into the substrate 200 in a direction perpendicular to the surface of the substrate 200.

[0063] It should be emphasized that the dense barrier layer is formed at a certain depth in the substrate to leave space for the first gate oxide layer to be formed subsequently, that is, the top of the dense barrier layer is the bottom of the first gate oxide layer to be formed subsequently. At the same time, since the dense barrier layer has a certain blocking effect on the subsequently injected oxygen atoms, the approximate position of the first gate oxide layer to be formed subsequently in the substrate can be controlled by controlling the formation depth of the dense barrier layer in the substrate. Optionally, the depth of the dense barrier layer in the substrate can be controlled by the injection energy and injection dose of silicon atoms.

[0064] See also Figure 8 and Fig. 9 In one embodiment, the process of forming the first gate oxide layer 220 in the substrate 200 on the dense barrier layer 210 includes: Figure 8 , oxygen atoms are implanted into the substrate 200 in the area to be processed by a first ion implantation process to form an oxygen atom implantation region 221 on the dense barrier layer 210; see Fig. 9 , oxygen atoms are implanted again in the bottom corner region of the oxygen atom implantation region 221 using a second ion implantation process, so that an oxygen atom-enriched region 222 is formed in the bottom corner region of the oxygen atom implantation region 221 , thereby forming a first gate oxide layer 220 including the oxygen atom implantation region 221 and the oxygen atom-enriched region 222 .

[0065] In one embodiment, the position and morphology of the oxygen atom implantation region and the oxygen atom enriched region can be controlled by adjusting the process parameters of the first ion implantation process and the second ion implantation process. For example, the implantation energy and implantation dose of the first ion implantation process can be adjusted according to the depth of the dense barrier layer, and oxygen atoms can be implanted into the substrate above the dense barrier layer to form an oxygen atom implantation region. For another example, the oxygen atoms can be implanted into the bottom corner region of the oxygen atom implantation region by adjusting the implantation angle, implantation energy and implantation dose of the second ion implantation process to form an oxygen atom enriched region where oxygen atoms are accumulated.

[0066] At the same time, since the STI structure is formed on both sides of the oxygen atom injection region, the STI structure will reflect part of the oxygen atoms during the first ion injection process and the second ion injection process, so that oxygen atoms are enriched in the substrate near the STI structure, which helps to form an oxygen atom-enriched region in the bottom corner region of the oxygen atom injection region. Optionally, the concentration in the oxygen atom-enriched region gradually decreases with the increase of the injection depth, so that the finally formed oxygen atom-enriched region forms an oxygen atom layer with a concentration gradient, and accordingly, the top corner region of the dense barrier layer at this time presents a smooth rounded corner morphology. That is, in one embodiment, along the direction perpendicular to the surface of the substrate, the bottom corner region of the first gate oxide layer presents a sharp corner morphology extending into the dense barrier layer, and the top corner region of the dense barrier layer presents a rounded corner morphology, which is conducive to dispersing the electric field and reducing the leakage current of the semiconductor device.

[0067] In one embodiment, the implantation direction of the first ion implantation process is the same as the direction perpendicular to the surface of the substrate, and the angle between the implantation direction of the second ion implantation process and the direction perpendicular to the surface of the substrate is an acute angle.

[0068] See also Fig.10 In one embodiment, the process of removing a portion of the substrate 200 to expose the first gate oxide layer 220 includes: using the mask layer 201 as a mask, and etching the substrate 200 in the area to be processed by a dry etching process to expose the first gate oxide layer 220. Optionally, a plasma etching process is used to remove a portion of the substrate 200.

[0069] It should be noted that the removed substrate 200 is the portion of the substrate above the first gate oxide layer 220 that is not doped with oxygen atoms. Since a dense barrier layer 210 and a first gate oxide layer 220 have been formed in the substrate 200 in the area to be processed, the thickness of the portion of the substrate 200 to be removed is relatively small, and the mask layer 201 can protect other areas in the substrate 200 from being damaged during the above-mentioned dry etching process.

[0070] See also Fig.11 In one embodiment, the process of removing the mask layer 201 includes: removing the mask layer 201 by an ash process; and removing the impurities remaining on the substrate 200 and the first gate oxide layer 220 by a wet cleaning process. Optionally, the cleaning agent of the wet cleaning process includes hydrofluoric acid (HF) and phosphoric acid (H 3 PO 4 ) mixed solution.

[0071] It should be noted that removing the mask layer through the ashing process and the wet cleaning process reduces or eliminates the possibility of forming a divot in the STI structure due to excessive pickling, thereby further reducing the leakage current of the semiconductor device.

[0072] See also Fig.12 In one embodiment, a second gate oxide layer 230 is formed on the first gate oxide layer 220 by a thermal oxidation deposition process (High Temperature Oxide, HTO), and the second gate oxide layer 230 at least extends to cover the substrate 200 and the STI structure 202 on both sides of the first gate oxide layer 220. At this time, the gate oxide layer in the semiconductor device includes the first gate oxide layer 220 and the second gate oxide layer 230, and the thickness of the gate oxide layer in the semiconductor device is the sum of the thickness of the first gate oxide layer 220 and the thickness of the second gate oxide layer 230.

[0073] Continue reading Fig.12 In one embodiment, after forming the second gate oxide layer 230 on the first gate oxide layer 220, the method for manufacturing the semiconductor device further includes: performing an annealing process to allow oxygen atoms to completely react with silicon in the substrate 200, thereby reducing the number of silicon (Si) dangling bonds, so as to repair lattice defects in the first gate oxide layer 220. It should be noted that after the lattice defects are repaired by the annealing process and the first gate oxide layer 220 is formed by ion implantation, the first gate oxide layer 220 has an excellent interface state, which is beneficial to improving the reliability of the gate oxide layer in the semiconductor device.

[0074] The unexpected effects of the present application are: by forming a dense barrier layer in the substrate, excessive diffusion of subsequently injected oxygen atoms is prevented; by forming a first gate oxide layer extending from the bottom corner area to the dense barrier layer, and making the top corner area of ​​the dense barrier layer smooth, it is beneficial to disperse the electric field and reduce the leakage current of the semiconductor device.

[0075] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0076] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0077] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the application. It should be noted that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: include: Providing a substrate, and forming a dense barrier layer in a region to be processed within the substrate; forming a first gate oxide layer in the substrate on the dense barrier layer, wherein a bottom corner region of the first gate oxide layer extends into the dense barrier layer, and a top corner region of the dense barrier layer is rounded; removing a portion of the substrate to expose the first gate oxide layer; forming a second gate oxide layer on the first gate oxide layer, wherein the second gate oxide layer at least extends to cover the substrate on both sides of the first gate oxide layer; The process of forming a first gate oxide layer in the substrate on the dense barrier layer comprises: Implanting oxygen atoms into the substrate in the area to be processed by a first ion implantation process to form an oxygen atom implantation area on the dense barrier layer; A second ion implantation process is used to implant oxygen atoms again in the bottom corner region of the oxygen atom implantation region, so that the bottom corner region of the oxygen atom implantation region forms an oxygen atom-enriched region, thereby forming the first gate oxide layer including the oxygen atom implantation region and the oxygen atom-enriched region.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The implantation direction of the first ion implantation process is the same as the direction of vertical injection into the surface of the substrate, and the angle between the implantation direction of the second ion implantation process and the direction of vertical injection into the surface of the substrate is an acute angle.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: Along a direction perpendicular to the surface of the substrate, a bottom corner region of the first gate oxide layer has a pointed shape extending into the dense barrier layer, and a top corner region of the dense barrier layer has a rounded shape.

4. The method for manufacturing a semiconductor device according to claim 1, wherein: The process of forming a dense barrier layer in the substrate in the area to be processed includes: Implanting silicon atoms into the substrate in the area to be processed; An annealing process is performed to allow the silicon atoms to form the dense barrier layer in the substrate.

5. The method for manufacturing a semiconductor device according to claim 1, wherein: The process of removing part of the substrate to expose the first gate oxide layer includes: The substrate in the area to be processed is etched using a dry etching process to expose the first gate oxide layer.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: The dense barrier layer is formed in the substrate in the area to be processed by using a mask layer, and the mask layer is removed before the step of forming a second gate oxide layer on the first gate oxide layer.

7. The method for manufacturing a semiconductor device according to claim 6, wherein: The process of removing the mask layer includes: removing the mask layer by an ashing process; A wet cleaning process is used to remove impurities remaining on the substrate and the first gate oxide layer.

8. The method for manufacturing a semiconductor device according to claim 1, wherein: A second gate oxide layer is formed on the substrate and the first gate oxide layer by a thermal oxidation deposition process.

9. The method for manufacturing a semiconductor device according to claim 1, wherein: After forming a second gate oxide layer on the first gate oxide layer, the method for manufacturing the semiconductor device further includes: An annealing process is performed to repair lattice defects in the first gate oxide layer.

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