Computing device, computing system, and optical module

Abstract

A computing device is provided, including a PCB board, a computing chip and one or more optical modules. The computing chip is arranged on the PCB board and includes one or more input / output high-speed interfaces. Each input / output high-speed interface has one or more input high-speed ports and one or more output high-speed ports. Each output high-speed port performs parallel-to-serial conversion on a parallel signal within the computing chip to output a first electrical signal, and each input high-speed port performs serial-to-parallel conversion on a received second electrical signal as a high-speed serial signal. The one or more optical modules are arranged on the PCB board, and each port in an electrical input / output interface of each optical module is electrically connected to a corresponding input or output high-speed port in the computing chip through wiring in the PCB board, respectively. Each optical module converts a received first electrical signal into a first optical signal, and converts a received second optical signal into a second electrical signal.

Description

Technical Field

[0001] This disclosure relates to the fields of communications and computing, and more specifically to a computing device, a computing system, and an optical module for the computing device and computing system. Background Technology

[0002] As AI accelerators continue to achieve increased computing power through various process iterations and chip architecture innovations, the interconnect bandwidth between AI accelerators is also constantly growing. Data from artificial intelligence research company OpenAI shows that the computational demands of AI models are currently growing far faster than the computing power of computing hardware.

[0003] AI accelerator interconnect networks have become crucial for enhancing overall computing power. The Open Compute Project (OCP) has launched the general-purpose OCP Accelerator Module (OAM), which has been adopted by leading GPU vendors. Currently, communication between mainstream general-purpose OCP accelerator modules typically takes the form of point-to-point interconnection between eight computing devices via PCB traces (e.g.,...). Figure 1 (As shown). Due to the need for longer PCB traces, computing devices generally require a SerDes interface similar to CEI (Common Electrical I / O) Long Range (LR).

[0004] For example, for Figure 1 In a fully connected environment, each SerDes interface needs to access a specific single computing device, which reduces the bandwidth between each pair of computing devices. For example, in... Figure 1 In the case of the 8 interconnected computing chips shown, each computing chip needs to be equipped with 7 SerDes high-speed interfaces. The bandwidth of each SerDes high-speed interface is 1 / 7 of the I / O bandwidth of computing chip 300. That is, the bandwidth transmitted from the first computing chip to any other technology chip will be 1 / 7 of the I / O bandwidth of computing chip 300, and 100% I / O bandwidth transmission cannot be achieved. Furthermore, this fixed wiring method is not conducive to achieving flexible bandwidth configuration.

[0005] Furthermore, due to the limitations of transmission distance on the PCB board, the computing scale of a single computing node is generally limited to a maximum of eight computing devices.

[0006] Furthermore, since the response of electrical channels attenuates with increasing signal rate, higher-speed interfaces often involve more complex architectures and circuit designs, introducing latency costs, consuming more power, and occupying a larger chip area, thereby limiting the bandwidth of chip I / O. In addition, longer metal wiring distances further increase circuit losses and limit the interconnect distance between AI accelerators. Summary of the Invention

[0007] Using optical interconnects for data transmission between computing devices or AI accelerators is advantageous. Compared to electrical interconnects, optical channels exhibit constant and minimal loss across different frequencies, enabling optical interconnects to support longer transmission distances. Combining optical modules with optical switches can further homogenize bandwidth within and between computing devices, facilitating the implementation of large-scale computing systems.

[0008] Therefore, in order to solve the above problems, this disclosure proposes various modules, devices and systems that can use optical interconnects to realize large-scale computing.

[0009] This disclosure provides a computing device. The computing device includes: a PCB board; a computing chip disposed on the PCB board, the computing chip including one or more high-speed input / output interfaces, wherein each high-speed input / output interface has one or more high-speed input ports and one or more high-speed output ports, each high-speed output port performing parallel-to-serial conversion on parallel signals within the computing chip to output a first electrical signal, and each high-speed input port performing serial-to-parallel conversion on received second electrical signals as high-speed serial signals; and one or more optical modules disposed on the PCB board, each optical module including an electrical input / output interface and an optical input / output interface, the electrical input / output interface including at least one electrical input port and at least one electrical output port, and the optical input / output port including at least one optical input port and at least one optical output port. Each of the at least one electrical input port is electrically connected to a corresponding one of the one or more high-speed output ports via wiring on the PCB board, and each of the at least one electrical output port is electrically connected to a corresponding one of the one or more high-speed input ports via wiring on the PCB board. Each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port, and converts the second optical signal received from each of the at least one optical input port into a second electrical signal and outputs the second electrical signal.

[0010] In some embodiments, the number of high-speed output ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of high-speed input ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

[0011] In some embodiments, the computing device further includes at least one high-bandwidth memory (HBM) unit, the at least one HBM unit being packaged with the computing chip on a substrate, and the substrate being disposed on the PCB board.

[0012] In some embodiments, the at least one HBM unit and the computing chip are encapsulated on the substrate through an interlayer.

[0013] In some embodiments, the computing chip is an artificial intelligence chip.

[0014] This disclosure also provides a computing system. The computing system includes: a plurality of computing devices as described above; and at least one optical switch. Each computing device is optically interconnected with at least a portion of the at least one optical switch via a corresponding optical module in each computing device. At least a portion of the plurality of computing devices are optically interconnected with each other via the at least one optical switch.

[0015] In some embodiments, the at least one optical switch can reconstruct the optical link between the plurality of computing devices, enabling communication between any two of the plurality of computing devices.

[0016] In some embodiments, the at least one optical switch can establish an optical link between all optical modules in the first computing device and the optical modules in the second computing device, enabling the first computing device and the second computing device to communicate.

[0017] In some embodiments, the at least one optical switch is capable of establishing an optical link between some optical modules in the first computing device and optical modules in the second computing device, and establishing an optical link between the remaining optical modules in the first computing device and optical modules in the third computing device, so that the first computing device communicates simultaneously with the second computing device and the third computing device.

[0018] This disclosure also provides an optical module, comprising: an electrical input / output interface; an optical input / output interface; an optical emitting unit for converting an input electrical signal received from the electrical input / output interface into an output optical signal; an optical receiving unit for converting the input optical signal received from the optical input / output interface into an output electrical signal; and a control unit for controlling the optical emitting unit to perform the conversion of the input electrical signal into the output optical signal, and controlling the optical receiving unit to perform the conversion of the input optical signal into the output electrical signal. The optical module does not perform communication protocol conversion processing on the input electrical signal and the output electrical signal.

[0019] In some embodiments, the optical emitting unit includes an optical emitter and a driver, wherein the optical emitter is a direct-modulation laser, and the control unit controls the intensity of the optical signal emitted by the optical emitting unit by controlling an electrical signal provided by the driver, so as to form the output optical signal.

[0020] In some embodiments, the optical emitting unit includes an optical emitter and a driver, wherein the optical emitter is an externally modulated laser, and the optical emitting unit further includes a modulator, wherein the control unit modulates the light received from the optical emitter by controlling an electrical signal input to the modulator to form the output optical signal. Attached Figure Description

[0021] Figure 1 This diagram illustrates a point-to-point interconnection between multiple computing devices in a traditional computing system via PCB wiring.

[0022] Figure 2A-2B A schematic diagram of an example configuration of a computing device according to an embodiment of the present disclosure is shown.

[0023] Figures 3A-3B A schematic diagram of another example configuration of a computing device according to an embodiment of the present disclosure is shown.

[0024] Figures 4A-4C A schematic diagram of an example configuration of a computing system according to an embodiment of the present disclosure is shown.

[0025] Figures 5A-5C A schematic diagram of an example configuration of an optical module according to an embodiment of the present disclosure is shown. Detailed Implementation

[0026] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0027] It should be noted that the various components or parts described in the various embodiments of this disclosure are merely illustrative. In some cases, some components or parts may be omitted, or some components or parts may be replaced with other components or parts that have the same or similar functions, or additional components or parts may be added.

[0028] Furthermore, the various components or assemblies described in the different embodiments of this disclosure are merely for ease of description and do not imply actual physical separation or combination, nor do they imply that such separation or combination is necessary. Those skilled in the art can arbitrarily disassemble or combine the various components or assemblies according to actual needs.

[0029] Without departing from the inventive concept of this disclosure, any of the above variations or combinations fall within the protection scope of this disclosure.

[0030] To address the various problems arising from electrical interconnection via PCB wiring in traditional computing devices, this disclosure proposes a computing device with a novel direct-drive optical module. In this device, the optical module is integrated onto the same PCB as the computing chip via onboard mounting, and the direct-drive optical module directly connects to the high-speed interface of the computing chip without any physical or protocol layer conversion.

[0031] Since there is no protocol layer and physical layer conversion, the latency required for communication will be greatly reduced. Furthermore, combined with optical switches, the transmission bandwidth of computing chips can be flexibly configured, so that the transmission bandwidth is no longer limited by various protocols.

[0032] This novel onboard direct-drive optical module eliminates the need for a retimer, and the number of ports and channels in the optical module can be matched with the number of ports in the high-speed I / O interface of the computing chip. By directly connecting the computing chip and the onboard direct-drive optical module, high-speed electrical signals from the computing chip can be directly transmitted to the onboard direct-drive optical module and then converted into electro-optical / photoelectric signals by the components within the onboard direct-drive optical module.

[0033] Figure 2A-2B A schematic diagram of an example configuration of a computing device 2000 according to an embodiment of the present disclosure is shown. Wherein, Figure 2A A top view of an example configuration of the computing device 2000 is shown, and Figure 2B A cross-sectional view of an example configuration of the computing device 2000 is shown.

[0034] like Figure 2A As shown in Figure 2B, the computing device 2000 includes one or more optical modules 100 and a computing chip 300. The one or more optical modules 100 and the computing chip 300 are arranged on the same PCB board 500.

[0035] Each optical module 100 includes an electrical input / output interface and an optical input / output interface. The electrical input / output interface (e.g., an interface connected to cabling 304) includes at least one electrical input port and at least one electrical output port, or may be collectively referred to as electrical input / output ports. The optical input / output interface (e.g., an interface connected to optical fiber 200) includes at least one optical input port and at least one optical output port, or may be collectively referred to as optical input / output ports. For simplicity, Figure 2A Further details and the specific number of each port of the optical module 100 are not shown.

[0036] The computing chip 300 and each optical module 300 are arranged on the same PCB board 500, and the computing chip 300 includes one or more high-speed input / output interfaces (e.g., long-distance SerDes interfaces). Each high-speed input / output interface has one or more high-speed input ports and one or more high-speed output ports. For simplicity, Figure 2A The diagram only shows four high-speed input / output interfaces of the computing chip 300 (e.g., interfaces connected to wiring 304), and the ports (not shown) in each high-speed input / output interface are respectively connected to the corresponding ports in the electrical input / output interfaces of the respective optical modules 100. Optionally, the computing chip 300 can be mounted on the PCB board 500 via the substrate 400.

[0037] In some embodiments, the computing chip 300 may be an artificial intelligence chip, such as, but not limited to, a graphics processing unit (GPU), a neural network processor (NPU), a tensor processor (TPU), an intelligent processor (IPU), a deep learning processor (DPU), etc.

[0038] It should be noted that the four high-speed input / output interfaces of the computing chip 300 shown above, corresponding to four optical modules, are merely for ease of description. In practical applications, the computing chip 300 can be configured with any number of high-speed input / output interfaces according to specific requirements, and each high-speed input / output interface can be configured with any number of high-speed input ports and high-speed output ports.

[0039] In this disclosure, each high-speed output port of the computing chip 300 performs parallel-to-serial conversion on parallel signals within the computing chip 300 to output a first electrical signal (not shown in the figure). This first electrical signal is provided to the corresponding electrical input port of the corresponding optical module 100 for photoelectric conversion. The parallel-to-serial conversion operation can be performed, for example, by a serializer (the SERializer circuit in the SerDes interface), thereby enabling multiple low-speed parallel signals within the computing chip 300 to be converted into high-speed serial signals.

[0040] Furthermore, each high-speed input port of the computing chip 300 performs a serial-to-parallel conversion (not shown) on the second electrical signal received from the optical module 100 as a high-speed serial signal, thereby converting the high-speed serial signal back into a low-speed parallel signal for use by the computing chip 300. The serial-to-parallel conversion operation can be performed, for example, by a deserializer (DESerializer circuit in the SerDes interface), thereby enabling the high-speed serial signal within the computing chip 300 to be converted into a low-speed parallel signal.

[0041] Each of at least one electrical input port of each optical module 100 is electrically connected to one of one or more high-speed output ports of the computing chip 300 via wiring 304 in the PCB board 500, and each of at least one electrical output port of each optical module 100 is electrically connected to one of one or more high-speed input ports of the computing chip 300 via wiring 304 in the PCB board 500.

[0042] In other words, the high-speed serial signal output from the electrical chip 300 (e.g., the first electrical signal as described above) is provided to the electrical input port of the optical module 100 through the wiring 304 in the PCB board 500. Similarly, the high-speed serial signal output from the electrical output port of the optical module 100 (e.g., the second electrical signal as described above) is also provided to the electrical chip 300 through the wiring 304 in the PCB board 500.

[0043] It should be noted that wiring 304 in PCB board 500 is a general term for the electrical connection wiring between optical module 100 and computing chip 300, and is not intended to represent any specific wiring.

[0044] Functionally, each optical module 100 is used for electro-optical conversion and optical-electrical conversion.

[0045] For example, the optical module 100 converts a first electrical signal received from each of at least one electrical input port into a first optical signal output from one of at least one optical output port. This first electrical signal is a high-speed serial electrical signal transmitted directly from the computing chip 300 to the optical module 100 via wiring 304 in the PCB board 500.

[0046] In addition, each optical module 100 will convert the second optical signal received from each of at least one optical input port into a second electrical signal and output the second electrical signal. This second electrical signal is also a high-speed serial electrical signal, which is provided to the computing chip 300 through wiring 304 in the PCB board 500, and then converted into multiple parallel signals via the high-speed input port of the computing chip 300 for further calculation or other processing by the computing chip 300.

[0047] For example, the optical module 100 may functionally include an optical emitting unit, an optical receiving unit, and a control unit. The optical emitting unit converts received electrical signals into optical signals, and the optical receiving unit converts received optical signals into electrical signals. The control unit controls the operation of the optical emitting unit and the optical receiving unit. For example, the control unit can control the optical emitting unit to perform electrical-to-optical signal conversion, and control the optical receiving unit to perform optical-to-electrical signal conversion.

[0048] More details about the optical module 100 will be provided later in conjunction with the appendix. Figures 5A-5C Further description is required.

[0049] It should be noted that the input and output signals of each optical module 100 use the proprietary protocol of the computing chip 300. That is, neither the computing chip 300 nor each optical module 100 performs communication protocol conversion processing on their input and output electrical signals.

[0050] In other words, the aforementioned first electrical signal is obtained by parallel-to-serial conversion of an electrical signal conforming to its own protocol, directly obtained from the computational processing of the computing chip 300, and is directly output from the high-speed output port of the computing chip 300. This first electrical signal is then provided to the electrical input port of the optical module 100 through the wiring 304 in the PCB board 500. The computing chip 300 does not need to perform any physical layer and protocol layer (e.g., PCIe protocol, Ethernet protocol, etc.) conversion on the first electrical signal before directly outputting it.

[0051] Similarly, after the optical module 100 receives the first electrical signal at the corresponding electrical input port, it does not perform any physical layer and protocol layer (e.g., PCIe protocol, Ethernet protocol, etc.) conversion on the first electrical signal, but directly performs electro-optical conversion on the first electrical signal, thereby outputting the converted first optical signal in the corresponding optical output port.

[0052] Similarly, after converting the second optical signal received from the optical input port into a second electrical signal, the optical module 100 does not perform any physical layer or protocol layer conversion on the second electrical signal. Instead, it directly outputs the second electrical signal through the electrical output port of the optical module 100. The directly output second electrical signal is transmitted through the wiring 304 in the PCB board 500 and provided to the corresponding high-speed input port of the computing chip 300.

[0053] After receiving the second electrical signal in the corresponding high-speed input port, the computing chip 300 performs no physical layer or protocol layer conversion on the second electrical signal, except for the serial-to-parallel conversion described above.

[0054] In other words, the electrical signals in the optical module 100 (including the input first electrical signal and the output second electrical signal) and the electrical signals input or output by the computing chip 300 (including the output first electrical signal and the input second electrical signal) are both electrical signals of the same computing chip's proprietary protocol. They are not converted at either end by physical interfaces of various standard protocols (e.g., PCIe physical interfaces) or network cards (e.g., Ethernet cards), nor are they subjected to various data encapsulation or conversion operations at either end. That is to say, the signals between the optical module 100 and the computing chip 300 are mutually transparent. Without considering inherent transmission losses or signal distortions, the electrical signals provided and received by both the optical module 100 and the computing chip 300 are identical in terms of bandwidth and transmission rate.

[0055] By transmitting direct and transparent electrical signals based on PCB wiring, the latency required for data transmission between the computing chip 300 and the optical module 100 will be greatly reduced. Furthermore, through proper wiring, the loss and noise of the PCB wiring 304 can be minimized, thereby further ensuring the signal-to-noise ratio requirements of the computing device.

[0056] Meanwhile, due to this direct and transparent transmission of electrical signals, there is no need to configure a traditional re-timer on the optical module 100 to restore the clock, nor is it necessary to configure a traditional analog-to-digital converter (ADC) or digital-to-analog converter (DAC) in the optical module 100 to further convert the input or output electrical signals. Furthermore, because the optical module 100 directly connects the computing chips 300 using the proprietary protocol of the computing chips 300, there is no need to transmit control signals, which greatly simplifies the design of the computing device and the optical module 100.

[0057] Furthermore, since no protocol conversion is introduced, the transmission bandwidth of the computing chip 300 can be flexibly configured by combining the optical switch, and the number of optical modules 100 or the number of signal channels in a single optical module 100 can be adaptively designed according to the transmission bandwidth and number of channels of the computing chip 300. This allows the number of ports or channels in the high-speed input / output interface of the computing chip 300 to match (i.e., be equal to) the number of electrical ports or channels of one or more optical modules 300, thereby achieving a more compact packaging structure.

[0058] For example, in some embodiments, the number of high-speed output ports of the computing chip 300 may be equal to the total number of electrical input ports of one or more optical modules 100, and the number of high-speed input ports of the computing chip 300 may be equal to the total number of electrical output ports of one or more optical modules 100.

[0059] Assume that each high-speed input / output interface of computing chip 300 has 8 high-speed input ports and 8 high-speed output ports. If the total input or output bandwidth of computing chip 300 is 400Gb / s, this means that the computing chip can transmit 400Gbits of data per second. Furthermore, assume that computing chip 300 is configured with a total of 4 high-speed input / output interfaces, and that the 400Gb / s total bandwidth will be evenly distributed among these 4 interfaces.

[0060] In this configuration, the computing chip 300 can be configured with four optical modules 100, each with eight electrical input ports and eight electrical output ports. The electrical input ports of the optical modules 100 are connected one-to-one with the high-speed output ports of the computing chip 300, and the electrical output ports of the optical modules 100 are connected one-to-one with the high-speed input ports of the computing chip 300. Therefore, each optical module 100 can perform electro-optical or optical-electrical conversion on 100Gb / s data.

[0061] Optionally, assuming that each high-speed input / output interface of the computing chip 300 has 4 high-speed input ports and 4 high-speed output ports, and the computing chip 300 is configured with a total of 8 high-speed input / output interfaces, then the total bandwidth of the computing chip will be evenly distributed among these 8 high-speed input / output interfaces. In this case, the computing chip 300 can be configured with 8 optical modules 100, and each optical module has 4 electrical input ports and 4 electrical output ports.

[0062] Optionally, assuming that each high-speed input / output interface of the computing chip 300 has 16 high-speed input ports and 16 high-speed output ports, and the computing chip 300 is configured with a total of 2 high-speed input / output interfaces, then the total bandwidth of the computing chip will be evenly distributed among these 2 high-speed input / output interfaces. In this case, the computing chip 300 can be configured with 2 optical modules 100, and each optical module has 16 electrical input ports and 16 electrical output ports.

[0063] In the example above, the total number of high-speed output ports (8x4) of the computing chip 300 and the total number of electrical input ports (8x4) of the four optical modules 100 are equal and correspond one-to-one. Similarly, the total number of high-speed input ports (8x4) of the computing chip 300 and the total number of electrical output ports (8x4) of the four optical modules 100 are also equal and correspond one-to-one. This allows the number of ports of the optical modules 100 to be adaptively designed to match the number of ports of the computing chip, avoiding the existence of some idle or redundant ports, thereby reducing the overall size of the optical modules.

[0064] It should be noted that the number of high-speed input ports or high-speed output ports of the computing chip 300 mentioned above refers to the number of high-speed ports connected to the optical module 100. This does not mean that the computing chip 300 only includes high-speed input ports or high-speed output ports connected to the optical module 100 and excludes other types of high-speed ports. In actual applications, high-speed input ports or high-speed output ports used for other purposes may also exist in the computing chip 300.

[0065] The above describes an embodiment of a computing device 2000 including a computing chip 300 and one or more optical modules 100.

[0066] In some embodiments, the computing device proposed in this disclosure may also include other elements and components. Figures 3A-3B A schematic diagram of an example configuration of a computing device 3000 according to an embodiment of the present disclosure is shown.

[0067] like Figure 3A Or as shown in 3B, except Figure 2A-2B In addition to the computing chip 300 and one or more optical modules 100 shown, the computing device 3000 also includes at least one high-bandwidth memory (HBM) unit 302. For example, the HBM unit can cooperate with the computing chip 300 to perform various caching or storage functions.

[0068] In some embodiments, a plurality of HBM units 302 may be arranged together with the computing chip 300 on the substrate 400. Optionally, the plurality of HBM units are arranged on the substrate 400 and located on both sides of the computing chip 300.

[0069] Alternatively, multiple HBM units 302 and computing chip 300 can be packaged on substrate 400 through interposer 303, and substrate 400 is arranged on PCB board 500, such as... Figure 3B As shown.

[0070] Intermediate layer 303 can be an adapter board with various wiring and conductive structures, which can provide electrical connection paths between multiple HBM units 302 arranged on it and computing chip 300.

[0071] Other details of the computing device 3000 and Figure 2A-2B The computing device in the 2000 is similar, and will not be described in detail here.

[0072] Based on the various computing devices described above, this disclosure also proposes a computing system that includes various computing devices.

[0073] Since the optical signal obtained by the electro-optical conversion of the onboard direct-drive optical module in the various computing devices described above can be directly connected to the onboard direct-drive optical module of another computing device through optical fiber transmission, or can be connected to the onboard direct-drive optical module of another computing device through the optical switch port, the optical path reconstruction between different computing devices can be easily realized.

[0074] In this reconfigurable optical path configuration, high-speed electrical signals on a computing chip in one computing device can reach computing chips in other computing devices with minimal latency, since no electrical switches are used.

[0075] Based on this configuration, multiple computing devices can be interconnected via a series of onboard direct-drive optical modules and a series of optical switches, achieving fully optically switched and reconfigurable interconnection, thus avoiding... Figure 1 The point-to-point interconnect based on PBC cabling shown reduces transmission bandwidth and can be used to accelerate artificial intelligence computing.

[0076] Furthermore, since onboard direct-drive optical modules and optical switches both have the advantages of protocol transparency and low latency, fully reconfigurable interconnections between computing devices can achieve the goals of long distance, high bandwidth, and low latency.

[0077] Figures 4A-4C A schematic diagram of an example configuration of a computing system 4000 according to an embodiment of the present disclosure is shown.

[0078] like Figures 4A-4C As shown, the computing system 4000 includes a plurality of computing devices (1000-1, 1000-2, 1000-3, ..., 1000-N) as described above and at least one optical switch 600.

[0079] At least one optical switch 600 can control the optical path based on different physical principles, including piezoelectric, microelectromechanical, and electro-optical. For example, each optical switch 600 can be composed of a series of free-space optical components or a series of integrated optical components.

[0080] As shown in the figure, each computing device (1000-1, 1000-2, 1000-3, ..., or 1000-N) is optically interconnected with at least a portion of the optical switches in at least one optical switch 600 via a corresponding optical module 100 in each computing device (e.g., via optical fiber 200).

[0081] In this configuration, at least some of the computing devices can be optically interconnected via corresponding optical switches.

[0082] In some embodiments, at least one optical switch 600 can reconfigure the optical links between multiple computing devices (1000-1, 1000-2, 1000-3, ..., 1000-N) to enable communication between any two computing devices.

[0083] For example, as shown in the figure, each computing device (1000-1, 1000-2, 1000-3, ..., 1000-N) can rearrange the bandwidth transmission path through optical path switching in the optical switch 600 to achieve fully reconfigurable interconnection between each other.

[0084] Assume that the computing system 4000 includes eight computing devices (i.e., N=8), and each computing device is equipped with four high-speed interfaces, such as four optical input / output interfaces of optical modules. In this case, the eight computing devices can be optically reconfigured through one or more (four in this example) optical switches 600, and the data output from the four high-speed interfaces of each computing device can be orchestrated through the corresponding optical switches so that all the data output from the four high-speed interfaces is transmitted to the target computing device. Alternatively, each computing device can receive all the output data from the target computing device. Therefore, the transmission bandwidth of each computing device in this architecture can be 100% of the I / O bandwidth of the computing chip 300 in that computing device.

[0085] For example, Figure 4B A schematic diagram showing a full interconnection between the first computing device 1000-1 and the second computing device 1000-2 is shown.

[0086] As shown in the figure, each computing device includes a computing chip 300 and four corresponding optical modules 100. At least one optical switch 600 can establish an optical link between a first optical module in the first computing device 1000-1 and a first optical module in the second computing device 1000-2; a second optical switch can establish an optical link between a second optical module in the first computing device 1000-1 and a second optical module in the second computing device 1000-2; a third optical switch can establish an optical link between a third optical module in the first computing device 1000-1 and a third optical module in the second computing device 1000-2; and a fourth optical switch can establish an optical link between a fourth optical module in the first computing device 1000-1 and a fourth optical module in the second computing device 1000-2. The reconstructed optical links between the various optical modules are indicated by black dashed arrows in the figure. For example, establishing an optical link can be achieved by changing the arrangement of optical elements within each optical switch (e.g., changing the angle of the reflectors).

[0087] In this case, an optical link is established between the optical input / output interfaces of all optical modules in the first computing device 1000-1 and the optical input / output interfaces of all optical modules in the second computing device 1000-2, enabling the first computing device 1000-1 to communicate with the second computing device 1000-2.

[0088] Assuming the total input / output bandwidth of the computing chips 300 in the first computing device 1000-1 and the second computing device 1000-2 is 400Gb / s, then each optical module 100 can be allocated 100Gb / s of data bandwidth through the above configuration. When an optical link is established between the optical input / output interfaces of all optical modules in the first computing device 1000-1 and the optical input / output interfaces of all optical modules in the second computing device 1000-2, enabling the first computing device 1000-1 to communicate with the second computing device 1000-2, the total communication bandwidth between the first computing device 1000-1 and the second computing device 1000-2 will be 400Gb / s, which is 100% of the I / O bandwidth of the computing chips 300 in the computing devices.

[0089] As mentioned earlier, Figure 1 In the case shown where the eight computing devices are fully interconnected using PCB wiring, each computing device is equipped with seven high-speed interfaces. The bandwidth of each high-speed interface is 1 / 7 of the I / O bandwidth of the computing chip 300 of the computing device. In other words, the bandwidth transmitted from the first computing device to any other computing device is 1 / 7 of the I / O bandwidth of the computing chip 300.

[0090] In contrast, the optical interconnect solution proposed in this disclosure can achieve 100% of the bandwidth of the computing chip’s 300 I / O bandwidth for the transmission from the first computing device to any other computing device.

[0091] Figure 4B This is an example of a full interconnection between the first computing device 1000-1 and the second computing device 1000-2 to achieve 100% bandwidth communication. In some other examples, a full interconnection is not necessary between the first computing device 1000-1 and the second computing device 1000-2; instead, a partial interconnection can be achieved, thus enabling more flexible bandwidth configuration.

[0092] For example, Figure 4C A schematic diagram showing a partial interconnection between the first computing device 1000-1 and the second computing device 1000-2 is shown.

[0093] As shown in the figure, with Figure 4A Similarly, each computing device includes a computing chip 300 and four corresponding optical modules 100. At least one optical switch 600 establishes an optical link between a first optical module in the first computing device 1000-1 and a first optical module in the second computing device 1000-2, and a second optical switch establishes an optical link between a second optical module in the first computing device 1000-1 and a second optical module in the second computing device 1000-2, as shown by the black dashed arrow.

[0094] and Figure 4B The difference is that, in Figure 4C In this configuration, the third optical switch establishes an optical link between the third optical module in the first computing device 1000-1 and the third optical module in the third computing device 1000-3, instead of establishing an optical link between the third optical module in the first computing device 1000-1 and the third optical module in the second computing device 1000-2. Similarly, the fourth optical switch establishes an optical link between the fourth optical module in the first computing device 1000-1 and the fourth optical module in the third computing device 1000-3, instead of establishing an optical link between the fourth optical module in the first computing device 1000-1 and the fourth optical module in the second computing device 1000-2.

[0095] In this way, the first computing device 1000-1 and the second computing device 1000-2 can communicate using only a portion of the bandwidth, for example, the portion of the bandwidth allocated to the first and second optical modules, which, for example, accounts for 50% of the I / O bandwidth of the computing chip 300. Simultaneously, the first computing device 1000-1 and the third computing device 1000-3 can communicate using the remaining portion of the bandwidth, for example, the portion of the bandwidth allocated to the third and fourth optical modules, also 50% of the I / O bandwidth of the computing chip 300.

[0096] This flexible reconfiguration method allows the first computing device 1000-1 to communicate simultaneously with the second computing device 1000-2 and the third computing device 1000-3, increasing the flexibility and freedom of the computing system.

[0097] It should be noted that, Figures 4A-4C Although it shows the same as Figures 3A-3B The computing device 3000 is similar to this, but this is merely an example. Figure 2A-2B The computing device 2000 and its various variants described herein are also applicable to Figures 4A-4C The aforementioned computing system.

[0098] Furthermore, the number of optical modules in the computing device, the number of computing devices in the computing system, and the number of optical switches in the computing system shown in the above examples are merely exemplary and not limiting.

[0099] Figures 4A-4C In the computing system, computing chips are interconnected through the aforementioned optical modules and optical switches, breaking through the distance limitations of PCB trace interconnection and the number limitations of computing chips, allowing the interconnected computing chips in the computing system to be arbitrarily configured as needed.

[0100] The optical module disclosed herein can directly convert electrical signals output by a computing chip into optical signals, and can also directly transmit the converted electrical signals to the computing chip without protocol conversion, greatly reducing system latency. Since the entire process—from the electrical signal processed by the computing chip to the optical module for electro-optical conversion, then to another optical module for photoelectric conversion, and finally to another computing chip for signal processing—does not require protocol conversion, no control signal transmission is needed during point-to-point communication between different computing chips, greatly simplifying the design of the computing system.

[0101] Those skilled in the art can readily conceive of other similar arrangements without departing from the design concept of this disclosure. For example, more (e.g., 5, 6 or more) or fewer (e.g., 1, 2 or 3) optical modules can be arranged in a computing device, and more (e.g., 9, 10 or more) or fewer (e.g., 7, 6 or fewer) computing devices or optical switches can be arranged in a computing system.

[0102] The following will be combined with the appendix Figures 5A to 5C An embodiment of the optical module 100 used in the computing device or computing system described above is described.

[0103] Figure 5A A schematic diagram of the overall configuration of an optical module 100 according to an embodiment of the present disclosure is shown.

[0104] like Figure 5A As shown, the optical module 100 functionally includes an electrical input / output interface (EI / O), an optical input / output interface (OI / O), an optical transmitting unit 101, an optical receiving unit 102, and a control unit 103.

[0105] The optical emitting unit 101, also known as the TX unit, is used to convert the input electrical signal 110 received from the electrical input / output interface EI / O into the output optical signal 120, that is, to perform electro-optical conversion (also known as EO conversion).

[0106] The optical receiving unit 102, also known as the RX unit, is used to convert the input optical signal 210 received from the optical input / output interface OI / O into the output electrical signal 220, i.e., optical-to-electrical conversion (also known as OE conversion).

[0107] The control unit 103 can be any type of controller or microcontroller, used to control the optical emitting unit 101 to perform E0 conversion from the input electrical signal 110 to the output optical signal 120. Similarly, the control unit 103 can also control the optical receiving unit 102 to perform OE conversion from the input optical signal 210 to the output electrical signal 220.

[0108] As mentioned above, the optical module proposed in this disclosure does not perform communication protocol conversion processing on the input electrical signals and the output electrical signals.

[0109] In other words, after the optical module 100 receives the input electrical signal 110 at the electrical input / output interface EI / O, it does not perform any physical layer or protocol layer conversion on the input electrical signal 110, but directly performs electro-optical conversion on the input electrical signal 110, thereby outputting the converted output optical signal 120 in the corresponding optical input / output interface OI / O.

[0110] Similarly, after converting the input optical signal 210 received from the optical input / output interface OI / O into the output electrical signal 220, the optical module 100 does not perform any physical layer or protocol layer conversion on the output electrical signal 220, but directly outputs it through the electrical input / output interface EI / O of the optical module 100.

[0111] For example, the optical module 100 does not include any physical interface of standard protocols (e.g., PCIe physical interface), nor does it perform various protocol layer data encapsulation / decapsulation, conversion, or other operations on the input electrical signal 110 or the output electrical signal 220. Instead, it only performs electro-optical conversion or optical-electrical conversion on the signal.

[0112] In some embodiments, in the direction of EO conversion, the input electrical signal 110 can be an electrical signal from an external device, using the external device's own protocol without protocol conversion. For example, it can be an electrical signal from any external device such as a computing device, storage device, or communication device. Furthermore, the electrical signal 220 output from the optical module 100 can be provided to the same external device.

[0113] As described above, converting the received input electrical signal 110 into an output optical signal 120 actually means that the information carried on the input electrical signal 110 is modulated and loaded onto the output optical signal 120.

[0114] Accordingly, in the direction of OE conversion, the input optical signal 210 can also be an optical signal from an external device. Furthermore, the optical signal 120 output from the optical module 100 can also be provided to the same external device.

[0115] This external device can, for example, provide an input optical signal 210 to the optical module 100 via optical fiber, and the input optical signal 210 can carry specific information (e.g., "information A"). That is, the input optical signal 210 can carry "information A" using some modulation technique. The optical receiving unit 102 in the optical module 100 performs OE conversion on this optical signal carrying "information A" to obtain an electrical signal carrying the same "information A". This output electrical signal can then be provided to the external device described above, such as the computing chip mentioned earlier.

[0116] The following will combine Figures 5B to 5C Some examples of the internal configuration of the optical module that does not perform communication protocol conversion as described in this disclosure are presented.

[0117] Figure 5B A structural diagram of an example optical module 100 according to an embodiment of the present disclosure is shown. It should be noted that... Figure 5B The optical module 100 shown can be considered as Figure 5A A more detailed embodiment of the optical module 100 shown.

[0118] For example, such as Figure 5A The light emitting unit 101 shown may include, for example, Figure 5B The light transmitter 101A and driver 101-2 are shown. The driver 101-2 is used to drive the light transmitter 101A to emit an optical signal as an output optical signal 120.

[0119] In addition, such as Figure 5A The light receiving unit 102 shown may include, for example, Figure 5BThe photodetector 102-1 and amplifier 102-2 are shown. The photodetector 102-1 can convert the detected input optical signal 210 into an electrical signal, and the amplifier 102-2 can amplify the converted electrical signal and then output the amplified electrical signal as the output electrical signal 220.

[0120] Figure 5B The optical emitter 101A shown is a "directly modulated" optical emitter, for example, it can be a directly modulated vertical surface cavity laser (VCSEL) or a distributed feedback (DFB) laser.

[0121] The term "direct modulation" refers to the control unit 103's ability to control the electrical signal provided by the driver 101-2 to the optical transmitter 101A based on the input electrical signal 110, thereby controlling the intensity of the optical signal emitted by the optical transmitter 101A without using other modulators to load or modulate the information in the electrical signal into the emitted optical signal.

[0122] For example, the control unit 103 can directly control the magnitude of the current provided by the driver 101-2 according to the amplitude of the logic levels "1" and "0" of the input electrical signal 110, so that the intensity of the light emitted by the light emitter 101A can be linearly or substantially linearly related to the amplitude of the input current.

[0123] Optionally, the optical transmitter in the optical module disclosed herein can also be an "externally modulated" optical transmitter. As the name suggests, an "externally modulated" optical transmitter refers to an optical transmitter that cannot modulate light itself, but needs to rely on external equipment to modulate the light.

[0124] Figure 5C A schematic diagram of another example of an optical module 100 according to an embodiment of the present disclosure is shown. Figure 5C In this context, the optical emitter 101B is, for example, an externally modulated laser, and in addition to the driver 101-2 and the optical emitter 101B, such as Figure 5A The light emitting unit 101 shown also needs to include a modulator 101-3.

[0125] In this state, the light emitter 101B will be in a stable light-emitting state and emit light of consistent intensity. The light emitted by the light emitter 101B will be provided to the modulator 101-3. The control unit 103 can control the electrical signal input to the modulator 101-3 through the driver 101-2, thereby modulating the amplitude, phase, and other characteristics of the light received from the light emitter 101B, so as to modulate the information carried in the input electrical signal 110 onto the light to form the output optical signal 120.

[0126] Typical examples of modulators 101-3 include integrated photonic modulators based on silicon, indium phosphide, thin-film lithium niobate, or polymers, and their structures can be micro-ring modulators, Mach-Zehnder modulators, or electroabsorption modulators.

[0127] For example, when the modulator 101-3 is an electroabsorption modulator, the control unit 103 can control the switch of the modulator 101-3 to absorb or not absorb light through the driver 101-2, thereby absorbing the light emitted by the light emitter 101B (e.g., corresponding to output logic "0") or not absorbing the light emitted by the light emitter 101B (e.g., corresponding to output logic "1"). In this way, the intensity and phase of the final output light can be controlled, so that information can be modulated or loaded onto the output optical signal 120.

[0128] It should be noted that the modulation format of the logic levels "1" and "0" of the input electrical signal 110 mentioned above is merely exemplary and not a limitation. In practice, the input electrical signal 110 can have any suitable modulation format.

[0129] also, Figures 5B-5C The driver 101-2, photodetector 102-1, and amplifier 102-2 shown can be implemented using any suitable components in the art.

[0130] For example, the driver 101-2 can be implemented using a circuit composed of various electronic components such as transistors, resistors, and capacitors. For example, the photodetector 102-1 can be various types of photodiodes with different sensitivities, such as photomultiplier tubes (PMTs), avalanche photodiodes (APDs), and silicon photomultiplier tubes (SiPMs). Furthermore, the amplifier 102-2 can be a conventional transimpedance amplifier (TIA), or various types of amplifiers based on similar or other principles, which will not be discussed in detail here.

[0131] Furthermore, it should be noted that the optical module proposed in this disclosure that does not perform communication protocol conversion does not include traditional timers, traditional analog-to-digital converters (ADCs), or digital-to-analog converters (DACs). This is because the optical module proposed in this disclosure only performs transparent electro-optical conversion on the input electrical signal and only transparent optical-electrical conversion on the input optical signal. "Transparent" means that no clock recovery processing is required before or after the conversion, nor is digital-to-analog or analog-to-digital conversion required. In other words, the input and output signals differ only in form (electrical signal form or optical signal form), without requiring any other conversion processing to adapt to the target protocol or format.

[0132] The optical module 100 disclosed herein does not include a processing channel for low-speed sideband control signals; that is, it only provides a conversion channel for high-speed data signals, without including a conversion channel corresponding to low-speed sideband control signals. This greatly simplifies the design of the optical module 100.

[0133] The above is about Figures 2A to 4C The various features of the optical module 100 described in the computing device and computing system also apply to the computing device and computing system described in the text. Figures 5A to 5C The optical module in the middle.

[0134] In the foregoing description, embodiments of the present disclosure have been described in conjunction with the accompanying drawings. It should be understood that the above embodiments are merely illustrative, and those skilled in the art should understand that the combination of constituent elements and processes of the present embodiments can be modified in various ways, and such modifications also fall within the scope of the present disclosure.

Claims

1. A computing device, comprising: PCB board; A computing chip is arranged on the PCB board. The computing chip includes one or more high-speed input / output interfaces, wherein each high-speed input / output interface has one or more high-speed input ports and one or more high-speed output ports. Each high-speed output port performs parallel-to-serial conversion on parallel signals within the computing chip to output a first electrical signal, and each high-speed input port performs serial-to-parallel conversion on a received second electrical signal, which is a high-speed serial signal. as well as One or more optical modules are arranged on the PCB board. Each optical module includes an electrical input / output interface and an optical input / output interface. The electrical input / output interface includes at least one electrical input port and at least one electrical output port. The optical input / output interface includes at least one optical input port and at least one optical output port. Each of the at least one electrical input port is electrically connected to a corresponding one of the one or more high-speed output ports via wiring on the PCB board. Each of the at least one electrical output port is electrically connected to a corresponding one of the one or more high-speed input ports via wiring on the PCB board. Each optical module converts the first electrical signal received from each of the at least one electrical input port into a first optical signal output from one of the at least one optical output port, and converts the second optical signal received from each of the at least one optical input port into a second electrical signal and outputs the second electrical signal. The computing chip and each optical module do not perform physical layer and protocol layer conversion on the first electrical signal and the second electrical signal, and the first electrical signal and the second electrical signal adopt the proprietary protocol of the computing chip.

2. The computing device as claimed in claim 1, wherein, The number of high-speed output ports of the computing chip is equal to the total number of electrical input ports of the one or more optical modules, and the number of high-speed input ports of the computing chip is equal to the total number of electrical output ports of the one or more optical modules.

3. The computing device of claim 1 or 2 further includes at least one high-bandwidth memory (HBM) unit, wherein the at least one HBM unit and the computing chip are packaged on a substrate, and the substrate is disposed on the PCB board.

4. The computing device as claimed in claim 3, wherein, The at least one HBM unit and the computing chip are encapsulated on the substrate through an interlayer.

5. The computing device as claimed in claim 1, wherein, The computing chip is an artificial intelligence chip.

6. A computing system, comprising: Multiple computing devices as described in any one of claims 1 to 5; as well as At least one optical switch. Each computing device is optically interconnected with at least a portion of the optical switches in the at least one optical switch via a corresponding optical module in each computing device; and At least some of the computing devices are optically interconnected via the at least one optical switch.

7. The computing system of claim 6, wherein, The at least one optical switch can reconstruct the optical link between the plurality of computing devices, enabling communication between any two computing devices among the plurality of computing devices.

8. The computing system as described in claim 6 or 7, wherein, The at least one optical switch can establish an optical link between all optical modules in the first computing device and the optical modules in the second computing device, enabling the first computing device and the second computing device to communicate.

9. The computing system as claimed in claim 6 or 7, wherein, The at least one optical switch can establish optical links between some optical modules in the first computing device and optical modules in the second computing device, and establish optical links between the remaining optical modules in the first computing device and optical modules in the third computing device, so that the first computing device can communicate with the second computing device and the third computing device simultaneously.

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