Clock synchronization method and device of switch, electronic equipment and storage medium

Abstract

The invention provides a clock synchronization method and device of a switch, electronic equipment and a storage medium, and the method comprises the steps: obtaining a synchronization state of a to-be-synchronized port, and transmitting a first center message and a first supplementary message to the to-be-synchronized port under the condition that the synchronization state is a passive synchronization state; calculating the actual sending time of the first central message according to the original sending time and the first time correction value; recording first receiving time when the to-be-synchronized port receives the first central message; and adjusting a first local clock of the to-be-synchronized port according to the first receiving time and the actual sending time. According to the invention, on one hand, the original sending time is adjusted through the time correction value carried by the first supplementary message to improve the precision of time synchronization, and on the other hand, the time deviation value is calculated according to the first receiving time and the actual sending time of the first central message to adjust the local clock. Therefore, the equipment supporting the PTP and the equipment supporting the gPTP realize high-precision clock synchronization through the switch.

Description

Technical Field

[0001] The present invention relates to the technical field of clock synchronization, and in particular to a clock synchronization method, device, electronic equipment and storage medium for a switch. Background Art

[0002] In the fields of automotive and industrial automation, PTP (Precision Time Protocol) and gPTP (Generalized Precision Time Protocol) are two protocols used for high-precision time synchronization. There are differences in many aspects between devices that support the PTP protocol and devices that support the gPTP protocol.

[0003] For example, PTP devices support layer 2 (data link layer), layer 3 (network layer) and layer 4 (transport layer) message communication, which means that PTP devices can perform time synchronization on different network layers; while gPTP devices only support layer 2 (data link layer) message communication, which means that gPTP devices can only perform time synchronization on data link layers such as Ethernet. PTP devices support peer-to-peer (P2P, point-to-point) delay measurement mechanism and end-to-end (E2E, end-to-end) delay measurement mechanism, which means that it can measure the delay between two devices directly, and can also measure the total delay from the source device to the target device, including the delay of the intermediate devices; while gPTP devices only support peer-to-peer delay measurement mechanism, which means that it can only measure the delay between two devices directly, and cannot measure the delay through the intermediate devices. PTP devices support OC (Ordinary Clock), BC (Boundary Clock), E2ETC (End to End Transparent Clock) and P2PTC (Peer to Peer Transparent Clock), etc.; while gPTP devices only support PTP End Instances (Precision Time Protocol End Instances) and PTP Relay Instances (Precision Time Protocol Relay Instances), which means that it can only perform basic end-to-end time synchronization and cannot perform more complex time synchronization mechanisms. In other words, the existing technology cannot solve the problem of high-precision time synchronization between devices that only support gPTP and PTP. Summary of the invention

[0004] In view of this, the present invention aims to propose a clock synchronization method, device, electronic device and storage medium for a switch to solve the current problem that it is difficult to perform high-precision time synchronization between devices that only support gPTP and PTP.

[0005] According to a first aspect of the present invention, a clock synchronization method for a switch is provided, the switch comprising a port to be synchronized, the method comprising:

[0006] Acquire the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, send a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries an original sending time of the first central message and a first time correction value for the original sending time;

[0007] Calculate the actual sending time of the first center message according to the original sending time and the first time correction value;

[0008] Recording a first receiving time when the port to be synchronized receives the first center message;

[0009] A first local clock of the port to be synchronized is adjusted according to the first receiving time and the actual sending time.

[0010] Optionally, the port to be synchronized is configured with a clock synchronization parameter, the port to be synchronized includes at least a first port and a second port, the first port is a port to be synchronized that supports a first clock synchronization protocol, and the second port is a port to be synchronized that supports a second clock synchronization protocol. Before acquiring the synchronization state of the port to be synchronized, the method includes:

[0011] Determining whether the first clock synchronization protocol and the second clock synchronization protocol are the same type of protocol according to the clock synchronization parameter;

[0012] In response to the first clock synchronization protocol and the second clock synchronization protocol being two types of protocols, the synchronization mode of the port to be synchronized is adjusted to a boundary clock mode.

[0013] Optionally, the calculating the actual sending time of the first center message according to the original sending time and the first time correction value includes:

[0014] Parsing the first supplementary message according to the configuration level of the port to be synchronized to obtain an original sending time of the first central message, a first time correction value for the original sending time, and a frequency deviation value;

[0015] The sum of the original sending time and the first time correction value is calculated, and the sum is determined as the actual sending time of the first central message.

[0016] Optionally, adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time includes:

[0017] Sending a delay measurement request message to the port to be synchronized, and receiving a response message from the port to be synchronized to the delay measurement request message, wherein the delay measurement request message carries a first timestamp, which is used to indicate the sending time of the delay measurement request message, and the response message carries a second timestamp, which is used to indicate the receiving time of the response message;

[0018] Calculate the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time and the first receiving time;

[0019] Calculating a difference between the first receiving time, the actual sending time, and the link delay value, and determining the difference as a clock deviation value of the port to be synchronized;

[0020] The first local clock of the port to be synchronized is adjusted according to the clock deviation value.

[0021] Optionally, the calculating the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time, and the first receiving time includes:

[0022] Calculate the difference between the second timestamp and the original sending time to obtain first time data;

[0023] Calculating the difference between the actual sending time and the first receiving time to obtain second time data;

[0024] The difference between the first time data and the second time data is calculated to obtain a link delay value.

[0025] Optionally, the synchronization state further includes an active synchronization state, and after adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time, the method further includes:

[0026] Controlling the port to be synchronized in the passive synchronization state to send a second central message and a second supplementary message to the port to be synchronized in the active synchronization state, wherein the port to be synchronized in the active synchronization state is configured with a second local clock;

[0027] Recording a second sending time when the to-be-synchronized port in the passive synchronization state sends the second center message to the to-be-synchronized port in the active synchronization state, and a second receiving time when the to-be-synchronized port in the active synchronization state receives the second center message;

[0028] Calculate the residence time of the second center message according to the second sending time and the second receiving time;

[0029] The dwell time, the frequency deviation value and the second local clock are multiplied to obtain a second time correction value for the port to be synchronized in the active synchronization state;

[0030] The second local clock is adjusted using the second time correction value.

[0031] Optionally, the switch further includes a third port, and the method further includes:

[0032] encapsulating the second central message and the second supplementary message according to the configuration level of the port to be synchronized in the active synchronization state to obtain a third central message and a third supplementary message;

[0033] The port to be synchronized in the active synchronization state is controlled to send the third central message and the third supplementary message to the third port, wherein the synchronization state of the third port is a passive synchronization state.

[0034] According to another aspect of the present invention, there is also provided a clock synchronization device for a switch, wherein the switch comprises a port to be synchronized, and the device comprises:

[0035] A first message sending module, used for acquiring the synchronization state of the port to be synchronized, and sending a first central message and a first supplementary message to the port to be synchronized when the synchronization state is a passive synchronization state, wherein the first supplementary message carries an original sending time of the first central message and a first time correction value for the original sending time;

[0036] A first time calculation module, configured to calculate an actual sending time of the first center message according to the original sending time and the first time correction value;

[0037] A first time recording module, used for recording a first receiving time when the port to be synchronized receives the first center message;

[0038] A local clock adjustment module is used to adjust a first local clock of the port to be synchronized according to the first receiving time and the actual sending time.

[0039] Optionally, the port to be synchronized is configured with a clock synchronization parameter, the port to be synchronized includes at least a first port and a second port, the first port is a port to be synchronized that supports a first clock synchronization protocol, and the second port is a port to be synchronized that supports a second clock synchronization protocol. Before the first message sending module, the device includes:

[0040] A first judgment module, used for judging whether the first clock synchronization protocol and the second clock synchronization protocol are the same type of protocol according to the clock synchronization parameter;

[0041] The mode adjustment module is used to adjust the synchronization mode of the port to be synchronized to a boundary clock mode in response to the first clock synchronization protocol and the second clock synchronization protocol being two types of protocols.

[0042] Optionally, the first time calculation module includes:

[0043] a message parsing module, configured to parse the first supplementary message according to the configuration level of the port to be synchronized, to obtain an original sending time of the first central message, a first time correction value for the original sending time, and a frequency deviation value;

[0044] The first time calculation submodule is used to calculate the sum of the original sending time and the first time correction value, and determine the sum as the actual sending time of the first central message.

[0045] Optionally, the local clock adjustment module includes:

[0046] A second message sending module, used to send a delay measurement request message to the port to be synchronized, and receive a response message from the port to be synchronized to the delay measurement request message, wherein the delay measurement request message carries a first timestamp, and the first timestamp is used to indicate the sending time of the delay measurement request message, and the response message carries a second timestamp, and the second timestamp is used to indicate the receiving time of the response message;

[0047] A link delay value calculation module, configured to calculate the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time and the first receiving time;

[0048] A clock deviation value calculation module, used to calculate the difference between the first receiving time, the actual sending time and the link delay value, and determine the difference as the clock deviation value of the port to be synchronized;

[0049] The first local clock adjustment module is used to adjust the first local clock of the port to be synchronized according to the clock deviation value.

[0050] Optionally, the link delay value calculation module includes:

[0051] A first time data generating module, used for calculating the difference between the second timestamp and the original sending time to obtain first time data;

[0052] A second time data generating module, used for calculating the difference between the actual sending time and the first receiving time to obtain second time data;

[0053] The link delay value calculation submodule is used to calculate the difference between the first time data and the second time data to obtain a link delay value.

[0054] Optionally, the synchronization state further includes an active synchronization state, and the local clock adjustment module further includes:

[0055] A third message sending module, used for controlling the port to be synchronized in the passive synchronization state to send a second central message and a second supplementary message to the port to be synchronized in the active synchronization state, wherein the port to be synchronized in the active synchronization state is configured with a second local clock;

[0056] Recording a second sending time when the to-be-synchronized port in the passive synchronization state sends the second center message to the to-be-synchronized port in the active synchronization state, and a second receiving time when the to-be-synchronized port in the active synchronization state receives the second center message;

[0057] A second time recording module, used for calculating the residence time of the second center message according to the second sending time and the second receiving time;

[0058] A second time correction value calculation module, configured to multiply the residence time, the frequency deviation value and the second local clock to obtain a second time correction value for the port to be synchronized in the active synchronization state;

[0059] The second local clock adjustment module is used to adjust the second local clock using the second time correction value.

[0060] Optionally, the switch further includes a third port, and the local clock adjustment module further includes:

[0061] A message encapsulation module, used for encapsulating the second central message and the second supplementary message according to the configuration level of the port to be synchronized in the active synchronization state to obtain a third central message and a third supplementary message;

[0062] The port to be synchronized in the active synchronization state is controlled to send the third central message and the third supplementary message to the third port, wherein the synchronization state of the third port is a passive synchronization state.

[0063] According to another aspect of the present invention, there is also provided an electronic device, comprising:

[0064] processor;

[0065] a memory for storing instructions executable by the processor;

[0066] The processor is configured to execute the instructions to implement the clock synchronization method of the switch as described above.

[0067] According to another aspect of the present invention, a readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the clock synchronization method of the switch described above are implemented.

[0068] The clock synchronization method of the switch provided by the present invention obtains the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, sends a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries the original sending time of the first central message and the first time correction value for the original sending time; the actual sending time of the first central message is calculated based on the original sending time and the first time correction value; the first receiving time when the port to be synchronized receives the first central message is recorded; and the first local clock of the port to be synchronized is adjusted based on the first receiving time and the actual sending time. On the one hand, the present invention adjusts the original sending time through the time correction value carried by the first supplementary message to improve the accuracy of time synchronization, and on the other hand, the local clock is adjusted by calculating the time deviation value based on the receiving time and the actual sending time of the first central message, so that devices supporting PTP and devices supporting gPTP can achieve high-precision clock synchronization through the switch.

[0069] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0071] Figure 1 It is a flow chart of the steps of a clock synchronization method of a switch provided by an embodiment of the present invention;

[0072] Figure 2 It is a structural schematic diagram of a clock synchronization device of a switch provided by an embodiment of the present invention;

[0073] Figure 3 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0074] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. However, it can be understood by those skilled in the art that in the embodiments of the present invention, many technical details are proposed in order to enable readers to better understand the present invention. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present invention can also be implemented. The division of the following embodiments is for the convenience of description and should not constitute any limitation on the specific implementation of the present invention. The various embodiments can be combined and referenced with each other without contradiction.

[0075] The switch communicates with the time master node (Master) and the time slave node (Slave) through the PTP protocol / gPTP protocol to ensure that each device in the network has a consistent time reference. When all ports of the switch in a domain are configured with the gPTP protocol or the PTP protocol, they belong to the same type of protocol and perform the same type of synchronization process, that is, they all perform gPTP clock synchronization, or they all perform PTP clock synchronization. However, when the switch is configured with both gPTP and PTP protocols on the ports in a domain, hybrid clock synchronization is required.

[0076] In an embodiment of the present invention, first, clock synchronization parameters are configured for the port to be synchronized in the login interface of the switch, the port to be synchronized includes at least a first port and a second port, the first port is a port to be synchronized that supports a first clock synchronization protocol, and the second port is a port to be synchronized that supports a second clock synchronization protocol. The first clock synchronization protocol can be a PTP protocol or a gPTP protocol, and the second clock synchronization protocol can be a PTP protocol or a gPTP protocol. Therefore, before performing clock synchronization, it is necessary to determine the synchronization process by determining whether the first clock synchronization protocol and the second clock synchronization protocol are the same protocol. When the first clock synchronization protocol and the second clock synchronization protocol are the same protocol, the clock synchronization corresponding to the protocol is executed, that is, if the first clock synchronization protocol and the second clock synchronization protocol are both PTP protocols, PTP clock synchronization is executed, if the first clock synchronization protocol and the second clock synchronization protocol are both gPTP protocols, gPTP clock synchronization is executed, and when the first clock synchronization protocol and the second clock synchronization protocol are not the same protocol, mixed clock synchronization is executed.

[0077] Reference Figure 1 , shows a flow chart of the steps of the clock synchronization method of the switch provided by an embodiment of the present invention, the switch includes a port to be synchronized, and the specific steps of performing hybrid clock synchronization are as follows:

[0078] It is determined whether the first clock synchronization protocol and the second clock synchronization protocol are the same type of protocol according to the clock synchronization parameter.

[0079] In response to the first clock synchronization protocol and the second clock synchronization protocol being two types of protocols, the synchronization mode of the port to be synchronized is adjusted to a boundary clock mode.

[0080] Step 101, obtain the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, send a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries the original sending time of the first central message and a first time correction value for the original sending time.

[0081] First, the synchronization state of the port to be synchronized is obtained. Since there are several ports to be synchronized in the switch, after the synchronization mode of the port to be synchronized of the switch is adjusted to the boundary clock, only one port to be synchronized in the switch is in the passive synchronization state, and the other ports to be synchronized are active synchronization ports. After determining the port to be synchronized in the passive synchronization state, a first central message (i.e., a sync message) and a first supplementary message (i.e., a follow up message) are sent to the port to be synchronized in the passive synchronization state, wherein the first supplementary message carries the original sending time of the first central message and a first time correction value for the original sending time.

[0082] Step 102: Calculate the actual sending time of the first center message according to the original sending time and the first time correction value.

[0083] Since the switch has not completed time synchronization at this time, the original message time of the first center message is not necessarily the actual sending time of the first center message, and there may be a time difference between the two. Therefore, the actual sending time of the first center message can be calculated by the first time correction value carried in the first supplementary message. The specific process is as follows:

[0084] The first supplementary message is parsed according to the configuration level of the port to be synchronized to obtain the original sending time of the first central message, the first time correction value for the original sending time, and the frequency deviation value. When the protocol supported by the port to be synchronized at this time is the PTP protocol, since there may be multiple levels of configuration in the PTP network, different configuration levels require different message parsing methods, so it is necessary to parse the first supplementary message according to the configuration level of the port to be synchronized to ensure the accuracy and reliability of time synchronization.

[0085] First, the configuration level information of the port to be synchronized is obtained, and according to the configuration level of the port to be synchronized, the header information of the first supplementary message is parsed to obtain data such as the original sending time, the first time correction value time, and the frequency deviation value. Then, the sum of the original sending time and the first time correction value is calculated, and the sum is determined as the actual sending time of the first central message.

[0086] Step 103, recording a first receiving time when the port to be synchronized receives the first central message.

[0087] Step 104, adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time. Specifically, the steps include:

[0088] A delay measurement request message is sent to the port to be synchronized, and a response message of the port to be synchronized to the delay measurement request message is received, wherein the delay measurement request message carries a first timestamp, which is used to indicate the sending time of the delay measurement request message, and the response message carries a second timestamp, which is used to indicate the receiving time of the response message.

[0089] In the embodiment of the present invention, after obtaining the first receiving time and the actual sending time of the first central message, it is also necessary to calculate the clock deviation value of the port to be synchronized. The clock deviation value refers to the difference between the local clock of the port to be synchronized in the switch and the reference clock (such as the master clock in the switch). The clock deviation value reflects the degree of deviation between the local clock of the switch port and the reference clock. The larger the deviation value, the greater the deviation between the local clock of the switch port and the reference clock, that is, the lower the accuracy of the local clock of the switch port. Therefore, a delay measurement request message can be sent to the port to be synchronized. After receiving the delay measurement request message, the port to be synchronized immediately generates and returns a response message to the master clock for the delay measurement request message. The response message carries a second timestamp, and the second timestamp is used to indicate the receiving time of the response message.

[0090] The link delay value of the port to be synchronized is calculated based on the second timestamp, the original sending time, the actual sending time, and the first receiving time. The calculation formula is as follows:

[0091] Delay=((t4-t1)-(t3-t2)) / 2

[0092] Wherein, Delay represents the link delay value, t1 represents the original sending time of the first center message, t2 represents the first receiving time of the first center message, t3 represents the actual sending time of the first center message, and t4 represents the receiving time of the response message.

[0093] The difference between the first receiving time, the actual sending time and the link delay value is calculated, and the difference is determined as the clock deviation value of the port to be synchronized. The calculation formula is as follows:

[0094] Offset=t2-t3-Delay

[0095] Wherein, Offset represents a clock deviation value, Delay represents a link delay value, t2 represents a first receiving time of the first center message, and t3 represents an actual sending time of the first center message.

[0096] The first local clock of the port to be synchronized is adjusted according to the clock deviation value, so that the first local clock of the port to be synchronized is consistent with the master clock in the switch.

[0097] In an embodiment of the present invention, the link delay value of the port to be synchronized is calculated according to the second timestamp, the original sending time, the actual sending time, and the first receiving time, including:

[0098] Calculate the difference between the second timestamp and the original sending time to obtain the first time data. The calculation formula is as follows:

[0099] T1=t4-t1

[0100] Among them, T1 represents the first time data, t1 represents the original sending time of the first center message, and t4 represents the receiving time of the response message.

[0101] Calculate the difference between the actual sending time and the first receiving time to obtain the second time data. The calculation formula is as follows:

[0102] T2=t3-t2

[0103] Wherein, T2 represents the second time data, t2 represents the first receiving time of the first center message, and t3 represents the actual sending time of the first center message.

[0104] The difference between the first time data and the second time data is calculated to obtain a link delay value, and the calculation formula is as follows.

[0105] Delay=(T1-T2) / 2

[0106] Wherein, Delay represents the link delay value, T1 represents the first time data, and T2 represents the second time data.

[0107] In an embodiment of the present invention, the synchronization state also includes an active synchronization state. When the synchronization state of the port to be synchronized is obtained in step 101, the port to be synchronized in the active synchronization state and the port to be synchronized in the passive synchronization state can be obtained. The present invention first performs clock synchronization processing on the port to be synchronized in the passive state, and synchronizes the first local clock of the port to be synchronized in the passive state with the reference clock (such as the master clock in the switch). After that, the port to be synchronized in the active synchronization state also needs to perform clock synchronization processing.

[0108] Therefore, after adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time, the method further includes:

[0109] Controlling the port to be synchronized in the passive synchronization state to send a second central message and a second supplementary message to the port to be synchronized in the active synchronization state, wherein the port to be synchronized in the active synchronization state is configured with a second local clock;

[0110] Recording a second sending time when the to-be-synchronized port in the passive synchronization state sends a second central message to the to-be-synchronized port in the active synchronization state, and a second receiving time when the to-be-synchronized port in the active synchronization state receives the second central message;

[0111] Calculate the residence time of the second center message according to the second sending time and the second receiving time, the residence time being the difference between the second receiving time and the second sending time;

[0112] The dwell time, the frequency deviation value and the second local clock are multiplied to obtain a second time correction value for the port to be synchronized in the active synchronization state;

[0113] The second local clock is adjusted using the second time correction value so that the second local clock of the port to be synchronized is consistent with the master clock in the switch.

[0114] In the embodiment of the present invention, the switch further includes a third port, and the method further includes:

[0115] The second central message and the second supplementary message are encapsulated according to the configuration level of the port to be synchronized in the active synchronization state. When the port to be synchronized in the active synchronization state is a port supporting the PTP protocol, the second central message and the second supplementary message are encapsulated into a second-layer message. When the port to be synchronized in the active synchronization state is a port supporting the gPTP protocol, the second central message and the second supplementary message are encapsulated according to the configuration level to obtain a third central message and a third supplementary message. Then the port to be synchronized in the active synchronization state is controlled to send the third central message and the third supplementary message to the third port, wherein the synchronization state of the third port is a passive synchronization state.

[0116] In an embodiment of the present invention, the aforementioned port to be synchronized in the passive synchronization state and the port to be synchronized in the passive synchronization state are two ports in the switch connected to the first device, and the switch can be connected to multiple devices. The third port can be another port in the switch connected to the first device, or it can be one of the ports connected to the second device.

[0117] When encapsulating the second central message and the second supplementary message, it is necessary to encapsulate the second sending time, the second time correction value and the frequency deviation value of the second central message in the second supplementary message to obtain the encapsulated third central message and the third supplementary message, thereby sending the third central message and the third supplementary message to the third port, controlling the third local clock of the third port to be consistent with the master clock of the switch, wherein the synchronization state of the third port is a passive synchronization state.

[0118] The clock synchronization process of the third port refers to the clock synchronization process of the port to be synchronized in the passive synchronization state. When the third local clock of the third port is adjusted to be consistent with the master clock of the switch, the third port is controlled again to send the fourth central message and the fourth supplementary message to the fourth port. The synchronization state of the fourth port is the active synchronization state. The fourth port and the third port are two ports in the switch connected to the same device, that is, the fourth port can be another port in the switch connected to the first device, or it can be one of the ports connected to the second device. Repeat the above process until the local clocks of all ports in the switch that need to perform hybrid clock synchronization are consistent with the master clock of the switch.

[0119] The clock synchronization method of the switch provided by the present invention obtains the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, sends a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries the original sending time of the first central message and the first time correction value for the original sending time; the actual sending time of the first central message is calculated based on the original sending time and the first time correction value; the first receiving time when the port to be synchronized receives the first central message is recorded; and the first local clock of the port to be synchronized is adjusted based on the first receiving time and the actual sending time. On the one hand, the present invention adjusts the original sending time through the time correction value carried by the first supplementary message to improve the accuracy of time synchronization, and on the other hand, the local clock is adjusted by calculating the time deviation value based on the receiving time and the actual sending time of the first central message, so that devices supporting PTP and devices supporting gPTP can achieve high-precision clock synchronization through the switch.

[0120] Reference Figure 2 , shows a schematic diagram of the structure of clock synchronization of a switch provided by an embodiment of the present invention, the device includes:

[0121] The first message sending module 201 is used to obtain the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, send a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries the original sending time of the first central message and a first time correction value for the original sending time;

[0122] A first time calculation module 202, configured to calculate the actual sending time of the first center message according to the original sending time and the first time correction value;

[0123] A first time recording module 203, used to record a first receiving time when the port to be synchronized receives a first central message;

[0124] The local clock adjustment module 204 is configured to adjust a first local clock of the port to be synchronized according to the first receiving time and the actual sending time.

[0125] Optionally, the port to be synchronized is configured with a clock synchronization parameter, the port to be synchronized includes at least a first port and a second port, the first port is a port to be synchronized that supports a first clock synchronization protocol, and the second port is a port to be synchronized that supports a second clock synchronization protocol. Before the first message sending module 201, the device includes:

[0126] A first judgment module, used for judging whether the first clock synchronization protocol and the second clock synchronization protocol are the same type of protocol according to the clock synchronization parameter;

[0127] The mode adjustment module is used for adjusting the synchronization mode of the port to be synchronized to the boundary clock mode in response to the first clock synchronization protocol and the second clock synchronization protocol being two types of protocols.

[0128] Optionally, the first time calculation module 202 includes:

[0129] A message parsing module, used to parse the first supplementary message according to the configuration level of the port to be synchronized, to obtain the original sending time of the first central message, the first time correction value for the original sending time, and the frequency deviation value;

[0130] The first time calculation submodule is used to calculate the sum of the original sending time and the first time correction value, and determine the sum as the actual sending time of the first center message.

[0131] Optionally, the local clock adjustment module 204 includes:

[0132] A second message sending module is used to send a delay measurement request message to the port to be synchronized, and receive a response message from the port to be synchronized to the delay measurement request message, the delay measurement request message carries a first timestamp, the first timestamp is used to indicate the sending time of the delay measurement request message, and the response message carries a second timestamp, the second timestamp is used to indicate the receiving time of the response message;

[0133] A link delay value calculation module, used to calculate the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time and the first receiving time;

[0134] A clock deviation value calculation module, used to calculate the difference between the first receiving time, the actual sending time and the link delay value, and determine the difference as the clock deviation value of the port to be synchronized;

[0135] The first local clock adjustment module is used to adjust the first local clock of the port to be synchronized according to the clock deviation value.

[0136] Optionally, the link delay value calculation module includes:

[0137] A first time data generating module, used for calculating the difference between the second timestamp and the original sending time to obtain the first time data;

[0138] A second time data generating module, used for calculating the difference between the actual sending time and the first receiving time to obtain the second time data;

[0139] The link delay value calculation submodule is used to calculate the difference between the first time data and the second time data to obtain the link delay value.

[0140] Optionally, the synchronization state further includes an active synchronization state, and the local clock adjustment module 204 further includes:

[0141] A third message sending module, used for controlling the port to be synchronized in the passive synchronization state to send a second central message and a second supplementary message to the port to be synchronized in the active synchronization state, wherein the port to be synchronized in the active synchronization state is configured with a second local clock;

[0142] Recording a second sending time when the to-be-synchronized port in the passive synchronization state sends a second central message to the to-be-synchronized port in the active synchronization state, and a second receiving time when the to-be-synchronized port in the active synchronization state receives the second central message;

[0143] A second time recording module, used to calculate the residence time of the second center message according to the second sending time and the second receiving time;

[0144] A second time correction value calculation module, used for multiplying the dwell time, the frequency deviation value and the second local clock to obtain a second time correction value for the port to be synchronized in the active synchronization state;

[0145] The second local clock adjustment module is used to adjust the second local clock using the second time correction value.

[0146] Optionally, the switch further includes a third port, and the local clock adjustment module 204 further includes:

[0147] A message encapsulation module, used for encapsulating the second central message and the second supplementary message according to the configuration level of the port to be synchronized in the active synchronization state to obtain a third central message and a third supplementary message;

[0148] The port to be synchronized in the active synchronization state is controlled to send a third central message and a third supplementary message to the third port, wherein the synchronization state of the third port is a passive synchronization state.

[0149] Reference Figure 3 The embodiment of the present invention further provides an electronic device, including a processor 301, a communication interface 302, a memory 303 and a communication bus 304, wherein the processor 301, the communication interface 302 and the memory 303 communicate with each other through the communication bus 304.

[0150] A processor 301, a memory 303 for storing processor executable instructions;

[0151] The processor 301 is configured to execute instructions to implement the clock synchronization method of the switch as described above:

[0152] Obtaining the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, sending a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries an original sending time of the first central message and a first time correction value for the original sending time;

[0153] The actual sending time of the first center message is calculated based on the original sending time and the first time correction value;

[0154] Recording the first receiving time when the port to be synchronized receives the first central message;

[0155] The first local clock of the port to be synchronized is adjusted according to the first receiving time and the actual sending time.

[0156] The communication bus mentioned in the above terminal can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0157] The communication interface is used for communication between the above terminal and other devices.

[0158] The memory may include a random access memory (RAM) or a non-volatile memory, such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0159] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0160] In another embodiment of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the clock synchronization method of the switch in any of the above embodiments is implemented.

[0161] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk Solid State Disk (SSD)), etc.

[0162] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0163] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0164] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A clock synchronization method for a switch, characterized in that: The switch includes a port to be synchronized, and the method includes: Acquire the synchronization state of the port to be synchronized, and when the synchronization state is a passive synchronization state, send a first central message and a first supplementary message to the port to be synchronized, wherein the first supplementary message carries an original sending time of the first central message and a first time correction value for the original sending time; Calculate the actual sending time of the first center message according to the original sending time and the first time correction value; Recording a first receiving time when the port to be synchronized receives the first center message; A first local clock of the port to be synchronized is adjusted according to the first receiving time and the actual sending time.

2. The method according to claim 1, characterized in that The port to be synchronized is configured with a clock synchronization parameter, the port to be synchronized includes at least a first port and a second port, the first port is a port to be synchronized that supports a first clock synchronization protocol, and the second port is a port to be synchronized that supports a second clock synchronization protocol. Before acquiring the synchronization state of the port to be synchronized, the method includes: Determining whether the first clock synchronization protocol and the second clock synchronization protocol are the same type of protocol according to the clock synchronization parameter; In response to the first clock synchronization protocol and the second clock synchronization protocol being two types of protocols, the synchronization mode of the port to be synchronized is adjusted to a boundary clock mode.

3. The method according to claim 1, characterized in that: The calculating the actual sending time of the first center message according to the original sending time and the first time correction value includes: Parsing the first supplementary message according to the configuration level of the port to be synchronized to obtain an original sending time of the first central message, a first time correction value for the original sending time, and a frequency deviation value; The sum of the original sending time and the first time correction value is calculated, and the sum is determined as the actual sending time of the first central message.

4. The method according to claim 1, characterized in that: The step of adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time includes: Sending a delay measurement request message to the port to be synchronized, and receiving a response message from the port to be synchronized to the delay measurement request message, wherein the delay measurement request message carries a first timestamp, which is used to indicate the sending time of the delay measurement request message, and the response message carries a second timestamp, which is used to indicate the receiving time of the response message; Calculate the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time and the first receiving time; Calculating a difference between the first receiving time, the actual sending time, and the link delay value, and determining the difference as a clock deviation value of the port to be synchronized; The first local clock of the port to be synchronized is adjusted according to the clock deviation value.

5. The method according to claim 4, characterized in that The calculating the link delay value of the port to be synchronized according to the second timestamp, the original sending time, the actual sending time and the first receiving time includes: Calculate the difference between the second timestamp and the original sending time to obtain first time data; Calculating the difference between the actual sending time and the first receiving time to obtain second time data; The difference between the first time data and the second time data is calculated to obtain a link delay value.

6. The method according to claim 3, characterized in that The synchronization state further includes an active synchronization state. After adjusting the first local clock of the port to be synchronized according to the first receiving time and the actual sending time, the method further includes: Controlling the port to be synchronized in the passive synchronization state to send a second central message and a second supplementary message to the port to be synchronized in the active synchronization state, wherein the port to be synchronized in the active synchronization state is configured with a second local clock; Recording a second sending time when the to-be-synchronized port in the passive synchronization state sends the second center message to the to-be-synchronized port in the active synchronization state, and a second receiving time when the to-be-synchronized port in the active synchronization state receives the second center message; Calculate the residence time of the second center message according to the second sending time and the second receiving time; The dwell time, the frequency deviation value and the second local clock are multiplied to obtain a second time correction value for the port to be synchronized in the active synchronization state; The second local clock is adjusted using the second time correction value.

7. The method according to claim 6, characterized in that The switch further comprises a third port, and the method further comprises: encapsulating the second central message and the second supplementary message according to the configuration level of the port to be synchronized in the active synchronization state to obtain a third central message and a third supplementary message; The port to be synchronized in the active synchronization state is controlled to send the third central message and the third supplementary message to the third port, wherein the synchronization state of the third port is a passive synchronization state.

8. A clock synchronization device for a switch, characterized in that: The switch includes a port to be synchronized, and the device includes: A first message sending module, used for acquiring the synchronization state of the port to be synchronized, and sending a first central message and a first supplementary message to the port to be synchronized when the synchronization state is a passive synchronization state, wherein the first supplementary message carries an original sending time of the first central message and a first time correction value for the original sending time; A first time calculation module, configured to calculate an actual sending time of the first center message according to the original sending time and the first time correction value; A first time recording module, used for recording a first receiving time when the port to be synchronized receives the first center message; A local clock adjustment module is used to adjust a first local clock of the port to be synchronized according to the first receiving time and the actual sending time.

9. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the instructions to implement the clock synchronization method of the switch according to any one of claims 1 to 7.

10. A readable storage medium, characterized in that: The readable storage medium stores a computer program, and when the computer program is executed by a processor, the clock synchronization method of the switch according to any one of claims 1 to 7 is implemented.

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